Search

This paper proposes a capacitor voltage regulation method for the dual converter with a floating bridge for aerospace applications. This topology has previously been reported, but with a constrained voltage utilization factor due to the need for capacitor voltage regulations. In this paper, the effect of switching states on the voltage variation of capacitor is quantitatively modeled and an enhanced space vector modulation scheme with current feedback is proposed to achieve an active control of the floating capacitor voltages. This proposed method also allows further exploitation and utilization of converter voltage. The relationship between the allowed modulation index of dual converter and load power factor is obtained and expressed using a fitted polynomial equation. The advantages of the proposed method include boosted voltage utilization and superior performance in term of capacitor voltage balance. These advantages have been proven through simulation and experimental results on RL loads as well as with an open-end winding induction motor. The proposed modulation scheme can boost the converter voltage utilization by at least 10% while achieving full four-level operation. More importantly, the higher available voltage allows extending the constant torque region of the motor, the further beginning of field weakening operation could be postponed. [ABSTRACT FROM AUTHOR]

This paper presents two capacitor voltage balancing (CVB) strategies for modular multilevel converter (MMC) applications. Both balancing schemes are based on model predictive control and are designed to efficiently solve a constrained optimal control problem, where the predicted capacitor voltage errors are included in the cost function with the demanded output voltage of a cluster being forced through an equality constraint. The first method proposed in this paper computes specific modulation indexes for each module using the explicit solution of a relaxed version of the original optimization problem. The second approach proposed in this paper reduces the complexity of the original problem by linearizing the objective function and using an optimal sorting network based on a greedy algorithm to solve this approximation. Considering the structures of both solution approaches, they are integrated into modulation schemes based on phase-shifted and level-shifted pulsewidth modulation algorithms, respectively. Experimental results obtained from a nine-cell single-phase MMC prototype demonstrate the good performance achieved with the proposed methodologies, as well as the implementation simplicity offered by the proposed CVB algorithms. [ABSTRACT FROM AUTHOR]

This paper presents an approach for dealing with the control of five-level, diode-clamped rectifiers. The control of such converters is challenging, as voltage balancing among capacitors is not a trivial task. Some of the existing approaches that cope with this problem use specific modifications of one of the traditional modulation techniques, such as using redundant vectors in space vector modulation (SVM). The main feature of the proposed technique is that part of the modulation is considered in the system equations and, in this way, the voltage balance can be solved designing a specific controller for this problem. As a result, several levels are used within a switching period. Furthermore, it is shown that the proposed approach hardly affects the control of active and reactive powers and total dc-link voltage in such a way that the well-known direct power control can be applied. As a consequence, the resultant modulation stage is simpler than other techniques based on, e.g., SVM. The effectiveness and good performance of the system under the proposed control approach are validated by both simulation and experimental results. [ABSTRACT FROM AUTHOR]

Conventional two-level as well as multilevel voltage-source-inverter topologies with a hexagonal voltage-space vector structure generate low-order harmonics in the machine terminal voltages when operated beyond the linear modulation range in variable speed drive application. Progressing from hexagonal to a higher sided polygonal voltage-space-vector structure (VSVS) suppresses significant low-order harmonics throughout the modulation range. In addition, the linear modulation range will also be enhanced very near to the base speed. In this paper, for the first time, the generation of a multilevel 24-sided VSVS using a single dc source for induction-motor drives is proposed. A cascaded topology with a dc-source-fed flying-capacitor inverter and two low-voltage capacitor-fed H-bridge cells forms the power circuit. The features and advantages of the proposed scheme are validated through experimental results and discussions. [ABSTRACT FROM AUTHOR]

This paper proposes a novel 11-level improved active-neutral-point-clamped (11L-IANPC) converter for ground power unit (GPU) application. This hybrid topology consists of the 5L-ANPC and the proposed low-voltage submodule. The proposed 11L-IANPC converter possesses only one flying capacitor (FC) and reduced number of high-frequency switches. Hence, voltage diversity and ratings, stored energy, and the number of costly and bulky FCs are significantly decreased. Moreover, operating the augmented submodule at the low voltage and power leads to doubling the number of output voltage levels, whereas the low extra cost and size are imposed on the proposed converter. In addition, suggested sensorless switching method leads to self-balancing of FC and significantly amends the output voltage frequency spectrum. These improvements cause significant reduction in control complexity of the proposed 11L-IANPC converter, remarkable decrease in size of the bulky and costly output LC filter, and improving the dynamic and steady-state performance of the proposed static GPU. The simulation and experimental results validate the feasibility of the proposed converter as well as its suggested modulation and control method. [ABSTRACT FROM AUTHOR]

Multilevel inverters with dodecagonal (12-sided polygon) voltage space vector structure have advantages, such as complete elimination of fifth and seventh harmonics, reduction in electromagnetic interference, reduction in device voltage ratings, reduction of switching frequency, extension of linear modulation range, etc., making it a viable option for high-power medium-voltage drives. This paper proposes two power circuit topologies capable of generating multilevel dodecagonal voltage space vector structure with symmetric triangles (for the first time) with minimum number of dc-link power supplies and floating capacitor H-bridges. The first power topology is composed of two hybrid cascaded five-level inverters connected to either side of an open-end winding induction machine. Each inverter consists of a three-level neutral-point-clamped inverter, which is cascaded with an isolated H-bridge making it a five-level inverter. The second topology is for a normal induction motor. Both of these circuit topologies have inherent capacitor balancing for floating H-bridges for all modulation indexes, including transient operations. The proposed topologies do not require any precharging circuitry for startup. A simple pulsewidth modulation timing calculation method for space vector modulation is also presented in this paper. Due to the symmetric arrangement of congruent triangles within the voltage space vector structure, the timing computation requires only the sampled reference values and does not require any offline computation, lookup tables, or angle computation. Experimental results for steady-state operation and transient operation are also presented to validate the proposed concept. [ABSTRACT FROM PUBLISHER]

This paper presents an optimized topology of 3-$\phi$ , multilevel inverter (MLI) configuration for five or higher level operation with reduced switch count. The proposed solution consists of two basic units (BUs) of multilevel converter and a T-structured 3-level inverter (3-LI). Both BUs are equally shared by the three phases maintaining symmetry among the phases. Moreover, for a higher level operation of the proposed MLI, the modifications required are at two BUs only and not at three legs of the inverter. It further helps in reducing the requirement of extra components for higher level operation compared to the conventional solutions. Furthermore, the topology also has the benefits of reduced switching and conduction loss. An algorithm is also devised to generate the switching pulses for the BUs and the 3-LI, using a carrier-based space vector modulation technique. Presented topology is compared with other existing topologies to prove its advantage. All the details regarding the operating modes and pulse width modulation techniques employed for the proposed system are given and supported by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

Adding the auxiliary switches to the conventional H-bridge inverter is an effective way to eliminate the leakage current for transformerless PV systems, such as H5, H6, etc. Inspired by the newly developed embedded-switch H6 topology, a novel embedded-switch inverter (ESI) is proposed in this paper for three-phase transformerless PV systems. First, the operation principle and characteristics of the proposed ESI are analyzed. Second, the common-mode model of the three-phase ESI is established, based on which the main factors that affect the leakage current are discussed. The finding reveals that the switching states with conventional modulation strategy result in high-frequency common-mode voltage, which is the source of leakage current. In order to solve the problem, a new modulation strategy is presented for ESI to eliminate the high-frequency leakage current. Finally, the time-domain simulation and the experimental tests are carried out. The results verify the effectiveness of the proposed solution. [ABSTRACT FROM AUTHOR]

This paper proposes a family of novel flying capacitor transformerless inverters for single-phase photovoltaic (PV) systems. Each of the new topologies proposed is based on a flying capacitor principle and requires only four power switches and/or diodes, one capacitor, and a small filter at the output stage. A simple unipolar sinusoidal pulse width modulation technique is used to modulate the inverter to minimize the switching loss, output current ripple, and the filter requirements. In general, the main advantages of the new inverter topologies are: 1) the negative polarity of the PV is directly connected to the grid, and therefore, no leakage current; 2) reactive power compensation capability; and 3) the output ac voltage peak is equal to the input dc voltage (unlike neutral-point-clamped and derivative topologies, which requires twice the magnitude of the peak ac voltage). A complete description of the operating principle with modulation techniques, design guidelines, and comprehensive comparisons is presented to reveal the properties and limitations of each topology in detail. Finally, experimental results of 1-kVA prototypes are presented to prove the concept and theoretical analysis of the proposed inverter family for practical applications. [ABSTRACT FROM PUBLISHER]

Many different topologies based on the multilevel converter approach have been presented in the last decades. In order to obtain improved output waveforms, several modulation techniques have been developed for such converters. Some of those modulation schemes can be directly applied to almost any multilevel converter, while others require significant adaptation in order to be implemented in certain specific converters. This paper presents the implementation of a phase-disposition level-shifted pulsewidth modulation to the recently introduced hybrid multicell converter (HMC). The HMC uses a flying capacitor module on each cell to generate a positive variable dc-link voltage. The variable dc link is inverted at fundamental switching frequency by an H-bridge to generate the cell output voltage. It is desirable to use PD-PWM for its well-known high-performance waveforms. In this paper, a state-machine decoder is developed to balance the floating capacitor voltages and to equalize the supplied power for the series-connected cells of the HMC when using a PD-PWM pattern. Experimental results obtained from a 10-kW prototype are presented, confirming the good-quality waveforms of the HMC modulated with PD-PWM and the adequate balance of all floating capacitors. [ABSTRACT FROM PUBLISHER]

The five-phase coupled-inductor inverter is a newly proposed option for three-level five-phase inverter drives. This paper comprehensively analyzes the inverter including the coupled-inductor current, current stress on the dc-link capacitors, and a comparison of these performance aspects using three pulse width modulation (PWM) strategies. Mathematical derivations of the inverter currents and the associated current stress reveal that the current stress is not only influenced by the choice of modulation strategy, as in the neutral-point-clamped topology, but also by the value of coupled inductance; furthermore, the choice of the modulation strategy impacts the core loss of the coupled inductors. Three carrier-based PWM methods are considered: sinusoidal PWM (SPWM), and two methods with the common-mode voltage reduction (referred to as CMVR1 and CMVR2) for the five-phase coupled-inductor inverter. CMVR2 is shown to be the best solution if common-mode voltage reduction is required. The analysis demonstrates that SPWM performs better with respect to current stress and inverter losses, therefore is the preferable modulating strategy for the five-phase coupled-inductor inverter if common-mode voltage reduction is not required. The analysis is verified by simulations and experiments. [ABSTRACT FROM AUTHOR]

The reduced capability of multilevel converters with more than one intermediate node to balance the dc-link capacitors voltage, as well as the lack of standard modulation methods to improve their balancing performance, makes these converter topologies unattractive for real power applications. This is especially true when the load demands active power. One of these topologies is the five-level multipoint clamped (5L-MPC) converter. The back-to-back (B2B) configuration of two 5L-MPC converters and the use of a space vector modulation (SVM) that exploits the voltage balancing capability of the redundant switching vectors extend the operation conditions range in which a proper voltage balance can be achieved. However, if practical modulation restrictions are considered (limitation of voltage steps, dead times, switching losses, etc.), the voltage balance cannot be achieved for all operation conditions. In this paper, an SVM which takes into account practical restrictions is proposed. In order to guarantee the voltage balance at any operation condition, the grid-side rectifier exchanges reactive power with the grid-side LCL filter. Thus, the voltage balance of the dc-link is guaranteed while a unity grid-side power factor is achieved. The proposed modulation scheme and the voltage balancing strategy are experimentally validated in a 6.6 kV 1.5 MW 5L-MPC B2B converter. [ABSTRACT FROM AUTHOR]

In this paper, a novel cascaded seven-level inverter topology with a single input source integrating switched-capacitor techniques is presented. Compared with the traditional cascade multilevel inverter, the proposed topology replaces all the separate dc sources with capacitors, leaving only one H-bridge cell with a real dc voltage source and only adds two charging switches. The capacitor charging circuit contains only power switches, so that the capacitor charging time is independent of the load. The capacitor voltage can be controlled at a desired level without complex voltage control algorithm and only use the most common carrier phase-shifted sinusoidal pulse width modulation strategy. The operation principle and the charging–discharging characteristic analysis are discussed in detail. A 1-kW experimental prototype is built and tested to verify the feasibility and effectiveness of the proposed topology. [ABSTRACT FROM AUTHOR]

This paper proposes a new topology for an enhanced-boost Z-source inverter (ZSI) with combined two Z-impedance networks. By two Z-impedance networks and low shoot-through duty cycle, the proposed inverter produces high output voltage gain. In traditional ZSIs for high boosting voltage, a low modulation index is required; hence, under these conditions, the output voltage will have low quality with high total harmonic distortion. Compared with the conventional high-boost ZSI topologies, the proposed inverter uses shorter shoot-through duration and a larger modulation index to improve the output waveform quality. Comparison between the proposed topology and previously proposed schemes, in terms of inductor numbers, voltage and current stresses on elements, sizes of inductors and capacitors, efficiency, and switching device product (SDP) factors of diodes, is made, and the results verify the priority of the proposed topology. The operating principle of the proposed topology is analyzed in detail. Both simulation and experimental results verify the high performance of the proposed inverter. [ABSTRACT FROM PUBLISHER]

High-boost dc-ac inverters are used in solar photovoltaic (PV), fuel cell, wind energy, and uninterruptible power supply systems. High step-up and step-down capabilities and shoot-through immunity are some of the desired properties of an inverter for a reliable, versatile, and low-distortion ac inversion. The recently developed Z-source inverter (ZSI) possesses these qualities. However, the realization of ZSI comes at a cost of higher passive component count as it needs two sets of passive filters. A switched boost inverter (SBI) has similar properties as ZSI, and it has one L\-C pair less compared to ZSI, but its gain is less than ZSI. This paper proposes the current-fed switched inverter (CFSI) which combines the high-gain property of ZSI and low passive component count of SBI. The proposed inverter uses only one L\-C filter and three switches apart from the inverter structure. The inverter topology is based on current-fed dc/dc topology. Steady-state analysis of the inverter is presented to establish the relation between the dc input and the ac output. A pulse width modulation (PWM) control strategy is devised for the proposed inverter. An experimental prototype is built to validate the proposed inverter circuit in both buck and boost modes of operation. A 353-V dc-link and a 127 V (rms) ac are obtained from a 35.3-V dc input to demonstrate the boost mode of operation. A 200-V dc-link and a 10.5-V (rms) ac are obtained from a 37.8-V dc input to verify the buck mode of operation of CFSI. [ABSTRACT FROM PUBLISHER]

A new scheme for nine-level voltage space-vector generation for medium-voltage induction motor (IM) drives with open-end stator winding is presented in this paper. The proposed nine-level power converter topology consists of two conventional three-phase two-level voltage source inverters powered by isolated dc sources and six floating-capacitor-connected H-bridges. The H-bridge capacitor voltages are effectively maintained at the required asymmetrical levels by employing a space vector modulation (SVPWM) based control strategy. An interesting feature of this topology is its ability to function in five- or three-level mode, in the entire modulation range, at full-power rating, in the event of any failure in the H -bridges. This feature significantly improves the reliability of the proposed drive system. Each leg of the three-phase two-level inverters used in this topology switches only for a half cycle of the reference voltage waveform. Hence, the effective switching frequency is reduced by half, resulting in switching loss reduction in high-voltage devices. The transient as well as the steady-state performance of the proposed nine-level inverter-fed IM drive system is experimentally verified in the entire modulation range including the overmodulation region. [ABSTRACT FROM PUBLISHER]

Domestic induction appliances require power converters that feature high efficiency and accurate power control in a wide range of operating conditions. To achieve this modulation techniques play a key role to optimize the power converter operation. In this paper, a series resonant inverter featuring reverse-blocking insulated gate bipolar transistors and an optimized modulation technique are proposed. An analytical study of the converter operation is performed, and the main simulation results are shown. The proposed topology reduces both conduction and switching losses, increasing significantly the power converter efficiency. Moreover, the proposed modulation technique achieves linear output power control, improving the final appliance performance. The results derived from this analysis are tested by means of an experimental prototype, verifying the feasibility of the proposed converter and modulation technique. [ABSTRACT FROM PUBLISHER]

This paper presents a new three-level topology based on the neutral-point (NP)-clamped converter. An additional leg is added to the basic topology. The main purpose of this leg is to provide the converter with fault-tolerant capabilities. In addition, during normal operation mode, the fourth leg can be used to balance the NP voltage. In this way, the low-frequency voltage oscillations that appear in the NP under some operating conditions are cancelled out effectively. As a result, the modulation strategy of the three main legs of the converter does not have to take care of the voltage balance and can focus on other aspects such as, for instance, minimizing the switching losses of the converter. However, the inclusion of the fourth leg produces some additional losses. A resonant topology is proposed to minimize the switching losses of this leg. Three different fault-tolerant solutions based on the fourth-leg topology are presented. A comparison of these topologies showing their respective advantages and drawbacks is made. Experimental results are presented to show the viability of this approach. [ABSTRACT FROM AUTHOR]

In this paper, a new five-level inverter topology for open-end winding induction-motor (IM) drive is proposed. The open-end winding IM is fed from one end with a two-level inverter in series with a capacitor-fed H-bridge cell, while the other end is connected to a conventional two-level inverter. The combined inverter system produces voltage space-vector locations identical to that of a conventional five-level inverter. A total of 2744 space-vector combinations are distributed over 61 space-vector locations in the proposed scheme. With such a high number of switching state redundancies, it is possible to balance the H-bridge capacitor voltages under all operating conditions including overmodulation region. In addition to that, the proposed topology eliminates 18 clamping diodes having different voltage ratings compared with the neutral point clamped inverter. On the other hand, it requires only one capacitor bank per phase, whereas the flying-capacitor scheme for a five-level topology requires more than one capacitor bank per phase. The proposed inverter topology can be operated as a three-level inverter for full modulation range, in case of any switch failure in the capacitor-fed H-bridge cell. This will increase the reliability of the system. The proposed scheme is experimentally verified on a four-pole 5-hp IM drive. [ABSTRACT FROM PUBLISHER]