Search

The impedance-source network converter, utilizing a unique LC network and previously forbidden shoot-through states, provides the ability to buck and boost the input voltage in a single stage. However, the inrush shoot-through current (STC) in startup or transient process might cause undesired current stresses on converter devices. This paper focuses on the STC sensing for an effective inrush current limitation by the combined current sensing technique in the quasi-Z-source inverter. STC and phase currents for the inverter control strategy are obtained simultaneously. No extra hardware is needed and the effects of current sensor bandwidth and duty cycle on the sensing accuracy are analyzed mathematically. The voltage spike gets avoided by integrating the stray inductance into the impedance network. Finally, an STC control loop based on proposed method are embedded in the field-oriented control strategy. The inrush STC and the device current stress in the transient process get suppressed. Simulation and experimental results from a quasi-Z-source inverter validate the feasibility of the proposed methods. [ABSTRACT FROM PUBLISHER]

In this paper, a design method is proposed for finding the equivalent inductance and capacitance of the single-ended primary-inductor converter (SEPIC). The relations of the output voltage ripple (OVR) of the SEPIC converter are obtained in complete inductor supply mode–continuous conduction mode (CISM-CCM), incomplete inductor supply mode-CCM (IISM-CCM), and IISM-discontinuous conduction mode (IISM-DCM). The maximum of OVR (MOVR) is investigated for a specified range of the input voltage and load resistance. This value of the MOVR is obtained for the minimum values of input voltage and load resistance. In this paper, the minimum values of the equivalent inductance and capacitance are calculated in obtaining the minimum value of the MOVR. One of the other performed studies in this paper is calculation of the switch peak current in CCM and DCM. In addition, the converter is designed based on the minimum values of the MOVR and stress of the switching current. Experimental and simulation results are used to prove the validity of the presented theoretical subjects. [ABSTRACT FROM PUBLISHER]

The Z-source inverter (ZSI) employs an LC impedance network between the main inverter bridge and the power source. The unique feature of the ZSI is that it can operate either in buck or boost mode with a wide range of obtainable output voltages from a given input voltage. This topology also exhibits better electromagnetic-interference noise immunity when compared to a traditional voltage-source inverter (VSI). However, the LC impedance network of ZSI significantly increases the size and cost of the power converter and can make it unsuitable for low-power applications. This paper proposes a novel topology called switched boost inverter (SBI) which exhibits similar advantages of ZSI with lower number of passive components and more active components compared to ZSI. The steady-state and small-signal analyses of SBI, along with its pulsewidth modulation (PWM) control strategies, have been discussed in this paper. This paper also presents a comparison of SBI and ZSI with the same input and output parameters. The theoretical analysis given in this paper has been validated using a laboratory prototype of SBI, and the experimental results are presented for verification. The experimental harmonic spectrum of the inverter's output voltage with the proposed PWM technique is also plotted and compared with that of a traditional VSI. All the experimental results show good correlation between theory and experiments. [ABSTRACT FROM PUBLISHER]

Neutral-point (NP)-clamped three-level inverter, which is a widely used topology of multilevel converters, suffers from the NP voltage drift as its main technical drawback. The nearest-three-virtual-vector (\NTV^2) modulation method can control the NP voltage balance for any load over the full range of inverter output voltage. However, compared with the nearest-three-vector (NTV) modulation method, \NTV^2 increases the switching frequency. This paper combines \NTV^2 with NTV, and the two methods are used alternately in a fundamental cycle. The duty-cycle coefficients of the redundant small vectors are analyzed to explore the intervals where NTV can control the NP voltage balance in a fundamental cycle. The proportional parameter, which represents the combination of the two methods in hybrid space vector pulsewidth modulation, can be selected to achieve a high-performance NP balance control and low switching frequency. The steady- and transient-state behaviors of the proposed strategy are analyzed in this paper. The experimental results verify the validity of the proposed strategy. [ABSTRACT FROM PUBLISHER]

In the paper by Chen et al. (IEEE Trans. Ind. Electron., vol. 66, no. 4, pp. 2837–2846, Apr. 2019), the authors proposed two fault-tolerant control strategies for T-type three-level inverters considering neutral-point (NP) voltage oscillations. However, some basic problems are worth being discussed about the proposed fault-tolerant control methods. This letter presents some comments and results concerning the paper by Chen et al. [ABSTRACT FROM AUTHOR]

Many different topologies based on the multilevel converter approach have been presented in the last decades. In order to obtain improved output waveforms, several modulation techniques have been developed for such converters. Some of those modulation schemes can be directly applied to almost any multilevel converter, while others require significant adaptation in order to be implemented in certain specific converters. This paper presents the implementation of a phase-disposition level-shifted pulsewidth modulation to the recently introduced hybrid multicell converter (HMC). The HMC uses a flying capacitor module on each cell to generate a positive variable dc-link voltage. The variable dc link is inverted at fundamental switching frequency by an H-bridge to generate the cell output voltage. It is desirable to use PD-PWM for its well-known high-performance waveforms. In this paper, a state-machine decoder is developed to balance the floating capacitor voltages and to equalize the supplied power for the series-connected cells of the HMC when using a PD-PWM pattern. Experimental results obtained from a 10-kW prototype are presented, confirming the good-quality waveforms of the HMC modulated with PD-PWM and the adequate balance of all floating capacitors. [ABSTRACT FROM PUBLISHER]

In this paper, an immune algorithm (IA) is developed for optimization of the harmonic performance of a three-phase inverter under the space-vector pulsewidth-modulation (SVPWM) control strategy. The presented algorithm employs the immune approach as the search method for finding the best optimal control vectors and action time of the three-phase inverter. As a result, the optimal control vectors and action time are calculated to minimize the objective function of the weighted total harmonic distortion of the output voltage waveforms. In addition, an experimental platform based on DSP and field-programmable gate array is built. This paper provides a detailed performance analysis of the method with comparison to the conventional SVPWM. The simulation and experimental results verify the superiority of the best control sequences generated by IA compared with the existing conventional control strategies. [ABSTRACT FROM PUBLISHER]

A new pulse width modulation (PWM) strategy which is an alternative approach of the discontinuous PWM (DPWM) for a three-level neutral-point-clamped (NPC) inverter is developed and presented in this paper. The proposed PWM scheme not only takes advantage of the special properties available in NPC inverters, but also reduces the switching loss of the inverter along with an inherent neutral point (NP) voltage control. Based on a circuit-level decoupling concept, the NPC inverter can be decoupled into two three-level Buck converters in every defined operating section, and thereby the controller design can be simplified. The salient features of the proposed scheme, as compared with the existing carrier-based DPWM strategies, are: 1) its reduced computational processing time, 2) its capability to balance the dc-link voltage without any additional control, and 3) its reduced complexity, e.g., only one carrier wave needed for pulse width modulating. Same as a space-vector modulation, the maximum modulation index, 1.1547, can be attainable by the proposed scheme. Moreover, compared to conventional continuous sinusoidal PWM, using this technique proposed here, the switching losses of the devices can be reduced by one third. In order to explain the operation of this topology properly, the decoupling principle including the driving signal synthesis and the NP potential variation are analyzed in detail in this paper. Finally, the viability and performance of the proposed modulation scheme are shown through simulation and experimental results in a laboratory prototype. [ABSTRACT FROM PUBLISHER]

A new approach for modulation of an 11-level cascade multilevel inverter using selective harmonic elimination is presented in this paper. The dc sources feeding the multilevel inverter are considered to be varying in time, and the switching angles are adapted to the dc source variation. This method uses genetic algorithms to obtain switching angles offline for different dc source values. Then, artificial neural networks are used to determine the switching angles that correspond to the real-time values of the dc sources for each phase. This implies that each one of the dc sources of this topology can have different values at any time, but the output fundamental voltage will stay constant and the harmonic content will still meet the specifications. The modulating switching angles are updated at each cycle of the output fundamental voltage. This paper gives details on the method in addition to simulation and experimental results. [ABSTRACT FROM PUBLISHER]

In this paper, a space vector pulsewidth modulation (PWM) (SVPWM) algorithm is proposed, which is in \alpha^\prime\beta^\prime frame with dc-link capacitor voltage equalization for diode-clamped multilevel converters (DCMCs). The \alpha^\prime\beta^\prime frame is a coordinate system similar to the \alpha\beta frame. In this frame, some original complex calculations are substituted by integer additions, integer subtractions, truncations, etc. It brings the time and area efficiency to fixed-point digital realization, particularly for the application in a field-programmable gate array. Meanwhile, a minimum energy property of multiple dc-link capacitors is applied as the basic principle for voltage equalization based on a capacitor current prediction algorithm. By evaluating the redundant vectors in each pulse dwelling period, the balancing algorithm chooses an optimal vector, generates the optimal PWM signals, and sustains the voltage stability. After that, an arbitrary multilevel SVPWM intellectual property core is designed and analyzed in the \alpha^\prime\beta^\prime frame. At the end of this paper, a five-level DCMC-based static synchronous compensator is built and tested. The experimental results verify the balancing algorithm and the system steady-state and dynamic performances. [ABSTRACT FROM PUBLISHER]

Modular multilevel converter (MMC) is a newly emerging multilevel topology for high-voltage applications during recent years. In this paper, a new MMC is proposed, and the structure and operating principle are analyzed. Owing to the cascaded basic cells without multiwinding transformer, the voltage balancing of floating capacitors must be considered. However, the voltage fluctuation also exists, and theoretical analysis indicates that the amplitude is inversely proportional to the fundamental frequency. This paper has proposed a voltage-fluctuation-suppression method which can reduce the amplitude of the voltage fluctuation in low-frequency region. It can also be used in motor driving with pump/blowerlike load at low frequency and improve the start-up performance significantly. A low-power three-phase five-level prototype is designed and built up to demonstrate the validity of this method. [ABSTRACT FROM PUBLISHER]

This paper discusses the implementation of level-shifted and phase-shifted carrier-based modulation methods, in conjunction with a multiphase open-end winding drive topology. The considered drive is supplied using two five-phase two-level voltage source inverters (VSIs), with input provided from two isolated supplies of equal dc voltages. The topology is known to yield the same space-vector pattern as a corresponding three-level inverter in single-sided supply mode. It is shown in this paper that, with the application of a simple logic, the same phase voltage waveforms result as those obtainable with the appropriate carrier-based modulation scheme applied to the three-level VSI in single-sided supply mode. While the outcomes of the modulation techniques are the same, the open-end winding topology offers certain advantages, such as modularity and absence of capacitor voltage balancing requirements. The analysis is conducted for selected modulation methods using voltage and current waveforms, spectra Fast Fourier Transform (FFT), and total harmonic distortion as figures of merit. Theoretical considerations are verified by means of simulation and experimental results. [ABSTRACT FROM PUBLISHER]

This paper proposes an alternative strategy of finite-control-set model-predictive torque control (MPTC) to reduce the computational burden and the torque ripple and decouple the switching frequency from the controller sampling time. An improved discrete space-vector modulation (DSVM) technique is utilized to synthesize a large number of virtual voltage vectors. The deadbeat (DB) technique is used to optimize the voltage vector selection process, avoiding enumerating all the feasible voltage vectors. With this proposed method, only three voltage vectors are tested in each predictive step. Based on the improved DSVM method, the three candidate voltage vectors are calculated by using a novel algebraic way. This new strategy has the benefits of both the MPTC method and the DB method. The effectiveness of the proposed strategy is validated based on a test bench. [ABSTRACT FROM PUBLISHER]

This paper deals with a standalone doubly fed induction generator-direct current (DFIG-dc) system, where stator and rotor are connected to an isolated dc load, via diode rectifier and voltage-source inverter, respectively. A direct torque control scheme is proposed for dc voltage regulation, where the dc voltage is regulated by a torque controller, while stator frequency is maintained at a nearly rated frequency, by achieving constant dc voltage to rotor flux ratio. An innovative switching strategy is developed to incorporate the phase sequence change in rotor current from subsynchronous speed to supersynchronous speed. Variable switching due to a hysteresis controller provides a reduction in the harmonic content of stator current. This control is simple in implementation, and less parameter dependent. There is no requirement of exact position sensing, while the speed measurement is sufficient, which also reduces the cost and maintenance of an accurate position sensor. Sensing of stator voltage and current is not required in this scheme, and control is done with a minimum number of sensors. As the number of turns on the stator is higher than the rotor, to have common dc link and to exploit rated stator MMF, roles of stator and rotor are interchanged. Performance of the control scheme is verified experimentally on a 4 kW DFIG, and results are reported. [ABSTRACT FROM AUTHOR]

In this paper, a new cascade switch-ladder multilevel inverter topology is presented which can generate a large number of output voltage levels. First, a fundamental switch-ladder multilevel inverter structure is described. Then, the structure of recommended cascade topology based on series connection of fundamental switch-ladder topologies is presented. To generate maximum number of levels with minimum number of switching elements, dc sources, and voltage on switches, the proposed cascade topology is optimized. Comparison results prove that the presented cascade topology requires fewer numbers of components. Also, the value of voltage rating on switches is less than other structures. Experimental results for two topologies are analyzed to verify the performance of the proposed topology. [ABSTRACT FROM PUBLISHER]

A new concept of dual-dc-port asymmetrical multilevel inverter (DP-AMI), which is able to interface a low-voltage dc port, a high-voltage dc port, and an ac port simultaneously using only one topology, is presented in this paper. A systematic method to derive the DP-AMI is proposed. With the proposed DP-AMI, a low-voltage dc source, e.g., photovoltaic (PV) modules or battery, can directly supply power to the ac load within single-stage power conversion. Therefore, in comparison with a traditional two-stage dc/ac power conversion system, the power conversion stages are reduced and the voltage/current stress of the front-end dc/dc converter can be significantly alleviated, which can improve the overall conversion efficiency dramatically. Furthermore, by using the low-voltage dc source as a new voltage level, asymmetrical multiple voltage levels are generated by the proposed DP-AMI, which is beneficial for the reducing switching losses and the size/volume of the output filter. The topology derivation method of the DP-AMIs is presented. The operation principles, modulation schemes, and characteristics of one of the proposed DP-AMIs are analyzed in detail. A 1-kW prototype is built and tested to verify the effectiveness and advantages of the proposed method. [ABSTRACT FROM PUBLISHER]

This paper proposes a unique carrier-based pulse width modulation strategy for a three-level neutral-point-clamped inverter that works satisfactorily and with uniform convergence time over the full power factor (PF) range of the load variation. It has excellent control over capacitor voltages and mitigates low-frequency oscillations in the neutral point for the full PF range. First, an investigation is made to see how the load currents get modulated to generate compensating neutral current causing charging and discharging of dc-link capacitors. It is observed that when an additional modulating voltage signal that is in phase with the corresponding phase current is added in each phase, a neutral current is produced in the right direction which can be used to compensate for any prior unbalance in capacitor voltages. It is demonstrated that the performance of this scheme is insensitive to the load PF variation (full range from zero to unity). It performs satisfactorily throughout the entire linear modulation range and eliminates any undesirable low-frequency harmonic component in the compensating neutral current. The effectiveness of the proposed scheme is verified through simulation and experimental results by varying load PF as well as modulation index with both passive and motor loads. [ABSTRACT FROM PUBLISHER]

A novel transformerless buck–boost dc–dc converter is proposed in this paper. The presented converter voltage gain is higher than that of the conventional boost, buck–boost, CUK, SEPIC, and ZETA converters, and high voltage can be obtained with a suitable duty cycle. In this converter, only one power switch is utilized. The voltage stress across the power switch is low. Hence, the low on-state resistance of the power switch can be selected to decrease conduction loss of the switch and improve efficiency. The presented converter has simple structure, therefore, the control of the proposed converter will be easy. The principle of operation and the mathematical analyses of the proposed converter are explained. The validity of the presented converter is verified by the experimental results. [ABSTRACT FROM PUBLISHER]

This paper presents a new family of hybrid Z-source boost dc–dc converters intended for photovoltaic applications, where the high step-up dc–dc converters are demanded to boost the low-source voltages to a predefined grid voltage. Because the boost capabilities of the traditional Z-source networks are limited, the proposed converters are composed of combine traditional Z-source networks in different ways to enhance the boost abilities of the traditional Z-source networks. The new version of the proposed Z-source converters is termed as hybrid Z-source boost dc–dc converters to satisfy the traditional benefits of Z-source networks with stronger voltage boost abilities which can also be applied to dc–ac, ac–ac, and ac–dc power conversions. The performances of the proposed converters are compared with other Z-source networks behaviors. The simulation and experimental results of the proposed converters are validated at different operating conditions. [ABSTRACT FROM PUBLISHER]

This paper proposes a new power conversion scheme for paralleled server power supplies. The snubber capacitor voltage is utilized for the secondary voltage source, from which bidirectional buck converter provides output power to the load under a very light-load condition. To increase the energy of the secondary voltage source, an additional voltage bus is connected between the snubber capacitors from each power supply. The main advantage of the proposed scheme is that high efficiency can be achieved especially under a very light-load condition because of the low switching and core loss achieved by using the buck converter instead of the conventional structure composed of a primary inverter, an isolation transformer, and a secondary rectifier. Furthermore, the buck converter is integrated into the secondary rectifier circuits, so additional components are minimized. The validity of the proposed converter is confirmed by the experimental results from two 12-V/750-W prototype modules. [ABSTRACT FROM PUBLISHER]

This paper presents an adaptive observer (AO)-based model predictive control (MPC) for a multilevel flying capacitors inverter (FCI). The proposed system consists of a midpoint dc-link three-cell four-level FCI feeding an RL load. Using the actual load current, the proposed AO estimates accurately the capacitors’ voltages, which are fed to the MPC algorithm by means of a hybrid model considering both discrete and continuous variables. For real-time constraints, sufficient conditions are given to guarantee the practical stability of the proposed AO-based MPC. Theoretical analysis and experimental results are given to show that the proposed method is stable for all system configurations and has good performances even during disturbances (load change, input change, and parameters variations). [ABSTRACT FROM AUTHOR]

This paper proposes a novel high step-up nonisolated single switch dc–dc converter suitable for regulating dc bus in various microsources especially for photovoltaic (PV) sources. Quadratic boost and switched-capacitor technique are used as primary and secondary circuits, respectively. A coupled inductor is applied to make a connection between them, so a high dc voltage gain is achieved. High efficiency is yield where voltage stress on active switch is alleviated by clamped capacitor; consequently, smaller \rmR\rm{DS(ON)} for power switch is required. On the other hand, input current of the proposed converter is continued, hence stress on the input source is reduced. The operating principles and steady-state analyses are discussed in detail for both continuous and discontinuous conduction modes. Also, the boundary condition is computed. To verify the performance of the proposed converter and theoretical calculations, a 250-W prototype converter is implemented with an input voltage of 24 V and an output voltage of 400 V designed especially for PV sources in continuous conduction mode operation. Finally, simulation results are confirmed by experimental results; maximum efficiency is occurred at 150 W and full-load efficiency is 92.96%. [ABSTRACT FROM AUTHOR]

Compensation of nonlinear effects generated by dead-time and semiconductors voltage drop has been widely studied in the literature about two-level converters. This paper takes a closer look at those analyses for multilevel converters, specifically for a cascaded H-bridge (CHB) converter modulated with phase-shifted pulse width modulation. The interaction between the cells is analyzed for a generic $n$ -cell converter, from which a general expression for the distortion generated by the nonlinearities has been obtained. Based on this expression, a compensation signal for the overall converter is calculated on each sample time, which is a fraction of the triangular carrier used to modulate each cell, thus significantly improving the quality of the output voltage signals. Experimental validation of the proposed compensation method is presented using a three-phase four-cell CHB converter prototype of 5.5 kW. [ABSTRACT FROM AUTHOR]

A new cascade topology for multilevel converter is introduced in this paper which comprises series connection of several submultilevel units. To determine the magnitudes of the dc sources, two new methods are described. The proposed topology is optimized to generate any levels with minimum number of components and peak voltage on switches. The presented topology can be used in high-voltage applications due to using the switches with low voltage rating. To indicate the merits of the proposed structure, comparison studies are provided with other topologies in terms of the number of elements and peak voltage on switches. The comparison results prove that the presented cascade multilevel converter requires fewer components. Moreover, it is shown that the total peak voltage on switches in the proposed topology is less than other structures. Experimental work is presented to demonstrate the performance of the presented multilevel converter. [ABSTRACT FROM PUBLISHER]

Space vector modulation (SVM) control of multilevel inverters (MLIs) is very popular. However, it gets extremely challenging with the increase in the number of output voltage levels due to the emergence of subtriangles in the various sectors of the hexagon, which results in increased computational complexity and storage requirements of switching states and corresponding pulse durations. Currently, this is handled through laborios offline computations in conjunction with the visual inspection of the space vector hexagon and its various sectors. This paper aims to simplify the implementation of the SVM scheme for an n-level MLI by proposing generalized equations that not only facilitate direct online computation of control pulses and obviate the requirement of lookup tables but also result in optimized switching. Yet, the on-time computations of the various MLI switches are still based on simple two-dimensional Cartesian co-ordinate system combined with the basic two-level inverter implementation. The proposed scheme makes use of a unique l-factor approach, which directly identifies the location of the various subtriangles in the space vector hexagon and leads to direct online computations of the control pulses. The proposed scheme is validated by simulations and experimental results for three- and five-level diode clamped MLI. [ABSTRACT FROM AUTHOR]

In this paper, a novel topology of six-level inverters for a medium-voltage high-power applications is proposed, which consists of inner flying-capacitor inverter (FCI) units and outer two-level inverter units. The proposed topology can reduce the number of devices, components, and isolated sources compared with the existing ones in the case of the same number of output voltage steps, which result in a reduction of the size and weight of the inverters. Also, the total power loss of the proposed topology is lower than that of the diode-clamped inverter (DCI) and FCI. Besides, the estimated cost of the proposed topology is about 60.5% and 81.3% compared with the DCI and FCI, respectively. In addition, the modulation technique and the control strategy for the dc-link capacitor and flying-capacitor voltages are developed for the proposed topology. The effectiveness of the proposed six-level inverter for the medium-voltage applications has been verified by simulation results. Also, the feasibility of the proposed inverter has been proved by experimental results for the prototype at the laboratory. [ABSTRACT FROM AUTHOR]

A new single-phase \uppi-\texttype 5-level inverter using 3-terminal switch-network (3TSN) is proposed in this paper. The topology is considered as a variant of T-type 3-level structure or dual-buck inverter with coupled inductors. This new inverter is suitable for multilevel power inversion with low dc-bus voltage. The merit of the proposed topology is to apply only four active power switches to achieve 5-level operation. Other benefits include double frequency operation of output inductor and equal division of the current that flows through power switches and filter inductor. Hence, it leads to high efficiency and low harmonics. These characteristics allow improvement of losses distribution and volume reduction of output filter inductor. The operation scenario with sinusoidal pulsewidth modulation (SPWM) is described in details. Meanwhile, the magnetic analysis and design are studied and discussed. Finally, a prototype is built to verify the theoretical analysis and demonstrate the benefits of the proposed topology. [ABSTRACT FROM AUTHOR]

In this paper, a novel four-phase interleaved high step-down converter is presented. The proposed converter can provide an extremely high step-down voltage conversion ratio within a moderate duty cycle. There are four main advantages of the proposed converter. First, the blocking capacitors can store energy as usual. Therefore, they are used as voltage sources to reduce the input voltage as well as to reduce the switch voltage stresses. Second, due to the charge balance of the dc blocking capacitors, the converter possesses an automatic uniform current sharing characteristic of the interleaved phases without adopting any extra circuitry. Third, due to the phase shift between the interleaved phases, the architecture provides a low output current ripple. Fourth, the number of phases can be expanded or reduced to any even phases; therefore, the converter has a wide range of applications. Finally, the operating principles and analysis of this architecture are given, and an experimental prototype is also provided to verify the effectiveness of the proposed converter. [ABSTRACT FROM PUBLISHER]

This paper provides a characterizationr analysis for the voltage balance of modular cascaded converter in a medium-voltage direct-current distribution grid. Specifically, voltage stability and traditional auxiliary resistor solution are analyzed from the theoretical level. On this basis, a minimum voltage tracking balance (MVTB) control based on a switched resistor is proposed. The voltage balance during startup and normal locked processes can be adjusted effectively by MVTB control. Moreover, the resistor does not need to absorb power continuously; instead, it is just switched into operation for a while when a difference occurs, and the power loss can be decreased after the system recovers to a steady state. Finally, experimental results verify the effectiveness of the MVTB control. [ABSTRACT FROM PUBLISHER]

In modern radio communications, the envelope of radio frequency (RF) signal features with large peak-to-average power ratio. This necessitates the adoption of linear power amplifiers (PAs). In order to achieve a high efficiency for linear PAs, envelope-tracking (ET) technique is employed, which provides PAs with a supply voltage that tracks the envelope of the transmitted RF signal instead of a constant voltage. This paper focuses on the series-form switch-linear hybrid ET power supply, where the switching-mode converter uses a multilevel converter. The method to select the setting voltages under the premise of ensuring the linearity of output voltage is presented. In addition, the values and number of the voltage levels of the multilevel converter are optimized using a precise loss model based on the probability density function of the envelope signal. Besides, the pulse-blank method is proposed to improve the system efficiency further. Finally, a prototype is built aiming for tracking the envelope signal of wideband code division multiple access, with 5-MHz bandwidth, 12–27 V output voltage, 4 W average, and 10 W peak output power. The experimental results show that the output voltage of the ET power supply tracks the reference accurately and the system efficiency can reach 76%. [ABSTRACT FROM PUBLISHER]

This paper presents a new formulation of a finite control set model-predictive control (FCS-MPC) algorithm, allowing to determine the best commutation instant in order to optimize the converter current tracking. This algorithm, mixing properties of FCS-MPC method and time resolution related to pulse width modulation schemes, is illustrated in a parallel flying capacitor converter. The parallel association of classical commutation cells is a good solution for increasing the output current driven by the converters, while the standard semiconductor technology is used. The control strategy used with this type of connection must be able to ensure not only a good distribution of the output current among the different legs, but also the balancing of the floating capacitor voltages. [ABSTRACT FROM PUBLISHER]

Phase-shifted carrier modulation is an industry standard in its application to multilevel H-bridge converters. The major advantage of this scheme over level-shifted and space vector modulation schemes is its inherent ability to evenly distribute losses between semiconductor devices. However, phase-shifted schemes suffer from harmonic degradation when operated at the low carrier frequencies required in high-power high-level number applications. This paper develops a model predictive modulation (MPM) scheme that achieves superior harmonic performance, compared to phase-shifted modulation, while ensuring equal semiconductor loss distribution. With respect to complete-enumeration-based predictive techniques, the proposed modulation significantly reduces the number of times the system cost function is evaluated. Reducing the number of calculations by several orders of magnitude ensures computational feasibility. Simulation and experimental results are presented, which confirm correct operation of the modulation strategy. [ABSTRACT FROM PUBLISHER]

This paper proposes a new space-vector pulsewidth modulation (SV-PWM) strategy for a three-level neutral point clamped inverter. The presented SV-PWM strategy makes it possible to control the neutral point voltage by optimum choice of switch sequence for any position and length of output voltage vector. The proposed solution takes into consideration the unbalance of the dc-link voltages. It also analyzes the influence of vector sequences on the predicted unbalance of the dc-link voltage. The solution allows selecting optimum vectors and their on-time durations in order to reduce quickly the dc-link voltage unbalance. The calculation of the space vector area proposed in this paper takes into consideration voltage unbalance and its influence on the length and position of vectors. The proposed approach assures properly generating the voltage output vectors, even in the case of the existing large voltage unbalance in the dc-link. The results of the experimental investigation of the proposed modulation strategy are presented in this paper. [ABSTRACT FROM PUBLISHER]

Multilevel power electronic converters have gained popularity in high-power applications due to their lower switch voltage stress and modularity. Cascaded H-bridge converters are a promising breed of multilevel converters which generally require several separate dc voltage sources. By utilizing the redundant switching states, it is possible to replace the separate dc voltage sources with capacitors and keep only the one with the highest voltage level. Redundancy in the charge and discharge modes of the capacitors is assumed to be adequate for their voltage regulation. However, the effects of the output current of the converter as well as the time duration of the redundant switching states have been neglected. In this paper, the impacts of the connected load to the cascaded H-bridge converter as well as the switching angles on the voltage regulation of the capacitors are studied. This paper proves that voltage regulation is only attainable in a much limited operating conditions that it was originally reported. In addition, based on the analysis of the converter, a simplified formula is found which can be used to find those modulation indices that regulate the voltage of the capacitor. This formula can be used in harmonic minimization problems while capacitor voltage regulation is ensured. Simulation and laboratory results are provided to confirm the analysis. [ABSTRACT FROM PUBLISHER]

This paper presents a novel topology for a direct ac–ac power converter, called as the “three-to- k” phase matrix converter. The input to the proposed matrix converter configuration is a three-phase fixed voltage and a fixed frequency supply from the grid. The output is a variable voltage and variable frequency ac supply of any number of phases (k phase). However, the discussion is limited here for a k that is equal to odd number of phases. As an example, a “three-to-five” phase matrix converter is utilized for discussion and analysis. This paper also proposes two pulsewidth modulation (PWM) control techniques for the general topology of the “three-to- k” phase matrix converter. This is based on the so-called direct duty ratio PWM (DPWM). In one presented technique, the output voltage is limited to one half of the input voltage. For the other proposed scheme, the output voltage is enhanced to 78.86% of the input voltage. The proposed control algorithm is validated using simulation and an experimental approach. [ABSTRACT FROM AUTHOR]

This paper presents a current soft-commutation pulsewidth modulation (PWM) scheme for three-phase current source converter. With the presented PWM scheme, the incoming switch has a positive collector-to-emitter voltage while the outgoing switch has a negative collector-to-emitter voltage during current commutations. Therefore, natural soft commutations for switching transitions are achieved, while current-commutating durations are also lessened. Moreover, some particular advantages can also be obtained such as reduced switching frequency, high dc current utilization ratio, and in-phase transfer between line currents and their references. For more efficient control, this paper then designs logic equations for mapping out the assignments from references to gating signals, allowing a simple implementation using a digital signal processor or a programmable logic device. The theoretical analysis is verified by experimental results. [ABSTRACT FROM AUTHOR]

Flux harmonic distortion factors (HDFs) of two space vector pulse width modulation (SVPWM) schemes, aimed at sinusoidal output voltage generation with five-phase voltage source inverters, have been evaluated in Part 1 of this paper. Analytical considerations and numerical integration have been applied in order to determine the switching properties of the considered SVPWM methods. It has been shown that the SVPWM based on four large vectors leads to a considerably higher overall per-phase flux HDF than the method based on two large and two medium space vectors. The purpose of the second part of the paper is to relate flux HDFs to the current ripple and current total harmonic distortion and thus explore further switching characteristics of the two SVPWM techniques. The applied approach is based on simulation and experimentation, in conjunction with the subsequent fast Fourier transform of the waveforms, so that all the results for the ripple are obtained using a methodology completely different from the one in Part 1. Relationships that correlate the current ripple and the flux HDFs are established, and it is further shown that the current ripple can be easily calculated from the flux HDF values of Part 1 if the relevant leakage inductances of the two planes are known. Hence, the complete theory of Part 1 is fully verified by both simulation and experimentation. It is also shown that, in certain cases, the SVPWM based on four large vectors may lead to a smaller current ripple despite a considerably higher flux HDF. [ABSTRACT FROM AUTHOR]

Multiphase variable-speed drives supplied from two-level voltage source inverters (VSIs) are, at present, contenders for numerous industrial applications. Various pulsewidth modulation (PWM) methods for multiphase VSIs, aimed at sinusoidal output voltage generation, have been developed using both carrier-based and space-vector approaches. An increased number of voltage space vectors, available for the synthesis of the output voltage, offer greater flexibility for the PWM scheme development, compared to the three-phase case. This paper presents comprehensive analytical analysis and comparison of switching ripple characteristics of two continuous space vector PWM (SVPWM) methods for a five-phase two-level VSI. Considered SVPWM schemes select a different set of four active space vectors per switching period in order to generate sinusoidal output voltages. This paper also presents the evaluation of the flux harmonic distortion factors of the SVPWM techniques. Correlation with corresponding current ripple and total harmonic distortion is established in Part 2 of this paper, where theoretical considerations are verified by simulations and through experimental investigation on a five-phase VSI-fed induction motor drive. [ABSTRACT FROM AUTHOR]

Most variable-speed ac generation systems use back-to-back converters to supply electrical energy, with fixed electrical frequency and voltage, to a stand-alone load or grid. Matrix converters (MCs) are a good alternative to back-to-back converters because they have several advantages in terms of size and weight. Therefore, MCs can be advantageously used in any variable-speed generation system where high efficiency, reliability, small size, and low weight are considered important factors. Nevertheless, to interface an MC-based generation system to an unbalanced 3\phi stand-alone load, a four-leg MC is required to provide a path for the zero-sequence load current. Space-vector-modulation (SVM) algorithms for the operation of four-leg MCs have been proposed in the literature. However, these modulation methods have high computational burdens, and they are difficult to implement, even in fast DSP-based control platforms. Therefore, only simulation results have been reported in these publications. In this paper, an SVM algorithm is optimized and experimentally tested. Moreover, the harmonics produced in the input current when a four-leg MC is feeding an unbalanced or nonlinear load are also mathematically analyzed in this paper, with experimental verification being provided. [ABSTRACT FROM AUTHOR]

This paper proposed a direct power control strategy for three-phase two-level voltage-source rectifiers based on extended-state observation. Active and reactive powers are directly regulated in the stationary reference frame. Similar to the family of predictive controllers whose inherent characteristic is highly dynamic behaviors, the proposed control strategy can present comparably enhanced transient performance. Furthermore, excellent steady-state power performance can also be observed when the proposed control scheme is adopted. In addition, another attractive feature lies in its robust performance, facilitating the successful suppression of performance deterioration caused by parameter variations and model inaccuracy. Detailed frequency-domain analysis is provided to verify its effectiveness. Experimental comparisons are also carried out among the finite control set model direct power control strategy, the vector-oriented control scheme and the proposed strategy, which demonstrate the superiority of the proposed scheme. [ABSTRACT FROM PUBLISHER]

This paper introduces a new magnetically coupled single-switch nonisolated dc–dc converter with a high-voltage gain. The topology utilizes magnetic coupling for boosting its output voltage, but unlike other converters with coupled magnetics, its voltage gain is increased by reducing its magnetic turns ratio. The name “Trans-inverse (Tx−1)” is thus used for representing this inverse operating principle of the converter. The converter draws a continuous current from the source and is, hence, suitable for many types of renewable sources. Its leakage energy from the coupled magnetics has further been recycled and transferred to the load by an integrated regenerative snubber circuit. Its inclusion of dc-current-blocking capacitors has also helped to prevent core saturation, which, together with other performance features, has been verified experimentally. [ABSTRACT FROM PUBLISHER]

In this paper, a cascaded H-Bridge (CHB)-multilevel converter (MC)-based photovoltaic (PV) system with no voltage or current sensors at the dc-side is proposed. Eliminating the dc-side sensors simplifies the hardware, leading to lower cost and higher reliability of the PV system. A novel scheme estimating the capacitors’ voltages from the ac output voltage of the inverter is developed. The scheme allows replacing all dc-side voltage sensors by a single-voltage sensor at the ac-side of the converter. Furthermore, the dc current sensors, conventionally required for the maximum power point tracking (MPPT), are also eliminated. Instead, the outputs from the capacitors’ voltage control systems are utilized for the MPPT. The effectiveness of the proposed dc-side sensorless system is experimentally demonstrated on a 2-kW single-phase seven-level CHB converter-based PV system. [ABSTRACT FROM PUBLISHER]

This paper presents a new dual-switch control structure for an ac/dc noninverting cascaded buck–boost power factor correction converter. The proposed converter operates at a discontinuous capacitor voltage mode providing an inherent high-power factor and a zero voltage turn-off switching. Additionally, the proposed control structure enables for a nondistorted sinusoidal current for a wide range of output voltage levels. Unlike the conventional methods, a mode detector is not required and consequently there is no hard transition between buck and boost modes. Although both converter switches are controlled, only one feedback control loop is required to obtain the desired power flow at a unity power factor. The principle of operation, theoretical analysis, simulation, and experimental results of a 1.6-kW prototype grid-connected converter are presented. The results confirmed the validity of the proposed system under various operating conditions. [ABSTRACT FROM PUBLISHER]

Semiactive quadrupler rectifiers (SAQRs) are proposed in this paper to serve as the secondary rectification circuits, which make the secondary-side voltages to be controllable and help reduce current stress and conduction losses. An interleaved isolated boost converter is developed based on the proposed SAQRs. By utilizing the pulse-width modulation (PWM) plus phase-shift (PPS) control strategy, the primary- and secondary-side voltages are well matched to reduce the current values and circulating conduction losses. With the proposed SAQRs, the voltage gain is extended and the voltage stresses on power devices and passive components used in rectification circuits are reduced to the half of the high output voltage. Hence, the efficiency is improved by using a transformer with a smaller turns ratio and reduced parasitic parameters, and by employing low-voltage rating devices with better switching and conduction performance. With optimal design, lower voltage, and current stresses on the primary-side switches, minimized input current ripple can be realized. Moreover, the zero-voltage turn on switching of the active switches and the zero-current turn off switching of the diodes can be achieved over a wide load and voltage range by the proposed SAQR-based converter and the control strategy. Meanwhile, the higher voltage gain, the lower voltage, and the current stresses on power devices can be obtained with the proposed SAQR-based converter compared with passive quadrupler rectifier-based converter. The feasibility and effectiveness of the proposed SAQRs and the derived converter are verified by a 380-V output prototype. [ABSTRACT FROM PUBLISHER]

In this paper, a model-predictive control (MPC) has been designed and implemented on the packed U-cell (PUC) inverter, which has one isolated dc source and one capacitor as an auxiliary dc link. The MPC is designed to regulate the capacitor voltage at the desired magnitude to have seven voltage levels at the output of the inverter. Since grid-connected application is targeted by this application, the inverter should be capable of supplying requested amount of active and reactive power at the point of common coupling (PCC) as well. Therefore, MPC should also consider the line-current control to monitor the exchange of reactive power with the grid while injecting appropriate active power at low total harmonic distortion (THD). Various experimental tests including change in dc-source voltage, active power variation, and operation at different power factor (PF) have been performed on a laboratory prototype to validate the good performance obtained by the proposed MPC. The dynamic performance of the controller during sudden changes in dc capacitor voltage, supply current, and PF demonstrates the fast and accurate response and the superior operation of the proposed controller. [ABSTRACT FROM PUBLISHER]

In this paper, a direct torque control (DTC) using vector evaluation factor table (VEF-Table) is proposed for voltage source inverter (VSI)-permanent magnet synchronous motor (PMSM) drive system. In this approach, the candidate vectors can expand from six active vectors to 3\times N\text {d} vectors with duty cycle, and the change trends of torque and flux generated by all candidate vectors can be quantified and stored in the VEF-Table offline. In order to choose the output vector from the VEF-Table, a “Two-Step” selection algorithm is established based on the cost function, which can select two vectors with duty cycle sequentially. By synthesizing two vectors, the proposed approach is capable of adjusting the magnitude and angle of the output vector, so as to reduce the undesirable ripples of torque and flux. The feasibility and effectiveness of the proposed approach is verified by both numerical simulations and experimental results. [ABSTRACT FROM PUBLISHER]

This paper presents a model predictive control (MPC) scheme for quasi-Z-source (qZS) three-phase four-leg inverter. In order to cope with the drawbacks of traditional voltage source inverters (VSIs), a qZS three-phase four-leg inverter topology is proposed. This topology features a wide range of voltage gain which is suitable for applications in renewable energy-based power systems, where the output of the renewable energy sources varies widely with operating conditions such as wind speed, temperature, and solar irradiation. To improve the capability of the controller, an MPC scheme is used which implements a discrete-time model of the system. The controller handles each phase current independently, which adds flexibility to the system. Simulation and experimental studies verify the performances of the proposed control strategy under balanced and unbalanced load conditions as well as single-phase open-circuit fault condition. [ABSTRACT FROM PUBLISHER]

Compared with constant duty cycle-controlled discontinuous conduction mode (DCM) boost power factor (PF) correction (PFC) converter, constant duty cycle-controlled quadratic DCM–DCM boost PFC converter features with much lower second-order line frequency output voltage ripple, and however, it suffers from low PF. To increase PF of quadratic DCM–DCM boost PFC converter, a variable duty cycle control technique for quadratic DCM–DCM boost PFC converter is presented in this paper. An approximation equivalent for the variable duty cycle is employed to simplify the implementation circuit. The corresponding expressions of PF and output voltage ripple are analyzed. For input voltage range of 100–240 Vac, quadratic DCM–DCM boost PFC converter with variable duty cycle control benefits with very high PF, and tradeoff between PF and output voltage ripple of this converter is analyzed. Experimental results from 100-W prototypes are given to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

In this paper, a new topology for half-bridge switched boost inverter (HB-SBI) is proposed. The proposed half-bridge inverter uses more active elements rather than capacitors and inductors in comparison with the conventional half-bridge Z-source inverter with two Z-networks, which results in reduction of weight, size, and cost. Moreover, the proposed inverter has the capability of eliminating inverter leg short-circuit issues and is able to further increase the output voltage level in comparison with its conventional types. Generating zero-level output voltage is also another advantage of this topology. Based on theoretical calculations, the steady-state and small-signal analysis of the proposed topology in different operating modes are performed and the ripple of inductors’ current and capacitors’ voltage are also calculated. A comprehensive comparison is also made between the proposed inverter and the conventional types. Finally, the experimental results are provided to reconfirm the performance of the proposed inverter. [ABSTRACT FROM PUBLISHER]

The flying capacitor multilevel inverter (FCMLI) is one of the well-known structures of multilevel inverters having attracted considerable attention because of its merits. In spite of its many advantages, it has some limitations such as high volume and complicated control method because of its bulky capacitors and their voltage balancing requirement. Moreover, the high number of power semiconductors required makes this structure susceptible to failure. To increase the ratio of the number of levels to the number of components, an uneven distribution of capacitor voltages has been suggested in previous reports; however, this approach complicates the control method. Up to now, almost all presented methods suffer from high computational load and/or structure-dependent algorithm. In this paper, a simple state-based and structure-independent method is proposed for capacitor voltage regulation. The proposed method is straightforward and can perform online computation of switching sequences in a computationally efficient manner without any need for stored information or look-up tables. The method is conveniently extendible to any number of cells and levels in an FCMLI structure with arbitrary dc link voltage distribution schemes. Simulation and experimental results show the effectiveness and simplicity of this method. [ABSTRACT FROM PUBLISHER]