Search

Induction motor drives operated with a low ratio of the switching frequency to the fundamental frequency (i.e., pulse number) are prone to have high magnitudes of low-order torque harmonics. This paper proposes a method to analytically evaluate the harmonic torque spectrum based on the pulsewidth-modulated voltage waveforms for low pulse number operation. The predicted torque harmonic spectra for different pulsewidth-modulated waveforms are validated through simulations and experiments. This paper also reports optimal switching angles to minimize the total rms value of torque harmonics of order 6, 12, 18 $,\dots,$ $6(N-1)$ , considering the number of switching angles per quarter ($N$) to be 4 and 5. Compared to sine triangle pulsewidth modulation and selective harmonic elimination pulsewidth modulation with the same pulse number, the proposed optimal switching angles significantly reduce the total rms value of all harmonic torques of order lower than $6N$. Extensive simulation and experimental results on a 3.7-kW induction motor drive are presented to demonstrate the superior performance of the proposed optimal pulsewidth modulation. [ABSTRACT FROM AUTHOR]

High-frequency components of acoustic noise radiated by the electric powertrain make the subjective perception of electric vehicles worse than expected under certain operating conditions. In order to investigate the influence of acoustic components on sound quality, a pulse width modulation (PWM)-fed electric powertrain is studied in this paper. First, the acoustic noise of the electric powertrain is collected in a semianechoic chamber. Then, two types of acoustic components of the electric powertrain, namely harmonic order noise and switching noise, are distinguished through the analyses of supplied current from the inverter and gear vibration. Furthermore, the relationship between subjective perception and spectral characteristics of the noise is discussed, based on which sensitivity is established. Subsequently, the contributions of acoustic components to psychoacoustical parameters are determined. After that, a sound quality model of the acoustic noise radiated by the electric powertrain is established. The comparison between jury test and prediction shows that the established model can be used for sound quality evaluation of the electric powertrain. Finally, the influences of harmonic order noise and switching noise on subjective perception are discussed. The main original contribution of this paper concerns the influences of harmonic order noise and switching noise radiated by PWM-fed electric powertrain on sound quality. [ABSTRACT FROM PUBLISHER]

The selective harmonic current mitigation pulsewidth modulation (SHCM-PWM) technique can be used in cascaded multilevel converters to extend the harmonic reduction spectrum, reduce the coupling inductance and increase the efficiency. The offline SHCM-PWM technique has small number of switching transitions as its switching angles can only change once in a fundamental cycle and relatively long time delays because it uses FFT. As a result, its dynamic response has a lot to desire. As it will be proven in this paper, in four-quadrant power converters, to have a good transient dynamic response, both active and reactive power must be controlled at least two times in a fundamental cycle. In this paper, a hybrid modulation technique is introduced. The proposed technique uses SHCM-PWM under steady state and phase-shift PWM (PSPWM) under transient. In addition, in order to extend the modulation index range and ensure that SHCM-PWM can process four-quadrant active and reactive power, the constraints of the switching angles for the SHCM-PWM are modified. Simulations and experiments are conducted on a seven-level cascaded H-bridge converter to verify the proposed technique. [ABSTRACT FROM PUBLISHER]

This paper presents a five-phase dual random space vector pulsewidth modulation (FPDR-SVPWM) strategy with an optimized probability density function (PDF) for a five-phase voltage-source inverter, and its performance and evaluation are also analyzed. Based on the nearest four vectors modulation method, the FPDR-SVPWM strategy, combined with random switching frequency and random zero vector, is investigated to significantly reduce the amplitude of high-order harmonics near the switching frequency and its integer multiples. For the nonsinusoidal power supply, third harmonic injection is introduced in this modulation strategy as well. Considering the effect of random numbers on the performance, an optimized Beta distribution is studied in detail. In order to analyze harmonic dispersion degree qualitatively and quantitatively, the power spectral density and the harmonic spread factor are both employed to assess the performance of the FPDR-SVPWM strategy. A series of results of simulation in MATLAB and experiments based on field programmable gate array demonstrate that the proposed modulation strategy is correct and valid, and it distributes high-order harmonics into a wide range without affecting the fundamental wave and third harmonic. [ABSTRACT FROM AUTHOR]

In this paper, a real-time implementation of selective harmonic elimination pulsewidth modulation (SHEPWM) using generalized Hopfield neural network (GHNN) as applied to the single-phase inverter is designed and discussed. Finding the location of the switching instants in the case of SHEPWM involves the solution of a set of nonlinear algebraic transcendental equations. The problem is redrafted as an optimization problem, and it is solved by using GHNN. Though, in principle, the $n$ number of harmonics can be eliminated using the presented methodology, this paper tries for the case of the elimination of the 5th-, 7th-, 11th-, and 13th-order harmonics while retaining the desired fundamental. An energy function is formulated for this problem and the set of ordinary differential equations (ODEs) describing the behavior of GHNN is obtained. A program in KEIL C was developed to solve these systems of ODEs by the Runge–Kutta fourth-order method to give the switching instants for continuously varying modulation indexes $(M)$. A MATLAB simulation was carried out, and an experimental setup was also constructed in order to validate the simulated results. The fast Fourier transform analysis of the simulated output voltage waveform and the experimental output voltage waveform confirms the effectiveness of the proposed method. Hence, the proposed method proves that it is much applicable in the industrial applications by virtue of its suitability in real-time applications. [ABSTRACT FROM PUBLISHER]

Impedance network inverters are the best alternatives for voltage-source and current-source inverters. The boosting capability and the shoot-through solution of such converters make them excellent solutions for various applications. Nevertheless, hard switching forces the converter to operate in low switching frequency, which results in a bulky impedance network. Moreover, the coupling between the shoot-through duty cycle and the inverter modulation index makes a tradeoff between the voltage gain and the modulation index (output voltage harmonics). This paper presents a novel dual switching frequency modulation to mitigate the switching losses of the converter, which results in a more compact impedance network. The proposed method combines a high-frequency pulse width modulation with a low-frequency sinusoidal pulse width modulation (SPWM). Therefore, the switching losses decrease considerably with respect to the conventional simple boost modulation. In addition, the impedance network design frequency remains high, and the network size decreases obviously. The proposed approach removes the interdependence between the shoot-through duty cycle and the inverter modulation index. A comparison between the proposed method and the conventional simple boost method is performed to show its advantages over the conventional method. Finally, experimental results are presented to validate the performance of the proposed method. [ABSTRACT FROM PUBLISHER]

Interleaved converter legs are typically modulated with individual carriers per leg and phase-shifted pulse width modulation (PS-PWM) as it facilitates current balancing amongst the legs. Phase-disposition PWM (PD-PWM), despite the better harmonic performance, cannot be directly used due to the resulting current imbalance that may damage the converter. This paper addresses the current sharing issue and proposes a sorting algorithm implementation that enables single-carrier PD-PWM technique for interleaved two-level converter legs. An extension of the proposed algorithm through a switching state feedback loop, limiting the average switching frequency, is also developed. In both cases, the output current is of high quality and shared amongst the phase-legs, while the deviation between the phase-leg currents is well regulated. Simulation results demonstrate the general function of method for multiple interleaved legs as well as its current sharing capabilities for high-power applications. Experimental results from a low-power laboratory prototype validate the operation of the proposed approach. [ABSTRACT FROM PUBLISHER]

Traditional model predictive control cost functions, when utilizing long prediction horizons ( $N\geq 10$) in power inverter applications, have demonstrated harmonic performances approaching that of schemes based on offline-generated optimal pulse patterns. However, long prediction horizons often prohibitively increase computational load. A different approach to maximizing harmonic performance is taken in this paper. It is shown that shaping the output voltage spectra using a simple feedback mechanism can significantly reduce the length of the required prediction horizon, facilitating a feasible computational load. When a short-horizon cost function is augmented by the feedback mechanism an excellent tradeoff between harmonic performance and switching loss is achieved, even with a prediction horizon of one. It is also shown that the feedback mechanism can be used to improve input reference tracking. Experimental verification of the proposed modulator is performed on a two-level three-phase inverter. [ABSTRACT FROM AUTHOR]

In this paper, a new carrier-based pulse width modulation (PWM) strategy providing common-mode voltage (CMV) elimination and reduced current ripple in a three-level neutral-point-clamped inverter is introduced. The employed switching sequences are made up of the three zero CMV (ZCMV) vectors, and one among the three vec-tors is applied at two ends of a half-carrier cycle. The output current ripple characteristics pertaining to those switching sequences are investigated. In a carrier cycle, the root-mean-square current ripple minimization is analyzed and an optimal sequence is derived accordingly. The presented PWM scheme results in a considerably reduced current harmonic distortion in a wide modulation region as compared to the two existing ZCMV schemes on the same average switching frequency. Also, an implementation of sawtooth-carrier-based PWM patterns is proposed for further improvement of the harmonic performance. The algorithm requires small computational burden and is straightforward for an online implementation. Simulation and experimental results are both provided to validate the good performance of the proposed PWM method. [ABSTRACT FROM PUBLISHER]

This paper presents the mathematical and harmonic analyses of output phase voltages of three-phase voltage source inverters which employ a hybrid two-dimensional–threedimensional (2-D–3-D) space vector modulation (SVM) voltage control algorithm. The explicit time-domain representation of the harmonic components in addition to the total harmonic distortion (THD) of the output phase voltages is given in terms of system and control parameters. This paper also investigates the harmonic characteristics and THD performance against the linearity of the modulation region which helps in the harmonic performance and design studies of such inverters employing the hybrid 2-D–3-D SVM. The fundamental component of the output voltages follows the reference with lower THD in the linear modulation region rather than the overmodulation region. Experimental results are used to validate these analyses as well as the effectiveness of the hybrid 2-D–3-D SVM algorithm for generating balanced and low THD phase voltages. [ABSTRACT FROM PUBLISHER]

The Z-source inverter (ZSI) employs an LC impedance network between the main inverter bridge and the power source. The unique feature of the ZSI is that it can operate either in buck or boost mode with a wide range of obtainable output voltages from a given input voltage. This topology also exhibits better electromagnetic-interference noise immunity when compared to a traditional voltage-source inverter (VSI). However, the LC impedance network of ZSI significantly increases the size and cost of the power converter and can make it unsuitable for low-power applications. This paper proposes a novel topology called switched boost inverter (SBI) which exhibits similar advantages of ZSI with lower number of passive components and more active components compared to ZSI. The steady-state and small-signal analyses of SBI, along with its pulsewidth modulation (PWM) control strategies, have been discussed in this paper. This paper also presents a comparison of SBI and ZSI with the same input and output parameters. The theoretical analysis given in this paper has been validated using a laboratory prototype of SBI, and the experimental results are presented for verification. The experimental harmonic spectrum of the inverter's output voltage with the proposed PWM technique is also plotted and compared with that of a traditional VSI. All the experimental results show good correlation between theory and experiments. [ABSTRACT FROM PUBLISHER]

The main objective of this paper is to examine the operation of a fundamental buck-based three-phase single-stage ac–dc full-bridge converter. In this paper, the operation of this fundamental converter is explained and analyzed, and a procedure for the design of its key components is derived and demonstrated with an example. The performance and characteristics of the converter are shown with experimental results that have been obtained from a prototype, and general concluding remarks comparing buck-based and boost-based three-phase single-stage ac–dc full-bridge converters are made. [ABSTRACT FROM PUBLISHER]

During the design phase of a modular multilevel converter (MMC), an accurate loss evaluation of the submodule (SM) plays an important role. In this paper, a method based on the analytical description of the MMC key waveforms that allows to directly obtain the average semiconductor and capacitor losses that each SM will experience is introduced, under different operating conditions or control schemes. To verify the proposed concept, the results are compared with the losses obtained from a switched model with closed-loop control, where the analytical MMC key waveforms are approached in steady state. The proposed method provides a great flexibility and a significant reduction of the simulation/computational time otherwise needed to evaluate SM losses under various operating conditions. [ABSTRACT FROM PUBLISHER]

Multilevel cascaded H-bridge converters have become a mature technology for applications where high-power medium ac voltages are required. Normal operation of multilevel cascaded H-bridge converters assumes that all power cells have the same dc voltage, and each power cell generates the same voltage averaged over a sampling period using a conventional phase-shifted pulse width modulation (PWM) technique. However, this modulation method does not achieve good results under unbalanced operation per H-bridge in the power converter, which may happen in grid-connected applications such as photovoltaic or battery energy storage systems. In the paper, a simplified mathematical analysis of the phase-shifted PWM technique is presented. In addition, a modification of this conventional modulation method using variable shift angles between the power cells is introduced. This modification leads to the elimination of harmonic distortion of low-order harmonics due to the switching (triangular carrier frequency and its multiples) even under unbalanced operational conditions. The analysis is particularized for a three-cell cascaded H-bridge converter, and experimental results are presented to demonstrate the good performance of the proposed modulation method. [ABSTRACT FROM PUBLISHER]

This paper presents a new high-frequency modulation method for multilevel converters. The proposed method provides a broad linear operating range and can be digitally implemented with minimal computational effort. This modulation method creates a phase voltage composed of a rectangular component superimposed on the top of a quasi-square-shaped reference function. The reference functions are defined such that the utilization of the dc-link voltage is maximized in any modulation index, while the dv/dt of the switches is always the minimum possible value. In order to implement the proposed method, an update time that is much shorter than the fundamental period is defined in the algorithm for updating the rectangular components of the reference voltage. The high-frequency rectangular component can then be imposed on the reference function to generate the final switching function by switching between two voltage levels during the time between two update instances. Several experimental results are provided to evaluate the performance of the proposed method and to compare its operation to conventional methods. [ABSTRACT FROM PUBLISHER]

In this paper, the near-state pulse width modulation (NSPWM), adapted to be used in dual-voltage source inverter (VSI) fed open-end load, is introduced primarily aiming to appreciably minimize the voltage total harmonic distortion (THD). Within the framework of the proposed method, the active time of pulses at the second inverter is relatively adjusted within switching interval (compared to the first VSI). The phase voltage harmonics are formulated for dual-inverter modulated by NSPWM; then, optimal adjustment is identified via a three-dimensional curve of phase voltage THD versus modulation index (MI) and phase angle displacement (PAD). Due to the limitation of MI in NSPWM, the desired output voltage is synthesized with modifying not only MI but also PAD between references of two VSIs. Furthermore, NSPWM inherently takes advantage of better efficiency compared to conventional space vector modulation due to switching only two phases within an interval (by clamping one phase to positive/negative dc-rail). The dual-VSI supplied by two isolated dc sources is assembled in the laboratory to experimentally evaluate the THD reduction feature of the proposed method; also, the simulation results obtained by means of a MATLAB/Simulink environment show close agreement with experimental data. [ABSTRACT FROM PUBLISHER]

In grid-connected inverters, a feedforward controller accurately compensates for a large number of the harmonic components of the injected current. This controller is fast and directly tackles the grid dynamic voltage disturbances without doing any further harmonic analysis. A feedforward controller was introduced to a three-phase grid connection with a wye configuration; however, for the widespread delta connections, such a scheme is less established. Moreover, the nonsinusoidal profile of the grid voltage waveform makes the online conversion of line-to-line values into phase values impossible. In this paper, implicit zero-sequence discontinuous pulse width modulation (IZDPWM) based feedforward control is implemented on the two-level grid-connected inverter. Regardless of the grid topology, the IZDPWM-based controller ensures sinusoidal current injection to the grid under balanced, unbalanced, and distorted conditions. [ABSTRACT FROM PUBLISHER]

Multilevel active neutral-point-clamped (ANPC) converter is popularly known for its higher medium voltage drives up to 6.9 kV. However, common-mode voltages (CMV) are generated when using the well-established carrier-based pulse width modulation (PWM) modulation technique. As a result, CMV will become the major cause of the premature bearing failures and the conducted electromagnetic interferences. In this paper, a reduced CMV strategy is proposed for the ANPC which employs an alternatively new hybrid carrier-based modulation named as interleaved sawtooth carrier phase-disposition PWM (ISC-PD-PWM). By doing so, enhanced harmonic profile is achieved as compared to the typically used classical phase-shifted carrier PWM (PSC-PWM). Therefore, a comparative evaluation of the seven-level (7L) ANPC performance using the proposed reduced CMV approach is made between the novel hybrid ISC-PD-PWM and the conventional PSC-PWM in terms of harmonic analysis. The experimental results have proven the feasibility of the proposed concepts with the CMV effectively reduced. Such perceived merits make ANPC be more attractive for its motor drives. [ABSTRACT FROM AUTHOR]

This paper presents a novel topology for a direct ac–ac power converter, called as the “three-to- k” phase matrix converter. The input to the proposed matrix converter configuration is a three-phase fixed voltage and a fixed frequency supply from the grid. The output is a variable voltage and variable frequency ac supply of any number of phases (k phase). However, the discussion is limited here for a k that is equal to odd number of phases. As an example, a “three-to-five” phase matrix converter is utilized for discussion and analysis. This paper also proposes two pulsewidth modulation (PWM) control techniques for the general topology of the “three-to- k” phase matrix converter. This is based on the so-called direct duty ratio PWM (DPWM). In one presented technique, the output voltage is limited to one half of the input voltage. For the other proposed scheme, the output voltage is enhanced to 78.86% of the input voltage. The proposed control algorithm is validated using simulation and an experimental approach. [ABSTRACT FROM AUTHOR]

This paper addresses theoretical calculation of a single-phase multilevel pulsewidth modulation (PWM) inverter current total harmonic distortion (THD). Analytical approach introduced in late 1980s for a two-level inverter is generalized for an arbitrary level count for a single-phase inverter. Although the obtained closed-form piecewise analytical solutions assume (infinitely) large ratio of switching and fundamental frequencies and pure inductive load, they are practically very accurate for the ratios of (apparent) switching and fundamental frequencies larger than 25–30 and inductance-dominated loads. Along with strict mathematical solutions, simple accurate Bessel function approximation and hyperbolic average trend one are suggested. The formulas clearly reveal a single-phase PWM inverter current THD dependence on modulation index for an arbitrary voltage level count and are easily modified to cover grid-connected cases. [ABSTRACT FROM PUBLISHER]

Interleaving of voltage-source converter (VSC) legs enables higher output currents per phase, effectively increasing the power rating without increasing semiconductor ratings. However, the interleaved operation results in circulating currents between each phase converter legs as well as a zero-sequence circulating current (ZSCC), which become quite prominent when the converters operate with low switching frequencies. This paper demonstrates the interleaved operation of three-level converters under selective harmonic elimination pulsewidth modulation (SHE-PWM). A controller for the circulating current within the legs of each phase is also proposed. The controller is used in combination with optimally selected SHE-PWM patterns to generate the maximum number of voltage levels and minimize the peak value of the circulating current. Simulation and experimental results show the interleaved operation and the effect of SHE-PWM pattern selection in the overall system. [ABSTRACT FROM PUBLISHER]

The cost reduction of power-electronic devices, the increase in their reliability, efficiency, and power capability, and lower development times, together with more demanding application requirements, has driven the development of several new inverter topologies recently introduced in the industry, particularly medium-voltage converters. New more complex inverter topologies and new application fields come along with additional control challenges, such as voltage imbalances, power-quality issues, higher efficiency needs, and fault-tolerant operation, which necessarily requires the parallel development of modulation schemes. Therefore, recently, there have been significant advances in the field of modulation of dc/ac converters, which conceptually has been dominated during the last several decades almost exclusively by classic pulse-width modulation (PWM) methods. This paper aims to concentrate and discuss the latest developments on this exciting technology, to provide insight on where the state-of-the-art stands today, and analyze the trends and challenges driving its future. [ABSTRACT FROM PUBLISHER]

In this paper, a new inverter topology is proposed for generating a multilevel dodecagonal voltage space vector structure for open-end winding induction motor (IM) using a single dc source. Dodecagonal voltage space vector structure eliminates fifth- and seventh-order harmonic voltages from phase voltage output and hence eliminates the fifth- and seventh-order harmonic currents through the motor leading to removal of the dominant sixth-order torque ripple generation in the motor over the entire modulation range. Multilevel space vector structure generates output voltage with better THD and low dv/dt. In the proposed topology, two three-level inverters drive an open-end winding IM, one inverter from each side. DC-link of primary inverter is from a dc source which delivers the entire active power, whereas the secondary inverter dc-link is maintained by a capacitor, which is self balanced during the inverter operation. The PWM scheme implemented ensures low switching frequency for primary inverter. Secondary inverter operates at a small dc-link voltage. Hence, switching losses are small for both primary and secondary inverters. Experimental results show the elimination of fifth- and seventh-order harmonic voltages over the entire modulation range, validating effectiveness of the proposed multilevel inverter scheme. [ABSTRACT FROM PUBLISHER]

In an electric drive vehicle (EDV), the available voltage on a dc-link is limited, and so the inverter output voltage and, consequently, the line motor maximum speed are limited. The fundamental voltage of the inverter output is increased approximately 27% using a square wave (SW) switching pattern instead of a sine wave switching pattern. However, this pattern can only be used at high speeds, and at lower speeds a pulsewidth modulation (PWM) pattern should be used. In order to achieve proper control, the switching pattern should be changed seamlessly. In the present paper, a new PWM scheme for single-mode seamless control of Vernier motors is proposed. In the proposed scheme, the reference voltage is modified to change the switching pattern continuously so that the voltage changes smoothly from a high-frequency pattern to an SW and voltage discontinuity does not occur. Experimental results reveal that the inverter-switching pattern changes smoothly from a sinusoidal PWM pattern to an SW pattern, and so seamless control from the constant-torque region to the constant-power region, and vice versa, is achieved. Since the proposed scheme is a single-mode control, it is much simpler than current technologies, which are based on multimode controllers. Also the proposed method has a lower total harmonic disturbance (THD) as well as a lower harmonic distortion factor (HDF) compared to some existing methods. [ABSTRACT FROM PUBLISHER]

Multilevel inverters are gaining more attention in ac drive application due to their many attractive features. In the case of conventional neutral-point-clamped (NPC) or flying capacitor multilevel inverter configurations, active switches are connected in series to produce multilevel output voltage waveform. Therefore, if any one switch fails, the entire configuration has to be shut down; this will reduce the reliability of the system. A dual three-level inverter configuration for induction motor drive is proposed in this paper to improve reliability of the system. This topology is developed by feeding four-pole induction motor stator winding with four conventional two-level inverter modules. A level-shifted carrier-based third harmonic injection pulsewidth-modulation technique is used to produce the gating signals for the proposed configuration. By providing proper phase shift between carrier waves, multilevel voltage waveform is produced across the total motor phase winding, and first center band harmonics are also canceled. Thereby, the torque ripple will be considerably reduced compared with conventional NPC five-level inverter-driven induction motor drive. Finite-element analysis (FEA) is used to estimate the torque ripple when induction motor is supplied by the proposed configuration and conventional five-level NPC inverter configuration to show the effectiveness of the proposed converter. The proposed configuration is simulated using MATLAB/Simulink and experimentally verified using a laboratory prototype with a 5-hp four-pole induction motor drive. [ABSTRACT FROM PUBLISHER]

The most recent literature on multiphase machine drives is based on voltage-source converter (VSC) systems utilizing different modulation techniques. Very little attention is given to the multiphase current-source converters (CSCs). Applying CSCs in high-power multiphase drive systems is promising and can effectively solve many technical problems associated with conventional VSC-based systems. This paper proposes a space vector pulsewidth-modulation (SVPWM) scheme suitable for a five-phase CSC. Generally, in SVPWM-CSCs, a current path should be provided for the dc-link current by ensuring that one pair of upper and lower switches is always on. Applying this constraint yields 25 different space vectors, which are mapped into two concentric decagons with ten equal sectors in the $\alpha\beta$ and $xy$ sequence planes. Each sector has two active-large vectors, two active-small vectors, and a null vector. Moreover, the active-large vectors in the $\alpha\beta$ plane are active-small vectors in the $xy$ plane, and vice versa. In the proposed scheme, the ampere-second concept is utilized to determine the ratio between the dwelling times of the large and small vectors such that the $xy$ current components are nullified, the utilization of the input dc-current is maximized, and the switching transitions are minimized, which, in turn, minimizes the CSC switching losses. The proposed scheme can effectively provide sinusoidal converter currents, which is suitable for motor drives and energy conversion applications. The proposed scheme is verified using a 1-kW prototype five-phase induction motor fed by a five-phase CSC. [ABSTRACT FROM PUBLISHER]

In this paper, three overmodulation techniques for the three-to-five-phase indirect matrix converter (IMC) are proposed. The first technique utilizes only the adjacent large vectors in the sector in which the reference output voltage vector lies. The second technique improves on that by continuously adapting vector elimination in the d_2-q_2 vector space based on the output voltage requirements. The third technique utilizes the ripple in the dc link to further reduce the modulation index of the inverter stage during overmodulation. All three techniques increase the voltage transfer ratio of the three-to-five-phase IMC from 0.788 to 0.923, but with the addition of harmonics generated by a vector in the d_2-q_2 vector space of the inverter stage. Simulation and experimental results from a prototype three-to-five-phase IMC validate the three proposed overmodulation techniques. [ABSTRACT FROM AUTHOR]

Due to the fixed and limited sampling period in the real-time system, three-phase permanent-magnet synchronous machine (PMSM) drives using switching-table-based direct torque control (ST-DTC) usually suffer from steady-state error and ripple of torque. For the case of the dual three-phase system that has been widely investigated recently, the harmonic currents inevitably occur, which can be regarded as the third issue. This harmonic currents lead to the increase of losses and the decrease of system efficiency. Previous literature has addressed the aforementioned issues but only deals with either the torque ripple issues or harmonic currents. Therefore, this paper first introduces two types of synthetic vectors, which can reduce the harmonic currents effectively, as well as the most suitable switching sequences. Then, a modified five-level torque regulator has been proposed to improve the torque performance. With the proposed method, not only the harmonic currents have been suppressed, but also the steady-state error and ripple of torque can be considerably reduced, whereas the merits of classical ST-DTC, such as simple structure and excellent dynamic performance, are preserved. The experimental results validate the effectiveness of the proposed strategy. [ABSTRACT FROM PUBLISHER]

In this paper, a class-D audio amplifier which combines the advantages of the phase-shifted carrier pulsewidth modulation (PWM) and the multiple-level carrier PWM is proposed with a dual-level dual-phase carrier (DLDPC) PWM. The proposed closed-loop amplifier includes a second-order integrator and a DLDPC triangular wave generator. Two sets of 180° out-of-phase triangular waves are used as carriers, and each set has its respective offset voltage level with nonoverlapping amplitude. By performing the double Fourier analysis, it can be found that the linearity can be enhanced and the distortion can be reduced with the proposed modulation. Experimental results show that the proposed fully differential DLDPC PWM class-D audio amplifier features a total harmonic distortion lower than 0.01% with an output voltage swing of $\pm$5 V. [ABSTRACT FROM PUBLISHER]

In this paper, a multilevel dodecagonal voltage space vector structure with nineteen concentric dodecagons is proposed for the first time. This space vector structure is achieved by cascading two sets of asymmetric three-level inverters with isolated H-bridges on either side of an open-end winding induction motor. The dodecagonal structure is made possible by proper selection of dc link voltages and switching states of the inverters. The proposed scheme retains all the advantages of multilevel topologies as well as the advantages of dodecagonal voltage space vector structure. In addition to that, a generic and simple method for calculation of pulsewidth modulation timings using only sampled reference values ( $v_\alpha$ and $v_\beta$) is proposed. This enables the scheme to be used for any closed-loop application such as vector control. In addition, a new method of switching technique is proposed, which ensures minimum switching while eliminating the fifth- and seventh-order harmonics and suppressing the eleventh and thirteenth harmonics, eliminating the need for bulky filters. The motor phase voltage is a 24-stepped waveform for the entire modulation range thereby reducing the number of switchings of the individual inverter modules. Experimental results for steady-state operation, transient operation, including start-up have been presented and the results of fast Fourier transform analysis is also presented for validating the proposed concept. [ABSTRACT FROM PUBLISHER]

This paper proposes a technique to suppress low-order harmonics for an open-end winding induction motor drive for a full modulation range. One side of the machine is connected to a main inverter with a dc power supply, whereas the other inverter is connected to a capacitor from the other side. Harmonic suppression (with complete elimination of fifth- and seventh-order harmonics) is achieved by realizing dodecagonal space vectors using a combined pulsewidth modulation (PWM) control for the two inverters. The floating capacitor voltage is inherently controlled during the PWM operation. The proposed PWM technique is shown to be valid for the entire modulation range, including overmodulation and six-step mode of operation of the main inverter. Experimental results have been presented to validate the proposed technique. [ABSTRACT FROM PUBLISHER]

This paper investigates the improved switching-table-based direct torque control strategies (ST-DTC) for dual three-phase permanent magnet synchronous machine drives. The classical ST-DTC scheme for dual three-phase drives is usually seriously penalized by significant current harmonics, which cause large losses and reduce the efficiency of the drive system. Hence, a modified switching table consisting of 12 new synthetic voltage vectors is proposed. With this new switching table, not only the variables relating to the torque production are well controlled, but also the variables contributing to the current harmonics are eliminated successfully within one sampling period. Furthermore, a simple modified torque regulator is proposed to reduce the torque ripple and the steady-state error of torque which is usually observed in the real-time system. The switching sequence which is most suitable for the implementation of the real-time system has been proposed to minimize the computation burden. The proposed strategy only changes the switching table and torque regulator without any major modifications, and hence, the merits of the classical direct torque control, i.e., simple structure and good robustness, are still preserved. The experimental results validate the effectiveness of the proposed strategy. [ABSTRACT FROM PUBLISHER]

Many recent multilevel inverter papers end up with voltage total harmonic distortion (THD) values obtained from numerical voltage spectrum calculations (measurements). Motivated by IEEE Standard 519, a part of the multilevel research community uses a limited harmonic count to evaluate the multilevel voltage quality. First, this causes significant voltage THD underestimation, particularly for relatively high frequency PWM. Second, for a three-phase star-connected balanced load with an isolated neutral and phase symmetric modulation strategy, the calculated load line and phase voltage THD become different. However, simple considerations show that line and phase voltage THDs are essentially the same in this case. It may be difficult to judge about the multilevel voltage quality given a numerically calculated (measured) voltage THD value that may be subject to computation errors. Presented are simple smooth hyperbolic voltage THD upper and lower bound approximations for single- and three-phase inverters with nearest synchronous switching. They are valid for arbitrary modulation indices and uniformly distributed level counts and may practically serve as good reference values. [ABSTRACT FROM PUBLISHER]

This paper presents input-series–output-parallel (ISOP) configuration for single-phase front-end buck rectifiers (BRs). The configuration is especially suitable for traction applications, where the complete rectification system needs to withstand high ac voltages and supply medium-power loads. The primary rectification module of the proposed configuration is based on pulsewidth-modulated BR (current source inverter topology). The desired isolation, mandatory for ISOP connection, is provided at the dc stage through a medium-frequency/high-frequency transformer. Equal power sharing by modules is achieved from the ac side through input voltage and current sharing. The proposed control scheme is configured using two loops. While the outer loop regulates the output dc voltage and active wave shaping of the source current, the inner loop ensures stable voltage sharing. The performance of the proposed ISOP configuration is verified using numerical simulation. Experimental verification is achieved through a 2-kW grid-connected laboratory prototype. [ABSTRACT FROM PUBLISHER]

This paper presents an analytical method that makes it possible to define the pulsewidth modulation (PWM) supply output voltage spectral content, particularly the harmonic phase sequences, without switching instant determination. The results obtained from these developments lead to define a PWM control strategy that allows deleting some switching harmonics in order to reduce undesirable effects. Numerical studies and experiments confirm the theoretical approach and this harmonic control strategy. [ABSTRACT FROM PUBLISHER]

The term dead time refers to a prime safety factor for most power electronic converter topologies, and it is included either in the control software or in the gate/base driver hardware, depending on the application as well as the control requirements. In this paper, the authors present a comprehensive numerical analysis of dead-time effects on the output voltage of a three-level neutral-point-clamped (NPC) inverter. To incorporate the dead-time effect in the output voltage, 3-D models of three-level carrier pulse width modulation (PWM) methods are modified for two dead-time implementations. Closed-form expressions of inverter phase voltage harmonics for phase opposition disposition (POD) PWM are derived based on the double Fourier series approach and modified contour plots. The harmonic spectra from numerical evaluations, simulations, and experiments for natural sampling (NS), symmetrical regular sampling (SRS), and asymmetrical regular sampling (ARS) are compared to validate the mathematical models. In addition, the fundamental voltage with respect to the dead time and the load phase angle is presented based on analytical results and simulation. [ABSTRACT FROM PUBLISHER]

The high-power voltage source inverters are switched at low frequency to reduce the losses in the inverter. The discontinuous pulsewidth-modulation (PWM) sequences reduce the switching frequency to two-thirds compared to the conventional continuous PWM sequences. At low switching frequency, the output will be rich in harmonics, and synchronization is a must to avoid subharmonics. This paper presents four basic types of synchronized discontinuous PWM (DPWM) sequences that ensure synchronization, three-phase symmetry, and half-wave symmetry. The proposed synchronized DPWM sequences are verified through simulation and experiment on a constant- v/f open-loop induction motor drive. The performance of the proposed DPWM algorithms is studied in the entire modulation region, including the overmodulation region, and is compared with that of the conventional synchronized space vector PWM. A different type of DPWM with low common-mode voltage is suggested for low-modulation region and verified experimentally. [ABSTRACT FROM PUBLISHER]

This paper presents the hybrid seven-level cascaded active neutral-point-clamped (ANPC)-based multilevel converter. The converter topology is the cascaded connection of a three-level ANPC converter and an H-bridge per phase. The voltage of the H-bridge is actively maintained to the required level through selection of the switching states of the converter. The topology is operated under selective harmonic elimination pulsewidth modulation (SHE-PWM), maintaining the switching frequency of the converter to a minimum. The operating principles, voltage balancing methods, and limitations of the converter are analyzed together with extensive simulation results of the topology. Experimental results from a low-power laboratory prototype are presented that verify the operation of the hybrid converter under SHE-PWM. [ABSTRACT FROM PUBLISHER]

Cascaded H-bridge multilevel power electronic converters generally require several dc sources. An alternative option is to replace all the separate dc sources feeding the H-bridge cells with capacitors, leaving only one H-bridge cell with a real dc voltage source. This will yield a cost-effective converter. However, the required capacitor voltage balancing is challenging. In this paper, using the phase-shift modulation approach, a new control method for cascaded H-bridge multilevel converters fed with only one independent dc source is presented. The proposed method has a wide voltage regulation range for the replacement capacitors in the H-bridge cells. Experimental and simulation results support the proposed control method. [ABSTRACT FROM PUBLISHER]

This paper presents a three-phase cascaded multilevel inverter that uses five-level transistor-clamped H-bridge power cells. Multicarrier phase-shifted pulse-width modulation method is used to achieve balanced power distribution among the power cells. A new method to balance the midpoint capacitor voltage in each cell is developed and tested. The analysis of the output voltage harmonics and the total power losses covering the conduction and the switching power losses are carried out and compared with the cascaded neutral-point-clamped and the conventional cascaded H-bridge inverters. For verifications, the proposed inverter is experimentally tested on an induction motor. From the results, the proposed inverter provides higher output quality with relatively lower power loss as compared to the other conventional inverters with the same output quality. [ABSTRACT FROM PUBLISHER]

A new 2-D random-switching pulsewidth modulation (PWM) technique is proposed to reduce the dominant harmonic clusters while retaining constant average inductor current and constant sampling frequency. The special feature of constant average inductor current can reduce the output voltage ripple. Moreover, the controller parameters of a digitally controlled power converter are not required to change, which is quite essential to digitally controlled systems. Current random PWM methods are discussed and compared with the proposed method in this paper. It will be shown that the merits of the presented method include random-switching frequency, constant sampling frequency, and constant average inductor current. An field-programmable-gate-array-based digitally controlled buck converter experimental system has been set up. The specifications of the converter include input\ voltage = 5\ \V, output\ voltage = 1.5\ \V, and switching\ frequency = 200\ \kHz. The proposed random-switching pattern is implemented by software. Experimental results demonstrate the effectiveness of the proposed random-switching pattern. [ABSTRACT FROM PUBLISHER]

A three-level inverter produces six active vectors, each of normalized magnitudes 1, 0.866, and 0.5, besides a zero vector. The vectors of relative length 0.5 are termed pivot vectors. The three nearest voltage vectors are usually used to synthesize the reference vector. In most continuous pulsewidth-modulation (PWM) schemes, the switching sequence begins from a pivot vector and ends with the same pivot vector. Thus, the pivot vector is applied twice in a subcycle or half-carrier cycle. This paper proposes and investigates alternative switching sequences, which use the pivot vector only once but employ one of the other two vectors twice within the subcycle. The total harmonic distortion (THD) in the fundamental line current pertaining to these novel sequences is studied theoretically as well as experimentally over the whole range of modulation. Compared with centered space vector PWM, two of the proposed sequences lead to reduced THD at high modulation indices at a given average switching frequency. [ABSTRACT FROM PUBLISHER]

A five-level flying-capacitor (FC)-based active-neutral-point-clamped (ANPC) converter is an arrangement of a three-level ANPC converter and a two-level cell. In this paper, a control strategy is proposed to regulate the voltage across the FCs at their respective reference voltage levels by swapping the switching patterns of the switches based on the polarity of the output current, the polarity of the FC voltage, and the polarity of the fundamental line-to-neutral voltage under selective harmonic elimination pulsewidth modulation. The voltage across the FCs and the dc-link capacitors are simultaneously controlled at their reference voltage levels. The proposed control strategy is applied using power system computer aided design/electromagnetic transients including dc on a static synchronous compensator operating under a power-factor-correction mode to verify its performance. Experimental results are also presented for low and high number of angles per quarter period using a low-power laboratory prototype. [ABSTRACT FROM AUTHOR]

Multilevel inverters introduce harmonics to the network besides their remarkable advantages. Total harmonic distortion (THD) is one of the most important indexes to evaluate the harmonic contents of waveforms. The conventional method of line-voltage THD calculation gives approximate answers, because high-order harmonics are ignored. In this paper, an analytical algebraic method based on formulating the line-voltage THD of multilevel inverters with unequal dc sources is presented. This method, which is general and applicable to each number of switching angles, is implemented to a five-level inverter with staircase waveform as a case study. The implementing process of this method can be easily repeated for each number of levels. The accuracy of the proposed method is illustrated in comparison with the approximate method. Some advantages of the extracted formulas of line-voltage THD are simplicity and rapidity in calculations, considering all harmonics and the possibility of finding optimal switching angles analytically. Experimental results are presented to validate the theory. [ABSTRACT FROM PUBLISHER]

This paper presents a flyback switch-mode rectifier (SMR) with spread harmonic spectrum. The SMR switching control is conducted by a charge-regulated pulsewidth modulation (PWM) scheme with constant turn-on period. The inherently stable discontinuous conduction mode operation is preserved to yield good line drawn power quality. In voltage loop, a quantitatively designed PI feedback controller is augmented with a robust error cancellation control scheme. Further improved dc output voltage regulation and input power quality performances are achieved under varied operating conditions. In spread harmonic spectrum control, the harmonic spectral properties of the developed flyback SMR are first analyzed. Then, the dedicated random switching scheme is developed to let its switch current harmonic spectrum be dispersedly distributed. In the proposed random switching scheme, the PWM turn-off period is modulated using 1-b binary sequence, pseudo random binary sequence, and 4-b binary sequences. Under randomized harmonic spectrum, the SMR control performances are not sacrificed. [ABSTRACT FROM PUBLISHER]

This paper presents a pulsewidth modulation (PWM) algorithm for a three-phase ac–dc rectifier, where the third and fifth harmonics are indicated in the input phase voltages. A mathematical analysis, which includes this voltage harmonic's components, shows that the unity input displacement factor (IDF) can be reached by appropriate evaluation of duty-cycle functions. A PWM algorithm is proposed based on this developed theoretical achievement. This approach enables current sensorless unity IDF rectification. The PWM algorithm is investigated theoretically and verified by simulations and experiment. [ABSTRACT FROM PUBLISHER]

Half-cycle symmetry selective-harmonic-elimination pulsewidth-modulation (SHE-PWM) problems may have a large number of valid solutions, which are beneficial to the optimization design. This paper proposes a novel generalized formulation of half-cycle symmetry SHE-PWM problems for multilevel inverters. The advantages of the proposed formulation include simplicity in format, flexibility in PWMwaveforms, and a broad solution space. A method to obtain initial values for the SHE-PWM equations according to the reference modulation index M and the initial phase angle of output fundamental voltage is proposed and investigated thoroughly. Take a five-level inverter with M = 0.75 as an example; six sets of solutions for two typical initial phase angles of 0°? and 90°? are presented. Simulations and experiments are carried out. It is demonstrated that the experimental results agree well with simulated ones, which proves the validity and practicability of the new method proposed. [ABSTRACT FROM AUTHOR]