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In this paper, a fixed-switching-frequency closed-loop modulation of a voltage-source inverter (VSI), upon the digital implementation of the modulation process, is analyzed and characterized. The sampling frequency of the digital processor is considered as an integer multiple of the modulation switching frequency. An expression for the determination of the modulation design parameter is developed for smooth modulation at a fixed switching frequency. The variation of the sampling frequency, switching frequency, and modulation index has been analyzed for the determination of the switching condition under closed loop. It is shown that the switching condition determined based on the continuous-time analysis of the closed-loop modulation will ensure smooth modulation upon the digital implementation of the modulation process. However, the stability properties need to be tested prior to digital implementation as they get deteriorated at smaller sampling frequencies. The closed-loop modulation index needs to be considered maximum while determining the design parameters for smooth modulation. In particular, a detailed analysis has been carried out by varying the control gain in the sliding-mode control of a two-level VSI. The proposed analysis of the closed-loop modulation of the VSI has been verified for the operation of a distribution static compensator. The theoretical results are validated experimentally on both single- and three-phase systems. Index Terms--Closed-loop modulation, distribution static compensator (DSTATCOM), field-programmable gate array (FPGA), multisampled, switching condition.

In this paper, the method of triangular carrier switching control of two-level inverters is extended to cascaded multilevel inverters using phase-shifted multicarrier unipolar pulsewidth modulation (PWM). The condition for smooth modulation is obtained using the Bessel's function representation of the PWM output and the switching condition of the multilevel-inverter-controlled system. A method is proposed for the determination of the minimum amplitude of the triangular carrier for smooth modulation at fixed switching frequency. It is shown that the multilevel modulation based on the phase-shifted carriers significantly reduces the ripple magnitude in the switching function and allows the use of a smaller carrier amplitude under closed loop. This increases the forward gain and, hence, improves the tracking characteristics. The proposed cascaded multilevel inverter control is implemented for the operation of a distribution static compensator (DSTATCOM) in the voltage control mode. The experimental verification of the theoretical and simulation results is provided through a field-programmable gate array (FPGA) based control of a laboratory model of a single-phase DSTATCOM. Index Terms--Bessel's function, carrier amplitude, cascaded multilevel inverter, distribution static compensator (DSTATCOM), field-programmable gate array (FPGA), multilevel modulation, switching control.

Electronic load (E-load) is commonly used to test power supplies. In order to test computer power supplies, the E-load must possess an ideal controlled current source property which draws a desired load current even in the case of a very low terminal voltage of the source under test (SUT). It also needs to have superior dynamic performance to simulate high-slew-rate load transients. This paper proposes the design of a switching-converter-based E-load with very large operational bandwidth. The overall architecture of the E-load consists of a low-bandwidth converter, which functions under steady state, and a high-bandwidth auxiliary circuit that is only active during transient state. The converter circuit is realized using a novel switched-boost topology, and the auxiliary circuit is realized using a MOSFET operating at the edge of saturation and linear region. The proposed topology is capable of sinking a specific amount of load current even with a very low SUT terminal voltage. Simulation and experimental validations are provided to verify the proposed concepts. A prototype has been built to test the proposed architecture. The operational input voltage (SUT voltage) ranges of the prototype are between 0.5 and 6 V. The load current range is between 0.75 and 7 A. The results validate the excellent dynamic characteristics of the proposed architecture. [ABSTRACT FROM PUBLISHER]