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In this work, a multilevel 42-sided polygonal space vector structure for suppression of lower order harmonics for open-end induction motor (OEIM) drive applications is proposed. The proposed power circuit topology consists of two inverters feeding an OEIM from either side. The main inverter fed with a single dc-link providing active power for motoring operation is switched at low switching frequency. The secondary inverter fed with a capacitive supply is switched at high frequency to suppress lower order harmonics upto 39th order, up to the base speed of operation allowing maximum utilization of the dc-link. The advantages of lower order harmonic suppression in motor phase voltage, for polygonal space vector structures, are combined with multilevel inverter topology. This offers various advantages like multilevel operation with low inverter switching for the main power delivery inverter and harmonic suppression throughout the modulation range. The low switching frequency primary inverter generates harmonics of the order $6*k \pm 1$ , where $k = 1, 2, 3,{\ldots }$. The harmonics are suppressed by the capacitor-fed secondary inverter, which supplies only reactive power for suppression of lower order harmonics in motor phase voltage. Use of a single dc-link facilitates four-quadrant operation of the inverter. The proposed scheme is validated for steady-state and dynamic performance by experimental results. [ABSTRACT FROM AUTHOR]

In this article, a nonlinear high-gain observer (NHGO)-based second-order sliding mode (SOSM) control strategy is proposed for the three-phase three-level neutral-point-clamped (NPC) converter. This controller applies the advanced SOSM algorithm both in the voltage regulation loop and in the power tracking loop, which provides a fast dynamic for the dc-link voltage, and also assures a good steady-state behavior for the NPC converter. Additionally, an NHGO technique is implemented in the voltage regulator combining with the SOSM algorithm. The conventional observer-based controllers suffer from the destructive effects of measurement noise, and it can only be addressed by diminishing the observer gain, which sacrifices the observer property. The NHGO technique adopts a time varying gain, that is, high gain in transient while low gain in steady state, which minimizes the adverse influence of measurement noise. The tuning method of the proposed NHGO-based SOSM controller is given to simplify the implementation process. Finally, the simulation and experimental results of the proposed control scheme for the NPC converter are given and compared with the conventional PI controller as well as the well-known linear extended state observer-based control method, which validates the feasibility and superiority of the proposed controller. [ABSTRACT FROM AUTHOR]

This article proposes an inverter topology for the first time for suppression of all lower order harmonics (5th, 7th, 11th, 13th, etc.) up to 39th harmonic. The lower order harmonic suppression is achieved by switching the 42-sided polygonal vectors, which eliminates harmonics in phase voltage without using a passive LC filtering technique. The power circuit topology uses a single dc-link supply for the primary inverter. The secondary inverter is fed with a capacitive supply. A novel topology is proposed for the dense six-level secondary inverter. The lower order harmonics in phase voltage are suppressed using the secondary inverter, which acts like a switched-capacitive filter. This article also proposes a novel capacitor voltage-balancing scheme for the first time, which achieves voltage balancing for secondary inverter capacitors. The voltages of secondary inverter capacitors are balanced using the power balance relationship between the primary inverter and the motor load. An experimental study of the topology and the capacitor-balancing scheme is presented for the validation of proposed scheme. [ABSTRACT FROM AUTHOR]

In this article, a model predictive control (MPC) strategy based on the optimal switching sequence (OSS) concept for a single-phase grid-connected H-bridge neutral-point-clamped (H-NPC) power converter is presented. The proposed OSS-MPC algorithm considers both the grid current tracking error and the dc-link capacitor voltage balance. Special emphasis is placed on the power converter control region in order to design suitable switching sequence candidates for this multiobjective control problem. Additionally, based on an analysis of the weighting factor effect over closed-loop performance, it is possible to demonstrate that this controller parameter is relatively easy to adjust. In fact, the weighting factor only affects the peak current during transients, with no effect over the steady-state performance. As a result, the proposed OSS-MPC provides a fast closed-loop dynamic to the H-NPC converter, which operates with a fixed switching frequency at all times. This predictive control strategy is experimentally validated in a 3.5-kVA laboratory setup. [ABSTRACT FROM AUTHOR]

This paper proposes a novel 49-level stacked inverter topology for drives. The 49 levels are achieved by stacking three 17-level inverters. Each of the 17-level inverter is developed by cascading a flying capacitor (FC) inverter with three capacitor-fed H-bridges. The device count can be reduced by making the FC and the three cascaded H-bridges common to the dc link in each phase using selector switches in between them. The selector switches need to operate at fundamental frequency only. Also, the devices need to block very low voltages. Hence, MOSFETs can be used. This topology requires three dc sources, each of V\text{dc} /6 only, which can be replaced with stacked batteries for electric vehicle applications. The reduction in the dc voltage requirement is achieved by using a normal symmetric six-phase induction motor with parallel connection of the opposite phase windings. All the floating capacitors in the topology can be balanced irrespective of any modulation index or load power factor. Due to the high number of voltage levels, nearest level control can be used instead of pulse width modulation, which reduces the switching losses. The $dv/dt$ during the inverter operation is also less. Detailed experimental results at different speeds of operation and during transients ensure that the novel topology can be a viable option for high-power adjustable speed drives. [ABSTRACT FROM PUBLISHER]

This paper proposes an extended state observer (ESO) based second-order sliding-mode (SOSM) control for three-phase two-level grid-connected power converters. The proposed control technique forces the input currents to track the desired values, which can indirectly regulate the output voltage while achieving a user-defined power factor. The presented approach has two control loops. A current control loop based on an SOSM and a dc-link voltage regulation loop which consists of an ESO plus SOSM. In this work, the load connected to the dc-link capacitor is considered as an external disturbance. An ESO is used to asymptotically reject this external disturbance. Therefore, its design is considered in the control law derivation to achieve a high performance. Theoretical analysis is given to show the closed-loop behavior of the proposed controller and experimental results are presented to validate the control algorithm under a real power converter prototype. [ABSTRACT FROM PUBLISHER]

Zero-common-mode-voltage (CMV) operation of multilevel inverters results in reduced dc-bus utilization and reduced linear modulation range. In this paper, a method to increase the linear modulation range for zero-CMV operation without increasing the dc-bus voltage using a cascaded multilevel inverter with a single dc supply is presented. Using this method, the peak fundamental output voltage can be increased from 0.499 to 0.637  \textV\text{dc} with zero CMV inside the linear modulation range. Also, various pulse width modulation (PWM) switching sequences are analyzed in this paper, and the PWM sequence that gives minimum current ripple is used for the zero-CMV operation of the inverter. The inverter topology with single dc supply is realized by cascading a two-level inverter with two floating-capacitor-fed full-bridge modules. Simulation and experimental results for steady-state and dynamic operating conditions are presented to validate the proposed method. [ABSTRACT FROM AUTHOR]

For cascaded multilevel inverter topologies with a single dc supply, closed-loop capacitor voltage control is necessary for proper operation. This paper presents zero and reduced common-mode voltage (CMV) operation of a hybrid cascaded multilevel inverter with predictive capacitor voltage control. Each phase of the inverter is realized by cascading two- three-level flying capacitor inverters with a half-bridge module in between. For the presented inverter topology, there are redundant switching states for each inverter voltage levels. By using these switching state redundancies, for every sampling instant, a cost function is evaluated based on the predicted capacitor voltages for each phase. The switching state that minimizes cost function is treated as the best and is switched for that sampling instant. The inverter operates with zero CMV for a modulation index upto 86%. For modulation indices from 86% to 96%, the inverter can operate with reduced CMV magnitude (Vdc/18) and reduced CMV switching frequency using the new space-vector pulsewidth modulation (SVPWM) presented herein. As a result, the linear modulation range is increased to 96% as compared to 86% for zero CMV operation. Simulation and experimental results are presented for the inverter topology for various steady state and transient operating conditions by running an induction motor drive with open loop $V/f$ control scheme. [ABSTRACT FROM PUBLISHER]