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This paper presents an experimental implementation of a predictive control strategy for a system made up of two induction machines fed by a six-leg indirect matrix converter. The objective is to evaluate the practical feasibility of this method, considering the large computational cost, and to incorporate available market technologies. This strategy achieves tracking of torque, speed, and flux references on both machines, minimizing the instantaneous input reactive power present in the system. A theoretical explanation of the main concepts that are used in the predictive control strategy is presented, along with comments on the experimental implementation, experimental setup, and results obtained under both balanced and unbalanced grid conditions. [ABSTRACT FROM PUBLISHER]

When control schemes based on finite control set model predictive control are experimentally implemented, a large amount of calculations is required, introducing a considerable time delay in the actuation. This delay can deteriorate the performance of the system if not considered in the design of the controller. In this paper, the problem is described, and the solution to this issue is clearly explained using a three-phase inverter as an example. Experimental results to validate this solution are shown. [ABSTRACT FROM PUBLISHER]

Finite control set model predictive control (FCS-MPC) has been widely recognized in the field of electrical drive control during the past decades, due to its merits of quick dynamic response and low switching frequency. However, it is inherently penalized by high tracking deviations in the steady-state as well as exhaustive search among the switching sequences. To cope with this issue, a low-complexity gradient descent-based finite control set predictive current control (GD-FCSPCC) combined with a backtracking iteration approach is proposed in this article, aiming to improve the control performance by effectively tracking the reference value. First, FCS-PCC is reformulated as a quadratic programming (QP) problem from a geometric perspective. Consequently, the convexity of QP problem is proved to underlying the gradient descent, which minimizes the tracking deviations in an effective manner. Thus, the optimal solutions are selected by optimizing the reformulated objective functions. To reduce the number of the searched control inputs, a two-layer generalized decision-tree is employed. The procedures are repeated in several iteration periods optimized via a backtracking method, until the stopping criterion is satisfied. The effectiveness of the proposed GD-FCSPCC is experimentally validated on a 2.2 kW induction machine testbench. [ABSTRACT FROM AUTHOR]

The series connection of a standard three-level active neutral-point-clamped (ANPC) inverter and two cascaded H-bridge (CHB) modules comprising the flying capacitors (FCs) instead of the isolated dc voltage sources forms a seven-level hybrid topology that is referred to as improved ANPC (I-ANPC) converter. This article proposes an active voltage balancing technique for control of this hybrid multilevel inverter. The suggested method is based on a set of effortless logic equations that aim to stabilize the FC voltages within the CHB modules at their requisite reference values as well as to control the output voltage of the overall hybrid converter based on the phase-shifted-carrier pulsewidth modulation strategy. The experimental results obtained from a single-phase I-ANPC inverter's prototype are presented to validate the proposed control technique and its simple logic equations. [ABSTRACT FROM AUTHOR]

This paper presents first an overview of the well-known voltage and current dc-link converter topologies used to implement a three-phase PWM ac–ac converter system. Starting from the voltage source inverter and the current source rectifier, the basics of space vector modulation are summarized. Based on that, the topology of the indirect matrix converter (IMC) and its modulation are gradually developed from a voltage dc-link back-to-back converter by omitting the dc-link capacitor. In the next step, the topology of the conventional (direct) matrix converter (CMC) is introduced, and the relationship between the IMC and the CMCs is discussed in a figurative manner by investigating the switching states. Subsequently, three-phase ac–ac buck-type chopper circuits are considered as a special case of matrix converters (MCs), and a summary of extended MC topologies is provided, including three-level and hybrid MCs. Therewith, a common knowledge basis of the individual converter topologies is established. [ABSTRACT FROM PUBLISHER]

In this article, a novel multilevel topology for three-phase applications, having three-level and hybrid N-level modular configurations, enabling low-, medium-, and high-voltage operations, is presented. The proposed topology has several attractive features, namely reduced component count, being capacitor-, inductor-, and diode-free, lowering cost, control-complexity, and size, and can operate in a wide range of voltages and powers. Selected simulation and experimental results are presented to verify the performance of the proposed topology. Further, the overall efficiency of the topology and loss distribution in switches are studied. Finally, the key features of the proposed topology in terms of component count, blocking voltage, and dc-link requirements are highlighted via a comparative study. [ABSTRACT FROM AUTHOR]

This paper presents a new multilevel converter topology based on a variable or multilevel dc-link stage. This stage is shared by all inverter output phases, thus increasing the number of output voltage levels while reducing the overall number of active devices compared to traditional topologies; therefore, it is called a reduced multilevel converter (RMC). The converter is not capable of reducing the blocking voltage of the devices; hence, unlike other multilevel converters aimed at medium-voltage applications, this converter is interesting for low-voltage- and high-power-quality-demanding applications such as photovoltaic inverters, wind energy conversion systems, and uninterruptible power supplies. The main novelty behind the proposed concept is the basic dc cell used to generate the variable dc-link voltage, which includes a controlled path through the floating capacitors to provide the necessary degree of control to enable a shared multilevel dc link for all the output phases of the converter. The dc cells are connected in a multicell structure to increase the number of levels of the converter. A five-level version of the RMC topology is briefly compared to other five-level converters such as the five-level active neutral-point-clamped converter and the five-level flying capacitor converter. This paper presents the structure of the new topology with its operating principle, switching states, main characteristics, and experimental validation using finite-control-set model-predictive control. [ABSTRACT FROM PUBLISHER]

The cost reduction of power-electronic devices, the increase in their reliability, efficiency, and power capability, and lower development times, together with more demanding application requirements, has driven the development of several new inverter topologies recently introduced in the industry, particularly medium-voltage converters. New more complex inverter topologies and new application fields come along with additional control challenges, such as voltage imbalances, power-quality issues, higher efficiency needs, and fault-tolerant operation, which necessarily requires the parallel development of modulation schemes. Therefore, recently, there have been significant advances in the field of modulation of dc/ac converters, which conceptually has been dominated during the last several decades almost exclusively by classic pulse-width modulation (PWM) methods. This paper aims to concentrate and discuss the latest developments on this exciting technology, to provide insight on where the state-of-the-art stands today, and analyze the trends and challenges driving its future. [ABSTRACT FROM PUBLISHER]

This paper presents a finite control set model predictive strategy and its application to the load voltage control of two-level four-leg inverters. The proposed approach uses the novel discrete-time model of the inverter and output $LC$ filter in order to predict the variables to be controlled. These predictions are carried out for the 16 switching states of the inverter and are evaluated using a cost function. The switching state that forces the load voltages to be closest to their respective references is chosen and applied to the inverter. The behavior of the predictive controller has been investigated, and the changes to both inductive and capacitive filter parameters have been considered. In order to improve the reliability of the fourth leg as well as the overall inverter efficiency, a solution is proposed, which combines hardware and software reconfigurations. The feasibility of the proposed method is verified through simulation and experimental results considering single-/three-phase, balanced/unbalanced, and linear/nonlinear loads. [ABSTRACT FROM PUBLISHER]

While the classical control techniques for three-phase two-level four-leg inverters are based on pulsewidth modulation or 3-D space vector modulation, this paper presents a simple digital current control strategy without the modulation stage. The proposed controller uses the discrete nature of the four-leg inverter and filter to generate the switching states. Using a predictive cost function, the optimal switching state to be applied in the next sampling interval is selected. The proposed controller offers excellent reference tracking with less current harmonic distortion for balanced and unbalanced loading conditions. The feasibility of the proposed strategy is verified by digital implementation on a dSPACE DS1104-based rapid prototype platform. [ABSTRACT FROM PUBLISHER]