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SiC-based diodes and mosfets switch extremely quickly with low conduction losses. Thus, from the perspective of efficiency, such devices are ideal for a continuous conduction mode (CCM) boost power factor correction (PFC) converter. However, the circuit parasitic becomes alive while switching with high $dv/dt$ and $di/dt$ values, which necessitates the need for electromagnetic compatibility (EMC) compliance measurements. Employing the best available low-loss SiC mosfet and SiC diode, in this paper, a 1-kW PFC boost converter prototype was designed, developed, and evaluated with the objective of quantifying the efficiency and EMC signature. The efficiency is evaluated through two approaches, namely, a circuit simulation and a laboratory measurement. With the first approach, the switching losses are obtained using a widely accepted double-pulse test methodology, and the conduction losses are taken from the data sheet, whereas with the second approach, the current and voltage are recorded at the input and output of the PFC converter using power analyzer. The electromagnetic interference (EMI) is monitored using line impedance stabilizing network and EMC analyzer. To maximize the efficiency, a fast, clean switching of the silicon carbide (SiC) is necessary. Utilizing a low-parasitic printed circuit board design approach and switching the selected low-loss SiC devices with a 0  $\Omega$ external gate drive resistance, this PFC boost yields a peak efficiency of 97.2% at full-rated power when switched at 250 kHz. Furthermore, the EMI noise was measured at 66 and 250 kHz. It was found that the same EMI filter size satisfies the CISPR 11 Class B conducted EMI limit at both switching frequencies with a noise of approximately 10 dB higher at 250 kHz. As the main contribution of this paper, the best case efficiency and worst case EMI are evaluated in this paper. [ABSTRACT FROM AUTHOR]

The number of applicable carrier-based pulsewidth modulation (PWM) patterns increases with the growth of output levels in scalable multilevel topologies, such as active-neutral-point-clamped (ANPC) converters. Therefore, it is hard to optimize PWM for such topology, especially with large output levels. In this paper, a simplified and modular carrier-based PWM design approach for multilevel ANPC converters is proposed. Inspired by the decomposition theory, the topology decomposition is introduced in this paper to decompose an N-level ANPC converter into low-level subtopologies. Then, the complete set of applicable PWM patterns is derived based on ANPC operation principles, which makes it possible to optimize the performance based on the various requirements in applications. Meanwhile, the carrier-based PWM is implemented through the utilization of subtopologies with low-level modulation schemes, such that the design process of carrier-based PWM is greatly simplified and modularly realized. Both the complete PWM patterns and PWM design examples with experimental results of several ANPC converters are provided to show the feasibility and modularity of the proposed method. [ABSTRACT FROM AUTHOR]

Multilevel inverters (MLIs) are playing a pivotal role in the power sector with potential applications, such as interfacing renewable energy sources with the grid and several industrial drive applications. MLIs with a smaller number of switching devices are more promising due to their compact size, reduced cost, and higher efficiency compared with their traditional counterparts. This paper, therefore, presents a new three-phase seven-level inverter. This topology is a combination of two cascade-connected two-level voltage-source inverters (VSIs) and H-bridge cells with flying capacitors (FCs). This paper presents the operating principle and the balancing technique for the dc-link capacitors and FCs. The generation of various output voltage levels and the limitation of the sinusoidal pulsewidth modulation control for FC voltage balancing is also presented. The number of components in the proposed circuit configuration and their voltage ratings are considerably lower compared with the recently proposed topologies. The behavior of the proposed circuit configuration is first assessed with simulation studies and is then tested with a laboratory prototype. The simulation and experimental results validate the effectiveness of the proposed topology and the voltage balancing technique. [ABSTRACT FROM AUTHOR]

This paper presents a novel control strategy to significantly reduce the high-frequency transformer loss in a modular solid-state transformer (SST) based converter system. The modular SST design is based on an ac–dc power-electronic building block comprised of an H-bridge at the ac input and a bidirectional soft-switching isolated dc–dc converter with a medium-voltage insulated high-frequency transformer. The ac terminals of input H-bridges are connected in series and directly coupled to the medium-voltage ac line, while the output dc terminals are all connected in parallel at a low voltage. The key innovation described in this paper, without sacrificing the output performance, is the control scheme that reduces core and winding losses associated with the dc–dc resonant stage by turning off the selected dc–dc converters in synchronism with the line voltage. The prototype for the test described in this paper is based on a modular SST where each module is rated at 50 kVA, with a 200 kHz transformer using 1.7 kV silicon carbide discrete mosfets, but the described control concepts are more broadly applicable to similar topologies. [ABSTRACT FROM AUTHOR]

This paper deals with a multilevel ac–ac double conversion system that uses the intercell transformer (ICT) for applications which include generating systems and the interfacing of renewable energy sources with the utility grids. Each phase of the proposed configuration is formed through the ICT interleaving operation of two multilevel 5-level E-type legs to achieve the 3-phase 5-level back-to-back E-type converter (3Φ5L BTB E-type converter). The analytical procedure to select the inductance and capacitance values of both the input and output filters is described in the paper. Furthermore, the design and implementation of the input/output ICTs and inductors is discussed. The simulation and the experimental results on the 20-kVA interleaved 3Φ5L BTB E-type converter prototype are presented to validate the proposed analysis. [ABSTRACT FROM AUTHOR]

With the rapid development of photovoltaic and fuel cell stacks, high voltage gain converters are urgently demanded. Conventional boost is limited by the exaggerated duty cycle, it is impossible to obtain a high voltage gain while ensuring efficiency. Therefore, a zero-voltage switching (ZVS)-modified SEPIC converter that combines a voltage multiplier cell with traditional SEPIC is proposed in this paper. With detailed parameters design process, this presented converter works at zero voltage switching (ZVS), while obtaining high voltage gain without extremely high duty cycle. Besides, voltage stress is also reduced and low-voltage component with lower parasitic parameters can be used, thus efficiency is maintained. In order to further improve the power density, an integrated inductor scheme is adopted in this paper without changing intrinsic working states of the two inductors. A 36-W prototype is built, and experiments are conducted to verify the advantages of the proposed converter. The efficiency is up to 91.5% at full load. [ABSTRACT FROM AUTHOR]

This paper presents a neutral-point deviation and ripple compensating control method applied to a three-level neutral-point-clamped (NPC) converter. The neutral-point deviation and its harmonic components are analyzed with a focus on the average current flowing through the neutral-point of the dc link. This paper also proposes a control scheme compensating for the neutral-point deviation and dominant harmonic components under generalized unbalanced grid operating conditions. The positive and negative sequence components of the switching functions and ac input currents are employed to accurately explain the behavior of three-level NPC converter. Simulation and experimental results are presented to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

A high-frequency high voltage gain discontinuous conduction mode coupled-inductor boost LED driver based on planar component is presented in this paper. GaN switch is adopted with lower conducting resistance and higher switching speed. Zero voltage switching (ZVS) is achieved at the same time to reduce high switching loss caused by high switching frequency. Compared with the previous work, the voltage gain is higher and efficiency is higher because of ZVS. This paper focuses on high efficiency; therefore, resonant gate driver is adopted and efficiency is increased by 0.6%. In terms of the coupled-inductor, planar component is used and parameter optimization is also proposed to realize lower loss, including wingding loss and fringing loss caused by the air gap. A 500 kHz 36 W prototype has been designed to demonstrate theoretical analysis. In addition, comparison of drive loss between the resonant gate driver used in this paper and conventional driver implemented by Si8271 is made, revealing advantages of the resonant driver. Obtained efficiency was up to 92.1% at full load. [ABSTRACT FROM AUTHOR]

The use of electronic equipment and other dc-compatible appliances in homes and offices is increasing at a very fast rate, as well as the distributed generation of energy. These two statements will most likely trigger, in a near future, the adoption of district-scale dc grids, connecting dc microgeneration plants and consumers, in an effort to cut the number of conversion steps required to deliver power to dc appliances. DC–DC converters will be fundamental in these systems, allowing the establishment of several voltage levels. The reliability of these converters plays a critical role, ensuring service continuity of the loads connected to them. With the increment of reliability in mind, this paper proposes a simple yet effective open-circuit fault diagnostic method suitable for interleaved dc–dc boost converters, but equally functional for other dc–dc converter topologies. The improvements introduced in this paper greatly simplify the diagnostic action, while making the correct diagnostic of faults independent of the switching duty cycle. Moreover, an alternative reconfiguration scheme is proposed to mitigate the adverse impacts of such faults. To prove the effectiveness of these strategies, a three-phase interleaved boost converter prototype was used in the experiments. [ABSTRACT FROM AUTHOR]

This paper presents a simplified implementation technique for direct torque control (DTC) of asymmetric six-phase induction motor drive. Current harmonics of fifth and seventh order are observed in the phase currents if conventional DTC scheme is extended for the asymmetric six-phase machine. These harmonic components are not responsible for torque production, thus causing losses in the motor winding. Synthetic vectors are generally used for reduction of current harmonics. Average voltage in $xy$ subspace is maintained to zero by synthetic vectors leading to reduction of currents in $xy$ subspace. A simplified method of implementation of synthetic vectors is proposed in this paper, which eliminates the need for designing of switching sequence and requirement of field-programmable gate array. Also, the number of synthetic vectors that can be possibly produced is increased compared with the ones developed by techniques available in the literature. The experimentation is carried out on a laboratory-developed prototype and the experimental results are presented in this paper to verify the proposed scheme. [ABSTRACT FROM PUBLISHER]

This paper is concerned with the use of a three-level inverter for a synchronous reluctance machine (SynRM). The SynRM suffers from a poor power factor due to poor machine saliency. This makes it harder to operate the three-level neutral-point-clamped inverter due to a strict requirement to have the two dc-link capacitor voltages balanced. This paper proposes a new nearest three vector modulation algorithm which can balance the two dc-link capacitors even at poor machine saliency ratio (poor power factor). In this paper, a method of sizing the two dc-link capacitors based on the machine power is also proposed. A comparison between two- and three-level inverters was conducted. The SynRM registered lower $d$-axis current ripple with a three-level inverter, indicating lower core losses in the machine. [ABSTRACT FROM PUBLISHER]

This paper presents a new power electronic topology that aims to reduce switching losses in hard-switched inverters for brushless dc (BLDC) motor drives. This is achieved by extending the benefits of synchronous rectification used in low-voltage switch-mode dc–dc conversion to high-voltage motor drive applications and by minimizing the reverse conduction behavior of the intrinsic body diode of the synchronous rectifier MOSFET. The proposed topology for reducing body diode conduction includes the addition of a MOSFET in series with the rectifying switch and a SiC Schottky diode around the series switch combination. This paper focuses on theory, simulations, and experimental results and validates the benefits of proposed new topology for BLDC motor drive applications. An extension of this topology for sinusoidal back electromotive force permanent-magnet motors is also presented. [ABSTRACT FROM PUBLISHER]

This paper proposes a vector control strategy for independent control of two permanent-magnet synchronous motors (PMSMs) using a single four-leg inverter (4LI). An expanded two-arm modulation to obtain a balanced three-phase output voltage is described. This paper also proposes a method to compensate for the fluctuations in the neutral point voltage of two split capacitors in the dc link. The experimental results show that independent speed and position control of two PMSMs can be achieved using a single 4LI with the proposed vector control method. [ABSTRACT FROM AUTHOR]

The pump-back test is widely adopted in the industry for characterizing and qualifying high-power converters. One popular pump-back test configuration is to tie the dc links of two converters together and circulate the current through the inductor connected between the ac terminals. In this configuration, one of the converters operates in the voltage mode to generate the virtual grid and the other converter regulates the circulating current, where hysteresis control could be applied. However, the switching characteristics of hysteresis control are unique due to the pulsewidth modulation type voltage being the virtual grid. This paper contributes to analyzing the switching frequency characteristics of the hysteresis control in this pump-back test configuration. The switching frequency tracking phenomenon is revealed and reported in this paper for the first time. Theoretical analysis, simulation validation, and experimental demonstration are provided to support the major conclusions. [ABSTRACT FROM AUTHOR]

This paper proposes a novel open-winding brushless doubly-fed reluctance generator (OW-BDFRG) with dual two-level converters in order to reduce the converter rating and switching frequency for large-scale wind turbine applications. The new converter topology is equivalent to a three-level converter directly connected to the control winding of typical BDFRG. The OW-BDFRG system with this topology structure requires lower converter rating and switching frequency, and has a more flexible control mode, better operation performance, and fault redundancy capability. For the OW-BDFRG, this paper also proposes a new control scheme combining direct power control (DPC) with sliding mode variable structure (SMVS) control to implement the power tracking. The voltage-vector switching table of DPC is redesigned according to the error signals of active and reactive powers of the power winding, as well as the sector location of control winding flux. The active and reactive powers of the OW-BDFRG can be directly decoupled and independently controlled by properly selecting the switching voltage vectors. The novelty of this paper lies in an OW-BDFRG topology driven by dual two-level converters to improve the system characteristics, and the use of SMVS control to improve the DPC accuracy and robustness to parameter variations. Finally, the effectiveness of the proposed system is verified through simulation and experimental studies. [ABSTRACT FROM AUTHOR]

This paper proposes an input voltage sensorless control algorithm for three-phase active boost rectifiers. Using this approach, the input ac-phase voltages can be accurately estimated from the fluctuations of other measured state variables and preceding switching state information from converter dynamics. Furthermore, the proposed control strategy reduces the input current harmonics of an ac–dc three-phase boost power factor correction (PFC) converter by injecting an additional common-mode duty ratio term to the feedback controllers’ outputs. This additional duty compensation term cancels the unwanted input harmonics, caused by the floating potential between ac source neutral and dc link negative, without requiring any access to the neutral point. A 6-kW (continuous power)/10-kW (peak power) three-phase boost PFC prototype using SiC-based semiconductor switching devices is designed and developed to validate the proposed control algorithm. The experimental results show that an input power factor of 0.999 with a conversion efficiency of 98.3%, total harmonic distortion as low as 4%, and a tightly regulated dc-link voltage with 1% ripple can be achieved. [ABSTRACT FROM PUBLISHER]

This paper depicts an accident that happened in 2010 in a Brazilian chemical plant. A combination of different events, installations, and commissioning errors coupled with equipment failures involving the primary substation resulted in catastrophic failure. A single-phase failure of a 138-kV disconnect switch, during closing, initiated events and phenomena that resulted in a complete plant shutdown. This paper will walk the reader through the events, forensics analysis, and power system analysis that allowed the authors to identify what happened, how it happened, and what to do to prevent it from happening again. This paper will show how the anatomy of the problem, involving equipment failure, single-phase arcing, switching transients, overvoltage, capacitive coupling, transferred surge voltages, ungrounded system, transient overvoltage due to an arcing ground fault on an ungrounded system, insulation coordination, flashover, and lack of adequate surge protection, all of which resulted in a catastrophic failure of an arc resistant switchgear and a potentially serious arc flash incident. The research followed some steps that will be commented on here as well as the lessons learned. [ABSTRACT FROM AUTHOR]

Important global efforts are underway toward lowering the cost of electric machines for electric and hybrid vehicles by reducing or eliminating the use of rare-earth materials which have been experiencing significant price increases and volatility. Non-permanent-magnet (non-PM) electric machines are a potential solution and are increasingly investigated by researchers worldwide. This paper presents a DC-biased reluctance machine, which is structurally similar to a conventional switched reluctance machine. This type of machine has a DC field winding and an AC three-phase armature winding. It uses a conventional three phase inverter for the armature and an additional auxiliary DC/DC converter for the field winding. This reluctance machine is designed to achieve hybrid vehicle traction requirements of 55 kW peak at 2800 \rmr/min and 30 kW continuous over a speed range going from 2800 to 14 000 \rmr/min. [ABSTRACT FROM PUBLISHER]

This paper presents an improved dc-link voltage balancing algorithm for a three-level neutral-point-clamped inverter by considering phase current direction. Detailed studies on the effects of change in load current direction on the dc-link capacitor voltages are presented. A maximum value of power factor is numerically derived, above which it affects the capacitor voltage balancing capability. Compared with the previously presented research work, the inputs to the space-vector pulsewidth-modulation block are the three phase currents and the difference between the two capacitor voltages. Depending on the states of the two dc-link capacitor voltages and phase current direction, redundant voltage vector sequences are selected. The selected vectors keep the capacitor voltage deviations within 5% of the total dc-link voltage. Two zero switching vectors (i.e., PPP and NNN) are also removed from all subsectors of the earlier proposed strategy, which one used to produce higher common-mode voltages. Detailed simulation and experimental results are presented in this paper for a 6.0-kW surface permanent-magnet synchronous machine. Both the simulation and experimental results show the required performance of the proposed system. [ABSTRACT FROM AUTHOR]

This paper presents a new configuration of high gain (HG) single ended primary inductor converter (SEPIC) with a ripple-free input current to maximize the efficiency of the PV panel for standalone water pumping system (WPS). The ripple eliminating circuit combined with the HG SEPIC converter to achieve reduced ripples in photovoltaic (PV) current is independent to the duty cycle control and hence, it can be easily integrated to the main power circuit of configuration. This circuit does not need any active switches, control, or drive circuit for its execution. The ripple eliminating circuit yields a complete removal of the electrolytic capacitor connected across the PV array and significantly reduces the inductance of the HG SEPIC converter. It also improves the response and power density of the dc–dc converter. The large gain of dc–dc converter enables the use of low-voltage PV panel and minimizes the partial shading and parasitic capacitance effects on PV array source. Due to the substantial compatibility between natural characteristics of switched reluctance motor (SRM) drive and WPS, a four-phase SRM drive is utilized in the proposed scheme. In addition, a single current sensor based maximum power point tracking technique is utilized in the proposed system, which helps to reduce the cost and improve the accuracy of the overall system. Analytical, simulated, and experimental results of the developed system are presented to demonstrate the performance of the system. [ABSTRACT FROM AUTHOR]

The operating principle of the clamp circuits like clamping diodes and flying capacitor in three-level LLC converter is different from other three-level converters, because the mean value of the resonant tank current is always zero and pulse-frequency modulation control is generally used instead of pulsewidth modulation control. And the converter with only the clamping diodes or flying capacitor is difficult to realize voltage balance. In this paper, the characteristics of the three-level LLC converter with single clamp circuit are first analyzed. Then, the operation principle of the hybrid-clamped circuit under the unbalanced voltages on input capacitors is described with the mode analysis, based on which the mechanism for voltage autobalance is elaborated and the effects of two clamp circuits are derived. Then, the design of the clamping diodes and the flying capacitor is also involved. Finally, a three-level LLC converter prototype is built and the experimental results verify the validity of the theoretical analysis and design. [ABSTRACT FROM AUTHOR]

Unipolar-pulsewidth modulation (UP-PWM) inverter takes advantages of high power efficiency and small output chokes which is widely used in the industry. However, UP-PWM inverters cannot be used in parallel operation due to a current unbalance problem. This paper studies the current unbalance problem of paralleled UP-PWM inverters with common dc bus and ac bus. First, the problem of unbalanced inductor current is defined and analyzed. Second, a technique to eliminate unbalanced currents is proposed. The proposed current balancing technique only requires one more current sensor in an inverter module rather than changing converter topology or modulation method, which makes it possible to apply UP-PWM inverters in parallel-operation while keeping the advantages of unipolar switching. The proposed current balancing method is verified by both simulation and hardware experiment. Experimental verification is performed on two 1 kW, 400 V input, and 120 V/60 Hz output prototypes, which shows a good agreement to the analytical study. [ABSTRACT FROM AUTHOR]

Electrically excited synchronous machines have shown potential to be an alternative to permanent magnet synchronous machines in electromobility and wind power applications. High-frequency wireless power transferring technology enables a compact design of brushless exciters for the machine. In this paper, a dynamic model of high-frequency brushless exciters is proposed for the purposes of operating condition monitoring and excitation control. The modeling is done by using arithmetic and differential equations as well as considering different operation modes of the system. The operation modes are defined based on the physical behaviors of the excitation circuit. Experiments are performed to verify the model with variations of different circuit parameters. Furthermore, parameter sensitivity study, component parameter selection, and loss analysis are conducted to demonstrate the effectiveness of the model. The model is therefore proposed as an effective tool to assist the design and optimization of the brushless excitation system. [ABSTRACT FROM AUTHOR]

One of the recent trends in power electronics field is to achieve high efficiency and compact size by using wide bandgap power devices such as silicon carbide (SiC) or gallium nitride switches. This paper compares the efficiency, the motor terminal voltage quality (dv/dt), and the common mode current of the SiC-based variable frequency drives (VFDs) according to the inverter topologies with and without the output filters. For this purpose, both the 2-level (2L) and 3-level (3L) topologies with SiC devices are built and tested. Here, the well-known 2L half-bridge inverter is compared with the well-known 3L T-type neutral point clamped inverter. A dv/dt filter and a sine wave filter have been discussed to satisfy the National Electrical Manufacturers Association standards as well. The experiments have been carried out with a 380-V/60-Hz, 3.7-kW induction motor and the custom designed power stages. Additionally, the experiments with both a 3-m and a 50-m cable length between the VFD and the induction motor are performed and reported. [ABSTRACT FROM AUTHOR]

A dual active bridge (DAB) converter promises high power density. The highest power transfer can be achieved by phase shift modulation inside the zero-voltage switching boundaries. This paper analyzes the transients of DAB commutation. Although commutation has been previously analyzed for DAB with the linear turn-off snubbers, in today's industries, the output capacitors of the switches are utilized as the snubberless approach. The presence of these time-variant capacitors leads to nonlinear equations. This paper applies a piecewise linear model for analyzing the commutation of the ac-link current into the switches. The study is inspired by practical experiments, and the results are experimentally verified. [ABSTRACT FROM PUBLISHER]

The neutral-point voltage-balancing control is a critical issue of a neutral-point-clamped converter. The conventional control strategy is to inject the specific zero-sequence voltage to regulate the redundant vector, but it is unacceptable to the three-phase four-wire system. This paper provides a neutral-point voltage-balancing control by the dipolar modulation, and the control freedom of the zero-sequence voltage is flexible. Therefore, the proposed method is suitable for both three-phase three-wire and three-phase four-wire systems. Besides, the proposed method improves the control dynamic in a reactive power system. The proposed neutral-point voltage-balancing control is verified by the mathematical analysis and experimental results. The control dynamic, power loss estimation, and the output current performance are analyzed in this paper. [ABSTRACT FROM PUBLISHER]

To optimize the lifetime of switching power semiconductors, this paper presents a methodology to control power device junction temperature T_j and its change during power cycles \Delta T_j at thermal boundaries. This paper proposes a supervisory state machine to interrupt nominal system-level control only when temperature bounds are exceeded, and coordinates smooth transitions as T_j(k) and \Delta T_j(k) approach their respective boundaries. To ensure that thermal states are regulated via precise and independent modulation of conduction and switching loss elements, decoupling methods are proposed. Also proposed is a \Delta T_j control law that closes a control loop on the rate of change state \bar\dotT_j , and introduces active thermal capacitance and conductance into the closed-loop thermal system dynamics. Experimental evaluation of the proposed system illustrates well damped T_j(k) and \Delta T_j(k) responses, and gradual adjustment of the manipulated inputs switching frequency and duty ratio. Finally, comparison with a current limit-based T_j regulation method illustrates how the proposed system allows power converters to push harder against their thermal limits. [ABSTRACT FROM AUTHOR]

Multilevel converters are a proven solution for medium-voltage and high-power applications, including renewable energy conversion. Developing 6.6-kV converters is a key goal for the wind turbines industry. Considering the voltage rating of commercially available semiconductors, five-level converters are necessary to reach 6.6 kV. The five-level active neutral-point-clamped converter (5L-ANPC) is one of the most advantageous topologies among five-level multilevel converters. This paper presents a new 5L-ANPC topology that overcomes the features of the previously employed 5L-ANPC topology. Along this paper, the properties and working principle of this new 5L-ANPC are explained. Finally, the validity of the new converter is validated via simulation and experimental results. [ABSTRACT FROM AUTHOR]

As ac-to-ac power conversion becomes increasingly important in applications such as grid power control and motor control, demand for a plug-and-play converter has increased. Traditional voltage-source-inverter-based ac-to-ac power converters such as the back-to-back converter require dc-link capacitors that limit their reliability or significantly increase their size and cost. This paper examines a plug-and-play concept for achieving ac-to-ac power conversion via the direct-ac/ac power electronic building block (AC-PEBB). The AC-PEBB is a compact self-contained cell requiring no intermediate energy storage. It can be used in a variety of ac/ac power electronic applications such as matrix converters and controllable network transformers. This paper details the design of an 800-V 100-A AC-PEBB prototype to be used in a 13-kV 1-MVA application. Successful test results using several AC-PEBBs in a variety of configurations are demonstrated at up to 11 kV and 600 kVA. [ABSTRACT FROM AUTHOR]

This paper presents the direct compensation of the switching interval error of the effective voltage vectors by the dead time of a pulsewidth modulation voltage source inverter (PWM-VSI). The output voltages of a three-phase PWM-VSI are distorted and have voltage errors from the dead time to avoid the shoot-through of inverter arms and the time delay of the gate drive. Voltage distortion increases the harmonics of the output voltages and decreases control performance. This paper presents a simple and direct compensation technique to solve this problem in a three-phase VSI. The practical switching output voltages are determined by the dc-link voltage, the switching signals of each phase, the dead time, the time delay, and the current polarities of each phase. For these reasons, output voltage errors are not constant. In order to analyze the dead-time effect in the actual switching voltages of each phase, the practical switching voltages in a sampling period of a space vector PWM (SVPWM) method are calculated according to the current polarity. In the calculation, the dead time, the time delay of devices, and the voltage drops on power devices are included to consider nonlinear voltage distortion. From these practical switching voltages during the switching intervals in a sampling period, the average output voltages of each phase can be derived, and the output voltage errors between the voltage commands and the average output voltages of each phase are obtained. The SVPWM switching intervals of each phase can be derived by the average output voltages that are calculated according to the current polarity and nonlinear voltage distortion to compensate for the output voltage errors. With the simple detection of the current polarity, the practical errors of the switching intervals of each phase can be compensated by the addition of the compensated switching time. Simulation and experimental results validating the proposed compensation method are presented in this paper. [ABSTRACT FROM AUTHOR]

Variability in the solar irradiance level and ambient temperature of photovoltaic (PV) systems necessitates the use of maximum power point tracking (MPPT) of PV systems to ensure continuous harvesting of maximum power. This paper presents a sensorless current (SC) MPPT algorithm using model predictive control (MPC). The main contribution of this paper is the use of model-based predictive control principle to eliminate the current sensor that is usually required for well-known MPPT techniques such as perturb and observe (P&O). By predicting the PV system states in horizon of time, the proposed method becomes an elegant, embedded controller that allows faster response and lower power ripple in steady state than the conventional P&O technique under rapidly changing atmospheric conditions. This becomes possible without requiring expensive sensing and communications equipment and networks for direct measurement of solar irradiation changes. The performance of the proposed SC-MPC-MPPT with reduced load sensitivity is evaluated on the basis of industrial European Efficiency Test, EN 50530, that assesses the performance of PV systems under dynamic environmental conditions. The proposed control technique is implemented experimentally using dSPACE DS1007 platform to verify the simulation results. [ABSTRACT FROM PUBLISHER]

This paper presents an experimental efficiency comparison study between two different direct ac–ac converter topologies; a direct matrix converter and an indirect matrix converter. The evaluation is performed under variable load conditions using both discrete silicon isolated gate bipolar transistor and silicon carbide MOSFETs working at power levels up to 9 kW. Each loss measurement is carried out using two power analyzers; one placed at the input and one at the output of the converter under study. To facilitate this measurement, an output filter was necessary in addition to the normal input filter. Both converters are modulated using the same traditional symmetrical space vector approach and feature an identical input/output filter design. [ABSTRACT FROM PUBLISHER]

This paper was written to share the experience acquired in the specification of surge suppressors (snubbers) for protection against switching transients’ overvoltage resulting primarily in dry-type transformers failures in some plants in Brazil and North America. This paper will also explain about the snubber ratings (damping resistor, surge capacitor, and surge arrester), the assembly special cares, system modeling, and simulations using the software Alternative Transient Program. [ABSTRACT FROM PUBLISHER]

This paper introduces a three-phase grid-connected inverter for commercial-scale photovoltaic systems. The circuit topology combines an ac-inductor-less active bridge with a parallel-connected pulsewidth modulation inverter acting as an instantaneous reactive power compensator. The active bridge, called a 120° conduction inverter, operates at a switching frequency equal to the grid frequency and outputs a 120° rectangular current, while the compensator eliminates the harmonic currents included in the rectangular current. The main advantage of this strategy is the reduction in size of the required ac inductor by a factor of 4, as well as the reduction of power losses in the switching devices. The theoretical analysis clearly shows that the compensator can synthesize a sinusoidal output current by controlling only instantaneous reactive power, thus eliminating the need for electrolytic capacitors. A 5-kW experimental setup validates the operating principle and the control method of the proposed inverter and exhibits an inverter efficiency as high as 99.2% with Si superjunction mosfets. [ABSTRACT FROM AUTHOR]

In this paper, the intermittent control is proposed for switched reluctance machine (SRM) drive to both increase the efficiency and decrease the cost of the traction system for low-cost electric vehicles. With the purpose of maintaining the average machine torque required by the load, the intermittent control imposes a higher phase torque during a shorter time. The simulation and experimental results achieved with three different SRMs show that the intermittent control increases the system efficiency by reducing the converter losses and the core losses. Additionally, three different strategies of the control have been proposed to analyze their impact automotive application based on the criteria of efficiency, machine vibration, and torque pulsation. It can also be easily applied for any SRMs using average-torque-control-based methods. [ABSTRACT FROM AUTHOR]

This paper presents design of an isolated high-step-down dc–dc converter based on a class-DE power stage, operating at a 10-MHz switching frequency using enhancement-mode gallium nitride transistors. The converter operating principles are discussed, and the power stage design rated for 20 W is presented for a step down from 200–300 V input to 0–28 V output. Commercially available magnetic materials were explored and the high-frequency resonant inductor and transformer designs using a low-loss Fair-Rite type 67 material are presented. Finite-element simulations have been performed to estimate the parameters of magnetics at 10-MHz. Experimental results are presented at 12 W, 254 V input to 22 V output and 5 W, 254 V input to 14 V output on a laboratory prototype operating at 10-MHz. At 20 W, the experimental prototype achieved an efficiency of 85.2%. [ABSTRACT FROM AUTHOR]

This paper evaluates the temperature-dependent static and switching characteristics of SiC Trench mosfets in a low-inductance multiple-chip power module. First, a phase-leg power module package design with integrated decoupling capacitance is proposed and fabricated based on the P-cell/N-cell concept, and the module design including the substrate layout and packaging material selection are discussed. With the fabricated power module, the temperature-dependent static and switching characteristics of the SiC Trench mosfets are comprehensively investigated, and the key performance differences from the traditional SiC planar mosfets are discussed. Specifically, compared to the SiC mosfets with planar structure, the SiC Trench mosfets are observed to have a different temperature coefficient in term of the turn-off switching loss. Detailed analysis is provided as well to explain the experimental results. [ABSTRACT FROM AUTHOR]

The huge untapped energy from ocean waves is one of the ideal solutions for world energy crisis. This paper proposes a linear-generator-based direct power conversion plant model to generate the electrical energy from ocean waves. The linear generator output is of variable magnitude and variable frequency in nature. In this paper, this variable output is converted to fixed dc voltage by using a diode bridge rectifier and a dc-link capacitor. The linear generator along with a diode bridge and a capacitor forms a wave power unit. These wave power units can be connected in series and parallel to meet the power ratings. A reliable multilevel inverter is fed from the wave power units to ensure uninterrupted tapping of power from this abundant renewable energy source. The reliable inverter operation is analyzed under open- and short-circuit faults in switches by reconfiguring the carrier waves of sine pulsewidth modulation during fault conditions. A fault detection algorithm using a single sensor at the output is also proposed to detect the faults in the switches of the proposed reliable inverter. The proposed plant model with a linear generator and a reliable inverter is simulated using ANSYS MAXWELL and MATLAB/Simulink. The plant model is tested using a programmable ac source for emulating the linear generator and the developed prototype of the diode bridge rectifier and the reliable multilevel inverter. [ABSTRACT FROM AUTHOR]

In this paper, the pulsewidth modulation switch method was used to investigate the effect of the transformer leakage inductance on the small-signal model in isolated full-bridge converter. A galvanic isolated hard-switching full-bridge converter that operates in constant-current mode is analyzed, confirming that leakage inductance significantly affects the small-signal model, and the influence of leakage inductance can be equivalent to a resistance in series with the converter's output LC filter just as that in phase-shifted full-bridge converter. However, the same leakage inductance in these both converters will lead to different equivalent resistance due to different operating principles. Results of the modified model, simulations, and the experiments are compared to verify the correctness of the model. Moreover, this paper also shows that the Norton equivalent circuit of the charger operates in constant current mode, which can be used to estimate the dynamic behavior of the system. [ABSTRACT FROM AUTHOR]

Low-voltage dc distribution systems have gained significant attention over the last years, since they provide simpler and more efficient integration of distributed generators and storage devices, establishing a pathway to net zero energy buildings. In low-power units, transformerless utility interface is preferred to reduce footprint and losses. However, the lack of galvanic isolation introduces a common-mode (CM) path between the dc distribution bus and the utility service grounding, leading to the presence of high CM voltages at the dc bus feeders. The attenuation of the CM voltage reduces the touch voltage amplitude and leakage current, contributing to a safer environment. In this paper, a feed-forward active compensation of the CM voltage is proposed. It relies on utility voltage parameters, estimated by a phase locked loop, to generate a counter CM voltage; hence, it does not require previous knowledge of the system CM path model or the addition of voltage sensors. Experimental results show that this technique can attenuate the CM voltage to non-dangerous magnitudes without interfering with the microgrid differential mode behavior. [ABSTRACT FROM AUTHOR]

This paper discusses electrical distribution for refrigerated containers (reefers) in port terminals, characterized as parks of uniform distributed loads. Power systems of uniform distributed loads need configurations with modularity whenever possible, to ensure an easier installation, operation, and maintenance with significant cost reductions. This paper shows what has been the practice at ports in the past to provide Low Voltage (LV) supply to reefers from medium voltage (MV)/LV substations to cluster of reefer outlets panel with group of outdoor receptacles, used to connect power supply cord to each reefer. In the new method of power distribution system for the reefers, it is suggested to use a main MV underground distribution and portable containerized MV/LV transformer substations with close coupled LV distribution panel including reefer outlets. This potable power supply unit can be installed inside the reefer racks to supply locally a modular LV distribution to the reefers. This new method of supplying power to reefer racks has benefits over the past practice. It can offer a relevant flexibility for expansions and endorses development of new fitting components. [ABSTRACT FROM AUTHOR]

Modular multilevel converter (MMC) has been a promising candidate in high voltage direct current (HVdc) transmission systems. Due to the features of simple structure, low cost, and low power losses, half-bridge (HB) is usually adopted as the submodule circuit in the traditional MMC. However, an HB submodule circuit-based MMC does not have the capability of blocking dc short-circuit fault, which obstructs the development of low-cost HVdc systems with overhead lines. In order to solve this problem, an MMC with active clamped T-type submodule (ACTSM) to own dc fault blocking capability is proposed in this paper. Compared with other submodule circuits, the proposed ACTSM has many features, such as symmetrical blocking capability, low power losses, low voltage stress, and low amount of independent drive signals. The topology, operation principle, dc fault blocking capability, and distribution of power losses of the ACTSM are presented in this paper. The effectiveness of the ACTSM-based MMC is validated by both simulations and experiments. [ABSTRACT FROM AUTHOR]

Multioutput converters with single input source are currently studied as an alternative to conventional dc–dc topologies in order to improve power density in low-power multiload applications. This paper reviews three different ways in which a boost topology can be customized to supply multiple outputs. The first way uses a charge-sharing approach using individual switches to distribute inductor energy to different capacitors. The second method of creating a multiport converter (MPC) combines two converters with similar front end to generate two outputs using only one controlled switch. Using this method, a boost converter can be combined with single–ended primary–inductor converter (SEPIC), Cuk, and current source converter topologies. The third method uses time multiplexing of switches to produce two regulated ports and is referred to as switched-boost action. This method uses relatively less number of switches and allows regulation and control of all the outputs. Practical utility of switched-boost action based MPC is reported in this paper. This switched-boost MPC is applied to a renewable power converter system to interface a solar panel, a battery, and home loads to produce a 12-V and a 48-V bus. The 12-V bus is interfaced to battery and capable of optimally charging the battery in constant current–constant voltage (CC-CV) mode. The converter is demonstrated to operate with solar panel as it supplies a 12-V battery and a 48-V load bus. When the solar power is not available, the converter automatically goes into a mode in which the 12-V battery supplies the loads on the 48-V bus. [ABSTRACT FROM AUTHOR]

Gallium-nitride-field-effect transistors (GaN-FETs) are promising switching devices with fast switching capability. However, they commonly have low gate threshold voltage, suffering from susceptibility to the false triggering. Particularly, the oscillatory false triggering, i.e., a self-sustaining repetitive false triggering, can occur after a fast switching, which is a severe obstacle for industrial applications. The purpose of this paper is to elucidate the design instruction for preventing this phenomenon. The oscillatory false triggering is known to be caused by the parasitic oscillator circuit formed of a GaN-FET, its parasitic capacitance and the parasitic inductance of the wiring. This paper analyzed the nonoscillatory condition of this oscillator. The result revealed an appropriate ratio between the gate-drain capacitance and the common-source inductance is a key to prevent the oscillatory false triggering. Experiment successfully verified this analysis result, supporting the effectiveness of the appropriate design of this ratio for preventing the oscillatory false triggering. [ABSTRACT FROM AUTHOR]

This paper presents a practical view of how to implement a dual modular redundancy (DMR) scheme in a central processing unit–field-programmable gate array (CPU–FPGA) heterogeneous platform-based system, which is also described. FPGAs can be valuable resources when determinism and fast response/acquisition rates are required, while processing large volumes of data. On the other side, CPUs are affordable options for most other processing tasks, especially less frequent tasks, such as data recording. A heterogeneous platform is herein proposed and aims to achieve a reliable, however cost-effective solution. Subsequently, this paper proposes a method to implement a DMR scheme for monitoring systems by means of self-monitoring schemes, health indicators, and a voter that is not a physical switch connected to the monitoring devices, but is software-implemented within the interface system after the data storage system. This proved to be an effective way to deal with disagreements between units when an even number of units are being used, thus not being possible to use a majority-based voting system. The implemented design was thoroughly tested, showing effectiveness in terms of redundancy with improved reliability. [ABSTRACT FROM AUTHOR]

This paper presents a study of the losses in the integrated buck–flyback converter (IBFC) used as high-power-factor LED driver. The aim of the study is to investigate the possibilities of increasing the efficiency of the IBFC converter. The procedure of the improvement is done by obtaining the equations of the current through each component in terms of converter parameters. The current is found in an average value or rms value, depending on the type of the parasitic component, whether it is modeled by a parasitic forward voltage source or by a parasitic resistance, respectively. Using these equations and the parasitic model, the losses of each element of the converter are estimated. This paper proposes a technique to increase the efficiency of the IBFC by redesigning the converter parameters. Furthermore, this paper presents a case of study with a step-by-step efficiency enhancement process of an existing driver. The driver is operating under universal input conditions, and 38 V output, supplying an LED luminary of 26.5 W. The new design shows an improvement of the efficiency from 82% in the old design to 89% in the proposed one. Moreover, the new design shows an improvement in the power factor and the THD and a 50% reduction in the output current ripple. Furthermore, a reduction in the number of components has been achieved, as it is found by the analysis that by adjusting the converter parameters, one diode can be removed. Finally, the presented methodology is explained in detail so that it can easily be applied to other dc–dc converters. [ABSTRACT FROM AUTHOR]

Dual-comparison one-cycle control for the bidirectional power flow in single-phase grid-connected converters is proposed in this paper. Advantages of dual-comparison one-cycle control when compared to conventional one-cycle control is that it does not give any steady-state dc offset, no light-load instability, and implements unipolar pulsewidth modulation without having to sense the grid voltage. Addition of a fictitious current term, which is generated from the gating signal of one of the active devices, using a bandpass filter, enables the bidirectional power flow. The quality factor of the bandpass filter is shown to impact the total harmonic distortion in current, fundamental displacement angle, and steady-state dc offset. The optimal value of a quality factor, obtained with aid of simulations, gives a superior performance. The current drawn or injected into the grid is seen to lag the grid voltage. The reason for a nonunity displacement power factor is analyzed and a compensation to achieve a unity displacement power factor is also proposed in this paper. Detailed simulation and experimental studies are carried out to validate the proposed control and the high performance that can be obtained. [ABSTRACT FROM AUTHOR]

This paper proposes a medium-frequency (MF) solid-state transformer (SST) based grid interface for high-power multipulse rectifiers. In the proposed approach, the low-frequency ac (grid) voltage is transformed to MF voltage via front-end converters. The three single-phase MF outputs from these converters are fed to the primary side of a three-phase, five-limb multiwinding isolation transformer (or alternately three one-phase transformers). The secondary side windings from the transformer are configured in a certain “zig-zag” arrangement, which are connected to the inputs of three-phase diode rectifier modules as in a typical multipulse system. The proposed topology can better than double the power density by reducing volume (or weight) of the required front-end isolation transformer while maintaining the same input current quality as a conventional low-frequency transformer based approach. Usage of an open-loop square wave pulse width modulation for the front-end converters makes this approach simple to implement. This paper explains the proposed concept taking an adjustable speed drive application's perspective using modeling, simulation, and experimental results from a scaled down laboratory prototype. [ABSTRACT FROM AUTHOR]

There are several ways to model three-phase gridconnected voltage-source inverters (VSIs) with an $LCL$ filter. Such models often use simplifications like constant dc-link voltage or averaging over a switching period. These simplifications remove transistor switching and dc-link capacitor dynamics from the model. In this paper, a comprehensive modeling of a three-phase VSI, including an $LCL$ filter, is described and compared to models using one or more of the aforementioned simplifications. Advantages and disadvantages of different models are discussed. All simulations are verified by comparing with experimental results. [ABSTRACT FROM PUBLISHER]

The stacked switched capacitor (SSC) energy buffer is a recently proposed architecture for buffering energy between single-phase alternating and direct current. When used with film capacitors, it can increase the life of grid-interfaced power converters by eliminating limited-life electrolytic capacitors while maintaining comparable energy density. This paper introduces an enhanced version of the bipolar SSC energy buffer that achieves higher effective energy density and round-trip efficiency while maintaining the same bus voltage ripple ratio as the original design. Furthermore, the enhanced buffer uses fewer capacitors and switches than the original design. The enhancement in performance is achieved by modifying the control and switching patterns of the buffer switches. A prototype enhanced SSC energy buffer, designed for a 320-V bus and a 135-W load, has been built and tested. The design methodology and experimental results for the enhanced SSC energy buffer are presented and compared with the original design. This paper also presents a comparison of unipolar and bipolar SSC energy buffers. It is shown that, although bipolar designs are superior in terms of effective energy density at low ripple ratios, unipolar designs can outperform bipolar designs at high ripple ratios. [ABSTRACT FROM PUBLISHER]