Search

This paper proposes a switching strategy for the Z-source inverter (ZSI), which has unequal short-through intervals to reduce the current ripple in the inductor of its impedance source. A size reduction of the inductor of the ZSI is one of the important issues in improving the power density of the ZSI, and the inductor current ripple reduction is required to achieve it. The proposed method can reduce the inductor current ripple by 27.8% compared with the conventional method that has equal short-through intervals without increasing the number of inverter switching. The proposed operation and ripple reduction were confirmed in experiments with a 3-kW-class laboratory prototype. Its result agreed to the calculated results, and it was confirmed that there is no increase in circuit losses caused by the application of the proposed method. [ABSTRACT FROM AUTHOR]

In order to prevent the power switching devices (e.g., an insulated-gate bipolar transistor, IGBT) from shoot-through in voltage-source converters during a switching period, the dead time is added either in the hardware driver circuits of the IGBTs or implemented in software in pulse width modulation (PWM) schemes. Both solutions will contribute to a degradation of the injected current quality. As a consequence, the harmonics induced by the dead time (referred to as “dead-time harmonics” hereafter) have to be compensated in order to achieve a satisfactory current quality, as required by standards. In this paper, the emission mechanism of dead-time harmonics in single-phase PWM inverters is, thus, presented considering the modulation schemes in detail. More importantly, a repetitive controller has been adopted to eliminate the dead-time effect in single-phase grid-connected PWM converters. The repetitive controller has been plugged into a proportional-resonant-based fundamental-frequency current controller so as to mitigate the dead-time harmonics and also to maintain the control of the fundamental-frequency grid current in terms of dynamics. Simulations and experiments are provided, which confirm that the repetitive controller can effectively compensate the dead-time harmonics and other low-order distortions, and also, it is a simple method without hardware modifications. [ABSTRACT FROM AUTHOR]

This paper proposes a new nine-level inverter for medium- and high-power applications. The proposed topology comprises of a three-level (3L) active neutral-point-clamped (ANPC) inverter connected in series with a floating capacitor (FC) fed H-bridge. Besides, two additional switches operating at line frequency are appended across the dc link of the 3L ANPC structure. Compared with conventional hybrid cascaded inverters, the primary advantage of this addition is doubling of the resulting root mean square output voltage. This amelioration is achieved while preserving the standard 3L ANPC and H-bridge structures with minimum topological modification. A simple logic-gate-based voltage balancing scheme is developed to regulate the FC voltage. The proposed voltage balancing method is independent of load power factor, inverter modulation index, and can balance the voltage across FC instantaneously. The step-by-step formulation of logical expressions for the generation of gating pulses is deliberated in detail and can be generalized for any $n$-level inverter. Further, simulation results as well as the experimental measurements obtained from the laboratory prototype are presented to validate the effectiveness and practicability of the proposed configuration. Finally, the notable merits of the proposed inverter over the prior art topologies is established through a comprehensive comparative study. [ABSTRACT FROM PUBLISHER]

This paper presents a new control strategy for a modified cascade multilevel inverter used in drivetrain operations. The proposed inverter is a three-phase bridge with its dc link fed by a dc source (battery), and each phase series-connected to an H-bridge fed with a floating dc source (ultracapacitor). To exploit the potentials of the inverter for enhanced drivetrain performance, a sophisticated yet efficient modulation method is proposed to optimize energy transfer between the dc sources and with the load (induction motor) during typical operations, and to minimize switching losses and harmonics distortion. Detailed analysis of the proposed control method is presented, which is supported by experimental verifications. [ABSTRACT FROM AUTHOR]

The conventional current-source inverter has two major problems: unidirectional power flow and voltage boost operation, which make it impossible to be used in many applications, such as hybrid electric vehicles and general-purpose variable-speed motor drives. Z-source inverters (ZSIs) can solve both problems. Quasi-ZSIs (qZSIs) were recently proposed as an important improvement to traditional ZSIs. Besides the advantages inherited from ZSIs, qZSIs also have several of their own merits. This paper presents a comprehensive study on the new features of current-fed qZSI, including the advantageous buck–boost function, improved reliability, reduced passive component ratings, and unique regeneration capability. The current-fed qZSIs are bidirectional with an additional diode, unlike the voltage-fed ZSI that needs a switch to achieve bidirectional power flow. A modified space vector pulse-width-modulation method is proposed, and the available operating regions for motoring and regeneration operation are analyzed in this paper. Since the current-fed qZSI has the same operation as the current-fed ZSI, many results of this paper are also applicable to the current-fed ZSI. A reverse-blocking insulated-gate bipolar-transistor-based current-fed qZSI prototype was developed in the laboratory. Simulation and experimental results are shown to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

A digital dead-beat current controller for voltage source converters is presented in this paper. The control structure is specified in a digital hardware description language, synthesized, and deployed on a field-programmable gate array chip. By updating, with negligible computation delay, the duty cycle twice in a switching period, the reference current error is nulled in half a modulation period, so that the controller's small-signal bandwidth is maximized. In addition, due to a simple transient detection circuit, the large-signal response delay is reduced to a small fraction of the modulation period, which is determined by the chosen current signal oversampling rate. The controller can effectively support different voltage-source inverter applications, such as active filters, uninterruptible power supplies, microgrid distributed energy resource controllers, and dc–dc converter applications, including interface converters for renewable energy sources, laboratory battery chargers, and electronic welding machines. [ABSTRACT FROM AUTHOR]