Search

In this paper, the performance of a passive anti-islanding method is experimentally tested for three phase (3\phi) cogeneration systems. The tested method is based on determining the wavelet packet transform (WPT) high-frequency subbands present in the d– q-axis components of instantaneous 3\phi, when evaluated at the point of common coupling (PCC). This passive anti-islanding method is founded based on the nature of instantaneous 3\phi apparent powers that have components continuously exchanged between both sides of the PCC. An islanding condition can be considered as a transient disturbance that creates nonperiodic and nonstationary high frequency components in sd and sq. These frequency components can be parameterized by WPT high-frequency subbands, which can provide accurate detection of the islanding condition. The $d$– $q$ WPT-based anti-islanding method is tested for a $3\phi$ cogeneration system under various loading and power delivery conditions. Performance results reveal accurate, fast, and reliable detection and response to the islanding condition. [ABSTRACT FROM AUTHOR]

The architecture of a mission critical power system has to be designed with structures that allow the simultaneous operation of multiple sources (architecture efficiency). Opportunely organized, the business continuity management will project its program and take actions on the sources. Complete control of the system is necessary for all operating occurrences in an electrical power system. Complexity requires that “safe sets” of operating procedures have to be identified, selected, and authorized, as adopting the Parise program. A Human Competent Reaction has to guarantee the operation efficiency as providing decision-making in emergency statuses. The paper deals with a sample case of a system with multiple sources applying the micro approach of the “flock” logic that consists in managing exclusively the adjacencies of each node. The adoption of mechanical locking tools assists the switching procedures. [ABSTRACT FROM AUTHOR]

This paper proposes a novel 3 $\phi$ stand-alone solar photovoltaic (PV) system configuration that uses high-gain high-efficiency $(\approx\! 96\%)$ dc–dc converters both in the forward power stage and the bidirectional battery interface. The high-voltage-gain converters enable the use of low-voltage PV and battery sources. This results in minimization of partial shading and parasitic capacitance effects on the PV source. Series connection of a large number of battery modules is obviated, preventing the overcharging and deep discharging issues that reduce the battery life. In addition, the proposed configuration facilitates “required power tracking (RPT)” of the PV source as per the load requirements, eliminating the use of expensive and “difficult to manage” dump loads. High-performance inverter operation is achieved through $abc$ to $dq$ reference frame transformation, which helps in generating precise information about the load's active power component for RPT, regulation of ac output voltage, and minimization of control complexity. Inverter output voltage is regulated by controlling the modulation index of sinusoidal pulsewidth modulation, resulting in a stable and reliable system operation. The active power demand is controlled by regulating the dc link voltage. All the analytical, simulation, and experimental results of this work are presented. [ABSTRACT FROM PUBLISHER]

Multilevel converters (MLCs) have emerged as standard power electronic converters for medium-voltage high-power industrial applications. Owing to dominating device switching losses in high-power applications, it is preferable to use low device switching frequency (LDSF) modulation techniques. Then, it is possible to achieve higher device utilization, higher converter efficiency, and reduced cooling requirements. However, there exists a tradeoff between device switching frequency and harmonic distortion of converter output currents. Therefore, the main challenge for LDSF modulation techniques is to minimize the harmonic distortion of the output currents. The goal of this paper is to provide a review of various LDSF modulation techniques proposed in the literature and also discuss in detail about one of the emerging LDSF control techniques known as synchronous optimal pulsewidth modulation. Finally, challenges to LDSF modulation techniques for emerging multilevel topologies and future trends in applications of MLCs are discussed to motivate further research, to enhance the proposed LDSF techniques, and to explore for new alternatives. [ABSTRACT FROM PUBLISHER]

Brushless dc motor drive system employing minimized dc-link capacitor is becoming popular for the reason of compactness and long lifetime. However, once the capacitance is reduced, reversal dc-link current will lead to excessive voltage rise in the dc link when conventional current limit strategy is used. In order to avoid the damage caused by oversize pumping-up voltage, a novel current limit strategy without reversal dc-link current is necessary. In this paper, the traditional all-turn-off current limit logic is replaced by half-turn-off logic. Then, an improved current sampling scheme is presented to replace the cycle-by-cycle mode, which induces failure of current limiting after the elimination of reversal current. Finally, the proposed strategy is verified by simulation and experiment. [ABSTRACT FROM PUBLISHER]

Conventional PI controllers are vulnerable to changes in parameters and are difficult to tune. In this work, an artificial neural network (ANN) based controller is developed for the robust operation of a single-phase modified packed U-cell five-level inverter (MPUC-5) for solar PV application under variable insolation conditions. An MPUC-5 is a converter with a main and an auxiliary dc link of equal magnitude; although five-level operation is also still feasible with different voltages also. The maximum power point (MPP) of a PV array changes with the variation in the solar insolation. This results in a variable voltage at the output of the boost converter while maintaining the load line at the MPP. Consequently, the fundamental value of the output of the MPUC-5 also tends to change. Thus, it is required to produce angles that commit to an ac output voltage with a constant fundamental value and constrained to a minimum total harmonic distortion along with a third-order harmonic mitigation as per the grid codes, irrespective of the change in the dc-link voltages. A genetic algorithm is employed for this purpose. A large dataset is prepared for two-angle and four-angle operation of MPUC-5 under various dc-link voltages and constraints with which an ANN-based controller is trained. A neural network with a hidden layer is trained with the backpropagation technique; and once a correlation is developed, the network can be operated for a wide range of operating conditions. The robustness of the controller is verified through simulation in MATLAB/Simulink environment and validated by experimental emulation in an hardware in loop environment. [ABSTRACT FROM AUTHOR]

Current harmonics are ubiquitous in dual three phase (DTP) permanent magnet synchronous machine (PMSM) drives. Due to back electromotive force (EMF) distortion, significant current harmonics are generated in the DTP-PMSM system. The influence of back EMF harmonics is investigated in this paper and a novel switching-table-based direct torque control method to compensate the selected current harmonics caused by the back EMF harmonics is proposed. It shows that by employing different optimal action time durations for voltage vectors in the z1z2 subspace and setting the synthetic voltage vectors to non-zero, the stator flux harmonics caused by the back EMF harmonics can be selectively compensated, as verified by experiments. [ABSTRACT FROM AUTHOR]

A single-phase bridgeless Cuk ac/dc power factor correction (PFC) rectifier with positive output voltage is proposed in this paper. For low output voltage product applications, the rectifier is designed to convert high input voltage to low output voltage. Due to no bridge diodes required and thus decreased input conduction losses, the proposed rectifier efficiency can be improved. The proposed rectifier operates in discontinuous conduction mode, and the current-loop circuit is hence not needed. In addition, only a single switch is used in the rectifier to simplify the control circuit design. A simple translation method to have the positive output voltage in the Cuk converter is presented in the rectifier to reduce the component counts and the cost. The operational principles, steady-state analysis, and design procedure of the proposed rectifier are addressed in detail in this paper. Simulation and experimental results obtained from a 150-W rated prototype circuit with input of 90–130 Vrms, 60 Hz, and output of 48 Vdc have verified the validity of the proposed rectifier. [ABSTRACT FROM PUBLISHER]

This paper targets photovoltaic microinverters (MIVs) with integrated battery storage. The dual-active-bridge (DAB) topology provides bidirectional power flow; however, it generally suffers from poor efficiency and limited regulation accuracy at low power. It is shown that by modifying one switch, the DAB converter can operate as a two-transistor flyback to resolve these two issues. In addition, the dc-link voltage in the two-stage MIV can be dynamically adjusted for optimal performance in DAB mode. The proposed dual-mode control scheme is demonstrated experimentally on a 100-W prototype, with up to 8% increase in converter efficiency at low power. [ABSTRACT FROM PUBLISHER]

Wide-bandgap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) are promising materials for next-generation power devices. We have fabricated a normally on GaN-based high-electron-mobility transistor (GaN HEMT) for power electronic converters. In this paper, the current collapse phenomena, which are distinctive characteristics of GaN devices, are evaluated in detail for several voltages with two switching frequencies. We also evaluate a gate drive circuit that we previously proposed for the normally on GaN HEMT with a single positive voltage source. We construct and test prototype circuits for a boost-type dc–dc converter and a single-phase full-bridge inverter with a gate drive circuit. The problems to be solved for the normally on GaN HEMT, which has a (static) voltage rating of over 600 V, are clarified on the basis of the experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a novel bidirectional inverter, named series ac-link inverter. This three-phase inverter belongs to a new class of partial resonant ac-link converters in which the link is formed by a series ac inductor/capacitor (LC) pair having low reactive ratings. The input and output of this converter can be either dc, ac, single-phase, or multiphase. Therefore, they can appear as dc–dc, dc–ac, ac–dc, and ac–ac configurations. In all of these configurations, the ac capacitor is the main energy-storage element, and the inductor is merely added to facilitate the zero-current turnoff of the switches and their soft turn-on. Due to the zero-current turnoff of the switches in the proposed converter, the use of SCRs with natural commutation is possible as well. Since the current and voltage of the link are both alternating, no bulky dc-electrolytic capacitors are required in this converter. This paper mainly focuses on bidirectional dc to three-phase ac conversion. This single-stage inverter can step up or step down the voltage in a wide range. If galvanic isolation is required a single-phase high-frequency transformer can be added to the link. In the proposed inverter, the power can flow in both directions, and therefore, it is an excellent candidate for battery-utility interface and electric vehicle applications. In this paper, the principles of the operation of the proposed inverter, along with its design and analysis, are studied. Moreover, the performance of the proposed configuration is evaluated in this paper. Both simulation and experimental results are included. [ABSTRACT FROM AUTHOR]

This paper describes a high-speed protection circuit for insulated-gate bipolar transistors (IGBTs) subjected to hard-switching faults (HSFs). The reverse transfer capacitance depends on the collector–emitter voltage, and it produces a significant effect on the switching behavior not only under normal conditions but also under HSF conditions. A gate charge characteristic under HSF conditions differs from that under normal turn-on conditions. Hence, an HSF can be detected by monitoring both the gate–emitter voltage and the amount of gate charge during the turn-on transient period. IGBTs can be rapidly protected from destruction by using this method because a blanking time is unnecessary. Simulation and experiment verify the validity of the proposed high-speed protection circuit. [ABSTRACT FROM PUBLISHER]

This paper proposes a method to reduce the low-frequency neutral-point voltage oscillations. The neutral-point voltage oscillations are considerably reduced by adding a time offset to the three-phase turn-on times. The proper time offset is simply calculated considering the phase currents and dwell time of small- and medium-voltage vectors. However, if the power factor is lower, there is a limitation to eliminate neutral-point oscillations. In this case, the proposed method can be improved by changing the switching sequence properly. Additionally, a method for neutral-point voltage balancing is also proposed. The change in switching frequency by the proposed method and its effects on the outputs are negligible. Simulation and experimental results verify the validity and feasibility of the proposed strategy. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel modulation technique and a new balancing control strategy for a single-phase five-level flying-capacitor (FC)-based active-neutral-point-clamped (ANPC) converter. The proposed modulator can control the FC voltage to follow the requested reference value and simultaneously generate the required ac output voltage regardless of the values of the dc capacitor voltages of the converter. By implementing this method, smaller values of the dc-link capacitor and FC can be used even in applications that could experience ripple or transient in the capacitor voltage. In a single-phase five-level ANPC converter applications, where the capacitors can experience pulsation power and dc-link balancing issues, such as grid-connected photovoltaic system, the selection of the reference voltage value for the FC can play an important role to balance the average values of the dc-link capacitor voltage. The proposed new control strategy uses a new reference voltage for the FC to be applied by the new modulator to have an average balanced dc-link voltages as well as an ac output voltage with good power quality. Simulation studies and experimental results demonstrate the effectiveness of the proposed modulation technique and control strategy even with relatively small dc capacitors to produce high-quality output voltage and current waveforms while maintaining an average balanced dc-link voltages. [ABSTRACT FROM PUBLISHER]

Model predictive control (MPC) has a number of desirable attributes which are difficult to achieve with classical converter control techniques. Unfortunately, the nature of power electronics imposes restriction to the method, as a result of the limited number of available converter states. This, combined with the spread spectrum nature of harmonics inherent with the strategy, complicates further design. This paper presents a method for removing this characteristic without compromising the desirable functionality of predictive control. The method, named modulated MPC, is applied to a two-level three-phase converter and compared with a number of similar approaches. Experimental results are used to support theoretical analysis and simulation studies. [ABSTRACT FROM PUBLISHER]

Various kinds of differential power processing converters and voltage equalizers have been proposed for series-connected photovoltaic (PV) modules to prevent negative influences of partial shading, such as significant reduction in power generation and the occurrence of multiple maximum power points (MPPs), including local and global MPPs, that hinders and confuses MPP tracking algorithms to operate properly. However, since conventional topologies are based on multiple individual dc–dc converters, the required switch count increases proportionally to the number of modules connected in series, increasing the complexity. A two-switch voltage equalizer using an LLC resonant inverter and voltage multiplier is proposed in this paper. The circuitry can be dramatically simplified compared with conventional topologies due to the two-switch configuration. Detailed operation analyses for the LLC resonant inverter and voltage multiplier are separately performed. Experimental equalization tests emulating partially shaded conditions were performed for four PV modules connected in series. With the proposed voltage equalizer, local MPPs successfully disappeared, and extractable maximum power increased compared with those without equalization, demonstrating the effectiveness and performance of the proposed voltage equalizer. [ABSTRACT FROM PUBLISHER]

This paper presents a dual-loop current regulation strategy for coupled-inductor multilevel converters. The basis of the strategy is to recognize that the current in the coupled inductor can be decoupled into independent dc bias and ac load currents, which can be then regulated using separate feedback processes. This allows the system to enforce continuous conduction operation of the inverter phase legs by dynamically varying the dc bias current to track the ac load current. Design principles are presented to account for the different common- and differential-mode load dynamics and to maximize the closed-loop bandwidths of both feedback loops. This ensures that the dc bias current can follow rapid load transient events. Matching simulation and experimental results obtained for a five-level flying-capacitor coupled-inductor inverter are presented to validate the proposed control strategy. [ABSTRACT FROM PUBLISHER]

An application-oriented integration concept for a half-bridge switch assembly has been developed based on the latest generation 70- \mu\m-thin insulated gate bipolar transistors and diodes, which are rated at 600 V/200 A. This paper addresses the design and reliability of the assembly, with a fully bondwireless approach using cylindrical copper bumps. Advanced numerical structural simulation techniques are also applied to assess the influence of interconnect characteristics (material, size, and shape) and try to determine an optimum solution for reducing the stress and creep strain development in the solder joint. Preliminary experimental tests of the power module are also carried out at different switching frequency and loads to prove the validity of the proposed solution in terms of electromagnetic performance. [ABSTRACT FROM AUTHOR]

This paper presents a novel dc–dc converter configuration, which successfully integrates two technologies, including a switched capacitor and a switched coupled inductor, into one converter. By adopting a coupled inductor to charge a switched capacitor, the voltage gain can be effectively increased, and the turns ratio of the coupled inductor can be also reduced. Not only lower conduction losses but also higher power conversion efficiency is benefited from a lower part count and lower turns ratios. The proposed converter is simply composed of six components, which can be further derived to varied converters for different purposes, such as a bidirectional converter. The operating principle and steady-state analysis are discussed in this paper. A 250-W laboratory hardware prototype is completed and verified. The voltage gain is up to 11. The highest efficiency is 97.2%, and the full-load efficiency is kept at 93.6%. [ABSTRACT FROM AUTHOR]

This paper proposes an offline single-stage light-emitting diode (LED) driver based on a novel approach to reduce low-frequency ripple in LED arrays supplied from mains, while assuring high input power factor (PF). The proposal employs a series resonant dc–dc converter integrated into a bridgeless boost power factor correction (PFC) stage. The resonant stage works to reduce the low-frequency ripple transmitted from the output of the PFC stage to the LEDs with only small power losses. This solution achieves three main goals: 1) reduction of the bulk capacitance used at the dc bus, allowing for the use of long-life film capacitors; 2) increase in the overall efficiency of the LED driver owing to the low switching and conduction losses in the shared switching network; and 3) assuring high input PF. Experimental results of a driver without electrolytic capacitors for a 100-W street lighting LED luminaire are presented, showing overall efficiency in excess of 92%, input PF greater than 0.97, and line current harmonic content in compliance with the IEC 61000-3-2 standard. [ABSTRACT FROM AUTHOR]

This paper proposes a space vector modulation (SVM) strategy for asymmetrical cascaded multilevel converters operating under fault conditions on the power cells. During each switching interval, one voltage vector is chosen to be implemented by the high voltage cells. It is then subtracted from the reference, resulting in a new reference for the low voltage cells. However, under fault conditions, if the high voltage vectors are not properly chosen, the converter may saturate. This paper presents a comparison between the choice of the high voltage vector as the nearest one to the reference, and as the one whose domain encompasses it. It is shown that the second choice is better, as it avoids saturation of the converter as much as possible. The proposed SVM is performed in the output line-to-line voltages coordinate system, in which the converter voltage vectors have only integer entries. The algorithm is presented considering as an example a converter with two cells per phase: one of 1 pu that switches with PWM, and one of 2 pu, switching at the fundamental frequency, respectively called low-voltage-high-frequency and high-voltage-low-frequency cells. Finally, experimental results are given to demonstrate and validate the good performance of the proposed SVM. [ABSTRACT FROM AUTHOR]

This paper proposes a novel single-stage electronic ballast with high power factor (HPF) for supplying fluorescent lamps. The presented electronic ballast integrates a dual boost converter with coupled inductors and a half-bridge series-resonant parallel-loaded inverter into a single-stage power conversion topology. The features of the ballast are cost-effectiveness, HPF (\PF > 0.98), high circuit efficiency ( $ > $90%), low input current total harmonic distortion (\THD < 7\%), low level of crest factor (\CF < 1.4), and zero-voltage switching obtained on both two power switches. Operational principles, design equations, and experimental results of one T5-type fluorescent lamp with a rated power of 21 W operating at 50 kHz switching frequency with 110 V-RMS line input voltage are presented. Satisfactory results demonstrate the feasibilities of the proposed ballast. [ABSTRACT FROM PUBLISHER]

Natural balancing of the cell voltages is observed in many multilevel converters, however, this was not previously described for the modular multilevel converter (MMC). This paper introduces a method whereby the self-balancing behavior of the MMC can be described and analyzed. A novel equivalent circuit of the two cell single phase MMC is introduced whereby the unbalance in the system is clearly stated. Using this equivalent circuit a method, using the frequency domain as basis for analysis, is proposed whereby the self-balancing properties of the converter can be described. The method is verified through comparison with simulation results. [ABSTRACT FROM AUTHOR]

Although the maximum collector–emitter voltage of a high-voltage insulated-gate bipolar transistor (HV-IGBT) reaches 3300 V or higher, it still cannot satisfy the requirements of some high-voltage high-power converters. Applying power semiconductor devices in series connection can effectively improve the voltage rating and power rating of a power electronic converter. The key issue of device series connection is voltage balancing in static switching state and dynamic switching state. In this paper, a three-level converter based on series-connected HV-IGBTs is presented, its voltage-balancing subcircuits are analyzed, and the parameter design method for the converter is proposed. During the design process, key performance indexes of the series connection circuit, such as the voltage-balancing effect, loss of the voltage-balancing circuit, switching loss, and switching time, are comprehensively considered. Moreover, component parameters of the three-level converter are calculated considering the influence of the voltage-balancing circuit. The proposed parameter design method is applied in the development of a three-level HV-IGBT (4500 V/600 A) series connection test platform with 10 000-V rated dc-link voltage. Experimental results verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

This paper proposes a switched capacitor-based converter to drive high-power light-emitting diodes (LEDs). In contrast to conventional constant current dc drivers, the current pulse is provided by a switched capacitor. The proposed approach differs from the traditional switched-capacitor-based one, because it uses a small inductor to improve the switching behavior of the converter. Based on the charge control analysis, the effects of switching devices on the proposed converter are evidenced and evaluated. A 6 W, 24 V laboratory prototype has been implemented, while experimental results are presented and discussed to demonstrate the technical feasibility of the proposed converter applied as LED driver. [ABSTRACT FROM PUBLISHER]

Three optimized pulse-width modulated (PWM) techniques for the overmodulation region of two-level inverter-fed ac drives are introduced and investigated from the harmonic loss minimization point of view. The optimization is elaborated for the lowest loss-factor, which is proportional to the square of the root mean square value of current harmonics. The loss-factors are computed for different switching numbers as the function of the motor fundamental voltage. It is shown that, with respect to the motor heating and torque ripples, the acceptable drive condition can be guaranteed by a relatively low value of an inverter switching frequency up to 96%–97% of maximal possible motor voltage. Furthermore, it is shown that the so-called three-vector methods have considerably better performance in the lower part of the overmodulation region than the so-called two-vector method for the same number of switching. The performance of the techniques is compared with other existing PWM techniques. This paper discusses the implementation details of the proposed optimal PWM techniques. The theoretical results are verified by experimental and simulation tests. [ABSTRACT FROM AUTHOR]

A novel constant current injection-based characterization scheme for the switched reluctance machine (SRM) is proposed here. Unlike conventional characterization methods where the rotor is locked at a fixed position, the current injection-based method maintains the phase current constant while the machine runs at constant speed. A novel current controller, required for the proposed constant current injection scheme, is also proposed in this paper. The predictive control-based current controller works without the machine model being available. The proposed current controller is validated experimentally and is then used to characterize a 4 kW, 1500 r/min 8/6 pole SRM. The characteristics obtained are found to be in good agreement with those obtained using conventional locked rotor tests. [ABSTRACT FROM AUTHOR]

This paper presents a high-power-density high-power-factor GaN-based two-stage electrolytic-free offline LED driver. The LED driver achieves high power density through the use of a hybrid film–ceramic stacked switched capacitor (SSC) energy buffer, and a comprehensive optimization methodology that evaluates various converter topologies and designs and minimizes overall system volume while maintaining high efficiency. Based on this optimization approach, a totem-pole bridgeless boost power factor correction (PFC) converter is selected for the first stage, while a stacked-input isolated LLC dc–dc converter is selected for the second stage. The optimization procedure also minimizes the passive volume of the SSC energy buffer incorporating the volumetric energy density of commercially available capacitors. The optimized SSC energy buffer utilized in the proposed LED driver has 50% less passive volume than a capacitor-only solution. A 600-W prototype LED driver designed using the proposed approach for universal input voltage ${{(90}}-{ 305 \ \text{V}}_{{\text{rms}}})$ and 24-V output voltage is built and tested. The PFC stage achieves a peak efficiency of 98% while the LLC stage achieves a peak efficiency of 95%. The prototyped LED driver achieves a power density of 28 W/in3. [ABSTRACT FROM AUTHOR]

Space vector modulation (SVM) of a Z-source ultrasparse matrix converter (ZSUSMC) can be realized by either using or not using a zero state in the space vector rectification. In this paper, these two modulation schemes are investigated for a cascaded ZSUSMC. It is demonstrated that the input current under the modulation scheme without a zero state is nonsinusoidal, and its harmonics content depends on the output and impedance network inductor currents. In addition, restrictions on operation of the ZSUSMC with low voltage gains are unveiled. Next, aiming at improving the input current quality and suppressing the harmonics content to an acceptable level, an approach for design of the cascaded Z-source network is proposed. Furthermore, an optimal switching pattern, which results in minimum possible number of changes in the switching states of the ZSUSMC, is developed. Using the developed switching pattern, an approach for digital implementation of the SVM schemes on a single conventional digital signal processor (DSP) without employing an additional field programmable gate array is proposed. Hardware-in-the-loop studies of the ZSUSMC modulated under the proposed SVM schemes are carried out to verify their digital implementation feasibility on a conventional single DSP, as well as effectiveness in producing high-quality input/output currents. [ABSTRACT FROM AUTHOR]

As projects to expand the processing capacity of a gas plant located in west Texas were pursued, engineering staff observed that the planned incoming medium-voltage power feeder possessed many of the risk factors that have led to increasingly common control-power transformer (CPT) and voltage transformer (VT) failures in industry due to switching. Such failures could involve significant damage and down time. To address these concerns, a computer simulation study was undertaken. As part of initial data gathering, sweep frequency response analysis (SFRA) measurements were performed in an atypical context to establish resonant characteristics of these instrument transformers. When the remote source breaker was modeled to open, connected VTs/CPTs went into severe sub-power-frequency ferro-resonance with probable catastrophic failure. This was verified by Electromagnetic Transients Program (EMTP) simulations as well as by field measurements. The focus of this paper will be on the determination of this unique form of ferro-resonance, identification of risk factors, novel cost-effective solutions, implementation, and field measurement verification of the proposed mitigation solutions. Field measurements have shown high correlations with the EMTP simulations and have verified the effectiveness of the proposed novel mitigation solutions. [ABSTRACT FROM AUTHOR]

An observer-based control (OBC) strategy for dual-active-bridge converters is proposed in this paper. The target is not only to handle the active power transferring between two terminals, but also to regulate the phase difference between the primary voltage and current around specific minimum value. The value is chosen to reduce the conduction loss in the system. A reduced-order observer is developed to estimate the direct and quadrature components of the transmission current for use in a decoupled current control system. Since the dc terminal current is the only input of the observer, a low sampling frequency is enough to ensure an acceptable precision. Experiment results show that the proposed OBC strategy can help improve the dynamic performance compared with that when using a single loop voltage mode system. Furthermore, at the high power range, the efficiency obtained when employing the OBC method is improved by up to 7.2%. [ABSTRACT FROM AUTHOR]

Power conversion systems based on double-delta sourced winding (DDSW) had an optimization issue in terms of pulsewidth modulation (PWM). This issue was about inefficient employments of voltage levels during PWM and had to be considered for minimizing voltage stresses and current ripples on DDSW. In this paper, a novel method has been proposed to improve the performance of PWM in DDSW-based systems. The proposed method can be simply implemented as a carrier-based PWM and its principles are neatly summarized with equations. Finally, the effectiveness of the proposed method is demonstrated with experimental results, which were obtained by using a transformer and an induction machine. [ABSTRACT FROM PUBLISHER]

Neutral-point-clamped (NPC) multilevel inverter fed high power drives operating at low switching frequency are prone to low-order torque pulsations. For a case of N switching angles per quarter, apart from maintaining the fundamental component, (N-1) voltage harmonics can be eliminated. Consequently, \fracN-12 or lower number of torque harmonics could be eliminated. This paper proposes an optimal pulse-width modulation (PWM), which minimizes the combined root mean square (RMS) value (\tau RMS ) of torque harmonics of order lower than $6N$ at any modulation index (M$) for an induction motor drive fed from an NPC three-level inverter. This paper considers cases of two, three, and four switching angles per quarter cycle of the pole voltage. Compared with synchronized sine-triangle PWM and selective harmonic elimination (SHE) PWM, the proposed PWM reduces the first (N-1$ ) torque harmonics (i.e., \tau _6 ) over a wide speed range. Simulation and experimental results are presented on a 3.7-kW open-loop constant volts-per-Hertz induction motor drive. [ABSTRACT FROM PUBLISHER]

This paper proposes a dual-mode model predictive direct current control (MP-DCC) of a permanent magnet synchronous generator (PMSG). The proposed algorithm is capable of minimizing switching losses in a two-level synchronous generator side converter (SGSC). A new prediction model that takes the converter dead time into consideration when choosing the optimal switching state is introduced. The proposed prediction model provides a more accurate state prediction, ensuring that the states of the system stay inside the control invariant set in the steady state, even in the case of a significant converter dead time. To guarantee recursive feasibility and closed-loop stability, a flexible control Lyapunov function (CLF) is employed as an optimization problem constraint, which enables the minimization of switching losses both during transients and in the steady state. The influence of the converter dead time on the performance of the proposed algorithm is considered, and accordingly, a control invariant set is determined. Simulation results show that stator currents are kept within the control invariant set if dead time is taken into account in the prediction model. Furthermore, the proposed algorithm is implemented in a digital control system and experimentally verified on a 375 kW interior PMSG. Experimental results verify that the proposed control algorithm provides a successful flying start of the PMSG and show that the application of the flexible CLF results in a lower switching frequency, but also in higher current ripple. By adjusting the upper bound of the control invariant set, a desired tradeoff between the low stator current ripple and the minimization of switching losses can be achieved. [ABSTRACT FROM PUBLISHER]

Accurate characterization of power semiconductors over wide operating ranges is a necessity to accomplish better electrical and thermal designs of power converters. Especially, switching losses of power devices are rarely given sufficiently detailed in their datasheets, since they also depend strongly on the driving circuitry and design of the power converter itself. A means to extract the switching losses are double pulse measurements where the desired operating points can be freely chosen. This paper introduces a temperature conditioning unit that allows the adjustment of the junction temperature between −40 °C and 200 °C using thermoelectric coolers (TECs). The unit is for an automated double pulse test bench with dc-link voltages of up to 1 kV and switching currents of up to 1 kA. Up to 1 kW of electrical power is required to power the TECs. The design of the power converter is shown as well as the control scheme. An algorithm, which automatically extracts the switching losses of the measured double pulse waveforms is presented. An exemplary characterization of an Infineon EconoDual power module is conducted and the results are presented. [ABSTRACT FROM PUBLISHER]

This paper presents a reverse mapping based space vector pulse-width modulation strategy for five- and seven-level diode-clamped multilevel inverters. In this method, the space vector is expressed as a sum of a contender vector and an error vector. Here, the actual sector, which contains the tip of the reference space vector, needs not to be found. The vector nearest to the reference space vector is the contender vector. By calculating the vector difference of the contender vector from the reference vector, the error vector is determined. Using translation method, the error vector is translated to the origin of space vector diagram. There will be (n–1) steps in space vector diagram for an n-level inverter. As the error vector amplitude will be less than one step of the space vector diagram, the two-level space vector method can be applied. To obtain a vector that is very close to the reference vector, the determined switching states can be added to the contender vector. This technique can be extended to any n-level multilevel inverter. The performance of five-level and seven-level diode-clamped multilevel inverters is presented using MATLAB/Simulink. The performance of inverters is evaluated by using induction motor load. The experimental results using field programmable gate array are presented for seven-level diode-clamped multilevel inverter. [ABSTRACT FROM PUBLISHER]

Space vector modulation (SVM) is a widely used method for multilevel inverters. Most of the SVM methods are nearest three vector (N3V) based schemes. Therefore, several researchers have proposed advanced implementation algorithms with reduced complexity for N3V methods. However, topologies like neutral point (NP) clamped inverter (NPCI) require some distinctive methods (called as non-N3V methods) to balance NP voltage for high modulation index and low power factor operations. Currently, the existing non-N3V methods exercise highly complex algorithms for duty ratio calculation and subtriangle identification. This paper presents a new approach, suitable for both N3V and non-N3V methods, with reduced implementation complexity. The proposed algorithm is based on an equivalent two-level space vector diagram and does not require any trigonometry, coordinate transformation, or volt-second balance solution. Unlike other carrier-based methods, it can change the switching sequence as well as the duration of redundant vectors. Moreover, the proposed approach does not require extra steps for implementing hybrid modulation and it can also be extended to multilevel topologies. One N3V, two non-N3V, and hybrid methods are developed using the proposed modulation algorithm, and are compared in detail. Simulation and experimentation on a three-level NPCI verify the validity of the proposed algorithm. [ABSTRACT FROM PUBLISHER]

This paper presents the concept of three-phase module-integrated converters (MICs) incorporated in grid-tied large-scale photovoltaic (PV) systems. The current-source converter with dc voltage boost capability, namely the single-stage power conversion system, is proposed for the three-phase PV MIC system. A model predictive scheme with low switching frequency is designed to control the proposed topology in such a way that provides a certain amount of active and reactive power in steady-state operation and also provides a proper ratio of reactive power under transient conditions to meet the low-voltage ride through regulations. To predict the future behavior of current control values and switching states, a discrete-time model of the MIC is developed in the synchronous reference frame. It is demonstrated that the injected active and reactive power can be controlled by minimizing the cost function introduced in the predictive switching algorithm. The proposed structure is simulated in MATLAB/SIMULINK software. An experimental verification is provided to justify the performance of the proposed control method through a 300-VA laboratory prototype. The results verify the desired performance of the proposed control scheme for exchanging both active and reactive powers between the PV MIC and the grid within different operating conditions. [ABSTRACT FROM AUTHOR]

This paper presents a single-stage light-emitting diode (LED) driver based on a bridgeless power factor correction (PFC) converter and a half-bridge CLCL resonant converter for street lighting applications. The proposed single-stage topology integrates the PFC converter and the CLCL resonant converter by sharing active power switches. The bridgeless PFC converter adopts two buck–boost circuits operating in discontinuous-conduction mode to achieve input-current shaping. It uses two diodes instead of a rectifier bridge to reduce the power loss caused by the diodes. Owing to its superior soft-switching characteristics, the CLCL resonant converter is used. The proposed LED driver has superior features, such as high efficiency, near unity power factor, low total harmonic distortion, and relatively few diodes. A 100-W lab prototype is successfully implemented, and the experimental results verify the effectiveness and feasibility of the proposed LED driver. [ABSTRACT FROM AUTHOR]

A self-tuning controller for power transfer regulation in inductive power transfer (IPT) systems is proposed in this paper. The controller enables power transfer regulation around a user-defined reference power level. The converter's efficiency is improved by constantly tuning the switching operations to the resonant current, thereby achieving the soft-switching operations reducing electromagnetic interference in the power converters. The self-tuning capability makes it ideal for dynamic IPT systems with uncertain loads and fluctuating resonance frequency. High operating frequencies can be achieved using the simplified digital circuit design for the controller, proposed in this paper, which delivers a low total propagation delay. Bidirectional power transfer can be enabled by using the proposed controller on both transmitter and receiver sides. In the reverse power flow mode, the primary converter operates as a rectifier and the power transfer is controlled through the secondary converter using the proposed controller. The performance of the proposed controller is analyzed using MATLAB/Simulink and the results are presented. Finally, the proposed controller is implemented experimentally and its performance is evaluated as a case study on an IPT system. The experimental and simulation results conform to each other, and show that the proposed converter can effectively regulate the power transfer with an improved efficiency. [ABSTRACT FROM AUTHOR]

In this paper, an ultralow inductance power cell is designed for a three-level active neutral point clamped (3L-ANPC) based on 650-V gallium nitride (GaN) high electron mobility transistor (HEMT) devices. The 3L-ANPC topology with GaN HEMT devices and the selected modulation scheme suitable for wide-bandgap devices are presented. The commutation loops, which mainly contribute to voltage overshoots and increase of switching losses, are discussed. The ultralow inductance power cell design based on a four-layer printed circuit board with the aim to maximize the switching performance of GaN HEMTs is explained. The design of gate drivers for the GaN HEMT devices is presented. Parasitic inductance and resistance of the proposed design are extracted with finite-element analysis and is discussed. Common-mode behaviors based on the simulation program with integrated circuit emphasis (SPICE) model of the converter are analyzed. Experimental results on the designed 3L-ANPC with output power of up to 1 kW are presented, which verifies the performance of the proposed design in terms of ultralow inductance. [ABSTRACT FROM AUTHOR]

The effect of inverter dead time on the inverter output voltage is well studied in the literature. This paper studies the effect of the dead time on the inverter input current. An expression for the switching-cycle-averaged inverter input current including the dead time effect is derived, which shows the dead time effect to primarily result in a reduction in the average value of the inverter dc input current. The effect of dead time on the input current is incorporated into the dc-link dynamic model of a diode-bridge-rectifier (DBR) fed voltage source inverter (VSI). A switching-cycle-average model of a DBR-VSI-fed induction motor is proposed, which considers the effect of dead time on both the ac output voltage and dc input current of the VSI. The proposed average model is used to study the light-load instability phenomenon in a 100-kW open-loop motor drive. The proposed model is shown to predict the region of oscillatory behavior (i.e., region exhibiting light-load instability) with better accuracy than existing average models. The proposed model also accurately predicts the dc-link voltage swing at such oscillatory operating points. While being comparable in accuracy in predicting the system dynamics, the proposed model is much more computationally efficient than the state-of-the-art switching model. The validity of the proposed average model is also confirmed by experimental measurements on a 100-kW induction motor drive. [ABSTRACT FROM AUTHOR]

A two-stage quasi-resonant LED driver with a digital control method is proposed in this paper. The first stage of this converter is a boost circuit with a power factor correction function, and the second stage is a dual-buck circuit that works in a quasi-resonant zero voltage switching state. Because of the soft-switching characteristics of the converter, switching losses are reduced and efficiency is significantly improved. A digital control method is adopted to detect the peak value of inductor current and enhance system reliability. Moreover, because LEDs are always driven by a current source, a current loop is designed to maintain constant output current. IRS2104 is chosen as the drive chip and the microcontroller is AT90PWM216, which can improve the quality of the drive signals. The output of the converter is a square wave that drives two branches of antiparallel LEDs. A 60-W prototype was designed to demonstrate the theoretical analysis. The obtained power factor was as high as 0.987 and the efficiency reached 92.3%. [ABSTRACT FROM PUBLISHER]

A trend for low-power conversion system is to integrate every component to a single chip. Magnetic component has been the key to determine the power density of the integrated switching power converter. In this paper, a hybrid resonant buck-type converter with an ultracompact custom-designed coupled inductor is presented for low-power integrated on-chip applications. This converter achieves zero-voltage switching for the high-side switch and near zero-voltage zero-current switching for low-side and auxiliary switches. The soft-switching condition allows the circuit operating at high switching frequencies. An ultracompact planar coupled inductor with a dimension of 5.25 mm × 1.95 mm × 3.86 mm is designed and customized for future integrated on-chip applications. The high-power density of this magnetics component is achieved by high switching frequency and optimized printed circuit board (PCB) windings design. A hardware prototype with 24 to 60-V input and 3.3 to 5-V, 3-A output operating at 2–3 MHz is presented to verify the circuit operation. The prototype achieves a peak efficiency of 90.7% using silicon devices at 2-MHz switching frequency. [ABSTRACT FROM PUBLISHER]

The series-resonant dc–dc converter (SRC) is widely applied in a large range of voltage and power. In most applications, fault tolerance is a highly desired feature and it is obtained through redundancy. This paper proposes a fault-tolerance solution for the SRC, which could drastically reduce the need of redundancy. Using the proposed scheme, the full-bridge-based SRC or multilevel-based SRC can be reconfigured in a half-bridge topology, in order to keep the converter operational even with the failure (open circuit or short circuit) of one switch. Since the proposed scheme can be applied to the full-bridge-SRC and multilevel SRC, a family of fault-tolerant converter is proposed in this work. The advantages of the proposed approach are minimum of additional hardware and no deterioration of the converter efficiency. The proposed fault-tolerance solution was experimentally tested in a 10 kW SRC prototype with input voltage of 700–600 V. A short-circuit fault in a semiconductor is tested and the results confirm the effectiveness of the proposed approach. [ABSTRACT FROM PUBLISHER]

Cascaded bidirectional dc–ac converters are commonly used in uninterruptible power supply applications and battery chargers for electric vehicles. Power conversion units for such applications employ a large electrolytic capacitor at high-voltage dc bus, which not only reduces the lifetime but also adds to the weight of the converter. In this paper, a novel bidirectional dual active bridge cascaded three-phase converter (DABCC) with six-pulse dc link is proposed. Also, a new closed-loop control scheme to implement the six-pulse modulation (SPM) technique in DABCC is proposed. The advantages of the proposed control scheme in DABCC are that the electrolytic capacitor is eliminated and is replaced with a low-value film capacitor resulting in increased reliability, compactness, and reduced cost. SPM technique also increases the dc bus utilization and decreases the inverter average switching frequency to 33% when compared with the conventional sine pulse-width modulation (SPWM). Harmonic components introduced in the pole voltages of the SPM-modulated DABCC due to inverter dead time are analyzed, and a resonant controller is designed to mitigate them. Also, root mean square current stress for high-voltage dc-link capacitor is studied, and it is shown that the capacitor requirement for SPM modulation is lower than the conventional SPWM. To validate the proposed control scheme, an 800-W proof-of-concept laboratory hardware prototype is fabricated and experimental results are demonstrated. [ABSTRACT FROM PUBLISHER]

In this paper, a robust voltage control is designed for a floating interleaved boost converter with high voltage gain. The proposed controller has an inner loop based on super-twisting sliding mode algorithm, which has continuous control signal and the sliding surface is defined for the inductor current. The reference current value is generated by active disturbance rejection control (ADRC) algorithm in the outer loop, based on the output voltage error. The stability of the sliding mode inner loop and the ADRC outer loop are proven using Lyapunov stability theorem and Routh–Hurwitz criteria, respectively. The robustness of the proposed controller is analyzed in depth, and validated by the simulations and experimental results obtained with a 100 W prototype converter. [ABSTRACT FROM PUBLISHER]

Paralleling power converters is a common practice in industries to enhance total power rating, reliability, and availability of the system. In case of fault occurring in systems with parallel converters, the faulty power converter can be isolated and the system can still be operated at reduced power level. In this paper, a grid-connected power converter consisting of two parallel H-bridge converters with low ground leakage current is considered. Two contingency configurations, that are also of low ground leakage current, are proposed to enhance the availability of the system. This is done by reconfiguring the power circuit to a single H-bridge in the case of failure in one of the bridges. The power converter is experimentally tested with the proposed configurations for experimental validation. The results show that the second configuration has better performance in terms of power loss and current total harmonic distortion when operating at lower power level. [ABSTRACT FROM AUTHOR]

An active damping method for Thomson coil actuated ultrafast mechanical switches is proposed, including its control. Ultrafast mechanical switches are crucial for both dc and ac circuit breakers that require fast-acting current-limiting capabilities. However, fast motion means high velocity at the end of travel resulting in over-travel, bounce, fatigue, and other undesirable effects. The active damping proposed in this paper not only avoids such issues but actually enables faster travel by removing limitations that would otherwise be necessary. This active damping mechanism is applicable in particular to medium- and high-voltage circuit breakers, but can be extended to actuators in general. A 15 kV/630 A/1 ms mechanical switch designed to enable the fast protection of medium voltage dc circuits is used as a testbed for the concept. The switch is based on the principle of repulsion forces (Thomson coil actuator). By energizing a second coil, higher opening speeds can be damped, resulting in limited over-travel range of the movable contact. The overall structure is simple and the size of the overall switch is minimized. To validate the concept and to study the timing control for best active damping performance, both finite element modeling and experimental studies have been carried out. [ABSTRACT FROM PUBLISHER]

Transformer-less grid-connected photovoltaic (PV) systems face the challenge of keeping low leakage current due to their nonisolation configurations. To better attenuate the leakage current in the single-phase systems, a few neutral-point-clamped (NPC) topologies have been proposed. This paper further proposes an active NPC method by only employing one additional switch to connect the midpoint dc link and the freewheeling circuit of traditional single-phase PV inverters. After exploring the operational principles of freewheeling circuits, the construction method and the implementation of active NPC circuits in transformer-less single-phase inverters are elaborated in detail. Since only the leakage current flows through the additional NPC switch, the presented single-phase NPC inverters could still maintain the high operational efficiency with the further attenuated leakage current. The experimental results verified the theoretical findings. [ABSTRACT FROM PUBLISHER]