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This paper presents a neutral-point deviation and ripple compensating control method applied to a three-level neutral-point-clamped (NPC) converter. The neutral-point deviation and its harmonic components are analyzed with a focus on the average current flowing through the neutral-point of the dc link. This paper also proposes a control scheme compensating for the neutral-point deviation and dominant harmonic components under generalized unbalanced grid operating conditions. The positive and negative sequence components of the switching functions and ac input currents are employed to accurately explain the behavior of three-level NPC converter. Simulation and experimental results are presented to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

Achieving high efficiency and high power density features of intermediate bus converter (IBC) in data center application is very critical. This paper proposes a nonisolated switched-tank dc–dc converter (STC) to meet the high requirement of IBC. The proposed STC has fixed voltage conversion ratio. Theoretical analysis provides the guideline for designing resonant tank and nonresonant tank as well as selecting proper deadtime for the proposed circuit. With resonant operation feature of the proposed circuit, zero current switching is realized on all switching devices to help the high-efficiency operation of the proposed converter. Through the proposed design methodology in this paper, power loss on switching devices and planar inductors can be minimized. In addition, detailed power loss analysis and breakdown provide hints for further efficiency improvement. Simulation has been performed to validate the operating principle of the proposed STC. A designed 6x STC (450 W nominal/600 W maximum) based on eGaNFETs is demonstrated. With 54 V typical input voltage, the output of the 6x STC is 9 V. The GaN-based prototype achieves a peak efficiency of 98.55%. Also, it achieves 97.18% efficiency and 750 W/in3 power density at 450 W. [ABSTRACT FROM AUTHOR]

In this paper, an electric vehicle (EV) battery charger with interleaved Landsman converter (ILC) followed by a flyback converter, is designed and evaluated for improved power quality (PQ) charging of battery. A built-in wave-shaping is obtained at the charger front-end due to improved PQ characteristics of ILC. This PFC converter consists of two Landsman converter cells, which are designed in discontinuous conduction mode (DCM) to share the input and output currents. The current sharing at input results into lower input current ripple as well as peak current stress through the switch, is reduced. This, further improves the input current harmonics profile. Moreover, the reduced output voltage ripple gives reduced rms current in the output capacitor. A phase shift PWM scheme (PSPWM) is used for ILC and the duty cycle for the switches is selected below 50%. This allows the ripple cancellation at line and load sides. The interleaving at PFC stage as well as DCM based design ensures a low cost charging solution as compared to the conventional Landsman converter (CLC) based chargers in this power range. However, the flyback converter provides the current control during the charging of the battery in constant current (CC) and constant voltage (CV) regions. The harmonics spectrum of mains current follows the recommended PQ regulations over a range of varying line voltages and loadings. [ABSTRACT FROM AUTHOR]

The operating principle of the clamp circuits like clamping diodes and flying capacitor in three-level LLC converter is different from other three-level converters, because the mean value of the resonant tank current is always zero and pulse-frequency modulation control is generally used instead of pulsewidth modulation control. And the converter with only the clamping diodes or flying capacitor is difficult to realize voltage balance. In this paper, the characteristics of the three-level LLC converter with single clamp circuit are first analyzed. Then, the operation principle of the hybrid-clamped circuit under the unbalanced voltages on input capacitors is described with the mode analysis, based on which the mechanism for voltage autobalance is elaborated and the effects of two clamp circuits are derived. Then, the design of the clamping diodes and the flying capacitor is also involved. Finally, a three-level LLC converter prototype is built and the experimental results verify the validity of the theoretical analysis and design. [ABSTRACT FROM AUTHOR]

This paper proposes a multilevel series compensator (MSC) to deal with voltage sags/swells, harmonic compensation, or reactive power compensation. Such a device can be considered as a dynamic voltage restorer or a series active power filter (Series-APF). The MSC can improve the power quality of loads located in stiff systems. The configuration is based on three-phase bridge (TPB) converters connected by means of cascaded single-phase transformers. This arrangement permits the use of a single dc-link. A generalization for $K$ -stages in which $K$ -transformers are coupled with $K$-TPB converters is presented. The topology permits generating a high number of levels in the voltage waveforms with a low number of power switches in comparison with a classic topology. The multilevel waveforms are generated by the converters through a suitable pulsewidth modulation (PWM) strategy that takes into consideration the transformer turns ratios. Modularity and simple maintenance make the proposed MSC an attractive solution compared with some conventional configurations. Model, PWM strategy, and overall control are discussed in this paper. Simulation and experimental results are presented as well. [ABSTRACT FROM PUBLISHER]

This paper presents the development, analysis, and performance evaluation of a new topology for an isolated dc power electronic converter (PEC). The proposed topology (called the reverse flyback dc PEC) is developed to process a discontinuous input voltage and produce a continuous output voltage. The reverse flyback dc PEC is operated based on charging the inductive element in the high-frequency transformer, while discharging the energy to the output side through on–off actions of the switching element, which is located on the secondary side of the high-frequency transformer. A prototype for the proposed reverse flyback dc PEC is constructed to evaluate its performance under different operating conditions. Performance results show that the reverse flyback dc PEC is capable of processing discontinuous input voltages with different duty ratios and maintaining continuous output voltages with a minor sensitivity to the load type of ratings. [ABSTRACT FROM AUTHOR]

A switching-capacitor-based buck–boost converter (with common ground) for point of load applications is proposed in this paper. It is capable of operating in stand-alone buck or boost mode in addition to its primary operation of performing the buck–boost conversion. The striking feature of the proposed converter is low source current ripple content irrespective of its mode of operation (buck–boost, buck, or boost). First, feasible pulsewidth modulation schemes for the proposed converter are identified and thereafter the corresponding circuit performance analysis, steady-state analysis, and state-space modelling is established. Through steady-state analysis, voltage gain expressions are formulated and equations defining L-C components are derived in terms of their ripple quantities. The state-space models are used to formulate small-signal analysis and to obtain the relevant transfer functions required in the controller design. A voltage-mode/current-mode controller is designed, with a tradeoff in bandwidth, to control the proposed converter and transit it from buck to boost mode or vice versa seamlessly. A 30–55 W, 100 kHz, prototype point of load converter with 36-V input dc source is built to supply power at constant load voltage of either 48 or 28 V. The proposed converters’ effectiveness is demonstrated experimentally in terms of reduced source current ripple along with seamless transition from buck to boost mode and vice versa. [ABSTRACT FROM AUTHOR]

In this paper, a fifth-order boost point-of-load converter is developed by cascading a modified fourth-order boost converter with a combination of L–C and diode. This topology has the following salient features: Single-switch topology, common ground between source and load, low-voltage stress across intermediate capacitors, and voltage gain same as other reported fifth-order boost converters with no common ground. Steady-state and dynamic analyses demonstrate the proposed converter's boosting feature and dynamic performance, respectively. A contoured robust Bode plot methodology is employed to design the robust voltage-mode controller to ensure load voltage regulation in the presence of uncertainties. The necessary and sufficient conditions under which the designed controller guarantees the load voltage regulation and robust stability are obtained. A step-by-step robust controller design procedure is outlined. The salient features of the proposed converter and its robust performance are studied analytically, using the MATLAB platform, and validated experimentally on a 60-W prototype module. [ABSTRACT FROM AUTHOR]

This paper presents a dual output power factor correction (PFC) converter for switched reluctance motor (SRM) drives. Here, a modified single-ended primary inductance converter (SEPIC) is proposed for a wide range of speed control and to achieve PFC at ac mains. The switching frequency of the converter is considered to be 20 kHz. The converter is designed to operate in the discontinuous conduction mode (DCM) of operation, which reduces the size of the output inductor. The DCM mode to obtain PFC also reduces the sensor requirement as compared to the continuous conduction mode (CCM), where two voltage sensors and one current sensor add to the drive cost. The drive is proposed for universal ac mains (90–270 V ac). Simulated and experimental results are demonstrated to validate the performance of the drive during different operating conditions. The input current total harmonic distortion is reduced to comply with an IEC 61000-3-2 standard. [ABSTRACT FROM AUTHOR]

Flyback/forward derived power converters offer operational simplicity, but require active clamping circuits to reduce switch voltage stress and improve the converter efficiency. This paper presents an active clamping circuit technique, which additionally ensures enhancement in the converter voltage gain. This is enabled by the proposed auxiliary circuit, which introduces a charged capacitor in series with the primary source during the energizing interval. Two circuits are designed on this principle, and design and operation of both are presented for discontinuous conduction modes. It is shown that the voltage gain of these circuits increases with increase in the leakage inductance, which is an improvement over existing converters. Also, in one circuit primary (secondary) winding, rms current is similar to (lower than) that in a typical ideal flyback converter, leading to improvement in power density. Operation and analyses of this variant are experimentally verified with a 400-V laboratory prototype. [ABSTRACT FROM AUTHOR]

This paper investigates an ac–dc–ac multilevel power converter. The studied configuration is composed of two single-phase ac–dc–ac three-leg modules and series-connected H-bridges in the shared part of system. Because the proposed converter has shared legs between the input and output, it is employed in applications with same input and output frequency. Uninterrupted power supply and unified power quality conditioner are application examples for this converter. Such multilevel topology has lower dc-link voltage rating, which, consequently, presents low switch blocking voltages when compared to conventional topologies. System model, a space-vector pulsewidth modulation (PWM) strategy to symmetrical and asymmetrical dc-link voltages, and an overall control strategy to adjust the system variables are presented. A power flux analysis shows the operation zone in which the individual dc-link voltage balancing is possible. PWM and control strategies are developed to reduce the semiconductor total losses, harmonic distortion, and switching stress. Two ac–dc–ac multilevel conventional structures are used for comparison. Simulation and experimental results demonstrate the feasibility of the studied converter. [ABSTRACT FROM AUTHOR]

This paper presents a nine-level transformer-based inverter requiring only eight switches. The envisaged structure consists of two standard H-bridges fed from a single dc source. Besides, a single-phase transformer is employed to aid the process of intermediate voltage level generation. An ad-hoc pulsewidth modulation scheme based on boolean logic form equations is developed to derive the gating pulses. An effortless extension of the proposed inverter to a higher number of voltage levels is also achieved by generalizing the switching functions. Furthermore, the superior performance of the proposed topology is demonstrated through a comprehensive cost-based analysis. Finally, the validation of the proposed topology is accomplished through experiments on a down-scale prototype, and the measurement results are included. [ABSTRACT FROM AUTHOR]

Pollution problems caused by fossil fuels have led to more investigations on renewable energy systems. Photovoltaic cells and fuel cells output low-level voltage than required; therefore, high gain dc–dc converters are used to boost this low voltage. The Z-source converter can be employed as dc–dc converter to boost the photovoltaic panel voltages. It also offers other advantages, such as clamped switched voltage, high voltage gain, isolation of energy source from the load, and positive polarity for output voltage; therefore, this is a good choice for high step-up applications. This paper presents analysis of a novel high step-up Z-source based dc–dc converter that has higher voltage gain than the Z-source converter. Furthermore, high efficiency, low device voltage stress, and wide voltage gain range make it a good candidate for photovoltaic and high voltage step-up applications. The proposed dc–dc converter is evaluated experimentally for converting 24-V dc input to 300-V dc output at 100 W and to validate the simulation results. [ABSTRACT FROM AUTHOR]

This paper presents a hybrid pulse width modulation-based discontinuous modulation (D-HPWM) strategy with dc-link voltage balancing for a three-level neutral-point-clamped (NPC) traction inverter drive. The results are then compared with continuous-hybrid-PWM (C-HPWM) to check the performance improvement. The HPWM strategy uses both the advantages of carrier- and space-vector-based PWM strategies. The duty cycles are generated using the carrier-based strategy to reduce the computational time and complexity of the system and redundant vector states are used to keep the two dc-link capacitor voltages balanced. As discontinuous PWM (DPWM) reduces the switching losses considerably compared to the continuous PWM, the DPWM strategy is developed in this paper for the HPWM-based strategy. Detailed comparison studies are then carried out in MATLAB/Simulink and PLECS to show the conduction and switching loss distribution with change in modulation index for different power switches. A 54.0-kW surface permanent magnet synchronous machine (PMSM) is used for this simulation studies. Moreover, the total inverter loss and losses in each insulated gate bipolar transistor (IGBT) are also compared. Detailed experimental performance analysis is also carried out with a scaled down prototype of a 6.0-kW surface PMSM, NPC inverter, and real-time emulator DSpace, to show the capacitor voltage deviation with both control strategies. [ABSTRACT FROM PUBLISHER]

Multilevel converters are a proven solution for medium-voltage and high-power applications, including renewable energy conversion. Developing 6.6-kV converters is a key goal for the wind turbines industry. Considering the voltage rating of commercially available semiconductors, five-level converters are necessary to reach 6.6 kV. The five-level active neutral-point-clamped converter (5L-ANPC) is one of the most advantageous topologies among five-level multilevel converters. This paper presents a new 5L-ANPC topology that overcomes the features of the previously employed 5L-ANPC topology. Along this paper, the properties and working principle of this new 5L-ANPC are explained. Finally, the validity of the new converter is validated via simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a novel dc–dc converter configuration, which successfully integrates two technologies, including a switched capacitor and a switched coupled inductor, into one converter. By adopting a coupled inductor to charge a switched capacitor, the voltage gain can be effectively increased, and the turns ratio of the coupled inductor can be also reduced. Not only lower conduction losses but also higher power conversion efficiency is benefited from a lower part count and lower turns ratios. The proposed converter is simply composed of six components, which can be further derived to varied converters for different purposes, such as a bidirectional converter. The operating principle and steady-state analysis are discussed in this paper. A 250-W laboratory hardware prototype is completed and verified. The voltage gain is up to 11. The highest efficiency is 97.2%, and the full-load efficiency is kept at 93.6%. [ABSTRACT FROM AUTHOR]

This paper proposes a vector control strategy for independent control of two permanent-magnet synchronous motors (PMSMs) using a single four-leg inverter (4LI). An expanded two-arm modulation to obtain a balanced three-phase output voltage is described. This paper also proposes a method to compensate for the fluctuations in the neutral point voltage of two split capacitors in the dc link. The experimental results show that independent speed and position control of two PMSMs can be achieved using a single 4LI with the proposed vector control method. [ABSTRACT FROM AUTHOR]

This paper presents a variable switching point predictive current control (VSP $^2$CC) for the quasi-Z-source inverter (qZSI). The proposed VSP $^2$CC aims to remove the output current error on the ac side, as well as the inductor current and capacitor voltage errors of the quasi-Z-source network on the dc side of the converter. Unlike the previously presented direct model predictive control (MPC) strategies for the qZSI, the proposed control scheme can directly apply the switching signals not only at the discrete time instants, but at any time instant within the sampling interval. Consequently, the shoot-through state can be applied for a shorter time than the sampling interval, resulting in lower output and inductor currents ripples. Experimental results based on field programmable gate array are provided to verify the effectiveness of the introduced control method. As it is shown, the proposed method leads to lower inductor current ripples and less output current total harmonic distortion when compared with the conventional direct MPC. [ABSTRACT FROM AUTHOR]

High-voltage wide bandgap semiconductor devices such as the 15 kV SiC mosfet have attracted great attention because of their potential applications in high-voltage and high-frequency power converters. However, these devices are not commercially available at the moment, and their high cost due to expensive material growth and fabrication may limit their widespread adoption in the future. In this paper, a 15-kV 40-A SiC three-terminal power switch, the Future Renewable Electric Energy Delivery and Management (FREEDM) supercascode, is reported for the first time, which is based on a series connection of 1.2-kV SiC power devices. Compared with the monolithic 15-kV SiC mosfet, the FREEDM supercascode demonstrates obvious advantages in cost and thermal conductivity. The design and voltage-balancing mechanism of the FREEDM supercascode are introduced, and the performance including the voltage balancing, conduction characteristics over a wide range of temperatures, and dynamic switching performance, is analyzed. The FREEDM supercascode's low cost and excellent thermal dissipation capability will facilitate early applications of SiC in very high voltage and high frequency power converters. [ABSTRACT FROM AUTHOR]

This paper presents an optimized topology for a \text3-\phi three-level inverter with complete elimination of common-mode voltage (CMV). The proposed multilevel inverter (MLI) configuration is realized by modifying a T-structure \text3-\phi inverter. The proposed configuration is an optimized solution with respect to the pulse-width modulation strategy used for CMV elimination. The given three-level inverter structure uses only 16 power semiconductor switches, which is much lower than the existing configurations. A reduced number of power semiconductor devices results in a diminished number of driver circuits, less installation space, and low cost. Further, due to the complete elimination of CMV, the proposed MLI is free from issues such as electromagnetic interference and leakage current with a reduction in filter requirement. The presented topology is also compared with other existing topologies to prove its advantage. It is an optimized solution with respect to the dc bus voltage requirement and the total voltage rating of the devices or the components used in the system. Simulation and experimental results are presented to confirm the capability of the proposed MLI. [ABSTRACT FROM AUTHOR]

A novel hybrid five-level voltage-source converter for high-efficiency applications is investigated in this paper. Compared with traditional multilevel converters, this hybrid multilevel converter generates desired staircase voltage levels with a reduced number of power devices and isolated drivers at higher voltage levels. It has redundant switching state combinations in hybrid multilevel converter, which makes it easy to balance flying capacitor voltages and realize fault-tolerant operation. A voltage-balancing control strategy based on switching state redundancies is presented for the hybrid multilevel converter to generate desired levels and also keep voltage balance of flying capacitors at the same time. The performance of the hybrid multilevel converter under various operating conditions is investigated in MATLAB/Simulink. The effectiveness of the proposed hybrid multilevel converter is validated by experiment results. [ABSTRACT FROM AUTHOR]

This paper proposes and analyzes a new power electronics circuit topology for wireless inductive power transfer application using current-fed half-bridge converter with CCL-LC resonant network. The major focus is analysis and implementation of a new current-fed resonant topology with current-sharing and voltage doubling features. Generally, inductive power transfer circuits with current fed converter use parallel CL resonant tank to transfer power effectively through air gap. However, in medium power application, this topology suffers from a major limitation of high voltage stress across the inverter semiconductor devices owing to high reactive power consumed by loosely coupled coil. In proposed topology, this is mitigated by adding a capacitor in series with the coil developing series-parallel CCL tank. The power flow is controlled through variable frequency modulation. Soft-switching of the devices is obtained irrespective of the load current. For grid-to-vehicle or solar-to-vehicle, the converter is analyzed and detailed design procedure is illustrated. Experimental results are presented to verify the analysis and demonstrate the performance. [ABSTRACT FROM AUTHOR]

In this paper, a novel space-vector pulse-width modulation (PWM) scheme for reducing the common-mode voltage (CMV) in the three-phase five-level active neutral-point clamped (5L-ANPC) inverter is proposed, where only the 55 selected voltage vectors among the entire 125 that produce low values of the CMV are utilized. This PWM scheme can significantly reduce the CMV without the increase of switching losses and total harmonic distortion of the output voltages. With the 55 selected voltage vectors, the inverter can still operate up to the maximum modulation index. In addition, the capacitor voltages are controlled by redundant switches of the 5L-ANPC inverters. It has been shown that the peak value of the CMV is decreased to one-twelfth of the dc-link voltage from the simulation and experimental results. [ABSTRACT FROM PUBLISHER]

In this paper, a novel multilevel dc–ac inverter is proposed. The proposed multilevel inverter generates seven-level ac output voltage with the appropriate gate signals’ design. Also, the low-pass filter is used to reduce the total harmonic distortion of the sinusoidal output voltage. The switching losses and the voltage stress of power devices can be reduced in the proposed multilevel inverter. The operating principles of the proposed inverter and the voltage balancing method of input capacitors are discussed. Finally, a laboratory prototype multilevel inverter with 400-V input voltage and output 220\ \textV\text{rms}/2\,{\text{kW}} is implemented. The multilevel inverter is controlled with sinusoidal pulse-width modulation (SPWM) by TMS320LF2407 digital signal processor (DSP). Experimental results show that the maximum efficiency is 96.9% and the full load efficiency is 94.6%. [ABSTRACT FROM AUTHOR]

Smart grid technologies are expected to increase system efficiency and reliability using advancement in automation, communication, computation, and optimization. Several control algorithms have been developed or enhanced for operation and control of smart distribution grid. In recent years, volt/var control (VVC) algorithms have been proposed for energy saving in distribution systems due to advancement provided by smart grid automation and control. VVC helps to lower distribution feeder voltage to decrease energy consumption. However, quantification of this impact is hard due to several external factors such as weather and end users' behavior. On the other hand, existing evaluation methods of VVC algorithms are either not suitable for long-term study or intrusive. This paper addresses these issues by proposing a new technique to estimate “distribution system demand without smart grid implementation” utilizing “data measured from system with smart grid implementation.” Interdependence of voltage and load is considered based on estimated load characteristic. Our key contribution is developing a method for quantifying the real-time energy saving of smart grid automation and control focused on VVC and implementing in an electric utility in eastern Washington, USA. The algorithm is developed using both commercial and open-source software. [ABSTRACT FROM AUTHOR]

Utility company standards for power quality are making it difficult for industrial users to start large induction and synchronous motors due to high inrush current. This paper will present a large oil company's challenges in starting large motors driven by the utility company in a relatively weak power system in East Texas while not violating the utility company's standards. A workable solution is an air-cooled pulsewidth-modulated voltage source variable-frequency drive system designed to start multiple large-horsepower medium-voltage synchronous motors without any measurable voltage flicker. Various combinations of motor design (induction versus synchronous) and starting methods are reviewed, and final design schematic diagrams are documented. Challenges encountered during the design and start-up are described, and solutions with final performance details are provided. [ABSTRACT FROM AUTHOR]

This paper proposes a novel modulation technique and a new balancing control strategy for a single-phase five-level flying-capacitor (FC)-based active-neutral-point-clamped (ANPC) converter. The proposed modulator can control the FC voltage to follow the requested reference value and simultaneously generate the required ac output voltage regardless of the values of the dc capacitor voltages of the converter. By implementing this method, smaller values of the dc-link capacitor and FC can be used even in applications that could experience ripple or transient in the capacitor voltage. In a single-phase five-level ANPC converter applications, where the capacitors can experience pulsation power and dc-link balancing issues, such as grid-connected photovoltaic system, the selection of the reference voltage value for the FC can play an important role to balance the average values of the dc-link capacitor voltage. The proposed new control strategy uses a new reference voltage for the FC to be applied by the new modulator to have an average balanced dc-link voltages as well as an ac output voltage with good power quality. Simulation studies and experimental results demonstrate the effectiveness of the proposed modulation technique and control strategy even with relatively small dc capacitors to produce high-quality output voltage and current waveforms while maintaining an average balanced dc-link voltages. [ABSTRACT FROM PUBLISHER]

This paper presents a power factor correction (PFC)-based bridgeless Luo (BL-Luo) converter-fed brushless dc (BLDC) motor drive. A single voltage sensor is used for the speed control of the BLDC motor and PFC at ac mains. The voltage follower control is used for a BL-Luo converter operating in discontinuous inductor current mode. The speed of the BLDC motor is controlled by an approach of variable dc-link voltage, which allows a low-frequency switching of the voltage source inverter for the electronic commutation of the BLDC motor, thus offering reduced switching losses. The proposed BLDC motor drive is designed to operate over a wide range of speed control with an improved power quality at ac mains. The power quality indices thus obtained are under the recommended limits of IEC 61000-3-2. The performance of the proposed drive is validated with test results obtained on a developed prototype of the drive. [ABSTRACT FROM PUBLISHER]

Various kinds of differential power processing converters and voltage equalizers have been proposed for series-connected photovoltaic (PV) modules to prevent negative influences of partial shading, such as significant reduction in power generation and the occurrence of multiple maximum power points (MPPs), including local and global MPPs, that hinders and confuses MPP tracking algorithms to operate properly. However, since conventional topologies are based on multiple individual dc–dc converters, the required switch count increases proportionally to the number of modules connected in series, increasing the complexity. A two-switch voltage equalizer using an LLC resonant inverter and voltage multiplier is proposed in this paper. The circuitry can be dramatically simplified compared with conventional topologies due to the two-switch configuration. Detailed operation analyses for the LLC resonant inverter and voltage multiplier are separately performed. Experimental equalization tests emulating partially shaded conditions were performed for four PV modules connected in series. With the proposed voltage equalizer, local MPPs successfully disappeared, and extractable maximum power increased compared with those without equalization, demonstrating the effectiveness and performance of the proposed voltage equalizer. [ABSTRACT FROM PUBLISHER]

This paper deals with the design, analysis, simulation, and development of a power-factor-correction (PFC) multiple-output switched-mode power supply (SMPS) using a bridgeless buck–boost converter at the front end. Single-phase ac supply is fed to a pair of back-to-back-connected buck–boost converters to eliminate the diode bridge rectifier, which results in reduction of conduction losses and power quality improvement at the front end. The operation of the bridgeless buck–boost converter in discontinuous conduction mode ensures inherent PFC operation and reduces complexity in control. The performance of the proposed multiple-output SMPS is evaluated under varying input voltages and loads by simulating this circuit in MATLAB/Simulink environment, and the results obtained through simulation are validated experimentally on a developed prototype. Both simulation and experimental results demonstrate the improved performance of the proposed SMPS. [ABSTRACT FROM AUTHOR]

The acceptability of pulsed electric field (PEF) processing as an alternative method for liquid food preservation requires the elimination, or at least the reduction, of all the effects accompanying the flow of electric current. Metallic particles might be released from the electrode material as a result of electrically driven electrochemical reactions. The presence of such metallic particles can affect the quality and the safety of PEF-processed food. This paper investigates the effect of varying the parameters of applied electric pulses on the amount of released metals, aiming to reach the optimum conditions. It is expected that reducing the rate of releasing metals from the electrodes will extend their lifetime and reduce the running cost of the PEF process. [ABSTRACT FROM PUBLISHER]

This paper proposes a zero-voltage-transition (ZVT) pulsewidth-modulated (PWM) synchronous buck converter, which is designed to operate at low voltage and high efficiency typically required for portable systems. A new passive auxiliary circuit that allows the main switch to operate with zero-voltage switching has been incorporated in the conventional PWM synchronous buck converter. The operation principles and detailed steady-state analysis of the ZVT PWM synchronous converter with a passive auxiliary circuit are presented. All of the semiconductor devices aside from the main switch operate under soft-switching conditions. Thus, the auxiliary circuit provides a larger overall efficiency. The feasibility of the auxiliary circuit is confirmed by the simulation and experimental results. [ABSTRACT FROM PUBLISHER]