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This paper presents a neutral-point deviation and ripple compensating control method applied to a three-level neutral-point-clamped (NPC) converter. The neutral-point deviation and its harmonic components are analyzed with a focus on the average current flowing through the neutral-point of the dc link. This paper also proposes a control scheme compensating for the neutral-point deviation and dominant harmonic components under generalized unbalanced grid operating conditions. The positive and negative sequence components of the switching functions and ac input currents are employed to accurately explain the behavior of three-level NPC converter. Simulation and experimental results are presented to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

This paper discusses electrical distribution for refrigerated containers (reefers) in port terminals, characterized as parks of uniform distributed loads. Power systems of uniform distributed loads need configurations with modularity whenever possible, to ensure an easier installation, operation, and maintenance with significant cost reductions. This paper shows what has been the practice at ports in the past to provide Low Voltage (LV) supply to reefers from medium voltage (MV)/LV substations to cluster of reefer outlets panel with group of outdoor receptacles, used to connect power supply cord to each reefer. In the new method of power distribution system for the reefers, it is suggested to use a main MV underground distribution and portable containerized MV/LV transformer substations with close coupled LV distribution panel including reefer outlets. This potable power supply unit can be installed inside the reefer racks to supply locally a modular LV distribution to the reefers. This new method of supplying power to reefer racks has benefits over the past practice. It can offer a relevant flexibility for expansions and endorses development of new fitting components. [ABSTRACT FROM AUTHOR]

Achieving high efficiency and high power density features of intermediate bus converter (IBC) in data center application is very critical. This paper proposes a nonisolated switched-tank dc–dc converter (STC) to meet the high requirement of IBC. The proposed STC has fixed voltage conversion ratio. Theoretical analysis provides the guideline for designing resonant tank and nonresonant tank as well as selecting proper deadtime for the proposed circuit. With resonant operation feature of the proposed circuit, zero current switching is realized on all switching devices to help the high-efficiency operation of the proposed converter. Through the proposed design methodology in this paper, power loss on switching devices and planar inductors can be minimized. In addition, detailed power loss analysis and breakdown provide hints for further efficiency improvement. Simulation has been performed to validate the operating principle of the proposed STC. A designed 6x STC (450 W nominal/600 W maximum) based on eGaNFETs is demonstrated. With 54 V typical input voltage, the output of the 6x STC is 9 V. The GaN-based prototype achieves a peak efficiency of 98.55%. Also, it achieves 97.18% efficiency and 750 W/in3 power density at 450 W. [ABSTRACT FROM AUTHOR]

This paper presents a study of the losses in the integrated buck–flyback converter (IBFC) used as high-power-factor LED driver. The aim of the study is to investigate the possibilities of increasing the efficiency of the IBFC converter. The procedure of the improvement is done by obtaining the equations of the current through each component in terms of converter parameters. The current is found in an average value or rms value, depending on the type of the parasitic component, whether it is modeled by a parasitic forward voltage source or by a parasitic resistance, respectively. Using these equations and the parasitic model, the losses of each element of the converter are estimated. This paper proposes a technique to increase the efficiency of the IBFC by redesigning the converter parameters. Furthermore, this paper presents a case of study with a step-by-step efficiency enhancement process of an existing driver. The driver is operating under universal input conditions, and 38 V output, supplying an LED luminary of 26.5 W. The new design shows an improvement of the efficiency from 82% in the old design to 89% in the proposed one. Moreover, the new design shows an improvement in the power factor and the THD and a 50% reduction in the output current ripple. Furthermore, a reduction in the number of components has been achieved, as it is found by the analysis that by adjusting the converter parameters, one diode can be removed. Finally, the presented methodology is explained in detail so that it can easily be applied to other dc–dc converters. [ABSTRACT FROM AUTHOR]

This paper proposes a medium-frequency (MF) solid-state transformer (SST) based grid interface for high-power multipulse rectifiers. In the proposed approach, the low-frequency ac (grid) voltage is transformed to MF voltage via front-end converters. The three single-phase MF outputs from these converters are fed to the primary side of a three-phase, five-limb multiwinding isolation transformer (or alternately three one-phase transformers). The secondary side windings from the transformer are configured in a certain “zig-zag” arrangement, which are connected to the inputs of three-phase diode rectifier modules as in a typical multipulse system. The proposed topology can better than double the power density by reducing volume (or weight) of the required front-end isolation transformer while maintaining the same input current quality as a conventional low-frequency transformer based approach. Usage of an open-loop square wave pulse width modulation for the front-end converters makes this approach simple to implement. This paper explains the proposed concept taking an adjustable speed drive application's perspective using modeling, simulation, and experimental results from a scaled down laboratory prototype. [ABSTRACT FROM AUTHOR]

The neutral-point voltage-balancing control is a critical issue of a neutral-point-clamped converter. The conventional control strategy is to inject the specific zero-sequence voltage to regulate the redundant vector, but it is unacceptable to the three-phase four-wire system. This paper provides a neutral-point voltage-balancing control by the dipolar modulation, and the control freedom of the zero-sequence voltage is flexible. Therefore, the proposed method is suitable for both three-phase three-wire and three-phase four-wire systems. Besides, the proposed method improves the control dynamic in a reactive power system. The proposed neutral-point voltage-balancing control is verified by the mathematical analysis and experimental results. The control dynamic, power loss estimation, and the output current performance are analyzed in this paper. [ABSTRACT FROM PUBLISHER]

This paper presents a simplified implementation technique for direct torque control (DTC) of asymmetric six-phase induction motor drive. Current harmonics of fifth and seventh order are observed in the phase currents if conventional DTC scheme is extended for the asymmetric six-phase machine. These harmonic components are not responsible for torque production, thus causing losses in the motor winding. Synthetic vectors are generally used for reduction of current harmonics. Average voltage in $xy$ subspace is maintained to zero by synthetic vectors leading to reduction of currents in $xy$ subspace. A simplified method of implementation of synthetic vectors is proposed in this paper, which eliminates the need for designing of switching sequence and requirement of field-programmable gate array. Also, the number of synthetic vectors that can be possibly produced is increased compared with the ones developed by techniques available in the literature. The experimentation is carried out on a laboratory-developed prototype and the experimental results are presented in this paper to verify the proposed scheme. [ABSTRACT FROM PUBLISHER]

In this paper, an electric vehicle (EV) battery charger with interleaved Landsman converter (ILC) followed by a flyback converter, is designed and evaluated for improved power quality (PQ) charging of battery. A built-in wave-shaping is obtained at the charger front-end due to improved PQ characteristics of ILC. This PFC converter consists of two Landsman converter cells, which are designed in discontinuous conduction mode (DCM) to share the input and output currents. The current sharing at input results into lower input current ripple as well as peak current stress through the switch, is reduced. This, further improves the input current harmonics profile. Moreover, the reduced output voltage ripple gives reduced rms current in the output capacitor. A phase shift PWM scheme (PSPWM) is used for ILC and the duty cycle for the switches is selected below 50%. This allows the ripple cancellation at line and load sides. The interleaving at PFC stage as well as DCM based design ensures a low cost charging solution as compared to the conventional Landsman converter (CLC) based chargers in this power range. However, the flyback converter provides the current control during the charging of the battery in constant current (CC) and constant voltage (CV) regions. The harmonics spectrum of mains current follows the recommended PQ regulations over a range of varying line voltages and loadings. [ABSTRACT FROM AUTHOR]

The operating principle of the clamp circuits like clamping diodes and flying capacitor in three-level LLC converter is different from other three-level converters, because the mean value of the resonant tank current is always zero and pulse-frequency modulation control is generally used instead of pulsewidth modulation control. And the converter with only the clamping diodes or flying capacitor is difficult to realize voltage balance. In this paper, the characteristics of the three-level LLC converter with single clamp circuit are first analyzed. Then, the operation principle of the hybrid-clamped circuit under the unbalanced voltages on input capacitors is described with the mode analysis, based on which the mechanism for voltage autobalance is elaborated and the effects of two clamp circuits are derived. Then, the design of the clamping diodes and the flying capacitor is also involved. Finally, a three-level LLC converter prototype is built and the experimental results verify the validity of the theoretical analysis and design. [ABSTRACT FROM AUTHOR]

A gate driving for power devices is a key technology to further improve switching characteristics. With the help of digital gate driver IC, the switching behavior of power devices can be enhanced even under high-speed switching. In this paper, an evaluation platform for determining the optimal switching pattern of an active gate drive control is proposed for an inverter circuit. A high speed optimization system is built up to search for an advantageous switching pattern that reduces total switching loss of two power devices in an inverter circuit and constrains surge voltage simultaneously. The proposed online optimization demonstrates its feasibility for the full-bridge inverter circuit, which is rated at 500 V with digital active gate drive control. Experimental results show that the proposed optimization system is able to obtain optimal switching pattern from $64^{60}$ possible combinations of switching patterns within 15 min, which is 6 times faster than the previous study. Optimizations can also conducted under different load current conditions. Eventually, the obtained optimal pattern yields up to 42% reduction in the total switching loss when it constrains surge voltage to minimum compared with the conventional driving pattern. [ABSTRACT FROM AUTHOR]

In this paper, the zero sequence circulating current in open winding permanent magnet synchronous machine (OW-PMSM) drives with common dc bus is systematically analyzed for the first time. It is revealed that the zero sequence circulating current is affected by zero sequence back-electromotive force, cross coupling voltages in zero sequence from the machine side, pulse-width modulation induced zero sequence voltage, and inverter nonlinearity from the inverter side. Particularly, the influences from the cross coupling voltages in zero sequence and parasitic effect of inverter nonlinearity are investigated for the first time in this paper. Then, the synthetic model of the equivalent zero sequence circuit is proposed as well. Each cause is studied independently via analytical modeling, finite element analysis, and experiments. Meanwhile, to tackle this issue, the relevant suppression strategy using frequency adaptive proportional resonant controller is presented and tested on the 3 kW OW-PMSM platform. [ABSTRACT FROM AUTHOR]

Usually, the high-gain high-efficiency dc–dc converters consist of many passive components, which increases the order of the system. As the order increases, system modeling and control become more complex. Thus, there is a need for the simplification of the small signal modeling process of such converters. This paper presents a generalized small signal model and equivalent circuit for an $n$ th-order coupled-inductor-based high-voltage gain converters (CIHVGC) that can be conveniently used for the control design. The state variable representation of a generalized coupled inductor with p windings is included. A simplified step by step procedure to obtain small signal model using visual inspection is presented. Analysis is included and verified using simulations and experiments for the output voltage regulation of high-voltage gain converters. The usefulness and versatility of the proposed model is verified with three examples of high gain converters belonging to the CIHVGC family. All the analytical, simulation, and experimental details of this paper are presented. [ABSTRACT FROM AUTHOR]

This paper proposes a multilevel series compensator (MSC) to deal with voltage sags/swells, harmonic compensation, or reactive power compensation. Such a device can be considered as a dynamic voltage restorer or a series active power filter (Series-APF). The MSC can improve the power quality of loads located in stiff systems. The configuration is based on three-phase bridge (TPB) converters connected by means of cascaded single-phase transformers. This arrangement permits the use of a single dc-link. A generalization for $K$ -stages in which $K$ -transformers are coupled with $K$-TPB converters is presented. The topology permits generating a high number of levels in the voltage waveforms with a low number of power switches in comparison with a classic topology. The multilevel waveforms are generated by the converters through a suitable pulsewidth modulation (PWM) strategy that takes into consideration the transformer turns ratios. Modularity and simple maintenance make the proposed MSC an attractive solution compared with some conventional configurations. Model, PWM strategy, and overall control are discussed in this paper. Simulation and experimental results are presented as well. [ABSTRACT FROM PUBLISHER]

One of the main challenges of the solid-state transformer (SST) lies in the implementation of the dc–dc stage. In this paper, a quadruple-active-bridge (QAB) dc–dc converter is investigated to be used as a basic module of a modular three-stage SST. Besides the feature of high power density and soft-switching operation (also found in others converters), the QAB converter provides a solution with reduced number of high-frequency transformers, since more bridges are connected to the same multiwinding transformer. To ensure soft switching for the entire operation range of the QAB converter, the triangular current-mode modulation strategy, previously adopted for the dual-active-bridge converter, is extended to the QAB converter. The theoretical analysis is developed considering balanced (equal power processed by the medium-voltage (MV) cells) and unbalanced (unequal power processed by the MV cells) conditions. In order to validate the theoretical analysis developed in the paper, a 2-kW prototype is built and experimented. [ABSTRACT FROM PUBLISHER]

This paper was written to share the experience acquired in the specification of surge suppressors (snubbers) for protection against switching transients’ overvoltage resulting primarily in dry-type transformers failures in some plants in Brazil and North America. This paper will also explain about the snubber ratings (damping resistor, surge capacitor, and surge arrester), the assembly special cares, system modeling, and simulations using the software Alternative Transient Program. [ABSTRACT FROM PUBLISHER]

This paper presents the development, analysis, and performance evaluation of a new topology for an isolated dc power electronic converter (PEC). The proposed topology (called the reverse flyback dc PEC) is developed to process a discontinuous input voltage and produce a continuous output voltage. The reverse flyback dc PEC is operated based on charging the inductive element in the high-frequency transformer, while discharging the energy to the output side through on–off actions of the switching element, which is located on the secondary side of the high-frequency transformer. A prototype for the proposed reverse flyback dc PEC is constructed to evaluate its performance under different operating conditions. Performance results show that the reverse flyback dc PEC is capable of processing discontinuous input voltages with different duty ratios and maintaining continuous output voltages with a minor sensitivity to the load type of ratings. [ABSTRACT FROM AUTHOR]

This paper presents a novel model predictive torque control with discrete duty ratio optimization for a six-phase PMSM machine with high robustness against weighting factor variation. First, a two-step lookup table is developed to initially select the optimal voltage vector, which is to regulate the torque and flux in the energy conversion related subspace, as well as suppress the harmonic currents in the x–y subspace. Then, a null vector is inserted along with the selected optimal voltage vector to adjust the duty ratio with a set of value to avoid the complicated derivation. Subsequently, the optimal duty ratio is determined by a cost function to minimize the torque and flux error. So by using the proposed method, the torque ripple is reduced and even applying an improper weighting factor will not deteriorate the machine performance severely. Finally, experimentations are carried out to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

Three-phase voltage source pulsewidth modulation (PWM) rectifiers can achieve constant dc voltage and sinusoidal grid currents under ideal grid voltages. However, under unbalanced grid voltage conditions, there are ripples at twice the grid frequency in the dc voltage, and the grid currents become highly distorted. To address the aforementioned problems, control methods developed under ideal grid voltage conditions should be modified. Various techniques have been proposed in the literature to calculate the new current reference or power reference. However, most methods use conventional pq theory and only consider the grid-side power control. Hence, the dc voltage ripples are not completely eliminated. Furthermore, the derived mathematical expressions for reference calculations are usually very complicated. In contrast to current methods, this paper proposes a very simple yet effective direct power control (DPC) method based on extended pq theory. By analyzing the instantaneous extended power of the line inductance, a simple and concise power compensation is analytically derived and added to the original power references. As a result, the dc voltage ripples are significantly reduced, and the grid currents remain sinusoidal even under unbalanced grid voltage conditions. The proposed method is compared to conventional DPC methods, and its effectiveness is confirmed by the presented experimental results. [ABSTRACT FROM AUTHOR]

Three three-phase unidirectional open-end topologies with reduced active switch count are investigated in this paper. These configurations arise from the replacement of controlled switches by diodes, in order to reduce the system complexity. Furthermore, the costs are also reduced once less driver circuitry is needed. The proposed topologies make the ac–dc conversion of the power delivered by a permanent magnet synchronous machine operating at unity power factor. Each configuration is made out of two converters in which at least one is derived from the substitution of active switches in two-level legs or three-level neutral-point clamped legs. The proposed configurations have less switches, making it possible to obtain the same number of voltage levels (in relation with the conventional configurations) with half or quarter of the number of active switches. Also, the topologies are compared in terms of semiconductor power losses and harmonic distortion. The control strategy of the systems as well as a detailed model, simulation, and experimental results are presented. [ABSTRACT FROM AUTHOR]

Low-voltage dc distribution systems have gained significant attention over the last years, since they provide simpler and more efficient integration of distributed generators and storage devices, establishing a pathway to net zero energy buildings. In low-power units, transformerless utility interface is preferred to reduce footprint and losses. However, the lack of galvanic isolation introduces a common-mode (CM) path between the dc distribution bus and the utility service grounding, leading to the presence of high CM voltages at the dc bus feeders. The attenuation of the CM voltage reduces the touch voltage amplitude and leakage current, contributing to a safer environment. In this paper, a feed-forward active compensation of the CM voltage is proposed. It relies on utility voltage parameters, estimated by a phase locked loop, to generate a counter CM voltage; hence, it does not require previous knowledge of the system CM path model or the addition of voltage sensors. Experimental results show that this technique can attenuate the CM voltage to non-dangerous magnitudes without interfering with the microgrid differential mode behavior. [ABSTRACT FROM AUTHOR]

This paper extends the application of a frame-angle-based (FAB) direct torque controller (DTC) for permanent magnet synchronous motor (PMSM) drives to low and very low speeds. The FAB-DTC is intended for PMSM drives that are fed by $3\phi$ six-pulse wavelet-modulated dc–ac converters. The foundations of the FAB-DTC are based on regulating the $d\text{--}q$ -axis stator voltages, in response to variations in the load torque and/or drive speed. The adjustments in $d\text{--}q$ -axis stator voltages are created by changing the angle $\vartheta$ of the frame spanned by the $d\text{--}q$ -axis stator voltages. In order to extend the FAB-DTC to low and very low speeds, the changes in $\vartheta$ are accompanied by changes in the maximum scale. The values of maximum scale and $d\text{--}q$ -axis stator voltages are used to update or change the reference signals employed by the wavelet modulation to generate switching pulses to operate a $3\phi$ dc–ac converter. The complete PMSM drive system incorporating the modified FAB-DTC is implemented for a 10-hp PMSM drive system. The performance of the FAB-DTC is investigated for different changes in the command torque for various low and very low speeds. Performance results demonstrate stable, fast, dynamic, and accurate responses, which have minor sensitivity to variations in load torque and/or drive speed. [ABSTRACT FROM AUTHOR]

A switching-capacitor-based buck–boost converter (with common ground) for point of load applications is proposed in this paper. It is capable of operating in stand-alone buck or boost mode in addition to its primary operation of performing the buck–boost conversion. The striking feature of the proposed converter is low source current ripple content irrespective of its mode of operation (buck–boost, buck, or boost). First, feasible pulsewidth modulation schemes for the proposed converter are identified and thereafter the corresponding circuit performance analysis, steady-state analysis, and state-space modelling is established. Through steady-state analysis, voltage gain expressions are formulated and equations defining L-C components are derived in terms of their ripple quantities. The state-space models are used to formulate small-signal analysis and to obtain the relevant transfer functions required in the controller design. A voltage-mode/current-mode controller is designed, with a tradeoff in bandwidth, to control the proposed converter and transit it from buck to boost mode or vice versa seamlessly. A 30–55 W, 100 kHz, prototype point of load converter with 36-V input dc source is built to supply power at constant load voltage of either 48 or 28 V. The proposed converters’ effectiveness is demonstrated experimentally in terms of reduced source current ripple along with seamless transition from buck to boost mode and vice versa. [ABSTRACT FROM AUTHOR]

The switched shunting resistor circuit is a classical and practical passive equalization scheme that nevertheless suffers from the voltage imbalance after the charging process. It results from the discrepancy of the shunting resistor and the physical characteristics of supercapacitor (SC) cells. In this paper, the distributed voltage equalization control strategies with the proportional-integral (PI) observer for the switched shunting resistor circuit are analyzed and compared. First, the charging and equalizing system is modeled as the switched system and the system observability is proved. The decentralized control and consensus control are analyzed and their shortages are presented. Then, the leader–follower cooperative control is proposed to improve the charging time while keeping the equalization performance. Meanwhile, the PI observer is designed to estimate the internal capacitance voltage of an SC precisely to avoid the effect of equal series resistance. The control convergence is proved by using the Lyapunov stability and switched system theory. The experimental results show that the proposed method has much superiority and wide applicability than the existing methods for equalizing voltages of SCs. [ABSTRACT FROM AUTHOR]

This paper presents a new islanding detection method for synchronous distributed generation (DG). The proposed method is developed based on the combination of rate of change of exciter voltage (RCEV) and open–close circuit breaker (OCCB) at a DG connection point. Whenever the RCEV parameter is not sufficient enough to detect an islanding condition efficiently and correctly, the OCCB strategy will be triggered. The proposed OCCB strategy sends a switching command to one phase of the three-phase circuit breaker (CB), which connects the DG to the grid. In this way, the CB will be immediately opened and then closed. This switching condition will cause a variation in the value of RCEV. This variation is small for the conditions when DG operates in parallel with the main grid, whereas it will be large during the occurrence of islanding. The implementation of the proposed strategy is cost-effective because it only uses the CB at the DG output and does not require any extra equipment. The proposed approach is tested on two different systems including a hypothetical power system and the IEEE 33-bus test system in MATLAB/Simulink environment. The simulation results show that the proposed method eliminates the nondetection zone and also reveals high accuracy compared with previously introduced methods. Moreover, it has been proved that the performance of the proposed approach is not affected by DG capacity, DG location, the number of DG units, as well as network configuration. [ABSTRACT FROM AUTHOR]

This paper deals with a novel reduced sensor strategy, for two-stage single-phase grid connected solar photovoltaic system with a battery, where the dc-link voltage sensor is not required. Moreover, for maximum power point tracking (MPPT), a new “normal harmonic search” (NHS) algorithm is used, and for voltage source converter (VSC) control, a novel “power normalized kernel least mean square” (PNKLMS) algorithm is proposed. The PNKLMS algorithm is used for active load component extraction from the load current, even when the load current is characterized by linear or nonlinear behavior. Moreover, PNKLMS algorithm is used for reference grid current generation. The NHS algorithm is an improved version of the harmony search, which is inspired to the music composition technique and its searching ability is improved by using the normal probability distribution factor. Therefore, NHS reaches the global maximum power point very quickly and is suitable for online searching on hardware. Moreover, the extracted power is fed into the grid. For control of VSC, the proposed PNKLMS control technique is used, which maintains the power quality. The performances of NHS-based MPPT and PNKLMS-based control technique with reduced sensor approach are tested on a developed prototype. The satisfactory steady-state and dynamic performances of the NHS algorithm are demonstrated under variable irradiance and temperature during partial shaded conditions. Moreover, the performances of the PNKLMS algorithm, without using dc-link voltage sensor are demonstrated during overvoltage, undervoltage, harmonics distortion, and load nonlinearity condition, results of which have satisfied the objective of the proposed system and the IEEE-519 standard. [ABSTRACT FROM AUTHOR]

This paper presents a new least-mean-square (LMS) algorithm based deadtime compensation method to suppress the current distortion in permanent-magnet synchronous motor (PMSM) field-oriented control (FOC) drives. Compared to conventional average value compensations, the proposed method is robust to switching device parameter variations thanks to the online adaptation capability of the LMS algorithm. Similarly, the disturbance observer compensators are also immune to switching device parameter variations; however, varying motor parameters degrade their compensation performance. Without prior knowledge of switching device or motor parameters, the proposed method can directly reduce the deadtime current harmonics by generating compensation voltage references. In addition, the proposed method is easy to implement since it does not require voltage errors estimation or current harmonics extraction, which are necessary for disturbance observer and adaptive filter based methods. The proposed method is tested on a 2.5-kW voltage-source inverter PMSM drive controlled by an FOC algorithm. Its effectiveness is validated by both experimental results and spectrum analysis. [ABSTRACT FROM AUTHOR]

Many of the renewable energy resources, like offshore wind, utility PV farms, are located far away from the load centers, which requires dc power transmission system to efficiently deliver power. Voltage-source converter solution is required in many applications due to the stability and compensation requirement. This paper presents a new voltage source converter topology for medium to high voltage dc application, named modular embedded multilevel converter (MEMC). MEMC is based on a three-level topology structure and consists of series-connected insulated-gate bipolar transistor (IGBT) bridge stacks, like the popular modular multilevel converter (MMC) and series-connected thyristor or press-pack high voltage integrated gate-commutated thyristor or IGBT stacks. The basic operation principle, control solutions, and the methods to commutate the thyristors are explained in detail. Due to the three-level structure, the total number of IGBT stacks are reduced by half compared with MMC, leading to much lower energy storage, weight, volume, and system complexity. Also by replacing part of the IGBT stack in MMC with thyristor stack, both of the system conduction loss and switching loss can be further reduced. There are other topology variations of MEMC with a similar operational principle but different characteristics. [ABSTRACT FROM AUTHOR]

An adaptive control of DPWM implementable in clamped-three-level inverters with two strings of photovoltaic (PV) panels in cascaded connection is proposed in this paper. The proposed modulation is developed based on the so-called circuit-level decoupling concept. It is able to provide balance line voltage even under unbalanced dc links. The unequal dc voltages appeared due to asymmetric maximum point of power trackings (MPPTs) are controlled by proper injection of zero-sequence voltage to the common mode voltage, while the total dc voltage is regulated based on the voltage commands generated by the MPPT of each string. Thus, both PV strings are able to be operated based on their MPPTs while there is almost no low-order harmonic distortion at the inverter output current. Compared with the previous methods, the high capability of the proposed method is evaluated by simulation study and experimental tests. [ABSTRACT FROM AUTHOR]

This paper presents an improved analytical model for estimating the high-frequency current ripple of interior permanent magnet synchronous machines due to pulsewidth modulation (PWM) switching. The proposed model accounts for the impact of slotting effect, magnetic saturation, and cross-coupling between the $d$ - and $q$ -axis. The model is subsequently used to investigate several factors that influence the PWM-induced current ripple. These include the PWM switching frequency, fundamental frequency (i.e., machine speed), dc-bus voltage, current control angle (i.e., γ angle), and the excitation current amplitude (i.e., saturation level). Experiments have been conducted to verify the analytical prediction results. These results show that the analytical model can predict the PWM-induced current ripple waveshape very well for many operating conditions and accurately estimate its rms value over a complete fundamental period. [ABSTRACT FROM AUTHOR]

Inverter dead-time is known to make open-loop induction motor drives oscillatory, while operating at light-loads in particular. While dead-time compensation schemes exist, precise compensation of the same is often challenging as it involves factors such as device and driver delays and switching transition times, which are difficult to be quantified accurately. Hence, the effect of dead-time could be under or overcompensated. This paper presents a comprehensive analysis of the impact of such undercompensation and overcompensation on the stability of a 100-kW induction motor drive, along with experimental investigations of the same. The effects of undercompensation and overcompensation on the inverter output voltage are analyzed on a switching-cycle average basis. Further, small-signal models are proposed for an open-loop drive, when it is undercompensated and overcompensated. Stability analysis of the above motor drive is reported, which predicts oscillatory behavior with both under and overcompensation, over certain fundamental frequency ranges, respectively. Further, two different types of oscillatory behavior, characterized by different oscillating frequencies, are observed for the cases of under and overcompensation. The analyses are supported by simulations. Experimental investigations carried out also support the analyses and simulation results. [ABSTRACT FROM AUTHOR]

This paper investigates ac–dc–ac multilevel topologies for three-phase four-wire applications obtained from an interconnection of three-leg voltage-source converters. The topologies can be applied in line voltage regulators, universal active power filters, and uninterrupted power supplies. Operating principles, a pulsewidth modulation (PWM) technique, and an overall control strategy are developed. The PWM and control strategies are suitable to regulate the dc-link voltages and to reduce the harmonic distortion, switching stress, and power losses. Simulation results are used to compare the proposed configurations with a conventional solution in terms of harmonic distortion, semiconductor losses, and others characteristics. Experimental results are presented to validate the theoretical considerations and were obtained by using insulated-gate bipolar transistors with dedicated drives and a digital signal processor with appropriated plug-in boards and sensors. [ABSTRACT FROM AUTHOR]

In this paper, a fifth-order boost point-of-load converter is developed by cascading a modified fourth-order boost converter with a combination of L–C and diode. This topology has the following salient features: Single-switch topology, common ground between source and load, low-voltage stress across intermediate capacitors, and voltage gain same as other reported fifth-order boost converters with no common ground. Steady-state and dynamic analyses demonstrate the proposed converter's boosting feature and dynamic performance, respectively. A contoured robust Bode plot methodology is employed to design the robust voltage-mode controller to ensure load voltage regulation in the presence of uncertainties. The necessary and sufficient conditions under which the designed controller guarantees the load voltage regulation and robust stability are obtained. A step-by-step robust controller design procedure is outlined. The salient features of the proposed converter and its robust performance are studied analytically, using the MATLAB platform, and validated experimentally on a 60-W prototype module. [ABSTRACT FROM AUTHOR]

This paper presents a dual output power factor correction (PFC) converter for switched reluctance motor (SRM) drives. Here, a modified single-ended primary inductance converter (SEPIC) is proposed for a wide range of speed control and to achieve PFC at ac mains. The switching frequency of the converter is considered to be 20 kHz. The converter is designed to operate in the discontinuous conduction mode (DCM) of operation, which reduces the size of the output inductor. The DCM mode to obtain PFC also reduces the sensor requirement as compared to the continuous conduction mode (CCM), where two voltage sensors and one current sensor add to the drive cost. The drive is proposed for universal ac mains (90–270 V ac). Simulated and experimental results are demonstrated to validate the performance of the drive during different operating conditions. The input current total harmonic distortion is reduced to comply with an IEC 61000-3-2 standard. [ABSTRACT FROM AUTHOR]

Flyback/forward derived power converters offer operational simplicity, but require active clamping circuits to reduce switch voltage stress and improve the converter efficiency. This paper presents an active clamping circuit technique, which additionally ensures enhancement in the converter voltage gain. This is enabled by the proposed auxiliary circuit, which introduces a charged capacitor in series with the primary source during the energizing interval. Two circuits are designed on this principle, and design and operation of both are presented for discontinuous conduction modes. It is shown that the voltage gain of these circuits increases with increase in the leakage inductance, which is an improvement over existing converters. Also, in one circuit primary (secondary) winding, rms current is similar to (lower than) that in a typical ideal flyback converter, leading to improvement in power density. Operation and analyses of this variant are experimentally verified with a 400-V laboratory prototype. [ABSTRACT FROM AUTHOR]

This paper investigates an ac–dc–ac multilevel power converter. The studied configuration is composed of two single-phase ac–dc–ac three-leg modules and series-connected H-bridges in the shared part of system. Because the proposed converter has shared legs between the input and output, it is employed in applications with same input and output frequency. Uninterrupted power supply and unified power quality conditioner are application examples for this converter. Such multilevel topology has lower dc-link voltage rating, which, consequently, presents low switch blocking voltages when compared to conventional topologies. System model, a space-vector pulsewidth modulation (PWM) strategy to symmetrical and asymmetrical dc-link voltages, and an overall control strategy to adjust the system variables are presented. A power flux analysis shows the operation zone in which the individual dc-link voltage balancing is possible. PWM and control strategies are developed to reduce the semiconductor total losses, harmonic distortion, and switching stress. Two ac–dc–ac multilevel conventional structures are used for comparison. Simulation and experimental results demonstrate the feasibility of the studied converter. [ABSTRACT FROM AUTHOR]

This paper investigates a multilevel inverter composed of series/parallel-connected H-bridges. The presented structure can be used for applications in which the use of semiconductor switches with low-voltage and low-current ratings is intended. A comprehensive system model, an overall control strategy to adjust the output voltage with constant magnitude and frequency, and a level-shifted PWM (LS-PWM) strategy based on a voltage vectors unidimensional analysis and a plane analysis are presented. The LS-PWM is capable of mitigating the low-frequency circulating current, thus generating multilevel voltage signals with low harmonic distortion, maximum number of levels, and low dv/dt. In addition, considering a wide range of values of voltages and currents and various power levels, the total converter losses are reduced compared with the conventional multilevel converters. Two multilevel conventional inverters with the same number of semiconductor switches are used for comparison. Simulation and experimental results demonstrate the feasibility of the studied converter. [ABSTRACT FROM AUTHOR]

Inductive power transfer (IPT) is widely discussed as an alternative to contact charger for plug-in hybrid and electric vehicles. This paper analyzes a contactless battery charger back-end power factor correction (PFC) concept, reducing the primary-side circuit complexity and physical size. For that purpose, the main volume and loss factors of a contactless battery charger are identified, discussing the partitioning of tasks to perform a unity power factor operation. An analysis of the most commonly used front-end PFC and the proposed back-end PFC configuration is performed, with the aim of highlighting benefits and limitations of each variant. Moreover, performance of silicon (Si) and gallium nitride (GaN) devices has also been evaluated, defining the main advantages and drawbacks of both semiconductor technologies in different IPT scenarios. The study is verified experimentally on a 3.2 kW contactless battery charger. [ABSTRACT FROM AUTHOR]

The series connection of insulated gate bipolar transistors (IGBTs) allows operation at voltage levels higher than the rated voltage of one IGBT and has less power semiconductor costs compared to multilevel topologies. However, voltage unbalance during the switching transient is a challenge for series-connected device application. This paper presents an field-programmable gate array (FPGA)-based voltage balancing strategy for multiseries-connected high-voltage (HV)-IGBTs including an FPGA-based active voltage balancing control (AVBC) circuit integrated into the gate driver and the control for multiseries-connected IGBTs. The effectiveness of the control has been experimentally validated in a prototype using four 4.5 kV HV-IGBTs in series connection. [ABSTRACT FROM AUTHOR]

This paper presents a nine-level transformer-based inverter requiring only eight switches. The envisaged structure consists of two standard H-bridges fed from a single dc source. Besides, a single-phase transformer is employed to aid the process of intermediate voltage level generation. An ad-hoc pulsewidth modulation scheme based on boolean logic form equations is developed to derive the gating pulses. An effortless extension of the proposed inverter to a higher number of voltage levels is also achieved by generalizing the switching functions. Furthermore, the superior performance of the proposed topology is demonstrated through a comprehensive cost-based analysis. Finally, the validation of the proposed topology is accomplished through experiments on a down-scale prototype, and the measurement results are included. [ABSTRACT FROM AUTHOR]

The requirements for peripheral circuits of power converters are becoming more restrictive due to the enhancement of Si-based power devices and due to practical use of SiC device. In the design of modern high-speed switching converters, the stray inductances and capacitances both in the device package and in the gate drive circuit in addition to those in the main circuit of the power converter must be considered. In these situations, the gate driving technique represents the key technology for enhancement of high-speed switching ability of power devices, as there are design limitations to reduce the stray inductances and capacitances. So far, several active gate control methods have been proposed. Most conventional active gate drivers are configured using analog circuits such as transistors and diodes. Thus, it is difficult to reconfigure their control parameters to fit the stray inductances and capacitances after the implementation of power converter and gate circuits. As a solution to these problems, the authors have proposed a programmable gate driver IC, which is a digitally controlled circuit. This gate driver IC can control the gate current at 63 separate levels, operated by programmable fully digital 12-bit and clock signals. In this paper, an active gate current control based on the load current in a half-bridge inverter with two programmable gate driver ICs is demonstrated. This developed gate control is different to the general current feedback control followed the reference value. It is verified that the proposed active gate control can effectively improve the tradeoff relationship between the surge voltage and switching loss of the pulsewidth modulation half-bridge inverter circuit. [ABSTRACT FROM AUTHOR]

Pollution problems caused by fossil fuels have led to more investigations on renewable energy systems. Photovoltaic cells and fuel cells output low-level voltage than required; therefore, high gain dc–dc converters are used to boost this low voltage. The Z-source converter can be employed as dc–dc converter to boost the photovoltaic panel voltages. It also offers other advantages, such as clamped switched voltage, high voltage gain, isolation of energy source from the load, and positive polarity for output voltage; therefore, this is a good choice for high step-up applications. This paper presents analysis of a novel high step-up Z-source based dc–dc converter that has higher voltage gain than the Z-source converter. Furthermore, high efficiency, low device voltage stress, and wide voltage gain range make it a good candidate for photovoltaic and high voltage step-up applications. The proposed dc–dc converter is evaluated experimentally for converting 24-V dc input to 300-V dc output at 100 W and to validate the simulation results. [ABSTRACT FROM AUTHOR]

This paper proposes new angles constraint for selective harmonic elimination-pulsewidth modulation (SHE)-PWM utilized in single-phase inverter applications. The proposed angles constraint naturally eliminates all triplen harmonics, whereas they conventionally appeared in all single-phase output voltages. The harmonic amplitude formula is developed based on the obtained angles constraint, and then modified single-phase SHE equations are defined to eliminate only specified low nontriplen harmonics. Therefore, more harmonics would be eliminated with the same switching frequency in modified SHE-PWM. Five-level voltage waveform has been opted to implement the introduced method, but it can be applied on all multilevel voltage waveforms such as seven-level with even number of angles. Unlike the conventional SHE technique, THD is analyzable in modified SHE to find optimum values for switching angles in order to control noneliminated harmonic amplitudes and minimize THD. Moreover, the cancellation of triplen harmonics empowers a single-phase inverter to supply nonlinear loads beside linear ones. Some experimental tests are accomplished using a single-phase five-level modified packed U-cell (MPUC) inverter. Results are discussed to prove the excellent performance of a single-phase MPUC inverter under both normal and harmonic loads and accurate elimination of determined triplen and nontriplen harmonics by applying the presented angles constraint. [ABSTRACT FROM AUTHOR]

In order to prevent the power switching devices (e.g., an insulated-gate bipolar transistor, IGBT) from shoot-through in voltage-source converters during a switching period, the dead time is added either in the hardware driver circuits of the IGBTs or implemented in software in pulse width modulation (PWM) schemes. Both solutions will contribute to a degradation of the injected current quality. As a consequence, the harmonics induced by the dead time (referred to as “dead-time harmonics” hereafter) have to be compensated in order to achieve a satisfactory current quality, as required by standards. In this paper, the emission mechanism of dead-time harmonics in single-phase PWM inverters is, thus, presented considering the modulation schemes in detail. More importantly, a repetitive controller has been adopted to eliminate the dead-time effect in single-phase grid-connected PWM converters. The repetitive controller has been plugged into a proportional-resonant-based fundamental-frequency current controller so as to mitigate the dead-time harmonics and also to maintain the control of the fundamental-frequency grid current in terms of dynamics. Simulations and experiments are provided, which confirm that the repetitive controller can effectively compensate the dead-time harmonics and other low-order distortions, and also, it is a simple method without hardware modifications. [ABSTRACT FROM AUTHOR]

This paper presents a hybrid pulse width modulation-based discontinuous modulation (D-HPWM) strategy with dc-link voltage balancing for a three-level neutral-point-clamped (NPC) traction inverter drive. The results are then compared with continuous-hybrid-PWM (C-HPWM) to check the performance improvement. The HPWM strategy uses both the advantages of carrier- and space-vector-based PWM strategies. The duty cycles are generated using the carrier-based strategy to reduce the computational time and complexity of the system and redundant vector states are used to keep the two dc-link capacitor voltages balanced. As discontinuous PWM (DPWM) reduces the switching losses considerably compared to the continuous PWM, the DPWM strategy is developed in this paper for the HPWM-based strategy. Detailed comparison studies are then carried out in MATLAB/Simulink and PLECS to show the conduction and switching loss distribution with change in modulation index for different power switches. A 54.0-kW surface permanent magnet synchronous machine (PMSM) is used for this simulation studies. Moreover, the total inverter loss and losses in each insulated gate bipolar transistor (IGBT) are also compared. Detailed experimental performance analysis is also carried out with a scaled down prototype of a 6.0-kW surface PMSM, NPC inverter, and real-time emulator DSpace, to show the capacitor voltage deviation with both control strategies. [ABSTRACT FROM PUBLISHER]

Multilevel converters are a proven solution for medium-voltage and high-power applications, including renewable energy conversion. Developing 6.6-kV converters is a key goal for the wind turbines industry. Considering the voltage rating of commercially available semiconductors, five-level converters are necessary to reach 6.6 kV. The five-level active neutral-point-clamped converter (5L-ANPC) is one of the most advantageous topologies among five-level multilevel converters. This paper presents a new 5L-ANPC topology that overcomes the features of the previously employed 5L-ANPC topology. Along this paper, the properties and working principle of this new 5L-ANPC are explained. Finally, the validity of the new converter is validated via simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a novel dc–dc converter configuration, which successfully integrates two technologies, including a switched capacitor and a switched coupled inductor, into one converter. By adopting a coupled inductor to charge a switched capacitor, the voltage gain can be effectively increased, and the turns ratio of the coupled inductor can be also reduced. Not only lower conduction losses but also higher power conversion efficiency is benefited from a lower part count and lower turns ratios. The proposed converter is simply composed of six components, which can be further derived to varied converters for different purposes, such as a bidirectional converter. The operating principle and steady-state analysis are discussed in this paper. A 250-W laboratory hardware prototype is completed and verified. The voltage gain is up to 11. The highest efficiency is 97.2%, and the full-load efficiency is kept at 93.6%. [ABSTRACT FROM AUTHOR]

This paper proposes a vector control strategy for independent control of two permanent-magnet synchronous motors (PMSMs) using a single four-leg inverter (4LI). An expanded two-arm modulation to obtain a balanced three-phase output voltage is described. This paper also proposes a method to compensate for the fluctuations in the neutral point voltage of two split capacitors in the dc link. The experimental results show that independent speed and position control of two PMSMs can be achieved using a single 4LI with the proposed vector control method. [ABSTRACT FROM AUTHOR]

Three optimized pulse-width modulated (PWM) techniques for the overmodulation region of two-level inverter-fed ac drives are introduced and investigated from the harmonic loss minimization point of view. The optimization is elaborated for the lowest loss-factor, which is proportional to the square of the root mean square value of current harmonics. The loss-factors are computed for different switching numbers as the function of the motor fundamental voltage. It is shown that, with respect to the motor heating and torque ripples, the acceptable drive condition can be guaranteed by a relatively low value of an inverter switching frequency up to 96%–97% of maximal possible motor voltage. Furthermore, it is shown that the so-called three-vector methods have considerably better performance in the lower part of the overmodulation region than the so-called two-vector method for the same number of switching. The performance of the techniques is compared with other existing PWM techniques. This paper discusses the implementation details of the proposed optimal PWM techniques. The theoretical results are verified by experimental and simulation tests. [ABSTRACT FROM AUTHOR]

This paper presents a new compact three-phase cascaded multilevel inverter (CMLI) topology with reduced device count and high-frequency magnetic link. The proposed topology overcomes the predominant limitation of separate dc power supplies, which CMLI always require. The high-frequency magnetic link also provides a galvanic isolation between the input and output sides of the inverter, which is essential for various grid-connected applications. The proposed topology utilizes an asymmetric inverter configuration that consists of cascaded H-bridge cells and a conventional three-phase two-level inverter. A toroidal core is employed for the high-frequency magnetic link to ensure compact size and high-power density. Compared with counterpart CMLI topologies available in literature, the proposed inverter has the advantage of utilizing the least number of power electronic components without compromising the overall performance, particularly when a high number of output voltage levels is required. The feasibility of the proposed inverter is confirmed through extensive simulation and experimentally validated studies. [ABSTRACT FROM AUTHOR]

A novel constant current injection-based characterization scheme for the switched reluctance machine (SRM) is proposed here. Unlike conventional characterization methods where the rotor is locked at a fixed position, the current injection-based method maintains the phase current constant while the machine runs at constant speed. A novel current controller, required for the proposed constant current injection scheme, is also proposed in this paper. The predictive control-based current controller works without the machine model being available. The proposed current controller is validated experimentally and is then used to characterize a 4 kW, 1500 r/min 8/6 pole SRM. The characteristics obtained are found to be in good agreement with those obtained using conventional locked rotor tests. [ABSTRACT FROM AUTHOR]