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Parallel interleaved two-level (2L) three-phase voltage source inverters (VSIs) are widely used due to their distinct advantages of high power delivery, modularity, low current rating devices, etc. Along with these advantages, the parallel interleaved 2L VSIs could also be analyzed as a single three-level (3L) VSI. Conventionally parallel interleaved 2L VSIs are modulated using the 2L pulsewidth modulation (PWM) techniques. However, implementation of parallel interleaved 2L VSIs using the 2L PWM techniques may generate a higher ac side current ripple as compared to implementing the parallel interleaved 2L VSIs using 3L PWM techniques. This paper proposes a carrier-based method for implementing different 3L discontinuous PWM (DPWM) techniques for parallel interleaved 2L three-phase VSIs. Comparison of different 2L switching sequences for implementing a 3L DPWM switching sequence based on circulating current, line current ripple, and switching loss is also carried out. Simulation and experimental results are also displayed to validate the proposal. [ABSTRACT FROM AUTHOR]

This paper presents an improved analytical model for estimating the high-frequency current ripple of interior permanent magnet synchronous machines due to pulsewidth modulation (PWM) switching. The proposed model accounts for the impact of slotting effect, magnetic saturation, and cross-coupling between the $d$ - and $q$ -axis. The model is subsequently used to investigate several factors that influence the PWM-induced current ripple. These include the PWM switching frequency, fundamental frequency (i.e., machine speed), dc-bus voltage, current control angle (i.e., γ angle), and the excitation current amplitude (i.e., saturation level). Experiments have been conducted to verify the analytical prediction results. These results show that the analytical model can predict the PWM-induced current ripple waveshape very well for many operating conditions and accurately estimate its rms value over a complete fundamental period. [ABSTRACT FROM AUTHOR]

This paper investigates a multilevel inverter composed of series/parallel-connected H-bridges. The presented structure can be used for applications in which the use of semiconductor switches with low-voltage and low-current ratings is intended. A comprehensive system model, an overall control strategy to adjust the output voltage with constant magnitude and frequency, and a level-shifted PWM (LS-PWM) strategy based on a voltage vectors unidimensional analysis and a plane analysis are presented. The LS-PWM is capable of mitigating the low-frequency circulating current, thus generating multilevel voltage signals with low harmonic distortion, maximum number of levels, and low dv/dt. In addition, considering a wide range of values of voltages and currents and various power levels, the total converter losses are reduced compared with the conventional multilevel converters. Two multilevel conventional inverters with the same number of semiconductor switches are used for comparison. Simulation and experimental results demonstrate the feasibility of the studied converter. [ABSTRACT FROM AUTHOR]

This paper presents a nine-level transformer-based inverter requiring only eight switches. The envisaged structure consists of two standard H-bridges fed from a single dc source. Besides, a single-phase transformer is employed to aid the process of intermediate voltage level generation. An ad-hoc pulsewidth modulation scheme based on boolean logic form equations is developed to derive the gating pulses. An effortless extension of the proposed inverter to a higher number of voltage levels is also achieved by generalizing the switching functions. Furthermore, the superior performance of the proposed topology is demonstrated through a comprehensive cost-based analysis. Finally, the validation of the proposed topology is accomplished through experiments on a down-scale prototype, and the measurement results are included. [ABSTRACT FROM AUTHOR]

This paper illustrates the application of a solving method of linear systems to a multilevel inverter. This study applies a generic pulsewidth modulation (PWM) method to a multilevel topology. This method finally highlights some specific modulation schemes. First, the study describes the mathematical model of the inverter leg. The leg is made of three level T-type structure. The model is extended to the three-phase inverter. The generalized inverse is used to generate the solution set of the conduction rates. Among the modulation strategies possible, three specific modulation schemes are proposed. The modulation schemes are applied to simulate a PWM three-phase inverter. Finally, some experimental results complete the analysis. [ABSTRACT FROM AUTHOR]

Pulsewidth modulation (PWM) ac drives generate high line–line motor voltage, up to twice dc bus voltage, due to the reflected-wave phenomenon. Under certain conditions, motor voltage greater than twice the dc bus voltage can occur, resulting in winding insulation failure. It is well known that by suitably adjusting the PWM pulse pattern, the occurrence of voltages greater than twice the dc bus voltage can be avoided, up to a certain maximum cable length; beyond which, output filters are typically used to limit peak motor voltage. It will be shown in this paper that when the inverter operates in the pulse dropping region, voltages greater than twice the dc bus voltage will occur, with existing methods for pulse pattern compensation. A method to adjust the PWM pulse pattern in the pulse dropping region to ensure the same reflected-wave performance as the linear PWM region is presented in this paper. Experimental results are provided to demonstrate the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

Variable-speed multiphase (more than three phases) drive systems are seen as serious contenders to the existing three-phase drives due to their distinct advantages. Supply to the multiphase drives is invariably given from a voltage source inverter. However, this paper proposes an alternative solution for supplying multiphase drive system using a direct ac–ac converter called a matrix converter. This paper proposes the pulsewidth modulation (PWM) algorithm for the matrix converter topology with three-phase grid input and five-phase variable-voltage and variable-frequency output. The PWM control technique developed and presented in this paper is based on space vector approach. This paper presents the complete space vector model of the three-to-five-phase matrix converter topology. The space vector model yield 2^15 total switching combinations which reduce to 243 states considering the imposed constraints, out of which 240 are active and 3 are zero vectors. However, for space vector PWM (SVPWM) implementation, only 90 active and 3 zero vectors can be used. The SVPWM algorithm is presented in this paper. The viability of the proposed solution is proved using analytical, simulation, and experimental approaches. [ABSTRACT FROM AUTHOR]

Control and modulation schemes for ac electrical drives synthesize switched three-phase voltage waveforms that control the electrical machine. Particularly in medium-voltage applications, the aim is to minimize both the switching losses in the inverter and the harmonic distortions of the stator currents and the torque. For a given modulation scheme, lower switching losses usually imply higher distortion factors and vice versa. This tradeoff can be described by a hyperbolic function, as shown in this paper for pulsewidth modulation (PWM). A number of predictive control concepts are rapidly emerging. Their characteristic hyperbolic tradeoff functions are derived, compared with each other, and benchmarked with respect to PWM and offline optimized pulse patterns (OPPs). It is shown that predictive schemes with long prediction horizons shift the performance tradeoff curve toward the origin, thus lowering both the switching losses and the harmonic distortions. As a result, at steady-state operating conditions, these predictive schemes achieve a performance similar to OPPs, while providing a superior dynamic performance during transients. [ABSTRACT FROM AUTHOR]

This paper proposes a zero-voltage-transition (ZVT) pulsewidth-modulated (PWM) synchronous buck converter, which is designed to operate at low voltage and high efficiency typically required for portable systems. A new passive auxiliary circuit that allows the main switch to operate with zero-voltage switching has been incorporated in the conventional PWM synchronous buck converter. The operation principles and detailed steady-state analysis of the ZVT PWM synchronous converter with a passive auxiliary circuit are presented. All of the semiconductor devices aside from the main switch operate under soft-switching conditions. Thus, the auxiliary circuit provides a larger overall efficiency. The feasibility of the auxiliary circuit is confirmed by the simulation and experimental results. [ABSTRACT FROM PUBLISHER]