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This paper proposes a medium-frequency (MF) solid-state transformer (SST) based grid interface for high-power multipulse rectifiers. In the proposed approach, the low-frequency ac (grid) voltage is transformed to MF voltage via front-end converters. The three single-phase MF outputs from these converters are fed to the primary side of a three-phase, five-limb multiwinding isolation transformer (or alternately three one-phase transformers). The secondary side windings from the transformer are configured in a certain “zig-zag” arrangement, which are connected to the inputs of three-phase diode rectifier modules as in a typical multipulse system. The proposed topology can better than double the power density by reducing volume (or weight) of the required front-end isolation transformer while maintaining the same input current quality as a conventional low-frequency transformer based approach. Usage of an open-loop square wave pulse width modulation for the front-end converters makes this approach simple to implement. This paper explains the proposed concept taking an adjustable speed drive application's perspective using modeling, simulation, and experimental results from a scaled down laboratory prototype. [ABSTRACT FROM AUTHOR]

This paper proposes a multilevel series compensator (MSC) to deal with voltage sags/swells, harmonic compensation, or reactive power compensation. Such a device can be considered as a dynamic voltage restorer or a series active power filter (Series-APF). The MSC can improve the power quality of loads located in stiff systems. The configuration is based on three-phase bridge (TPB) converters connected by means of cascaded single-phase transformers. This arrangement permits the use of a single dc-link. A generalization for $K$ -stages in which $K$ -transformers are coupled with $K$-TPB converters is presented. The topology permits generating a high number of levels in the voltage waveforms with a low number of power switches in comparison with a classic topology. The multilevel waveforms are generated by the converters through a suitable pulsewidth modulation (PWM) strategy that takes into consideration the transformer turns ratios. Modularity and simple maintenance make the proposed MSC an attractive solution compared with some conventional configurations. Model, PWM strategy, and overall control are discussed in this paper. Simulation and experimental results are presented as well. [ABSTRACT FROM PUBLISHER]

This paper presents the development, analysis, and performance evaluation of a new topology for an isolated dc power electronic converter (PEC). The proposed topology (called the reverse flyback dc PEC) is developed to process a discontinuous input voltage and produce a continuous output voltage. The reverse flyback dc PEC is operated based on charging the inductive element in the high-frequency transformer, while discharging the energy to the output side through on–off actions of the switching element, which is located on the secondary side of the high-frequency transformer. A prototype for the proposed reverse flyback dc PEC is constructed to evaluate its performance under different operating conditions. Performance results show that the reverse flyback dc PEC is capable of processing discontinuous input voltages with different duty ratios and maintaining continuous output voltages with a minor sensitivity to the load type of ratings. [ABSTRACT FROM AUTHOR]

Three three-phase unidirectional open-end topologies with reduced active switch count are investigated in this paper. These configurations arise from the replacement of controlled switches by diodes, in order to reduce the system complexity. Furthermore, the costs are also reduced once less driver circuitry is needed. The proposed topologies make the ac–dc conversion of the power delivered by a permanent magnet synchronous machine operating at unity power factor. Each configuration is made out of two converters in which at least one is derived from the substitution of active switches in two-level legs or three-level neutral-point clamped legs. The proposed configurations have less switches, making it possible to obtain the same number of voltage levels (in relation with the conventional configurations) with half or quarter of the number of active switches. Also, the topologies are compared in terms of semiconductor power losses and harmonic distortion. The control strategy of the systems as well as a detailed model, simulation, and experimental results are presented. [ABSTRACT FROM AUTHOR]

Low-voltage dc distribution systems have gained significant attention over the last years, since they provide simpler and more efficient integration of distributed generators and storage devices, establishing a pathway to net zero energy buildings. In low-power units, transformerless utility interface is preferred to reduce footprint and losses. However, the lack of galvanic isolation introduces a common-mode (CM) path between the dc distribution bus and the utility service grounding, leading to the presence of high CM voltages at the dc bus feeders. The attenuation of the CM voltage reduces the touch voltage amplitude and leakage current, contributing to a safer environment. In this paper, a feed-forward active compensation of the CM voltage is proposed. It relies on utility voltage parameters, estimated by a phase locked loop, to generate a counter CM voltage; hence, it does not require previous knowledge of the system CM path model or the addition of voltage sensors. Experimental results show that this technique can attenuate the CM voltage to non-dangerous magnitudes without interfering with the microgrid differential mode behavior. [ABSTRACT FROM AUTHOR]

A switching-capacitor-based buck–boost converter (with common ground) for point of load applications is proposed in this paper. It is capable of operating in stand-alone buck or boost mode in addition to its primary operation of performing the buck–boost conversion. The striking feature of the proposed converter is low source current ripple content irrespective of its mode of operation (buck–boost, buck, or boost). First, feasible pulsewidth modulation schemes for the proposed converter are identified and thereafter the corresponding circuit performance analysis, steady-state analysis, and state-space modelling is established. Through steady-state analysis, voltage gain expressions are formulated and equations defining L-C components are derived in terms of their ripple quantities. The state-space models are used to formulate small-signal analysis and to obtain the relevant transfer functions required in the controller design. A voltage-mode/current-mode controller is designed, with a tradeoff in bandwidth, to control the proposed converter and transit it from buck to boost mode or vice versa seamlessly. A 30–55 W, 100 kHz, prototype point of load converter with 36-V input dc source is built to supply power at constant load voltage of either 48 or 28 V. The proposed converters’ effectiveness is demonstrated experimentally in terms of reduced source current ripple along with seamless transition from buck to boost mode and vice versa. [ABSTRACT FROM AUTHOR]

Many of the renewable energy resources, like offshore wind, utility PV farms, are located far away from the load centers, which requires dc power transmission system to efficiently deliver power. Voltage-source converter solution is required in many applications due to the stability and compensation requirement. This paper presents a new voltage source converter topology for medium to high voltage dc application, named modular embedded multilevel converter (MEMC). MEMC is based on a three-level topology structure and consists of series-connected insulated-gate bipolar transistor (IGBT) bridge stacks, like the popular modular multilevel converter (MMC) and series-connected thyristor or press-pack high voltage integrated gate-commutated thyristor or IGBT stacks. The basic operation principle, control solutions, and the methods to commutate the thyristors are explained in detail. Due to the three-level structure, the total number of IGBT stacks are reduced by half compared with MMC, leading to much lower energy storage, weight, volume, and system complexity. Also by replacing part of the IGBT stack in MMC with thyristor stack, both of the system conduction loss and switching loss can be further reduced. There are other topology variations of MEMC with a similar operational principle but different characteristics. [ABSTRACT FROM AUTHOR]

An adaptive control of DPWM implementable in clamped-three-level inverters with two strings of photovoltaic (PV) panels in cascaded connection is proposed in this paper. The proposed modulation is developed based on the so-called circuit-level decoupling concept. It is able to provide balance line voltage even under unbalanced dc links. The unequal dc voltages appeared due to asymmetric maximum point of power trackings (MPPTs) are controlled by proper injection of zero-sequence voltage to the common mode voltage, while the total dc voltage is regulated based on the voltage commands generated by the MPPT of each string. Thus, both PV strings are able to be operated based on their MPPTs while there is almost no low-order harmonic distortion at the inverter output current. Compared with the previous methods, the high capability of the proposed method is evaluated by simulation study and experimental tests. [ABSTRACT FROM AUTHOR]

This paper investigates ac–dc–ac multilevel topologies for three-phase four-wire applications obtained from an interconnection of three-leg voltage-source converters. The topologies can be applied in line voltage regulators, universal active power filters, and uninterrupted power supplies. Operating principles, a pulsewidth modulation (PWM) technique, and an overall control strategy are developed. The PWM and control strategies are suitable to regulate the dc-link voltages and to reduce the harmonic distortion, switching stress, and power losses. Simulation results are used to compare the proposed configurations with a conventional solution in terms of harmonic distortion, semiconductor losses, and others characteristics. Experimental results are presented to validate the theoretical considerations and were obtained by using insulated-gate bipolar transistors with dedicated drives and a digital signal processor with appropriated plug-in boards and sensors. [ABSTRACT FROM AUTHOR]

In this paper, a fifth-order boost point-of-load converter is developed by cascading a modified fourth-order boost converter with a combination of L–C and diode. This topology has the following salient features: Single-switch topology, common ground between source and load, low-voltage stress across intermediate capacitors, and voltage gain same as other reported fifth-order boost converters with no common ground. Steady-state and dynamic analyses demonstrate the proposed converter's boosting feature and dynamic performance, respectively. A contoured robust Bode plot methodology is employed to design the robust voltage-mode controller to ensure load voltage regulation in the presence of uncertainties. The necessary and sufficient conditions under which the designed controller guarantees the load voltage regulation and robust stability are obtained. A step-by-step robust controller design procedure is outlined. The salient features of the proposed converter and its robust performance are studied analytically, using the MATLAB platform, and validated experimentally on a 60-W prototype module. [ABSTRACT FROM AUTHOR]

This paper investigates an ac–dc–ac multilevel power converter. The studied configuration is composed of two single-phase ac–dc–ac three-leg modules and series-connected H-bridges in the shared part of system. Because the proposed converter has shared legs between the input and output, it is employed in applications with same input and output frequency. Uninterrupted power supply and unified power quality conditioner are application examples for this converter. Such multilevel topology has lower dc-link voltage rating, which, consequently, presents low switch blocking voltages when compared to conventional topologies. System model, a space-vector pulsewidth modulation (PWM) strategy to symmetrical and asymmetrical dc-link voltages, and an overall control strategy to adjust the system variables are presented. A power flux analysis shows the operation zone in which the individual dc-link voltage balancing is possible. PWM and control strategies are developed to reduce the semiconductor total losses, harmonic distortion, and switching stress. Two ac–dc–ac multilevel conventional structures are used for comparison. Simulation and experimental results demonstrate the feasibility of the studied converter. [ABSTRACT FROM AUTHOR]

This paper investigates a multilevel inverter composed of series/parallel-connected H-bridges. The presented structure can be used for applications in which the use of semiconductor switches with low-voltage and low-current ratings is intended. A comprehensive system model, an overall control strategy to adjust the output voltage with constant magnitude and frequency, and a level-shifted PWM (LS-PWM) strategy based on a voltage vectors unidimensional analysis and a plane analysis are presented. The LS-PWM is capable of mitigating the low-frequency circulating current, thus generating multilevel voltage signals with low harmonic distortion, maximum number of levels, and low dv/dt. In addition, considering a wide range of values of voltages and currents and various power levels, the total converter losses are reduced compared with the conventional multilevel converters. Two multilevel conventional inverters with the same number of semiconductor switches are used for comparison. Simulation and experimental results demonstrate the feasibility of the studied converter. [ABSTRACT FROM AUTHOR]

This paper presents a nine-level transformer-based inverter requiring only eight switches. The envisaged structure consists of two standard H-bridges fed from a single dc source. Besides, a single-phase transformer is employed to aid the process of intermediate voltage level generation. An ad-hoc pulsewidth modulation scheme based on boolean logic form equations is developed to derive the gating pulses. An effortless extension of the proposed inverter to a higher number of voltage levels is also achieved by generalizing the switching functions. Furthermore, the superior performance of the proposed topology is demonstrated through a comprehensive cost-based analysis. Finally, the validation of the proposed topology is accomplished through experiments on a down-scale prototype, and the measurement results are included. [ABSTRACT FROM AUTHOR]

This paper proposes new angles constraint for selective harmonic elimination-pulsewidth modulation (SHE)-PWM utilized in single-phase inverter applications. The proposed angles constraint naturally eliminates all triplen harmonics, whereas they conventionally appeared in all single-phase output voltages. The harmonic amplitude formula is developed based on the obtained angles constraint, and then modified single-phase SHE equations are defined to eliminate only specified low nontriplen harmonics. Therefore, more harmonics would be eliminated with the same switching frequency in modified SHE-PWM. Five-level voltage waveform has been opted to implement the introduced method, but it can be applied on all multilevel voltage waveforms such as seven-level with even number of angles. Unlike the conventional SHE technique, THD is analyzable in modified SHE to find optimum values for switching angles in order to control noneliminated harmonic amplitudes and minimize THD. Moreover, the cancellation of triplen harmonics empowers a single-phase inverter to supply nonlinear loads beside linear ones. Some experimental tests are accomplished using a single-phase five-level modified packed U-cell (MPUC) inverter. Results are discussed to prove the excellent performance of a single-phase MPUC inverter under both normal and harmonic loads and accurate elimination of determined triplen and nontriplen harmonics by applying the presented angles constraint. [ABSTRACT FROM AUTHOR]

Multilevel converters are a proven solution for medium-voltage and high-power applications, including renewable energy conversion. Developing 6.6-kV converters is a key goal for the wind turbines industry. Considering the voltage rating of commercially available semiconductors, five-level converters are necessary to reach 6.6 kV. The five-level active neutral-point-clamped converter (5L-ANPC) is one of the most advantageous topologies among five-level multilevel converters. This paper presents a new 5L-ANPC topology that overcomes the features of the previously employed 5L-ANPC topology. Along this paper, the properties and working principle of this new 5L-ANPC are explained. Finally, the validity of the new converter is validated via simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a new compact three-phase cascaded multilevel inverter (CMLI) topology with reduced device count and high-frequency magnetic link. The proposed topology overcomes the predominant limitation of separate dc power supplies, which CMLI always require. The high-frequency magnetic link also provides a galvanic isolation between the input and output sides of the inverter, which is essential for various grid-connected applications. The proposed topology utilizes an asymmetric inverter configuration that consists of cascaded H-bridge cells and a conventional three-phase two-level inverter. A toroidal core is employed for the high-frequency magnetic link to ensure compact size and high-power density. Compared with counterpart CMLI topologies available in literature, the proposed inverter has the advantage of utilizing the least number of power electronic components without compromising the overall performance, particularly when a high number of output voltage levels is required. The feasibility of the proposed inverter is confirmed through extensive simulation and experimentally validated studies. [ABSTRACT FROM AUTHOR]

This paper presents the concept of three-phase module-integrated converters (MICs) incorporated in grid-tied large-scale photovoltaic (PV) systems. The current-source converter with dc voltage boost capability, namely the single-stage power conversion system, is proposed for the three-phase PV MIC system. A model predictive scheme with low switching frequency is designed to control the proposed topology in such a way that provides a certain amount of active and reactive power in steady-state operation and also provides a proper ratio of reactive power under transient conditions to meet the low-voltage ride through regulations. To predict the future behavior of current control values and switching states, a discrete-time model of the MIC is developed in the synchronous reference frame. It is demonstrated that the injected active and reactive power can be controlled by minimizing the cost function introduced in the predictive switching algorithm. The proposed structure is simulated in MATLAB/SIMULINK software. An experimental verification is provided to justify the performance of the proposed control method through a 300-VA laboratory prototype. The results verify the desired performance of the proposed control scheme for exchanging both active and reactive powers between the PV MIC and the grid within different operating conditions. [ABSTRACT FROM AUTHOR]

This paper presents an optimized topology for a \text3-\phi three-level inverter with complete elimination of common-mode voltage (CMV). The proposed multilevel inverter (MLI) configuration is realized by modifying a T-structure \text3-\phi inverter. The proposed configuration is an optimized solution with respect to the pulse-width modulation strategy used for CMV elimination. The given three-level inverter structure uses only 16 power semiconductor switches, which is much lower than the existing configurations. A reduced number of power semiconductor devices results in a diminished number of driver circuits, less installation space, and low cost. Further, due to the complete elimination of CMV, the proposed MLI is free from issues such as electromagnetic interference and leakage current with a reduction in filter requirement. The presented topology is also compared with other existing topologies to prove its advantage. It is an optimized solution with respect to the dc bus voltage requirement and the total voltage rating of the devices or the components used in the system. Simulation and experimental results are presented to confirm the capability of the proposed MLI. [ABSTRACT FROM AUTHOR]

A novel hybrid five-level voltage-source converter for high-efficiency applications is investigated in this paper. Compared with traditional multilevel converters, this hybrid multilevel converter generates desired staircase voltage levels with a reduced number of power devices and isolated drivers at higher voltage levels. It has redundant switching state combinations in hybrid multilevel converter, which makes it easy to balance flying capacitor voltages and realize fault-tolerant operation. A voltage-balancing control strategy based on switching state redundancies is presented for the hybrid multilevel converter to generate desired levels and also keep voltage balance of flying capacitors at the same time. The performance of the hybrid multilevel converter under various operating conditions is investigated in MATLAB/Simulink. The effectiveness of the proposed hybrid multilevel converter is validated by experiment results. [ABSTRACT FROM AUTHOR]

This paper proposes and analyzes a new power electronics circuit topology for wireless inductive power transfer application using current-fed half-bridge converter with CCL-LC resonant network. The major focus is analysis and implementation of a new current-fed resonant topology with current-sharing and voltage doubling features. Generally, inductive power transfer circuits with current fed converter use parallel CL resonant tank to transfer power effectively through air gap. However, in medium power application, this topology suffers from a major limitation of high voltage stress across the inverter semiconductor devices owing to high reactive power consumed by loosely coupled coil. In proposed topology, this is mitigated by adding a capacitor in series with the coil developing series-parallel CCL tank. The power flow is controlled through variable frequency modulation. Soft-switching of the devices is obtained irrespective of the load current. For grid-to-vehicle or solar-to-vehicle, the converter is analyzed and detailed design procedure is illustrated. Experimental results are presented to verify the analysis and demonstrate the performance. [ABSTRACT FROM AUTHOR]

This paper proposes and investigates a new three-phase ac–dc–ac multilevel conversion system obtained from cascaded three-leg converters. Such configuration presents advantages in terms of reduced switch blocking voltages and consequently lower dc-link voltage rating. Operating principles, a pulse-width modulation (PWM) technique based on vector approach, and a control strategy are presented. The operation with different dc-link voltage values and a balancing method are discussed, and is supported by simulation and experimental results. The PWM technique is able to generate multilevel voltage waveforms, which permits reducing the switching frequency stress leading to reduced semiconductor losses. Simulation results are used to compare the proposed configuration with a conventional solution in terms of harmonic distortion and semiconductor losses. Experimental results demonstrate the feasibility of the studied converter, and were obtained by using a downscaled prototype with insulated gate bipolar transistors with dedicated drives and a digital signal processor with appropriated plug-in boards and sensors. [ABSTRACT FROM PUBLISHER]

In this paper, a novel multilevel dc–ac inverter is proposed. The proposed multilevel inverter generates seven-level ac output voltage with the appropriate gate signals’ design. Also, the low-pass filter is used to reduce the total harmonic distortion of the sinusoidal output voltage. The switching losses and the voltage stress of power devices can be reduced in the proposed multilevel inverter. The operating principles of the proposed inverter and the voltage balancing method of input capacitors are discussed. Finally, a laboratory prototype multilevel inverter with 400-V input voltage and output 220\ \textV\text{rms}/2\,{\text{kW}} is implemented. The multilevel inverter is controlled with sinusoidal pulse-width modulation (SPWM) by TMS320LF2407 digital signal processor (DSP). Experimental results show that the maximum efficiency is 96.9% and the full load efficiency is 94.6%. [ABSTRACT FROM AUTHOR]

In this paper, a new modulation method is proposed for a Z-source three-level T-type inverter (3\mbox{LT}^2{I}). The Z-source 3\mboxLT^2I combines the merits of the Z-source two-level inverter and the advantages of the Z-source neutral-point-clamped inverter. Although the previous literature has proved that the space vector modulation (SVM) technique for Z-source 3\mboxLT^2I produces the desired voltage transfer gain with minimized switching loss, it cannot deal with the neutral-point (NP) potential balance issue. Therefore, an improved SVM method addressing this problem for Z-source 3\mbox{LT}^2{I} is proposed. The method simplifies the space-vector diagram of a Z-source 3\mbox{LT}^2{I} into that of a Z$-source two-level inverter. In order to obtain NP potential balance, the pattern of the conventional symmetric SVM is changed by properly adding or subtracting a percentage of the minimum gate-on time. The upper and lower shoot-through states can be inserted into the improved symmetric SVM, thus offering av few advantages, including boosting ability, NP potential balance, and low switching loss. The considerate stable NP voltage and the boosting gain have been experimentally proven by results from a prototype inverter. [ABSTRACT FROM AUTHOR]

Various kinds of differential power processing converters and voltage equalizers have been proposed for series-connected photovoltaic (PV) modules to prevent negative influences of partial shading, such as significant reduction in power generation and the occurrence of multiple maximum power points (MPPs), including local and global MPPs, that hinders and confuses MPP tracking algorithms to operate properly. However, since conventional topologies are based on multiple individual dc–dc converters, the required switch count increases proportionally to the number of modules connected in series, increasing the complexity. A two-switch voltage equalizer using an LLC resonant inverter and voltage multiplier is proposed in this paper. The circuitry can be dramatically simplified compared with conventional topologies due to the two-switch configuration. Detailed operation analyses for the LLC resonant inverter and voltage multiplier are separately performed. Experimental equalization tests emulating partially shaded conditions were performed for four PV modules connected in series. With the proposed voltage equalizer, local MPPs successfully disappeared, and extractable maximum power increased compared with those without equalization, demonstrating the effectiveness and performance of the proposed voltage equalizer. [ABSTRACT FROM PUBLISHER]