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This paper presents a simple, novel interfacing scheme for linear variable differential transformer (LVDT) that does not require a precise sine wave oscillator (with stable amplitude and frequency) for excitation or any phase matching circuit like traditional methods. The primary and the secondary coils of the LVDT are integral parts of a relaxation oscillator (RO). The RO injects a current waveform with a triangular shape through the primary coil which in turn induces a square-shaped voltage waveform in the secondary coils. The RO utilizes the amplitudes of those waveforms and generates a pulsewidth modulation (PWM) output signal whose duty cycle ratio is proportional to the measurand, core position. This quasi-digital PWM signal is passed through a low-pass filter to obtain an analog output. PWM time period measurement using a counter yields a digital output. This method guarantees good stability since the output is dependent only on a pair of dc reference voltages apart from the transformation constant of the sensor. A detailed analysis of the sources of error, their effect on the performance of the scheme and appropriate design choices for error mitigation are also presented. A prototype of the proposed circuit was built and tested in the laboratory. The nonlinearity error noted from the tests conducted was less than 0.16% for the analog output and 0.18% for the digital output. A resolution of up to 11 bits was achieved for the digital output. [ABSTRACT FROM AUTHOR]

Applying pulsewidth modulation (PWM) to control the gain in audio codecs for mobile applications leads to several advantages, such as the smooth control of tuning parameters, smaller silicon area, and lower power consumption, as compared with other tuning techniques using programmable gain amplifiers and zero crossing detectors. The PWM has to be embedded into the main signal path, preferably in a closed-loop control scheme, in order to exploit its benefits. However, the insertion of dithering and offset controls in a gain setting loop poses the problem of controlling their effects in all gain conditions. This paper reports a novel technique aimed at solving the associated issues and limitations, and provides the experimental proof of the concept through the implementation of a test-chip design on silicon. In particular, this paper reports the design and experimental results of a delta–sigma analog-to-digital converter featuring a click-free gain control technique, dithering insertion, and idle-tone shifting, which has been implemented in a 40-nm complementary metal–oxide–semiconductor technology for commercial telecom audio codec applications. [ABSTRACT FROM PUBLISHER]

This paper proposes a simplified current sensing technique for the successful tracking of maximum power point with boost converter for photovoltaic (PV) power systems. To achieve the optimum solutions, the simplest sensing strategy is proposed with high resolution, maximum efficiency, and low cost. In general, PV current of a solar power system is obtained not in continuous time domain but in discrete one due to the digital signal processor-based controller. Instead of continuous resistive sensors, the improved method uses a bypass circuit to bypass the measuring current when the controller halts the sampling of the voltage across resistive sensor. To make this approach more efficient, current sensing process is set to flow through the resistor during some sporadically selected sampling period for responding the slow dynamic of the maximum power point transition. The bypassing approach can be further improved by removing the resistive sensor replaced to the bypass MOSFET. The proposed method contributes to the sensing loss reduction (the ultimate loss reduction is 97% of conventional resistive sensor) as well as to minimization of the thermal stresses on the sensor (23.2^\circC), which enables the proposed methods applied to middle range power conversion systems. Finally, the maximum power point tracking ability of the PV system is evaluated under a rapidly changing cloudy day condition and the superior performance of the proposed technique is demonstrated by comparing the results obtained using conventional current sensing method and proposed current sensing method. [ABSTRACT FROM PUBLISHER]

This paper presents a front-end circuit with pulsewidth modulation (PWM) output for a capacitive sensor interface. A single-MOSFET-based capacitance-ratio-modulated current (CRMC) circuit is proposed to transform the sensed capacitance into a current proportional to a capacitance ratio. The proposed single-MOSFET-based CRMC circuit not only saves a lot of chip area but also lowers power consumption. Then, a dual-slope integration circuit transforms further the modulated current into PWM output. A prototype chip is designed and fabricated with a 0.35- \mu\m complementary metal–oxide–semiconductor process and has a core area of 0.09 \mm^2. The measurement results of the prototype chip demonstrate an accuracy value of up to 9.3 bit with 54- \mu\W power consumption. The microwatt power consumption and the small chip area of the proposed front-end circuit make it very suitable for a capacitive sensor interface in smart sensor chips. [ABSTRACT FROM PUBLISHER]