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In this article, a long-range length comparator, applicable for both static- and dynamic-index calibrations of a linear displacement sensor, is presented. The comparator consists of an air-floating linear motion generator (LMG) and an interferometric optical length calibrator (OLC). A novel design of the LMG made by multisegment splicing is introduced, in which a two-level vibration isolation arrangement, a multiple sliders’ setup, and an exoskeleton framework are adopted. The resulting linear motion can be extremely ideal even with a large stroke. The angular error is within $11.89~\mu $ rad covering the 12-m range. The maximum operating speed and the acceleration of the LMG are 10 m/s and 20 m/s2, respectively. A dual-path optical design of the OLC is displayed, resulting in high environmental tolerance and a small trigger delay of 4.75 ns. The best accuracy of the comparator can be ±($0.041+ 0.106L) \mu \text{m}$ with a resolution of 0.3 nm. The maximum error and operation speed of a 2-m range exposed encoder were successfully calibrated, and the grating pitch deviation was also found, by which the effectiveness of the comparator is proven. The proposed length comparator introduces a possible solution, for how a long-range linear displacement sensor, can be calibrated with high accuracy, efficiency, and applicability. [ABSTRACT FROM AUTHOR]

A new resistance bridge has been built at the Laboratoire national de métrologie et d’essais (LNE) to improve the ohm realization in the Système International (SI) of units from the quantum Hall effect. We describe the instrument, the performance of which relies on two synchronized and noise-filtered current sources, an accurate and stable current divider, and a cryogenic current comparator (CCC) having a low noise of $\mathrm {80~pA.t/Hz^{1/2}}$. The uncertainty budget for the measurement of the 100- $\Omega /(R_{\textrm {K}}/2)$ resistance ratio, where $R_{\textrm {K}}$ is the von Klitzing constant, amounts to a few parts in $10^{10}$ only. [ABSTRACT FROM AUTHOR]

The dual-coupled-linear congruential generator (LCG) (dual-CLCG) is a secure pseudorandom bit gene-rator (PRBG) method among various linear feedback shift register (LFSR), LCG, and chaotic-based PRBG methods for generating a pseudorandom bit sequence. The hardware implementation of this method has a bottleneck due to the involvement of inequality equations. Initially, a direct architectural mapping of the dual-CLCG method is performed. Since two inequality equations are involved for coupling, it generates pseudorandom bit at unequal interval of time that leads to large variation in output latency. In addition, it consumes a large area and fails to achieve the maximal period. Hence, to overcome the aforesaid drawbacks, a new efficient PRBG method, i.e., “coupled-variable input LCG (CVLCG),” and its architecture are proposed. The novelty of the proposed method is the coupling of two newly formed variable input LCGs that generates pseudorandom bit at every uniform clock rate, attains maximum length sequence, and reduces one comparator area as compared to the dual-CLCG architecture. The proposed architecture is implemented using Verilog-HDL and prototyped on the commercially available field-programmable gate array (FPGA) device. Furthermore, the sequences are captured through the logic analyzer and evaluated for randomness using the National Institute of Standard and Technology (NIST) standard test tool. The experimental result reports that the proposed PRBG method passes all the randomness tests with a high degree of consistency. [ABSTRACT FROM AUTHOR]

In this paper, a resolution enhancement method for direct interfacing of inductive sensors, without employing analog-to-digital converter and/or external driver circuit, is presented. In order to achieve better resolution with minimum relative error and current consumption factors, different schemes are implemented which vary in terms of: 1) step-input voltage provision methodology, i.e., through microcontroller ($\mu \text{C}$) pin or through external supply; 2) number of switches used; and 3) method of voltage detection, i.e., either using capture module or employing built-in comparator only. The maximum achievable resolution limits are explored by reducing the lower reference voltage ($\text{V}_{\mathrm {Ref L}}$) in case of detection through built-in analog comparator and/or reducing the series resistance. The one-point calibration technique is used to determine the accuracy. The experiments are performed at 16-MHz clock frequency in the inductance range of: 1) 10–100 $\mu \text{H}$ and 2) 100–1000 $\mu \text{H}$. The results show that in the limits of a maximum current sourcing/sinking capacity of a typical $\mu \text{C}$ , i.e., 40 mA, the proposed methodology enhances the resolution to $4~\mu \text{H}$ with a relative error of 1.2 in the percentage of full-scale span (%FSS). The maximum nonlinearity error in %FSS for inductance range 10–100 $\mu \text{H}$ and 100–1000 $\mu \text{H}$ is 1.1% and <0.4%, respectively. [ABSTRACT FROM AUTHOR]

An ultrastable low-noise current amplifier (ULCA) has been transferred between two laboratories, National Physical Laboratory (NPL) and Physikalisch-Technische Bundesanstalt, four times, with three of the transfers yielding a relative change in the transresistance gain of less than $2 \times 10^{-7}$. This is a new benchmark for interlaboratory transfer of small current. We describe in detail the use of a cryogenic current comparator to calibrate the ULCA at NPL, and the use of the ULCA to measure 1- $\text{G}\Omega $ resistors with relative uncertainties at the $10^{-7}$ level. [ABSTRACT FROM AUTHOR]

This paper presents a comprehensive investigation of several important error sources for the successive-approximation register (SAR) analog-to-digital converters (ADCs). The error sources that we discuss in this paper include the dynamic comparator offset, the dynamic gain error of digital-to-analog converter (DAC), the capacitor mismatch of capacitive DAC, the incomplete settling of DAC, the undershoot of reference voltage, and the input signal coupling. The integral/differential nonlinearities (INL/DNL) of SAR ADCs that are resulted from these error sources are analyzed and addressed. A diagnostic procedure is presented to identify the possible error sources based on the INL/DNL plots. In addition, design suggestions for overcoming these problems are also offered and recommended in this paper. [ABSTRACT FROM AUTHOR]

The four-terminal-pair (4TP) definition of impedance standards allows reaching ultimate accuracy in impedance metrology. In general, the 4TP definition requires dedicated circuitry to be included in the bridge network and the attainment of auxiliary bridge balances during the measurement. A careful choice of the network topology allows the bridge to be self-compensating: the 4TP definition is in large part achieved by the behavior of the network itself without any adjustment. The additional circuitry required for impedance definition can therefore be simpler, the balancing procedure becomes easier, and a more robust 4TP can be achieved. This paper analyzes a current comparator bridge network with a topology featuring self-compensation. A digitally assisted test bridge has been implemented; test measurements on ac resistance comparison in the 25–100- $\Omega $ range at kilohertz frequencies are reported. [ABSTRACT FROM AUTHOR]

We present the latest improvements in the traceable measurement and generation of small electric currents. A central tool in our traceability chain for small direct currents is a new binary cryogenic current comparator (CCC) with a total of 18 276 turns. This 14-bit CCC is well suited for the calibration of high-value resistors and current amplifiers, but also for the direct amplification of small currents. A noise level of 5 fA/ \surd Hz at 0.05 Hz is routinely achieved. The systematic uncertainty due to noise rectification was exemplarily investigated in a ratio-error test configuration, showing that a total uncertainty of about one part in 10^{6} can be achieved at 100 pA. For further improvement, a new instrument was developed, the ultrastable low-noise current amplifier (ULCA). Its transfer coefficient is highly stable versus time, temperature, and current amplitude within a full dynamic range of ±5 nA. The ULCA is calibrated with the 14-bit CCC at high current amplitude, and allows the measurement or generation of 100-pA direct current with an uncertainty of one part in 10^{7}$ . The novel setup was successfully used to investigate the uncertainty of the established capacitor charging method. A quantum metrology triangle experiment based on the presented instruments is proposed. [ABSTRACT FROM PUBLISHER]

A setup based on a direct current (dc) comparator, typically employed in high-current low-resistance calibrations, has been developed for the accurate calibration of dc current ratios for dc currents up to 600 A. For primary currents above 100 A, multiple turns of the primary conductor are made through the device under test. A full uncertainty analysis reveals that the 1 part in 10^6 total expanded uncertainty ( $k = 2$ ) in a calibration of a zero-flux device is limited by the behavior of the device, in particular the instability and sensitivity to the position of the primary current conductor. [ABSTRACT FROM PUBLISHER]

A new current-comparator-based dual-channel calibration system for AC currents and AC voltages in the millivolt range has been developed. The range of generated currents is 1 mA–5 A, and the range of generated voltages is 1–500 mV. The calibration system in-phase and quadrature expanded measurement uncertainties ( $k=2$ ) are within 25\cdot 10^{\mathrm {\mathbf {-6}}} . Although the system has been developed primarily for operation at power frequencies, it is also capable of operating at frequencies up to 1000 Hz with slightly increased uncertainties. The traceability to SI units is established through the calibration of AC voltage by means of AC/DC transfer and DC voltage reference, standard resistor, capacitor, and current comparator ratios. [ABSTRACT FROM PUBLISHER]

We present here the concept of three-arm current comparator impedance bridge, which allows one to perform comparisons among three unlike impedances. Its purpose is the calibration of impedances having arbitrary phase angles against calibrated nearly pure impedances. An analysis of the bridge optimal setting and proper operation is presented. To test the concept, a two-terminal-pair digitally assisted bridge has been realized; preliminary measurements of an air-core inductor and of an $RC$ network versus decadic resistance and capacitance standards, at kilohertz frequency, have been performed. The bridge measurements are compatible with previous knowledge of the standard values with relative deviations of parts in 10^{-5} . [ABSTRACT FROM PUBLISHER]

The homogeneity of the lattice spacing of silicon single crystals was investigated by a self-referenced lattice comparator. Strain measurements were performed on single crystals from an ^28 Si ingot (Avo28), which was used to determine the Avogadro constant. A swirl pattern was observed for sample 9.R1 cut from the tail side of the Avo28 ingot. The lattice spacing distribution of seed-side sample 4.R1 was smooth and homogeneous. The lattice spacing distribution was larger for the sample with higher impurities of carbon and oxygen. [ABSTRACT FROM PUBLISHER]

This paper presents the design and implementation of a rail-to-rail 460-kS/s 10-bit successive approximation register analog-to-digital converter (ADC) for the power-efficient capacitance measurement. The specifications of ADC are optimized at system level, emphasizing the ADC following a switched-capacitor capacitance-to-voltage (C2V) converter. To be compatible to the output of C2V, a bootstrap switch with body effect reduction is adopted to provide the rail-to-rail processing ability. The charge redistribution converter is implemented by a single-ended cascaded binary-weighted capacitive digital-to-analog converter (DAC). The total area of the DAC array is not only limited by the matching behavior but also by the noise performance of C2V. To relax the settling requirement and improve the power efficiency, self-timing technique is employed which borrows extra half clock period for open-loop settling of preamps. The balance between noise and power consumption of dynamic comparator with preamps is also considered. The ADC circuit was implemented in 0.18- \mu m CMOS technology and occupies an active area of 0.18 \mathrm{mm}^{2} . The tested prototype achieves a signal-to-noise-plus-distortion ratio of 54 dB and a spurious-free dynamic range of 68 dB. The integral nonlinearity and differential nonlinearity are 0.5 and 0.34 least-significant-bit, respectively. The total power consumption is 21 \mu $ W corresponding to 110 fJ/conversion-step figure of merit. [ABSTRACT FROM PUBLISHER]

This paper presents the results of a comparison of active/reactive power meter calibrations between the National Institute of Standards and Technology and National Research Council. The comparison was implemented using a transfer standard consisting of a highly stable commercial sampling-type power/energy meter. Active and reactive power measurements were made at 120 V, 5 A, 50 Hz, and 60 Hz. For active power, the measurements were made at applied current phase angles of 0°, +60°, and −60°. For reactive power, the measurements were made at applied current phase angles of +60°, +90°, −60°, and −90°. The results of the comparison indicate agreement to within the stated uncertainties of the participants.11

Contribution of the National Institute of Standards and Technology, U.S. Department of Commerce, not subject to copyright in the United States. [ABSTRACT FROM PUBLISHER]

The development and testing results of a new current transformer (CT) test set at Physikalisch-Technische Bundesanstalt are described. The operation range for the ratio based bridge is intended for frequencies from 16.7 Hz up to 20 kHz. Equal setups of magnetically shielded current comparators with primary windings for rated currents from 100 mA up to 5 A convert the secondary currents of the standard CT and of the transformer under test (TUT) into proportional voltages. The errors of the TUT are calculated from the subsequent measurement of the complex voltage ratio. This current bridge and the voltage-ratio-based method allow comparing CTs with nonequal ratios. At 50 Hz, the measuring system offers an extended measurement uncertainty of less than 2 ppm or \(\mu \) rad, respectively. The bridge is verified for use with uncertainties of below 200 ppm or 400 \(\mu \) rad at a frequency of 20 kHz. [ABSTRACT FROM PUBLISHER]