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The necessity for a radiation-tolerant communication link, compatible with a wide range of devices, has prompted the study of different solutions than those currently employed at CERN. With Ethernet being one of the most established communication protocols for commercial and industrial applications, most of the efforts were concentrated toward that direction. To evaluate the feasibility of using this protocol in the radiation environment of CERN, several Ethernet-based solutions have been implemented based on a system on chip (SoC), in which a flash-based field-programmable gate array (FPGA) and a μ controller coexist, making the system highly configurable. The proposed solutions are qualified at the system level using accelerated testing means, in order to compare their performances. The results of this study are then used to estimate the reliability of the different solutions using classic models, considering a variety of different installation scenarios inside the Large Hadron Collider (LHC) tunnel. [ABSTRACT FROM AUTHOR]

RTG4 total ionizing dose (TID) tolerance is investigated postdynamic burn-in (DBI). A VT shift of the programmed Pflash cell is observed post-DBI and is due to programming voltage degradation resulting from the DAC aging. TID testing performed post-DBI shows DBI has minimum impact on RTG4 C-flash TID tolerance since it is dominated by Nflash VT shift. The programmed Pflash VT shift is the dominant effect post-DBI, whereas the erased Nflash VT shift is the dominant effect post-TID. [ABSTRACT FROM PUBLISHER]

HfO2-based resistive RAMs have been irradiated with high-linear energy transfer heavy ions and subjected to an extensive characterization, showing that the cells are immune from upsets. No relevant changes were observed in the irradiated cells on resistance distribution and programming voltages. The irradiation experiment has been performed without any applied bias (retention mode). Reasons for the observed hardness are discussed using physics-based simulations. Moreover, simulations put in evidence that the cell might be sensitive if it is struck during a read operation, since the applied read voltage prevents the instantaneous recombination of the generated defects due to the Coulomb interaction between oxygen ions and vacancies. [ABSTRACT FROM PUBLISHER]

Reliability test results of data retention and total ionizing dose (TID) in 65 nm Flash-based field programmable gate array (FPGA) are presented. Long-chain inverter design is recommended for reliability evaluation because it is the worst case design for both effects. Based on preliminary test data, both issues are unified and modeled by one natural decay equation. The relative contributions of TID induced threshold-voltage shift and retention mechanisms are evaluated by analyzing test data. [ABSTRACT FROM PUBLISHER]

The recent introduction of advanced hardware architectures such as the Micro Telecommunications Computing Architecture (MTCA) caused a change in the approach to implementation of control schemes in many fields. The development has been moving away from traditional programming languages (C/C++), to hardware description languages (VHDL, Verilog), which are used in FPGA development. With MATLAB/Simulink it is possible to describe complex systems with block diagrams and simulate their behavior. Those diagrams are then used by the HDL experts to implement exactly the required functionality in hardware. Both the porting of existing applications and adaptation of new ones require a lot of development time from them. To solve this, Xilinx System Generator, a toolbox for MATLAB/Simulink, allows rapid prototyping of those block diagrams using hardware modelling. It is still up to the firmware developer to merge this structure with the hardware-dependent HDL project. This prevents the application engineer from quickly verifying the proposed schemes in real hardware. The framework described in this article overcomes these challenges, offering a hardware-independent library of components that can be used in Simulink/System Generator models. The components are subsequently translated into VHDL entities and integrated with a pre-prepared VHDL project template. Furthermore, the entire implementation process is run in the background, giving the user an almost one-click path from control scheme modelling and simulation to bit-file generation. This approach allows the application engineers to quickly develop new schemes and test them in real hardware environment. The applications may range from simple data logging or signal generation ones to very advanced controllers. Taking advantage of the Simulink simulation capabilities and user-friendly hardware implementation routines, the framework significantly decreases the development time of FPGA-based applications. [ABSTRACT FROM PUBLISHER]

Proper operation of FELs such as the Free-Electron Laser in Hamburg (FLASH)and the European X-Ray Free-Electron Laser (XFEL), which is currently under construction in Hamburg at DESY, requires many specific subsystems to be synchronized with a precision exceeding 10 femtoseconds. Those components are often separated by several hundred meters at FLASH or even kilometers in case of the European XFEL. Such distances mean that it is extremely difficult to use only conventional RF signal distribution in coaxial cables for synchronization because of high losses and excessive phase drifts, while electromagnetic interference is also an issue. Therefore, a laser-based synchronization scheme can be employed in parallel. In this case, the synchronization signals are transmitted via length-stabilized optical fibers. Such an architecture is currently being used at FLASH and will also be the main means of synchronization at the European XFEL. The hardware for such a synchronization system consists of many optical elements such as commercial lasers and self-built free-space and fiber optic setups. However, a significant part of it is also the electronics responsible for control, diagnostics and signal processing as well as high-level servers and front-end software running on those devices. Currently, the VME standard is used throughout FLASH as the basis for the control system digital hardware. For the European XFEL, however, an architecture with a high level of reliability and availability is required as well as one with higher data acquisition and processing rates. Because of that, the Micro Telecommunications Computing Architecture (\muTCA) had been chosen. It is a fairly new standard, provides significantly better performance and employs modern technological solutions making it more suitable for modern accelerator applications than the older VME architecture. The paper presents the latest improvements in the control software for the optical synchronization system based on the VME standard. Servers for phase-locking the lasers as well as controlling the fiber link stabilization units are described in detail. Plans for migration to the new infrastructure are also outlined. [ABSTRACT FROM AUTHOR]

Heavy-ion irradiation of NAND flash memories under operating conditions leads to errors with complex, data-dependent signatures. We present upsets due to hits in the floating gate array and in the peripheral circuitry, discussing their peculiarities in terms of pattern dependence and annealing. We also illustrate single event functional interruptions, which lead to errors during erase and program operations. To account for all the phenomena we observe during and after irradiation, we propose an ldquoeffective cross section,rdquo which takes into account the array and peripheral circuitry contributions to the SEU sensitivity, as well as the operating conditions. [ABSTRACT FROM PUBLISHER]

Heavy ion irradiation of flash memories shows loss of stored data. The fluence dependence is indicative of microdose effects. Other qualitative factors identifying the effect as microdose are discussed. The data is presented, and compared to statistical results of a microdose target-based model. [ABSTRACT FROM AUTHOR]

Radiation effects on analog and mixed signal semiconductor devices are a major concern in space and nuclear applications. Significant degradation has been observed in A/D converters in a radiation environment. In fact, recent advances in A/D converters have further reduced the radiation tolerance of these converters on account of their complex circuitry. This paper studies the effects of gamma radiation on several properties (offset error, gain error, integral non linearity etc.) of a whole range of A/D converters under biased conditions. A comparative study of their performance is presented. Four major types of A/D converters, namely- flash, successive approximation, integrating and sigma-delta type, are selected for a detailed evaluation and comparison. Significant degradation of the power supply currents was observed in the biased samples during radiation. Significant improvement in radiation tolerance after adjustment of the offset and calibration registers in the high resolution sigma delta converters can be achieved. All the results and experimental observations are presented [ABSTRACT FROM PUBLISHER]