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High resolution γ-ray spectroscopy measurements at MHz counting rates were carried out at nuclear accelerators, combining a LaBr 3(Ce) detector with dedicated hardware and software solutions based on digitization and off-line analysis. Spectra were measured at counting rates up to 4 MHz, with little or no degradation of the energy resolution, adopting a pile up rejection algorithm. The reported results represent a step forward towards the final goal of high resolution γ-ray spectroscopy measurements on a burning plasma device.

The inherent parallelism of the logic resources, the flexibility in its configuration and the performance at high processing frequencies makes the field programmable gate array (FPGA) the most suitable device to be used both for real time algorithm processing and data transfer in instrumentation modules. Moreover, the reconfigurability of these FPGA based modules enables exploiting different applications on the same module. When using a reconfigurable module for various applications, the availability of a common interface library for easier implementation of the algorithms on the FPGA leads to more efficient development. The FPGA configuration is usually specified in a hardware description language (HDL) or other higher level descriptive language. The critical paths, such as the management of internal hardware clocks that require deep knowledge of the module behavior shall be implemented in HDL to optimize the timing constraints. The common interface library should include these critical paths, freeing the application designer from hardware complexity and able to choose any of the available high-level abstraction languages for the algorithm implementation. With this purpose a modular Verilog code was developed for the Virtex 4 FPGA of the in-house Transient Recorder and Processor (TRP) hardware module, based on the Advanced Telecommunications Computing Architecture (ATCA), with eight channels sampling at up to 400 MSamples/s (MSPS). The TRP was designed to perform real time Pulse Height Analysis (PHA), Pulse Shape Discrimination (PSD) and Pile-Up Rejection (PUR) algorithms at a high count rate (few Mevent/s). A brief description of this modular code is presented and examples of its use as an interface with end user algorithms, including a PHA with PUR, are described.

This article presents an event and pulse node hardware module (EPN) developed for use in control and data acquisition (CODAC) in current and upcoming long discharges nuclear fusion experiments. Its purpose is to allow real time event management and trigger distribution. The use of a mixture of digital signal processing and field programmable gate arrays, with fiber optic channels for event broadcast between CODAC nodes, and short length paths between the EPN and CODAC hardware, allows an effective and low latency communication path. This hardware will be integrated in the ISTTOK CODAC to allow long AC plasma discharges.

Data acquisition on the ISTTOK tokamak is being upgraded from VME to PCI using a general purpose especially developed transient recorder PCI acquisition board with 8 galvanic isolated 14 bit, 2 MSamples/sec channels, 512 Mbytes of SDRAM, and integrated FPGA/DSP capabilities. Due to the wide range of ISTTOK signal spectrum, data-reduction is crucial to efficiently use data retrieval and analysis systems. To avoid long latency offline processing and also to allow real-time control implemented in the DSP, multi-rate real time decimation in the FPGA has been implemented. This paper describes the data processing techniques developed using either FIR or cascaded-integrator-comb CIC filters. A digital DC baseline restorer was also implemented in the FPGA.

This paper presents a new reconfigurable hardware platform which uses both digital signal processors (DSP) and field programmable gate arrays (FPGA) to attain high resolution and real-time processing in nuclear spectrometry experiments. The module was designed in order to provide a high digital pulse processing (DPP) yield with the capacity of being reconfigurable according to the experimental conditions and the desired data output. This allows unprecedented real time processing capabilities implemented in the FPGA such as pulse pileup correction through adaptive filtering and effective signal-to-noise ratio (SNR) control and optimization. The module uses a Virtex-II Pro FPGA (Xilinx) and a DSP from the TMS320C64xx family (Texas Instruments) and is implemented on a PCI board to be used in a host workstation. Special emphasis is given to the scalability of the module along with the potential capacity of being used as a portable stand-alone instrument. This reconfigurable hardware platform allows us to simultaneously benefit from the advantages of the hardware based digital spectrometers, namely, their high throughput, and of the flexibility of the software based configurations. Besides, this same platform can be used as a general purpose high-speed data acquisition and processing unit.

This paper describes an inexpensive and innovative VME transient recorder module, with 64 multiplexed analog input channels, 12-bit resolution, sampling rate up to 666 kSPS and 2 Words of local memory providing standalone operation capability. This module was developed for the operation control of the tokamak ISTTOK. Its architecture takes advantage of the large scale integration and improved dynamic performance of recently developed devices. The main operational features are described and methods for assessing the performance are discussed. The experimental results already obtained as well as the philosophy of operation and programmability of this module suggest its adequacy to the monitoring of a large and complex nuclear physics experiment.