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A comprehensive framework for mining wireless Ad Hoc Sensor Networks (WASNs) is proposed. Findings reveal the efficiency of the proposed framework.

An efficient parallel implementation of neural networks on mesh-connected SIMD machines is discussed.

An innovative transport-aware Internet protocol (IP) router architecture is described and discussed.

An innovative distributed deadlock mechanism is proposed and discussed.

An algorithm for the gossiping problem, defined over an n processor network, N, where multicasting is allowed,?is described and discussed. ?

An approach is described for for enabling network and Web server clients to evaluate a system's multiclass mechanisms and parameters.

Two distributed and randomized algorithms for initializing single-hop wireless ad hoc networks are described and discussed.

Multihop routing, which is used to minimize the number of wavelengths for?all-to-all broadcasting (gossiping), is examined and discussed.

Routing permutations in a class of switch-based interconnects are examined and discussed.

The genetic algorithm (GA), tabu search (TS), and the ant colony algorithm (ACA) are used to solve the reporting cells planning problem.

Design of a k-fold multicast network is described and discussed.

A fair resource allocation protocol for wireless multimedia networks is described. It relies on a combination of bandwidth reservation and bandwidth borrowing to ensure quality of service (QoS).

Queuing network models for the performance analysis of Single Program Multiple Data (SPMD) applications, running on general-purpose parallel architectures such as multiple Instruction Multiple Data (MIMD) and clusters of workstations, are examined and discussed.

The In-Transit Buffer (ITB) mechanism is discussed as a means of improving the performance of networks with source routing and wormhole switching.

A method is proposed for synthesizing networks that satisfy multiple requirements, such as high reliability, low diameter or good embeddability. The method employs a filtration process that takes a large set of randomly generated graphs as inputs, filtering out those that do not meet specified requirements.

An approach to the design of wireless sensor networks is described that reduces MAC address size.

The architecture and related communications protocols of an innovative processor-to-processor interconnection network, called Gemini, is described and discussed.

The concept of a restricted area for conducting message routing and balancing buffer utilization is proposed. The aim is to minimize traffic congestion.

The In-Transit Buffer (ITB) is proposed as a mechanism for improving performance in networks with source routing and wormhole switching. The mechanism is evaluated using the Myrinet network.

Topological properties of Optical Transpose Interconnection Systems (OTIS) are investigated. Tools are described for deriving various topological properties for a wide class of OTIS networks.

An innovative scheduling scheme, called Elastic Round Robin, is proposed. The scheme satisfies needs of wormhole switching.

An input queue-based switch architecture called HIPIQS (High-Performance Input-Queued Switch) is described. HIPIQS offers low latency for diverse message sizes, and it provides throughput comparable to that of output queuing techniques.

An all-to-all broadcast algorithm is proposed, for multidimensional all-port mesh and torus networks. A broadcast pattern is described that ensures a balanced traffic load in all of a network's dimensions, allowing the all-to-all broadcast algorithm to achieve near-optimal transmission time.

A single, unified theory is described for design of deadlock-free fully adaptive routing algorithms for all classes of network topologies and all switching procedures. A general theory is proposed that applies to direct and indirect networks, and to regular and irregular networks.

A time-optimal solution is discussed, for any Cayley network. Rings, hypercubes, cube-connected cycles and butterflies are types of Cayley networks that can make use of this solution.

Efficient multicasting with reduced link contention on irregular switch-based cut-through interconnection using up/down (UD) routing and unicast message passing is examined. It is demonstrated that for an arbitrary irregular network with UD routing, it is not possible to create an ordered list of nodes to implement an arbitrary multicast in a link contention-free manner with a minimal number of communication steps. Three multicast algorithms are proposed.

Communications research shows that cartesian product graphs meet multiple closure properties in static shortest-path systems for all-to-all communication. Some static systems reduce edge congestion in communication networks. A generic factor-routing scheme is described. Edge congestion of product graphs are discussed and illustrated, together with congestion density.

An analysis of the Nectar project shows that network-based multicomputers using general networks are a practical architecture. They offer the advantages of heterogeneity, system code, reusability of softwares and resource sharing. They also support high bandwidth and low latency communication. The combination of computing power and memory by the applications helps to achieve high-speed program execution in the Nectar systems. Parallelization and porting effort are minimized. Traffic characterization for multicomputing networks is provided.

The Fiber Distributed Data Interface (FDDI)-based reconfigurable network (FBRN) developed from multiple FDDI token rings is suitable for mission-critical applications. A reconfiguration algorithm developed for FBRNs improves the bandwidth availability of FBRN. The algorithm exhibits polynomial time complexity and provides optimal bandwidth for a given fault pattern. The performance analysis of the optimal algorithm leads to an upper bound on the performance of any other reconfiguration algorithm.

A modification of the LRU replacement algorithm for local area network (LAN) remote caching architecture significantly decreases replication and improves performance over a broad range of parameters. The one-copy-heuristic algorithm resorts to buffer partitioning, which works well in a LAN environment. Two versions of the algorithm, in which sites update the LRU stack for local memory references, and in which sites update LRU stacks for global references are examined. The effectiveness of the algorithm is nearly optimal in an environment where performance is memory-limited.

A new analytical model that is flexible and time-effective helps examine the tradeoff between superscalar processors, superpipelined processors and multiprocessors and the performance of coarse-grained and fine-grain parallelism systems. The performance limit of the three processor systems agrees with the previously observed fetch bottleneck. The model reveals that the number of pipelines that yield a maximum throughput at high memory access time are sensitive to the ratio between memory access time and network access delay. The optimum number and throughput of the processors exhibit a linear and nonlinear variance with the interiteration dependence distance.

A proposed processor architecture is designed for A1 applications involving knowledge representation by semantic networks. The Semantic Network Array Processor allows the direct application of high level instructions in hardware, contributing mainly to the system's superior performance. Since the processor has the capability to deal with several markers simultaneously, parallel applications of instructions are possible.

A new shortest path routing algorithm is developed for measuring the topological properties of crossed cubes in interconnection networks.

Periodically regular chordal (PRC) ring networks were proposed as a compromise for combining low node degree with small diameter. In the past, chordal rings were proposed as networks that combined simple routing framework of rings with the lower diameter, wider bisection and higher resilience of other architectures. Observations showed that if the assumption that each node had exactly one skip link were relaxed, richer and sparser interconnections would result without undue complications for routing algorithms.

Research was conducted to examine two important features related to the performance of parallel applications on shared memory parallel architectures, namely, parallel system overheads and network bandwidth. Five applications were considered using three simulated shared memory parallel architectures and an execution-driven simulator called Simulator for Parallel Architectural Scalability Measurements. Results indicate that network technologies that support 200-300 MBytes/sec link bandwidth are enough to maintain the network overheads with acceptable bounds.

The architecture of a flexible router whose routing and switching policies can be tailored for flexible selection and implementation is described. This design is advantageous in several ways. These include having the ability to allow the router policies to be tailored to the underlying application needs and the capability to address bimodal workloads. To make the architecture cost-effective, a programmable control of the shorter, more complex steps that is shared among several channels is incorporated.

Experiments were performed to analyze the submesh reliability of two-dimensional meshes using the perfect recognition allocation algorithm and to develop an approximation method for mesh systems with low computational complexity. The partitioned model (PM) for the mesh system was derived by decomposing the system and applying the principle of inclusion and exclusion wherein, the reliability formula was expressed in two terms and one variable. The findings showed the advantages of the PM over other models of estimating submesh reliability.

A framework for the application of hashing functions on resolving parallel operational problems in data bases contained in networked architectures was examined. A synthetic workload and real-world data such as fingerprints were utilized as sample data bases. The findings showed the competitive performance of the framework which exhibited ideal scalability features, its effectiveness in maintaining the integrity of large data bases and its easy application in parallel and multicomputer architectures.