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The capacitor condition monitoring is an important issue for the reliable operation of modular multilevel converters (MMCs) in high-voltage applications. The numerous capacitors make the monitoring for the capacitor condition complex and computation-consuming. This paper proposes a hierarchic capacitor condition monitoring strategy to assure the reliability of high-voltage MMCs. In the strategy, the switching times of the switching signals are counted to detect the condition of the capacitor in each submodule (SM). Then, the subsequent capacitance calculation method is only conducted to the abnormal capacitors indicated by the above condition detection algorithm. Meanwhile, the variations of the measured and reference capacitor voltages are employed to calculate the capacitance in the proposed method. The condition detection algorithm shrinks the scope where the abnormal capacitors locate, which avoids calculating the total capacitances in MMCs. In the proposed capacitance calculation method, the complex operations are further saved. Both the two measures reduce the computation burden effectively. The implementation of the whole monitoring strategy is simple and fit for high-voltage MMCs. Moreover, the strategy has no adverse influence on the normal operation of MMCs. The effectiveness of the proposed strategy is verified by the simulation studies with the professional tool Matlab/Simulink. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC), owing to the presence of a large number of submodules (SMs) and energy storing elements, requires a large footprint and initial investment. To address these issues, this paper proposes the switched modular multilevel converter (SMMC). It consists of two major elements; the chain-links (CLs), consisting of cascade connection of SMs as in MMC, and the single-pole-triple-throw (SPTT) switches, which can be realized using either the T-type or NPC-type switch strings. The SMMC works on the principle of connecting all the phase-legs in series and their respective positions are mutually interchanged. It offers a compact structure as the SMs count is reduced to 33% of MMC, which results in a much lower energy storage requirement. Furthermore, it does not have inter-phase circulating current problem and hence the CL inductors can also be avoided. The SMMC structure, operating principles, control, and modulation schemes are explained in detail. A detailed comparison of SMMC with the other major existing converters is carried out to highlight the important features of SMMC. The efficacy of SMMC is validated using PSCAD simulation studies with a 19-level grid-connected SMMC model. A 3-phase 19-level SMMC laboratory prototype is developed to further validate its feasibility. [ABSTRACT FROM AUTHOR]

Modular multilevel converters (MMCs) in high- voltage applications contain large numbers of power switches, which increases the fault probability inside MMCs. This paper proposes a detection method for the faulty arm containing switch open-circuit failures in high-voltage MMCs to improve the reliable operations of MMCs. The proposed method uses the periodicity of the deviation between the maximum and minimum capacitor voltages to provide the detection reference. To yield a reliable reference, the repetitive signal generator is employed. Then, the fault is identified by the difference between the referenced and measured capacitor voltage deviations. An auxiliary criterion is also designated to avoid the false detection caused by the mutations in MMCs. The proposed method can reduce the difficulty in the selection of thresholds. Moreover, the proposed method is robust in high-voltage MMCs with inferior capacitor voltage balancing performance, which ensures detection rapidity and accuracy. Finally, the feasibility of the method is verified by simulation results in Matlab/Simulink. [ABSTRACT FROM AUTHOR]

Different from typical circuit breakers, breakers used to switch AC filters in convertor stations have to operate frequently according to the real-time operation mode and daily load changes. Therefore, the performance of filter breakers decreases very quickly, which leads to frequent accidents. Both preinsertion resistors and controlled switching devices can suppress switching transients. In this paper, a comparative analysis of whether a controlled switching device and preinsertion resistor should be adopted is carried out using PSCAD. The transient is calculated as the combined result of the switching angle and preinsertion resistor value, and the optimal configurations are proposed. After determining the resistor value and whether a controlled switching device should be included, the reference voltage of the arrester should be reevaluated. [ABSTRACT FROM AUTHOR]

Voltage source converters (VSCs) have been extensively used in power systems for interfacing renewable energies and other modern loads. Because of their nonlinear nature, a proper harmonic model of VSC devices must be established when conducting harmonic analyses in power systems. This is especially true for low-order harmonics, which are routinely encountered in present power systems. To this end, an analytical harmonic model that represents the low-order harmonic characteristics of VSCs is developed in this paper. The new model takes both the control loop and power loop (i.e., DC-link capacitor) of the VSC into account through rigorous mathematical derivations. The final result has shown that the VSC can be represented by a harmonically coupled impedance matrix at harmonic frequencies, which can be easily used for harmonic analyses of large-scale power systems. It also shows that the DC-link capacitor has a more noticeable impact on the harmonic impedance of VSCs with a smaller DC-link capacitance and low-order harmonics. The appropriateness of the new model was verified using EMT simulations and lab experiments. A complete procedure to construct the proposed VSC model is also established based on the research findings. [ABSTRACT FROM AUTHOR]

The missing capability of DC fault current limitation is an inherent disadvantage in the typical half-bridge modular multilevel converter (MMC), which restricts its application in long-distance high voltage direct current (HVDC) systems. The full-bridge submodule (FBSM) and clamped double submodule (CDSM) topologies allow for fault current self-clearing, but also suffer from additional hardware cost and power losses. In this paper, an improved submodule topology utilizing the new reverse-blocking insulated gate bipolar transistor (RB-IGBT) is proposed to improve system economy without compromising its performance. The operating principles and DC fault characteristics of the proposed topology are analyzed in details, including comparison with various topologies in terms of cost, losses, fault current clearing speed and thermal. Compared with the traditional CDSM topology, the proposed RBSM can clear DC faults faster with reduced cost of switching devices. A DC fault protection strategy for MMC-HVDC system is also presented. Simulation results under normal operating, permanent and transient fault conditions are carried out to verify the effectiveness of the proposed topology. [ABSTRACT FROM AUTHOR]

The integration of overhead lines in future MTDC grids leads to a higher fault rate compared to cables. Most of the faults are considered to be non-permanent, so that the line can be reconnected after dielectric recovery. The auto-reclosing procedure in HVDC systems reveals new challenges since multiple restrikes are possible within a short period of time. This paper proposes an auxiliary circuit for DC Circuit Breakers (DCCB) which enables to use the DCCB internal capacitor for the line pre-energization. A comprehensive description of the switchgear operations during the pre-energization sequence is provided and the fault property identification method is defined. The method is validated by simulations in a MTDC grid and a sensitivity analysis is carried out using EMTP-RV. [ABSTRACT FROM AUTHOR]