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This paper introduces an averaging control strategy of the phase-unit losses of modular multilevel converters (MMCs). The quantitative analysis of the MMC phase-unit loss distribution under unbalanced ac conditions is carried out by investigating the individual component of the MMC arm currents. It shows that the unbalanced arm currents will result in unbalanced phase-unit losses. To address this issue, this paper proposes a predictive closed-loop-control-based zero-sequence voltage injection method that results in much averaged loss distribution under unbalanced ac conditions. The essence of the new method is that it adjusts the three-phase sinusoidal references so that the unbalanced arm currents are fully utilized to average phase-unit losses. This paper shows the effectiveness of the new approach by electromagnetic transient simulations on PSCAD/EMTDC. [ABSTRACT FROM AUTHOR]

Pole-to-pole dc short circuit fault blocking capability is a major concern when modular multilevel converters (MMCs) are applied in high voltage direct current (HVDC) transmission systems. Traditional MMCs based on half-bridge submodules (HBSMs) cannot block the fault current, thus needing expensive direct current circuit breakers (DCCBs). There are MMCs based on improved submodule topologies that can block dc faults, but usually with significantly increased device cost. This paper proposes an improved HBSM-based MMC (HB-MMC) which needs fewer extra semiconductor devices. The improved HB-MMC is more competitive than other schemes when it comes to investment cost and loss. An H-bridge circuit composed of two director switches and two diode valves is installed around one arm of the HB-MMC, which will not change the direction of current during the normal operation, whereas it can change the direction of the fault current when a pole-to-pole dc short circuits fault is detected. After two director switches have been turned off, a reverse-biased voltage provided by one arm can block the fault current. The topology can be further improved to provide reactive power during faults. Simulation results are presented to validate the features of the proposed improved HB-MMC. [ABSTRACT FROM AUTHOR]

The modular multilevel converter is the state-of-the-art topology for voltage source converter HVDC. Despite its advantages, this converter handles large internal low-frequency energy ripples, and the capacitance that supports these dynamics is a key design parameter that affects the operating region of the converter. Different strategies can be found in the literature to increase the feasible region of operation of the converter. Nevertheless, they are typically open loop in nature and use precalculated control references. This paper presents an alternative based on model predictive control that steers the system through optimal control trajectories that are calculated online. This provides feedback and corrective control action in real time. The predictive controller used for this purpose is presented and a linear time-varying approximation is used to reduce the computational burden of the algorithm. The feasible boundaries of the converter are sought and the final performance of the control algorithm is evaluated through detailed simulations using a switching model of the converter. [ABSTRACT FROM AUTHOR]

In this paper, a static synchronous compensator (STATCOM) operation scheme of the modular multilevel converter adopting clamp double submodules (CDSM-MMC) during a pole-to-pole dc fault is proposed. By analyzing the current paths of a CDSM, this paper proposes three new operation states of the CDSM, which allow the CDSM to provide bipolar voltages when the arm current that flows through it is negative. Through control of the CDSMs to operate in these new states along with the blocked state, the arms of the CDSM-MMC can operate alternately in two different modes, that is, the conducting mode and blocked mode even when the dc-link voltage drops to zero. Thus, the CDSM-MMC is capable of working as a STATCOM during a dc fault. Moreover, a control strategy of the dc-fault STATCOM operation mode is designed to control the reactive power provided by the CDSM-MMC, to limit the dc fault current, and to reserve and balance the energies stored in capacitors. Simulation results conducted in PSCAD/EMTDC demonstrate the validity of the proposed STATCOM operation scheme and control strategy of the CDSM-MMC during a pole-to-pole dc fault. [ABSTRACT FROM AUTHOR]

Modular multilevel converters (MMCs) have become one of the most promising topologies for high-voltage dc–ac conversion. DC-side fault blocking capability of the MMC has prompted significant research in recent years. In this paper, a new switched capacitor submodule (SCSM) for MMCs is proposed which provides operation with DC fault blocking capability. In addition, successful voltage balancing is achieved with half the number of voltage sensors used with existing MMC cells. Generally, conventional sensor-based balancing techniques require a significant amount of measurements, 2m(N-1) voltage sensors, and 2m current sensors for an N-level m-phase MMC. The proposed cell will thus aid in reducing the complexity of the control system. A detailed illustration of the operational concept of the proposed architecture is presented in this paper. A comparison between the proposed SCSM and other existing MMC cells has been included to highlight the benefits of the proposed SCSM. A simulation model for an MMC-based HVDC system along with the proposed cell has been built to test its performance during normal as well as abnormal operating conditions. The simulation results show the effectiveness of the proposed architecture. [ABSTRACT FROM PUBLISHER]

This paper investigates the applicability of averaged-value models (AVMs) for modular multilevel converters (MMCs) operating in a voltage-sourced converter-based-high-voltage dc (VSC-HVDC) grid. The AVM models are benchmarked by comparison with a detailed electromagnetic transient model of the grid, including a fully detailed MMC model. Analysis results show that the AVM is only effective as long as the capacitors are large enough to maintain nearly constant voltage across each MMC submodule. This paper also shows that previously developed MMC averaged models are not able to accurately simulate the transients under dc fault conditions. This paper introduces topology changes to a previously proposed averaged model that results in much improved simulation for such conditions. This paper also shows that the model can be used effectively to study HVDC grids with significant time savings. [ABSTRACT FROM AUTHOR]

This paper proposes a model predictive control (MPC) method for modular-multilevel-converter (MMC) high-voltage direct current (HVDC). To control the MMC-HVDC system properly, the ac current, circulating current, and submodule (SM) capacitor voltage are taken into consideration. The existing MPC methods for the MMC-HVDC system utilize weighting factors to configure the cost function in combinations of the SM capacitor voltage balancing algorithm, ac current control, and circulating current control. Because all combinations of the switch states are considered in order to minimize the cost function, their possible combinations increase geometrically according to the increase of the level of the MMC, which is a significant disadvantage. This paper proposes a new MPC method with a reduced number of states for ac current control, circulating current control, and the SM capacitor voltage-balancing algorithm. The proposed cost functions are divided into three types according to their control purposes. Each cost function determines the minimum number of states for controlling the ac current, circulating current, and SM capacitor voltage. The efficacy of the proposed controlling method is verified through simulation results using PSCAD/EMTDC. [ABSTRACT FROM AUTHOR]

The model of a modular multilevel converter (MMC) determines the extent of critical circuit information that electromagnetic transient simulations can reveal. In this paper, two MMC models are proposed for efficient real-time hardware-in-the-loop (HIL) emulation on the field-programmable-gate-arrays (FPGA). The nonlinear switch-based model employing the insulated-gate bipolar transistor (IGBT) dynamic curve-fitting model considers factors affecting its transient performance so that device-level behavior such as power loss and junction temperature can be reproduced accurately in the electro-magnetic-thermal simulation of a power converter for its design evaluation. Meanwhile, regarding the MMC submodule as a transmission line stub achieves faster computation speed and enables the formation of a hybrid arm to save FPGA hardware resources. As the large network that the MMC presents is burdensome for real-time execution with a small time-step, circuit simplification based on partitioning and merging is conducted. Hardware implementation of a three-terminal high-voltage direct-current system containing an MMC-based dc–dc converter is carried out and the efficacy of proposed models is validated by comparing HIL emulation results with the offline simulation tool PSCAD/EMTDC. [ABSTRACT FROM AUTHOR]

Recently, a modular multilevel converter (MMC) has become one of the most popular converters in medium/high-power applications. In this paper, a new technique is presented to decrease the computational time of the MMC by using switching state grouping for the predictive controller. The proposed technique has the ability to control the output current, minimize the circulating currents, and balance all capacitor voltages, simultaneously. For a predefined number of MMC submodules, the number available switching states is known. The proposed technique uses two stages of predictive modules. In the first stage, the switching states of the MMC are divided equally into a number of groups, controlled simultaneously by the same number of predictive modules. The optimal number of the switching state groups in the first stage is obtained. In the second stage, only one predictive module is used to obtain the optimal switching state of the MMC without any other complexities or additional sorting controllers. The effectiveness of the proposed control technique has been verified by using MATLAB/SIMULINK software considering steady state and dynamic analysis. The results of the proposed technique are compared with the conventional one in terms of computation time, verifying better performance of the proposed method. [ABSTRACT FROM PUBLISHER]

This paper reveals the existence of poorly damped resonant modes in the modular multilevel converter (MMC) that can result in harmonic instability. A small-signal model based on dynamic phasors is introduced which takes into consideration the dynamics of internal variables, such as circulating arm currents, which have a tendency for a large second harmonic component and module capacitor voltage ripple, which has other harmonic components. The small-signal model is validated by comparison with the electromagnetic transient simulation of a detailed model. It is shown that the use of an active circulating current suppressing scheme can effectively improve the damping of internal harmonic modes in comparison with a passive filter used for the same purpose. The damping of internal harmonic modes has been shown to be significantly impacted by the gains of the MMC's outer-loop controller but is less sensitive to the ac system strength or the gain of the phase-locked loop. A larger arm resistance also increases the damping of these internal modes. [ABSTRACT FROM PUBLISHER]

This paper describes a modified phase-shifted carrier-based pulsewidth-modulation (PSC-PWM) scheme for modular multilevel converters (MMC). In order to reduce the average device switching frequency, a reduced switching-frequency (RSF) voltage balancing algorithm is developed. This paper also proposes a circulating current suppressing controller (CCSC) to minimize the inner circulating current in an MMC. Based on the double line-frequency, negative-sequence rotational frame, the three-phase alternative circulating currents are decomposed into two dc components and are minimized by a pair of proportional integral controllers. Simulation results based on a detailed PSCAD/EMTDC model prove the effectiveness of the modified PSC-PWM method and the RSF voltage-balancing algorithm. The proposed CCSC not only eliminates the inner circulating current but also improves the quality of the converter ac output voltage. A simple loss evaluation demonstrates that the RSF voltage-balancing algorithm and the CCSC reduce the converter power losses. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) has become one of the most promising converter topologies for medium/high-power applications. Since the MMC is structured based upon stacking up a number of series-connected identical submodules (SMs), to improve its fault tolerance and reliability, SM failure detection and location is of significant importance. In this paper, the impact of open-circuit switch failures of the SMs on the operation of the MMC is analyzed. Based on the analysis under SM failure conditions, two SM failure detection and location methods are proposed, that is, a clustering algorithm (CA)-based method and a calculated capacitance (CC)-based method. In the proposed CA-based method, a pattern-recognition-based fault diagnosis approach, which employs the clustering algorithm to detect and locate the faulty SMs with open-switch failures through identifying the pattern of 2-D trajectories of the SM characteristic variables, is developed. The proposed CC-based method is based on the calculation and comparison of a physical component parameter, that is, the nominal SM capacitance, and is capable of failure detection, location, and classification within one stage. The performance of the proposed failure detection methods for an MMC system is evaluated based on time-domain simulation studies in the PSCAD/EMTDC software environment. The reported study results demonstrate the capabilities of the two proposed methods in detecting and locating any SM failure under various conditions accurately and efficiently. [ABSTRACT FROM PUBLISHER]

The large number of voltage levels in a modular multilevel converter (MMC) make staircase modulation a feasible alternative, particularly in high-power applications. However, staircase waveforms do not necessarily mean operation of the MMC submodules (SMs) at the fundamental frequency. This paper presents an analysis of SM switching frequencies in staircase-modulated MMCs and their correlation to the modulation index and load phase angle. A carrier-based pulsewidth-modulation (CB-PWM) equivalent technique is also developed. This analysis demonstrates that CB-PWM techniques provide a similar switching frequency with superior harmonic performance and improved voltage balancing characteristics at all modulation indices compared to staircase modulation. The theoretical analysis is verified with extensive simulation results for MMCs with different SMs and experimental results from a laboratory prototype. [ABSTRACT FROM PUBLISHER]

The three-phase series-connected modular multilevel converter (SC-MMC) is presented as one option for high-voltage direct current (HVDC) tap to reduce the cost of an HVDC station. Compared with conventional three-phase parallel-connected MMC, the number of semiconductor switches in SC-MMC is reduced by one-third to withstand the same dc voltage. First, the paper studies the operating principle of SC-MMC, and then presents an interspacing phase-shifted pulsewidth-modulated method which could improve the waveform of the output ac voltage for a given switching frequency. Next, the control strategy based on the identical real power input of each phase is proposed to balance the dc voltage of each phase under an unbalanced grid condition. The current limit of switching devices is also taken into consideration to protect SC-MMC from overcurrent. Furthermore, a universal zero-sequence current controller is developed as one part of the control strategy. In addition, an innovative method to suppress the third harmonics of ac current is presented. With the third harmonic suppression strategy, the SC-MMC can operate with much smaller SM capacitors without deteriorating the ac current, which contributes to the cost reduction further. Finally, simulation results obtained in PSCAD/EMTDC are provided to validate the proposed control strategies. [ABSTRACT FROM PUBLISHER]

The high voltage direct current transmission system based on modular multilevel converter (MMC-HVDC) technology is now studied and used widely. But traditional half bridge topology of sub module (HBSM) of MMC can't block dc link fault current because of the freewheeling effect of diodes. In order to solve this problem, firstly, this paper improves HBSM topology, a series connected double sub module (SDSM) is designed and dc link fault current blocking capability is realized without tripping ac circuit breaker, so MMC-HVDC with this improved topology can immediately rebuild dc link voltage and resume power transmission. Secondly, the self starting and fault disposing procedure are also designed. At last, simulations in the software PSCAD/EMTDC are carried out to verify its effectiveness and feasibility. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) has become the most promising converter technology for high-voltage direct current (HVDC) transmission systems. However, similar to any other voltage-sourced converter-based HVDC system, MMC-HVDC systems with the half-bridge submodules (SMs) lack the capability of handling dc-side short-circuit faults, which are of severe concern for overhead transmission lines. In this paper, two new SM circuit configurations as well as a hybrid design methodology to embed the dc-fault-handling capability in the MMC-HVDC systems are proposed. By combining the features of various SM configurations, the dc-fault current path through the freewheeling diodes is eliminated and the dc-fault current is enforced to zero. Several MMC configurations based on the proposed hybrid design method and various SM circuits, that is, the half-bridge, the full-bridge, the clamp-double, and the five-level cross-connected SMs, as well as the newly proposed unipolar-voltage full-bridge and three-level cross-connected SMs, are investigated and compared in terms of the dc-fault-handing capability, semiconductor power losses, and component requirements. The studies are carried out based on time-domain simulation in the PSCAD/EMTDC software environment for various SM configurations and dc-fault conditions. The reported study results demonstrate the proposed hybrid-designed MMC-HVDC system based on the combination of the half-bridge and the proposed SM circuits is the optimal design among all evaluated systems in terms of the dc-fault-handing capability, semiconductor power losses, and component requirements. [ABSTRACT FROM PUBLISHER]

Modular multilevel converters (MMCs) may contain numerous insulated-gate bipolar transistors. The modeling of such converters for electromagnetic transient-type (EMT-type) simulations is complex. Detailed models used in MMC-HVDC simulations may require very large computing times. Simplified and averaged models have been proposed in the past to overcome this problem. In this paper, existing averaged and simplified models are improved in order to increase their range of applications. The models are compared and analyzed for different transient events on an MMC-HVDC system. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) is based on the cascaded connection of identical submodules (SMs) enabling additional redundancies. This paper proposes the configuration of the MMC topology with redundant SMs and demonstrates the effects of active redundancies. The proposed configuration decreases the switching frequency per SM while reducing the SM capacitor voltage ripples. An analytical model for determining the SM capacitor voltage ripple and voltage dynamics is derived. The results from the analytical model are compared with the switching model for a 21-level MMC with five redundant (25 in total) SMs per arm. Experimental results based on a single-phase laboratory prototype with five SMs per arm and a single redundant cell further illustrate the operation and verify the derived mathematical model and simulation results. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) is one of the most potential converter topologies for high-power/voltage systems, specifically for high-voltage direct current (HVDC). One of the main technical challenges of an MMC is to eliminate/minimize the circulating currents of converter arms while the capacitor voltages are maintained balanced. This paper proposes a model predictive control (MPC) strategy that takes the advantage of a cost function minimization technique to eliminate the circulating currents and carry out the voltage balancing task of an MMC-based back-to-back HVDC system. A discrete-time mathematical model of the system is derived and a predictive model corresponding to the discrete-time model is developed. The predictive model is used to select the best switching states of each MMC unit based on evaluation and minimization a defined cost function associated with the control objectives of MMC units and the overall HVDC system. The proposed predictive control strategy: 1) enables control of real and reactive power of the HVDC system; 2) achieves capacitor voltage balancing of the MMC units; and 3) mitigates the circulating currents of the MMC units. Performance of the proposed MPC-based strategy for a five-level back-to-back MMC-HVDC is evaluated based on time-domain simulation studies in the PSCAD/EMTDC software environment. The reported study results demonstrate a satisfactory response of the MMC-HVDC station operating based on the proposed MPC strategy, under various conditions. [ABSTRACT FROM AUTHOR]

This paper applies nearest level control (NLC) to the modular multilevel converter (MMC). Since there are a number of submodules (SMs) in high-voltage applications of MMC and all SM voltages are required to be measured and sorted, if the uniform sampling frequency is not high enough, the SM will not be triggered as quickly as possible. Thus, the converter-output voltage levels and voltage harmonics will be affected. A method to systematically analyze the voltage harmonics is presented, considering the uniform sampling frequency. In order to select a proper sampling frequency, two critical values, which significantly influence the output voltage levels and voltage total harmonic distortions, are calculated. Simulation results based on PSCAD/EMTDC proved the validity of the proposed modulation scheme and the importance of a properly selected sampling frequency. [ABSTRACT FROM AUTHOR]