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This paper describes a modified phase-shifted carrier-based pulsewidth-modulation (PSC-PWM) scheme for modular multilevel converters (MMC). In order to reduce the average device switching frequency, a reduced switching-frequency (RSF) voltage balancing algorithm is developed. This paper also proposes a circulating current suppressing controller (CCSC) to minimize the inner circulating current in an MMC. Based on the double line-frequency, negative-sequence rotational frame, the three-phase alternative circulating currents are decomposed into two dc components and are minimized by a pair of proportional integral controllers. Simulation results based on a detailed PSCAD/EMTDC model prove the effectiveness of the modified PSC-PWM method and the RSF voltage-balancing algorithm. The proposed CCSC not only eliminates the inner circulating current but also improves the quality of the converter ac output voltage. A simple loss evaluation demonstrates that the RSF voltage-balancing algorithm and the CCSC reduce the converter power losses. [ABSTRACT FROM AUTHOR]

This paper investigates a new family of converters for high-power transfer between dc buses with different voltage levels. The proposed converters achieve high-voltage dc-dc conversion without an intermediate ac conversion stage. Three converter circuits are investigated, all based on the use of a common switching cell module. The first is a step-down converter, the second is a step-up converter, and the third is an inverting step-up/downconverter. For each converter, the structure is presented, its operation principle is explained, and the design equations are derived. A comparative analysis between the converters is carried out to highlight the merits and limitations of each topology. [ABSTRACT FROM PUBLISHER]

This paper applies nearest level control (NLC) to the modular multilevel converter (MMC). Since there are a number of submodules (SMs) in high-voltage applications of MMC and all SM voltages are required to be measured and sorted, if the uniform sampling frequency is not high enough, the SM will not be triggered as quickly as possible. Thus, the converter-output voltage levels and voltage harmonics will be affected. A method to systematically analyze the voltage harmonics is presented, considering the uniform sampling frequency. In order to select a proper sampling frequency, two critical values, which significantly influence the output voltage levels and voltage total harmonic distortions, are calculated. Simulation results based on PSCAD/EMTDC proved the validity of the proposed modulation scheme and the importance of a properly selected sampling frequency. [ABSTRACT FROM AUTHOR]

This paper presents a neutral point voltage control strategy for the three-level active neutral point clamped (ANPC) converter using selective harmonic elimination pulsewidth modulation (SHE-PWM). The control strategy introduces a small change in the switching angles, which varies the duty cycle of the zero-level switching state, controls the neutral point current and, therefore, the neutral point voltage. The decision to vary a given switching angle takes into account the polarity of the output currents and the voltage across the lower dc-link capacitor. The effectiveness of the proposed strategy is verified through extensive simulation studies and experimentally validated using a low power laboratory prototype. [ABSTRACT FROM AUTHOR]