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This paper describes a modified phase-shifted carrier-based pulsewidth-modulation (PSC-PWM) scheme for modular multilevel converters (MMC). In order to reduce the average device switching frequency, a reduced switching-frequency (RSF) voltage balancing algorithm is developed. This paper also proposes a circulating current suppressing controller (CCSC) to minimize the inner circulating current in an MMC. Based on the double line-frequency, negative-sequence rotational frame, the three-phase alternative circulating currents are decomposed into two dc components and are minimized by a pair of proportional integral controllers. Simulation results based on a detailed PSCAD/EMTDC model prove the effectiveness of the modified PSC-PWM method and the RSF voltage-balancing algorithm. The proposed CCSC not only eliminates the inner circulating current but also improves the quality of the converter ac output voltage. A simple loss evaluation demonstrates that the RSF voltage-balancing algorithm and the CCSC reduce the converter power losses. [ABSTRACT FROM AUTHOR]

The large number of voltage levels in a modular multilevel converter (MMC) make staircase modulation a feasible alternative, particularly in high-power applications. However, staircase waveforms do not necessarily mean operation of the MMC submodules (SMs) at the fundamental frequency. This paper presents an analysis of SM switching frequencies in staircase-modulated MMCs and their correlation to the modulation index and load phase angle. A carrier-based pulsewidth-modulation (CB-PWM) equivalent technique is also developed. This analysis demonstrates that CB-PWM techniques provide a similar switching frequency with superior harmonic performance and improved voltage balancing characteristics at all modulation indices compared to staircase modulation. The theoretical analysis is verified with extensive simulation results for MMCs with different SMs and experimental results from a laboratory prototype. [ABSTRACT FROM PUBLISHER]

This paper presents a neutral point voltage control strategy for the three-level active neutral point clamped (ANPC) converter using selective harmonic elimination pulsewidth modulation (SHE-PWM). The control strategy introduces a small change in the switching angles, which varies the duty cycle of the zero-level switching state, controls the neutral point current and, therefore, the neutral point voltage. The decision to vary a given switching angle takes into account the polarity of the output currents and the voltage across the lower dc-link capacitor. The effectiveness of the proposed strategy is verified through extensive simulation studies and experimentally validated using a low power laboratory prototype. [ABSTRACT FROM AUTHOR]