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The converter transformers are reported to fail generally on the thyristor-valve side, where complex alternating voltage waveforms superimposed with dc voltages would occur. The effect of these waveforms on the failure and endurance of the valve side winding insulation of the transformers is not yet understood, which is investigated here. In this paper, the voltage waveforms occurring in a converter transformer are obtained through PSCAD/EMTDC for a typical double pole ±500 kV, 1000 MW DC-link HVDC transmission system based on the CIGRE benchmark system. The waveforms are then amplified using a High Voltage amplifier for experimental breakdown investigations. Stepped-stress damage equalization method has been used for obtaining the lifetime characteristics from failure data. A comparison with life curve under pure sinusoidal and actual alternating voltages with superimposed dc and harmonic voltage has been made to understand why the converter transformers generally failed on the valve side. The results first time give fundamental reasons for the possible failure of the converter transformers and put forth important design considerations. [ABSTRACT FROM AUTHOR]

With the increase in number of VSC based HVDC systems, it is inevitable that there would be interconnections with weak ac grids. The paper presents the analytical basis for identifying coupling in the power loops which is dependent on grid inductance and operating point by utilizing the impedance based modeling technique. The formulation is used to define an inverse-based decoupling outer-loop controller for VSC-HVDC system. The concept is extended to HVDC grids and it is shown that the gains obtained using simple inverse may lead to instability. Robust controller tuning with pole-placement and minimization of $H_\infty$ norm is presented for HVDC grids, which form a restricted feedback system. The results show that the proposed method of decoupling results in effective decoupling of the power loops over a large range of grid inductance values as compared to that with traditional vector control. The system stability is also maintained over a large range of grid inductance values and PLL gains when a sudden variation of parameters is considered. The stability margins can be enhanced by pole-placement. The observations from the small-signal models are confirmed using detailed time-domain simulations. The proposal is expected to be useful in controller design for single VSC as well as HVDC grids, especially, during planing stage. [ABSTRACT FROM AUTHOR]

Conventional half bridge modular multilevel converter (MMC) system will suffer great over-current when there is a dc side fault. Therefore, topology study in sub-modules with dc side fault blocking capability have become one of the hotspots in MMC field. However, fault blocking topologies using conventional IGBT devices must employ more semiconductors than half bridge topology. The extra semiconductor devices employed in the topology will lead to the increase of cost and conduction loss. To reduce the conduction loss of the fault blocking topology, a novel sub-module topology is proposed in this paper. The proposed topology employs reverse blocking devices to form the low conduction loss path. Conduction loss analysis is conducted in this paper to show the priority of the proposed topology. Simulation and experiment results verified the dc fault blocking capability of the proposed topology. [ABSTRACT FROM AUTHOR]

DC-DC converters are needed for the future development of high voltage direct current (HVDC) grids, as they allow to interconnect lines with different voltages and topologies. The dc-dc converters can increase the grid controllability adding power flow control, voltage regulation and/or fault blocking capability. The dc modular multilevel converter (dc-MMC) is a non-isolated solution proposed to interconnect HVDC systems with the same line topology. This paper proposes a new dc-MMC with a control strategy, which allows the converter to interconnect different line topologies (e.g., rigid bipole connected to a symmetric monopole). The paper presents the different line topologies in HVDC installations. Then, a mathematical model with a variable transformation is proposed for the new dc-dc converter. A control structure is proposed and implemented in Matlab/Simulink using an average arm model and simplified dc grids. The results validate the control in normal operation, fault blocking capability and post-fault scenario (degraded mode). [ABSTRACT FROM AUTHOR]

The hybrid LCC/VSC cascaded HVDC (HC-HVDC) scheme, in which the LCC is adopted as rectifier, and one LCC in series with multiple paralleled VSC based MMCs is adopted as inverter, combines the advantages of both LCC and VSC-MMC technologies. Presently, a HC-HVDC project is planned to deliver the hydro power from Baihetan to Jiangsu in China. One of the major challenges is to suppress the DC overcurrent issue of VSC-MMCs especially under commutation failure condition of LCC at inverter side. Based on Baihetan-Jiangsu project under construction, the model of HC-HVDC system is developed in PSCAD/EMTDC. In the system, the rectifier employs a dual 12-pulse LCC, while the inverter adopts a hybrid scheme, i.e., one LCC converter in series with three paralleled VSC-MMC converters. This paper addresses the main cause and feature of the DC overcurrent, then proposes an overcurrent suppression control method for HC-HVDC system based on fuzzy clustering and identification approach. And the system transient performances with the proposed control approach are evaluated under AC fault conditions. The results show that the proposed approach can not only suppress the DC overcurrent following the commutation failure to a certain extent, but also improve the post-fault recovery performance of the overall system. [ABSTRACT FROM AUTHOR]

This paper presents improved indices to evaluate the contribution of reactive power compensators at HVdc converter terminals. The presence of such compensators impacts converter performance, such as the maximum available power (MAP) limit, susceptance to commutation failure, fault recovery time and temporary over voltage. Traditionally, the Effective Short Circuit Ratio (ESCR) has been used to indicate system strength. However, this index cannot be directly applied when power-electronics based converters are used to provide the reactive power support. The approach of this paper is to use an improved form of the ‘Apparent increase in Short Circuit Ratio’ (AISCR) index to quantify the impact of the compensator on the HVdc system. This index is evaluated by comparing the performance with the reactive power device with a system without the device, but having the same performance. The paper shows that a single AISCR index cannot quantify all behaviors and suggest modifications to AISCR for each of several HVdc phenomena. In this paper two types of compensators are considered – the Synchronous Compensator and the Static Synchronous Compensator (STATCOM). [ABSTRACT FROM AUTHOR]

Aiming at the fault traveling wave on the LCC-MMC HVDC transmission line, this paper analyzed its reflection and refraction characteristics at the DC buses and the fault point, plotted its propagation grid diagrams, obtained the relationship between the polarity of fault traveling wave and the boundary elements, and drew the conclusion that when the impedance of DC filter is far less than the wave impedance of transmission line, the existing fault location methods that need to distinguish these two waves according to their polarities are not applicable to the LCC-MMC HVDC system. On these bases, this paper proposed a modal traveling wave arrival time difference-based location principle for pole-to-ground fault, and a fault traveling wave propagation path ratio-based location principle for pole-to-pole fault, these principles neither need to identify the wave polarity, nor need the wave velocity value. In order to better extract the wave heads and their arrival time, this paper pre-treated the sampling data to make sure all the wave heads are extracted from the same frequency band, then the wave heads and their arrival time can be extracted with the empirical mode decomposition. The simulation results verified the effectiveness of the proposed fault location principle. [ABSTRACT FROM AUTHOR]

HVDC grid protection with adequate speed and reliability is required to minimise the impact of DC faults. In particular, fast breaker failure backup protection algorithms are needed to meet the expected reliability requirements of HVDC grids. In this paper, existing breaker failure backup protection algorithms are shown inadequate to detect partial failures like a single module failure of breakers with a modular structure. This paper proposes a backup protection algorithm which rapidly detects a DC breaker failure based on estimating the counter-voltage created by the energy absorption branch during an interruption. The performance of the proposed algorithm is evaluated using a four-terminal test network with both hybrid and mechanical DC breaker technologies. The simulation results show that the proposed algorithm is able to quickly detect both complete and partial failures of the two breaker technologies even considering measurement errors, noise and ageing of the energy absorption components. [ABSTRACT FROM AUTHOR]

In actual line-commutated converter based high- voltage direct-current (LCC-HVDC) projects, multiple HVDC transmission lines are usually installed on the same tower to save transmission corridors and reduce construction costs. However, electromagnetic coupling effect between adjacent lines can cause commutation failure (CF) in the non-fault poles when a line or pole fails. Hence, this paper deeply investigates the mechanism and the prevention strategy of CFs caused by line coupling effect in single- and double-circuit HVDC systems. The influencing factors of line coupling effect and the coupling characteristics under fault conditions are analyzed first based on the modeling of parallel transmission lines and the traveling wave theory. Then the mechanism of CF caused by line coupling effect is investigated with the consideration of different fault conditions, different line structures, and different system operation modes. Based on the above analyses, prevention strategies for CFs of non-fault poles in single- and double-circuit systems are proposed. Finally, the simulation results verify the correctness of the theoretical analyses and the effectiveness of the proposed control strategies. [ABSTRACT FROM AUTHOR]

Offshore wind farms pose the challenge of transmission of produced energy in an economic and effective way over long distances, justifying investments in High Voltage Direct Current (HVDC) systems. A solution to surmount the need for an expensive and large power transformer station is to connect each wind turbine to a DC/DC converter in which a Medium Frequency Transformer (MFT) is utilized to reduce the size of the station. Further, the DC outputs of the converters of the wind turbines can be connected in series to create a high DC voltage. In this solution, the MFTs are required to be insulated against a high DC voltage to ground in a limited compartment. This contribution presents a prototype of a 50 kW oil-paper insulated MFT operating at biased 422/4500 V/V AC 5 kHz and 125 kV DC test voltage, which has been manufactured and subjected to verification HV tests. The dielectric design of the prototype MFT based on finite element solution of non-linear Maxwell-Wagner equations is introduced and the acceptance criteria and practical design considerations are discussed. [ABSTRACT FROM AUTHOR]

Power flow (PF) flexibility in the multi-terminal HVDC (MT-HVDC) grids is a thought-provoking issue. It leads to employing the active DC power flow controller (DC-PFC)s. Hence, this paper examines the static average model (AM) and power injection model (PIM) of an interline DC-PFC (IDC-PFC). It is to provide a suitable base for DC PF studies and easy embedding of the DC-PFCs into MT-HVDC grids’ PF equations. In this regard, this paper proposes a new DC PF solver (DC-PFS) for the IDC-PFC compensated MT-HVDC grids within the well-accepted Newton-Raphson (NR) framework. It requires a few modifications in the main structure of the system's Jacobin (J) matrix compared to the uncompensated MT-HVDC grid. Also, the system's admittance matrix and its symmetry are preserved. In the proposed concept, the IDC-PFC cooperates with other MT-HVDC grid's state variables to satisfy the predetermined control objective(s). Furthermore, this paper proposes a new solution procedure (SP) to handle various system's limitations during the processes of solving the DC PF problem. Meanwhile, there is no need to modify the related J matrix. The effective and accurate performance of the IDC-PFC's models, as well as presented NR-based DC-PFS and SP, are verified by performing several simulations on the 8-bus CIGRE MT-HVDC grid. [ABSTRACT FROM AUTHOR]

A DC system saturated core fault current limiter (DCSFCL) was proposed to limit the fast rising trend of fault current in HVDC system. However, traditional method to calculate and design the DCSFCL tend to neglect leakage flux around the permanent magnet (PM), leading to large calculation error and inappropriate design procedure. The novel contribution of this paper is that it proposed a modularization method to analyze the permeance of both PM and adjacent air. Hence, the leakage flux effect is considered properly and a more accurate permeance matrix can be derived in a pure mathematical way. In this case, DCSFCL can be calculated much faster than the FEA simulation program with a promising accuracy regarding fault limiting performance. More importantly, design flow of the DCSFCL and related PM biased devices was given as well. Calculation result shows that inductance value calculated by the proposed method has less than 1% error compared with fine meshed FEA simulation result and about 20% increase in accuracy compared with traditional method that neglects PM leakage flux effect. Prototype of the DCSFCL was also built and experimental tests were carried out to verify the correctness of the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents a small-signal dynamic model for a modular multilevel converter (MMC) based HVDC grid, and then systematically i) identifies the system dominant oscillatory modes, ii) quantifies their propensity to instability phenomena, and iii) devises appropriate countermeasures. Based on the developed model, the eigen structure of an HVDC grid is characterized and the impact of the system parameters, configuration, AC system strength and operating point on the damping ratios of the oscillatory modes, and consequently the HVDC grid stability, are investigated. The model is also applied to systematically determine the sensitive parameters and optimize them to mitigate oscillatory modes and prevent instability. The eigen analysis results are verified based on time-domain simulation studies in the PSCAD/EMTDC platform. [ABSTRACT FROM AUTHOR]

Hybrid high voltage direct current systems utilized for bulk-power transmission have recently attracted more attention. The overhead lines (OHLs) are mainly used for the implementation of such systems due to their outstanding economic advantages. However, OHLs are vulnerable to temporary faults, jeopardizing the safe and reliable operation of the network. The resiliency to the line faults is of considerable significance to the power transmission. This paper proposes a fault property identification strategy based on the Pearson correlation coefficient for the LCC-MMC hybrid HVDC system which can differentiate temporary and permanent faults. To achieve this, a voltage signal is injected into the faulty line by decreasing the firing angles of the LCC-based rectifier. Based on the established OHLs model and the injected signal, an estimated backward travelling wave can be accurately calculated. The fault property is identified by comparing the wave difference of the real backward travelling wave and the estimated backward travelling wave. The proposed strategy has a high accuracy since all influencing factors including the fault resistance, fault distance, and line parameters have been taken into account. Finally, to verify the efficacy of the proposed algorithm, several simulations have been performed using PSCAD/EMTDC. The simulation results show that the proposed algorithm can effectively distinguish the fault property. [ABSTRACT FROM AUTHOR]

To improve the reliability of power supply, reclosing schemes are required after transient faults, which commonly occur in overhead line based high voltage DC (HVDC) systems. However, in the event of permanent faults, the auto-reclosing scheme may cause a severe strike. To avoid the severe impacts caused by permanent faults, the fault type should be discriminated before activating the reclosing scheme. Therefore, an adaptive reclosing scheme based on phase characteristics is proposed in this paper. Firstly, the modulation of a periodic voltage by actively controlling the hybrid DC circuit breaker (DCCB) is introduced. Then, a cascaded π equivalent model and its decoupling algorithm are presented to analyze the frequency-domain characteristics of the measured impedance of the coupled overhead lines. From the frequency-domain characteristics, the frequency of the periodic detecting voltage is determined to analyze the phase features of the measured impedance at primary frequency. The permanent or transient faults can thus be accurately identified by using these different phase characteristics, with negligible influence on the healthy lines. In addition, the proposed scheme is robust to various fault resistances, leading to improved reliability. The effectiveness of the proposed scheme is verified in PSCAD/EMTDC. [ABSTRACT FROM AUTHOR]

Line-commutated converters are extensively used as the interface between ac grids and classic HVDC systems. At the inverter side, commutation failure of switches is one of the most common faults that can pose threats to the system operation. Practical and reliable study of such phenomena relies on accurate and efficient converter models for simulations. Recently, a parametric average-value model (PAVM) has been presented for ac–dc rectifiers, which considers the internal faults of the converter. In this paper, the PAVM methodology is extended to the dc–ac inverter systems, including the commutation failure of switches. The proposed PAVM also augments an automatic fault detection technique to determine the faulty switches. Using comprehensive simulation studies, the developed model is verified to accurately predict the commutation failure of switches and reconstruct the waveforms consistent with the detailed switching models of inverters while being computationally more efficient. The proposed PAVM is envisioned to be an efficient and accurate asset for simulation of HVDC systems and inevitable when faults of switches need to be considered. [ABSTRACT FROM AUTHOR]

The strength concept is an important tool for voltage stability evaluation of emerging hierarchical-infeed LCC-UHVDC (HIDC) systems. However, the complex inter-inverter interactions in such systems have caused significant difficulties for the strength assessment. This makes the accuracy of earlier strength assessment indices limited due to empirical analysis rather than rigorous theoretical reasoning. Thus in this paper, the hierarchical-infeed voltage interaction factor (HVIF) index is firstly utilized to quantitatively depict the complex inter-inverter interactions in HIDC systems. The use of the HVIF enables these interactions to be effectively incorporated into the subsequent strength assessment by proposing the hierarchical-infeed interactive effective short-circuit ratio (HIESCR) strength index. The critical HIESCR (CHIESCR) defined to delineate the voltage stability limit also evaluates to consistently 1.0 such that the distance between the HIESCR and CHIESCR is naturally an accurate stability margin. Since the HIESCR is developed based on the rigorous theoretical reasoning, it is more accurate than earlier indices for voltage stability evaluation. Moreover, the parametric dependence analysis of the HIESCR versus various system parameters and rated operation variables is conducted. This offers a comprehensive perspective for better understanding of the strength variation characteristics. Finally, case study in the modified IEEE 118-bus system validates the HIESCR. [ABSTRACT FROM AUTHOR]

In this paper, a reliable methodology is proposed in order to implement and validate a Model Predictive Control (MPC) scheme on an actual Voltage Source Converter (VSC) integrated in a scale-down multi-terminal DC grid. The objective of the investigated MPC controller is to enable AC frequency support among two asynchronous AC areas through a High Voltage Direct Current (HVDC) grid, while considering physical constraints, such as maximum and minimum DC voltage. A systematic and accurate implementation strategy is proposed, based mainly on the Hardware In the Loop (HIL) and Power Hardware In the Loop (PHIL), leading to the real-life testing on VSC, controlled by a classical microcontroller. The technical problems during the implementation process, as well as the proposed solutions, are described in detail through this paper. This procedure is deemed valuable to bridge the gap between offline simulation and the actual implementation of such advanced control scheme on experimental test rig. [ABSTRACT FROM AUTHOR]

Penetration of DC networks is rapidly increasing in modern power systems. As transient behavior of DC grids is different from that of AC ones, AC grid protection schemes might not be applicable to protect DC networks. Exact fault location is vital for protection of DC networks to reduce repair cost and achieve fast power recovery. This paper proposes a novel topology independent multi-terminal DC scheme to identify fault section and location for DC transmission systems. Voltage and current signals measured at the terminals are analyzed by the least squares error (LSE) algorithm. Then, the proposed scheme uses low frequency components of the signals to locate DC faults offline. Unlike some other methods, it does not require sophisticated sensors and hardware to capture very high frequency content of the signals. Hence, the proposed scheme can be implemented in practice without additional measuring infrastructure. The performance of the proposed scheme is evaluated under various fault conditions for different topologies of DC networks in both overhead lines and cables. Numerous simulations carried out demonstrate that the proposed scheme is quite accurate and provides excellent performance under different fault resistances, sections, and locations. [ABSTRACT FROM AUTHOR]

Modular multilevel converters (MMCs) have been recognized as the most attractive technology for high voltage direct current (HVDC) applications during the last years. Their advantages include the ability to freely control the internally stored energy in the distributed submodules (SMs) and to independently control AC and DC powers. Recent studies showed that an MMC can take advantage of this degree of freedom to supply ancillary services with low energy requirements such as frequency response or power oscillation damping by connecting energy storage systems (ESSs) to its SM capacitors. This paper proposes a modular DC-DC converter as an interface between the energy storage element and the SM capacitor. As it can be built with switches allowing a high switching frequency, it is shown that the volume of the passive components can be reduced in comparison with interface converters known in the literature. The proposed control strategy avoids to transfer the harmonics of a SM to the ESS that prevents to drastically oversize the system. The proposed control method also provides an appropriate energy exchange without affecting the control philosophy of an MMC and it addresses balancing issues. Simulations and a downscaled prototype confirm the relevance of the proposed control. As the proposed interface converter is able to track the power reference with fast dynamics, it provides the same system-level advantages as other interface converters known in the literature but with a reduced volume. [ABSTRACT FROM AUTHOR]

This paper investigates the stability of diode rectifier based HVDC (DR-HVDC) connected offshore wind farms. The impedance model of the DR-HVDC connected offshore wind farms in dq frame is analytically developed and is validated by comparing its impedances to those obtained from frequency scanning of time domain EMT model in PSCAD/EMTDC. Based on the impedance model, the impacts of the sizes of DR-HVDC DC smoothing reactors and AC filters on offshore system stability are analyzed. It shows reduced DC smoothing reactance degrades the d-axis stability margin and can potentially lead to system instability. Higher bandwidth of offshore AC voltage control of wind turbine line side converter is proposed to minimize such instability potential. The analysis also shows that reduced AC filters size helps to increase q-axis stability margin and leads to a more stable system. Moreover, stability analysis considering the interaction between WTs is conducted and it reveals that the WT P-V control has a significant impact on the stability of the DR-HVDC connected WTs. [ABSTRACT FROM AUTHOR]

Offshore wind farms (OWF) are being rapidly integrated to the power systems, which can be primarily attributed to saturation of the mainland onshore area, and high wind speed in offshore sites. However, to maintain stable grid operation, OWFs are required to comply with Low Voltage Ride Through (LVRT) capability. OWF during LVRT period should not only stay grid connected, but also support the grid during the disturbance. In this paper, a new communication-independent LVRT control scheme for HVDC connected OWF has been proposed. Under the proposed strategy, OWFs not only successfully ride through a fault induced voltage dip, but also comply with active power recovery ramp rate during the fault recovery period. Besides complying with LVRT requirement and ramp rate limit, the proposed strategy improves voltage dip induced frequency (VDIF) issue by increasing active power injection from the OWF during LVRT period. The proposed LVRT strategy also exploits the stored energy in HVDC link capacitors in order to reduce the impact of VDIF issue. The proposed and the conventional LVRT strategies for HVDC connected OWF have been implemented and evaluated on IEEE 39 bus benchmark system. [ABSTRACT FROM AUTHOR]

In High Voltage Direct Current (HVDC) grids, system parameter and/or topology changes following HVDC grid protection actions affect system dynamics and in combination with the existence of line inductors in series with HVDC circuit breakers (DCCB), pose a challenge to designing converter controls that satisfy desired performance and stability requirements. To date, several methods have been proposed for evaluating the influence of the line inductors on system stability; however, tuning of the MMC controls considering system parameter and/or topology changes following HVDC grid protection actions haven’t been studied in detail. This paper presents a systematic tuning procedure for a robust operation of MMCs in any HVDC grid configuration. The proposed method analyzes the impact of variations in HVDC grid system parameters and control bandwidths (BWs) using small-signal based stability analysis and Singular Value Decomposition (SVD)-based performance analysis methods. In addition, it considers the impact of line outages associated with HVDC grid protection actions in order to select optimal control gains that fulfill performance and stability requirements of the HVDC grid for given HVDC Circuit Breakers (DCCBs) line inductor values. To illustrate the proposed methodology, a detailed step-by-step stability analysis in a 4-terminal HVDC grid test system is presented. [ABSTRACT FROM AUTHOR]

The high-frequency resonances (HFRs) around 700 Hz and 1.8 kHz have occurred in Yu′E project. Mechanism studies indicate that HFRs are caused by the interactions between the negative damping inductance characteristics of the MMC and the capacitive characteristics of the AC system. In this paper, two optimized methods regarding the current control loop are presented to suppress the HFRs. The first one is to use a round(x) function inserted into voltage feed-forward loop instead of low pass filter (LPF). The proposed method has less negative impact on transient characteristics of an MMC. The second one is to employ a second-order damping controller, including the parameters design, to reshape the MMC impedance around the multiple risky regions. The core of HFRs suppression is that the real part of the MMC impedance near the multiple intersection frequencies should be positive according to impedance stability theory. Combined with the proposed control methods and core of HFRs suppression, the simplified model of MMC is adopted to design the parameters using the analytical expressions. Moreover, the general steps of parameters design are presented. Finally, the optimized methods to suppress HFRs are verified by time-domain simulations. [ABSTRACT FROM AUTHOR]

In a previous paper (Part 1) the authors have performed the simulative evaluation of the life lost by HVDC extruded cables subjected to long TOVs occurring in VSC HVDC cable systems. The conclusions were that it cannot be completely ruled out that the field levels and the duration of such TOVs are a potential threat to certain cable designs, and tests other than Load Cycling Type Tests after CIGRÉ Technical Brochure 496 could assess quantitatively the potential threat associated with long TOVs. For these reasons, in this Part 2 superimposed switching impulses applied during Type Tests after TB 496 are analyzed in order to check if such impulses might be equivalent to long TOVs as for their electro-thermal stress effects on extruded insulation. The analysis is similar to that carried out for long TOVs in Part 1, i.e., it consists of: calculating the electric field during superimposed switching impulses; comparing it with the field during long TOVs; calculating with Miner's law of cumulated damage the life lost during superimposed switching impulses and comparing it with the loss of life during TOVs. A brief literature survey of potential high field effects during long TOVs is also reported. [ABSTRACT FROM AUTHOR]

This paper analyzes high-frequency interactions between a Modular Multilevel Converter (MMC) and High Voltage Direct Current (HVDC) grid resonances by studying their effect on the system stability. The recent appearance of converter-related instabilities due to high-frequency oscillations at the converter's ac side raises concerns about whether similar interactions can also take place at its dc side. To determine the risks imposed by such interactions within an HVDC grid, this paper assesses the impact of the MMC internal dynamics and dc system resonances on the stability using an analytical impedance-based method. The effect of fault current-limiting inductors, grid topology changes and transmission line length is investigated, indicating that these parameters considerably influence the electromagnetic characteristics of the HVDC grid and consequently the system stability. Furthermore, a sensitivity analysis of the MMC internal controller dynamics on the converter's non-passivity, causing the instability, is performed. [ABSTRACT FROM AUTHOR]

The design distance of offshore wind power plants connected through HVAC transmission systems might be extended due to the introduction of mid-cable reactors for reactive power compensation purposes and the latest developments of AC cables for higher voltages. Therefore, the applicability limits between HVAC and HVDC systems must be revised. This paper analyzes the contribution that mid-cable reactive power compensation has on increasing the distance limits of HVAC transmission systems. A methodology is developed to determine an optimal design of such transmission systems. In this methodology, cost of power losses and reactors are minimized for multiple wind speed conditions. As a result, the optimal HVAC voltage level and the optimal number of reactors and their location are determined for different OWPP rated powers and distances. Also, the final transmission system is selected between HVAC and HVDC equivalent configurations based on total costs. [ABSTRACT FROM AUTHOR]

This paper presents the DC fault transient study of a meshed DC grid with high-temperature superconducting (HTS) HVDC cables to integrate offshore wind power. A four-terminal meshed DC grid model with a ±100 kV DC voltage rating is developed. DC circuit breakers (DCCBs) are implemented in the DC grid to deal with DC cable faults. To conduct the fault transient study, the fault scenarios with different fault locations and protection delays are studied. The sensitivity study versus different DC fault locations reveals that the faults on the faulted cable will not cause the quenching of healthy cables. The sensitivity study considering different DC fault protection delays demonstrates that the HTS cables have a current-limiting effect and the long delay of DC fault protection does not result in large fault current and the quenching of healthy cables. Extensive simulations in PSCAD/EMTDC validate the founding. [ABSTRACT FROM AUTHOR]

The decarbonization plans are leading to the decommissioning of conventional power plants, resulting in a deep transformation of power systems. Balearic Islands are not an exception and, in order to compensate this generation reduction and increase the security of supply, a second HVDC link is planned to interconnect the Balearic power system to the Spanish mainland. In this application paper, Modular Multilevel Converters (MMCs) have been assumed as the preferred technology for this HVDC link. A transient analysis has been presented to evaluate the system performance after the introduction of this new HVDC link. Grid-following and grid-forming control strategies have been implemented, comparing their impact on the system performance and stability. The transient events considered are the disconnections of the main synchronous generators of the islands and AC faults in several locations of the Balearic power system. A final case based on a penetration of 100% of converter-based resources has been also simulated to study the islanded operation of the MMC-HVDC link. [ABSTRACT FROM AUTHOR]

Commutation failures (CFs) including repetitive CFs (RCFs) are frequently occurring faults in line commutated converter based high voltage direct current (LCC-HVDC) systems. Consequently, sending end system will suffer transient voltage disturbances (TVD) with a characteristic of “first reduce then rise and may repeat”. Due to the complex interaction process of TVD, the electromagnetic process behind this phenomenon cannot be easily explained, which imposes great challenges on the development of mitigation strategies. Given this, this paper provides a deep insight into the mechanism and the impact factors of the TVD caused by CFs and RCFs. The numerical relationship between the transmitting power and the TVD is derived. Research results revealed that the transient process after fault can be segmented into five stages. In each stage, the control interactions among HVDC controllers and power interactions at the PCC are analyzed. Besides, we discussed the TVD under RCFs in detail. Several indices are further proposed to facilitate the characterization of the TVD, and main control loops of HVDC that have impacts on the characteristics of TVD are thereby studied. Finally, the mathematical relationship between wind farm power and the TVD is derived to quantify the impact of wind farms on the TVD. [ABSTRACT FROM AUTHOR]

Transmission adequacy of power system has been challenged by high investment of new line construction and limit line-corridor space. In this paper, a novel solution to increase transmission capacity by altering HVAC lines into fractional frequency transmission system (FFTS) is proposed. FFTS is a transmission that utilizes a relatively low grid frequency, e.g., 50/3 Hz, to extend the transmission capacity of ac lines. The proposed solution can minimize the construction efforts since the existing HVAC transmission lines can be directly employed by FFTS without any change. The structure and principle of FFTS for transmission line conversion (TLC) are introduced firstly. Then, performance of conventional ac equipment in FFTS is evaluated and comparison with respective counterpart in HVDC is carried out. Next, the economic performance of FFTS for transmission capacity upgrade is conducted based on a typical benchmark, and sensitivity analysis results are presented to determine the economic zone of FFTS. The results show that the uniform annual value (UAV) of TLC into FFTS is 24.9% and 31.6% cheaper than TLC into HVDC and constructing new HVAC lines, respectively. Therefore, FFTS is a superior scheme for transmission capacity boost. [ABSTRACT FROM AUTHOR]

Similar to the conventional three-phase parallel-connected MMC (PC-MMC), the three-phase series-connected MMC (SC-MMC) is a strong potential solution for high-voltage direct current (HVDC) applications. The study of SC-MMC focuses on the control strategy, neglecting its small-signal dynamics, not to mention its stability when interacting with the AC grid. Work on small-signal modeling of MMC is limited to parallel-connected configurations. SC-MMC differs from PC-MMC in structure and harmonic content; hence, it is necessary to establish an accurate model of SC-MMC according to its own characteristics. This paper introduces the circuit and control of SC-MMC and compares it with PC-MMC. Multi-harmonic linearization is used to establish the AC impedance model of SC-MMC over the whole control system, including the third harmonic suppression controller. We take a PC-MMC station of the Wudongde HVDC project as a benchmark to explore the potential application of SC-MMC when constructing new HVDC stations to extract power from an existing DC transmission corridor. The strengths and weaknesses of SC-MMC in HVDC applications are discussed, and it is compared to PC-MMC with regard to the impedance characteristic. [ABSTRACT FROM AUTHOR]

Cascading commutation failure (CF) caused by the reactive power interaction between HVDC is one of the new forms of cascading failures in multi-infeed HVDC systems. However, the concept and mechanism of cascading CF have not been explained clearly, and few studies have been devoted to control strategy for cascading CF mitigation considering reactive power interaction. In this paper, the cascading CF is defined and novel coordinated control strategy for cascading CF mitigation is proposed. Firstly, the mechanism of cascading CF in multi-infeed HVDC systems is analyzed. Then influence degree of HVDC on the power system stability is evaluated considering both active power impact and reactive power interaction, based on which novel coordinated commutation failure prevention as well as voltage dependent dc current order limiter is developed to mitigate cascading CF. Simulation results based on CIGRE HVDC benchmark model in PSCAD/EMTDC verify the effectiveness and advancement of proposed strategy on cascading CF mitigation. [ABSTRACT FROM AUTHOR]

The single-phase-to-ground (SPG) fault at the valve side of the converter transformer is one of the most critical faults threatening the operation of bipolar half-bridge modular-multilevel-converter-based multi-terminal direct-current (HB-MMC MTDC) systems. Following a valve-side SPG fault, the upper-arm submodule (SM) capacitors in the faulty converter may suffer a serious overvoltage, and the grid-side fault currents may experience no zero-crossings. The existing protection methods generally rely on tripping the grid-side alternate-current circuit-breaker (ACCB), which cannot fully isolate the fault. The healthy poles and stations may encounter severe disturbance and be all blocked, which will lead to a power outage of the entire MTDC system. This paper proposes an ACCB-independent scheme based on thyristor-pairs and damping SMs to address these problems. Antiparallel thyristor-pairs are connected in series within the upper and lower arms in each phase. Serial damping SMs are connected within the lower arms to help the lower-arm thyristor pairs cut off the fault currents. Although the proposed additional devices inevitably cause conduction losses, they can effectively protect the faulty converter and healthy circuit in the MTDC system. Simulations in PSCAD/EMTDC have been conducted to verify the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

VSC-HVDC systems are being increasingly employed in the power systems. The recently installed HVDC systems have a power capacity similar to traditional power plants. Hence, they are expected to have a similar behaviour as traditional synchronous generators during faults in AC grid, within their limits of course. Recent grid codes require HVDC converter stations to incorporate fault ride-through (FRT) capabilities in order to avoid HVDC converter station disconnection from AC grid for certain fault characteristics. In this paper, two FRT mechanisms are suggested for the two converter stations of an HVDC system. One FRT mechanism is added to the DC voltage control loop of the master converter station, while the other FRT mechanism is added to the active power control loop of the slave converter station. The objective is to ensure the stable operation of the HVDC system during faults that may occur in AC grids located on both sides of the HVDC system. The performance and stability of the suggested FRT mechanisms are tested considering the pre-fault power flow direction and all possible types of balanced and unbalanced faults. Simulation results confirm the effectiveness of the FRT mechanisms and revealed the critical modes during FRT operation. [ABSTRACT FROM AUTHOR]

The HVDC systems have been employing modular multilevel converters (MMC) due to their unique high voltage high power potential. However, the lack of fault ride-through capability imposes restrictions on MMCs that are based on half-bridge (HB) modules. Since it is necessary to limit the fault currents to protect MMCs from serious short circuit faults against pole-to-pole DC fault, several protection schemes have been introduced to deal with the DC short circuit faults. This paper proposes a new hybrid MMC protective topology consisting of a combination of the HB and three-quarter-bridge (TQB) modules. The TQB behaves like an HB under normal operation and has low power losses compared to other protective topologies. Modulation and control of this configuration are like HB-based MMC. In the proposed hybrid protective topology, during a pole to pole DC fault, the fault current can be either blocked or be limited by TQB-SMs. Both simulations and experiments were performed to verify the operation of the suggested hybrid MMC in different modes of operation. [ABSTRACT FROM AUTHOR]

This paper develops a new control strategy for voltage source converter (VSC) based multi-terminal high voltage dc (MT-HVDC) grids for enhancing the mutual frequency support between MT-HVDC interconnected asynchronous ac systems. The existing droop control structure of VSCs is augmented with an additional feedback voltage-based loop that generates a voltage shifting term to be added to the original dc voltage reference. The addition of this integrator-based controller nullifies the difference between voltage errors seen at adjacent converter stations. This action helps to overcome inaccuracies in the mutual frequency support caused by the uneven voltages across a dc system. The proposed strategy uses only local variables for the continuous-time control; thus, it does not rely on a high-bandwidth communication network, and its performance is not affected by the change of ac systems’ parameters. Modal analysis is carried out to investigate the stability of the proposed controller. Finally, comprehensive simulation studies are used to verify the proposed strategy’s performance and compare it with recently reported alternative controllers. [ABSTRACT FROM AUTHOR]

This paper presents a control of the parallel operation of diode rectifier based high-voltage direct current (DR-HVDC) and voltage source converter based HVDC (VSC-HVDC) links. The two links are connected to offshore wind farms (OWFs). The VSC-HVDC controls the voltage and frequency of the offshore AC-grid needed for the OWFs start-up. The proposed grid forming control is based on controlling the OWFs voltage by controlling the active power balance at the VSC-HVDC AC-bus. When the OWFs inject more power than a certain active power reference established for the VSC-HVDC, the OWFs voltage increases and the DR-HVDC starts conducting. Then, the offshore voltage automatically accommodates the required value for transmitting the OWFs power through the DR-HVDC link while the system frequency is controlled by the VSC-HVDC through satisfying the reactive power balance. The power transmitted through the VSC-HVDC can be set by adjusting the corresponding power command while the DR-HVDC will automatically close the power balance. The main advantage of the proposed control system is that the VSC-HVDC can be sized just to support the system energization; while once the OWFs are in operation, the DR-HVDC will be loaded automatically. Simulation results verify the proposed control system. [ABSTRACT FROM AUTHOR]

Hybrid dc circuit breakers (HCBs) are recognized as suitable devices for protecting high-voltage direct-current (HVDC) systems, along with other dc circuit breakers (DCCB). However, compared to mechanical circuit breakers, HCBs exhibit higher conduction losses. Such losses are inevitable under no-fault conditions as current may flow through some of the semiconductor switches. An integrated circuit breaker (ICB) minimizing these losses is presented in this paper, and this is achieved by replacing semiconductor switches by mechanical components in the current path. For completeness, the topology design, operating sequence and a mathematical analysis for component sizing of the device are provided. In addition, an estimation of the conduction losses is quantified. It is estimated that the power losses of an ICB are 2 to 30% of an HCB only. The ICB has been implemented in PSCAD/EMTDC to demonstrate its effectiveness for isolating dc faults, with simulations conducted on a three-terminal HVDC grid. [ABSTRACT FROM AUTHOR]

The protection of meshed HVDC grids requires the fast identification of faults affecting the transmission lines. Communication-based methods are thus not suited due to the transmission delays. Many approaches involving a model of the transient behavior of the faulty line have recently been proposed. Nevertheless, an accurate description of the traveling wave phenomenon in multi-conductor lines such as overhead lines requires complex computations ill-suited for fast fault identification. This paper presents a single-ended fault identification algorithm using a closed-form parametric model of the fault transient behavior. The model combines physical and behavioral parts and depends explicitly on the parameters that characterize the fault, namely the fault distance and impedance. When a fault is suspected, the fault parameters are estimated so that the model fits best the received measurements. The confidence region of the estimated fault parameters is used to decide whether the protected line is actually faulty or not. The proposed algorithm is tested on a 4 station grid simulated with EMTP-RV software. The method is able to identify the faulty line using a measurement window of less than 0.5 ms. This allows ultra-fast fault clearing and can hence improve the overall reliability of future HVDC grids. [ABSTRACT FROM AUTHOR]

The regulation of active power flowing through one or multiple DC lines plays an important role to guarantee secure and economic operations of high voltage direct current (HVDC) grids. This paper proposes a new method to regulate DC line power flow based on the adaptive DC voltage droop control strategy in which the voltage references of the voltage droop controllers vary autonomously at post-contingencies. The main advantage of the proposed method is that it can avoid installation of extra equipment and thus the associated losses and costs in the power-converter-based power flow control methods. The proposed control approach does not require to solve online global AC-DC power flow equations, leading to autonomous control. Furthermore, the adaptive droop control does not influence the stability of the HVDC grid since only the droop voltage references vary, but not the droop coefficients. Static analysis and dynamic simulations of a five-terminal HVDC grid are implemented using MATLAB/Simulink Simscape Blockset and OPAL-RT RT-LAB libraries to validate the effectiveness of the proposed autonomous control method. [ABSTRACT FROM AUTHOR]

Medium voltage direct current (MVDC) power systems are in their early phase of development, but the lack of efficient and reliable DC circuit breakers is currently one of the most significant bottlenecks for widespread adoption of MVDC applications. Compared to protection devices in high voltage direct current (HVDC) systems, MVDC circuit breakers are expected to interrupt fault currents with higher rates of rise in more power-dense and more controllable structures. A hybrid approach with a piezoelectrically actuated fast mechanical switch in parallel to a solid-state circuit breaker is expected to meet the above requirements. A prototype of a 15 kV-class piezoelectrically actuated fast mechanical switch is presented in this paper. The prototype demonstrates an actuator opening time of 1 ms, a breakdown voltage of over 20 kV, and a continuous current rating of 500 A. After integrating the fast mechanical switch into a hybrid circuit breaker testbed, the fast mechanical switch was able to open within 1.5 ms and the fault was cleared within 5 ms. Therefore, piezoelectrically actuated fast mechanical switches can enable fast, reliable and controllable protection for various MVDC systems like electric ships, electric aircraft and microgrids that integrate distributed energy resources. [ABSTRACT FROM AUTHOR]

The multi-terminal hybrid LCC/MMC HVDC has been applied to overcome the simultaneous commutation failure problem caused by the multi-infeed LCC-HVDCs in the East China. The high-speed and selectivity line protection method is required for the multi-terminal hybrid HVDC system. In this paper, the reflection and refraction of the fault traveling waves at different kinds of line terminals are characterized by transfer functions. Then the fault voltage as well as its first peak time at different line terminals when different internal and external faults occur are derived respectively. The conclusion proves that the first peak time of line-mode fault component voltage (FPTV) for internal faults is smaller than that for external faults, which is independent of fault impedance and fault type as well. Therefore, a FPTV-based non-unit ultra-high-speed dc line protection method is proposed. The algorithm is implemented in the developed protection prototype and validated in the Kun-Liu-Long three-terminal hybrid HVDC RTDS test system. The test results show that the proposed method can fast and correctly identify line faults in the multi-terminal hybrid HVDC system, even with 500 Ω fault impedance. Comparing with the traveling wave protection method of ABB, the proposed method improves the sensitivity when high-impedance faults occur. [ABSTRACT FROM AUTHOR]

Speed and selectivity of DC fault protection are critical for High-Voltage DC (HVDC) grids and present significant technical and economic challenges. Therefore, this paper proposes a non-unit protection solution that detects and discriminates DC faults based on frequency domain analysis of the transient period of DC faults. The representation of a generic HVDC grid section and the corresponding DC-side fault signatures in the frequency domain form the basis of a generalized approach for analytically designing a protection scheme based on Wavelet Transform (WT). The proposed solution is adaptive within its design stage and offers general applicability and immunity to system changes, while the protection settings are configured for optimized performance. The scheme is validated through offline simulations in PSCAD/EMTDC and the technical feasibility of the algorithm in the real world is demonstrated through the use of real-time digital simulation (using RTDS) and Hardware-in-the-Loop (HIL) testing. Both offline and real-time simulations demonstrate that the scheme is able to detect and discriminate between internal and external faults at a significantly high speed, while remaining sensitive to high impedance faults and robust to external disturbances and outside noise. [ABSTRACT FROM AUTHOR]

Conventionally, the current flow control and DC fault protection issues of HVDC grids are supposed to be solved by the DC current flow controller (CFC) and DC circuit breaker (DCCB) separately, which may result in a high capital cost. This paper proposes a CFC topology with DC fault current limiting and interrupting capabilities. The topology and operating principle of the CFC are presented with theoretical analysis. The control strategies under normal and fault conditions are described. In order to reduce the use of IGBTs, an H-bridge inter-line CFC with fault current limiting capability is further proposed based on the proposed CFC. The proposed CFCs are tested in PSCAD/EMTDC. Simulation results show that the proposed two CFCs can effectively control the current flow of two lines during normal operation and limit and interrupt DC fault currents. [ABSTRACT FROM AUTHOR]

The strength is an important concept in planning studies for voltage stability analysis of hybrid multi-infeed HVDC (HMIDC) systems, which include both VSC- and LCC- HVDC links. However, the accuracy of earlier strength indices is very limited because they are developed by the empirical reasoning rather than rigorous theoretical derivation. In this paper, a virtual single-infeed model of HMIDC systems is firstly established utilizing the reduced-order equivalent nodal assessment of the inverter bus current-voltage equations. While incorporating the inter-inverter interactions, the virtual model is a strict dual-bus equivalent of the original complicated multi-infeed model. This enables easier and simpler analysis to be implemented. Secondly, the virtual model is employed to propose the hybrid multi-infeed interactive effective short-circuit ratio (HMIESCR) strength index for HMIDC systems by the rigorous theoretical derivation. Compared to earlier indices, the HMIESCR can depict the voltage stability much more accurately. This is because the critical HMIESCR (CHMIESCR) indicative of the stability limit is explicitly and solely evaluated to 1.5 according to the PV sensitivity based stability criterion, while the critical values of earlier indices are ambiguous. Finally, case studies by extensive numerical simulations on the classical hybrid four-infeed HVDC system validate the HMIESCR along with good robustness. [ABSTRACT FROM AUTHOR]

In a line-commutated converter based high-voltage direct-current (LCC-HVDC) system, the inverter control system usually includes constant extinction angle (CEA) controller, constant current (CC) controller, current error controller (CEC), and voltage-dependent current order limiter (VDCOL). However, the interaction influence of multiple controllers may cause repetitive commutation failure (CF). For this purpose, this paper deeply investigates the mechanism and the influencing factors of repetitive CF caused by controller interaction. It is found that the lower limit value of CEA controller can affect the control switching process and thus the probability of repetitive CF. Besides, the minimum gamma measurement (MGM) unit prevents the system from acquiring the real extinction angle in time, which results in the DC current fluctuation during the recovery process. Moreover, the probability of control-induced repetitive CF is much higher when the HVDC inverter is connected to a weak AC system or the AC fault is not serious but not cleared in time. Based on the above analyses, an improved control method is proposed for recovery performance improvement, which is mainly realized by modifying the lower and upper limits of the CEA controller during recovery. Finally, the simulation and experimental results verify the theoretical analyses and the proposed control method. [ABSTRACT FROM AUTHOR]

The performance and applications of the optical inline-Sagnac current sensor/transducer in utility high voltage alternating current measurements (metering and protection) and high voltage direct current measurements (control, metering, and protection) are presented. New measurements of commercially available sensors are presented for a 216 kApeak transient current, scale factor linearity for alternating currents from 5 mArms to 32 kArms and for direct currents from 100 mA to 27 kA, and temperature performance of ±0.11% over the temperature range of −60 °C to +65 °C. New properties of polarizer temperature-wavelength effects on the scale factor of the sensor are presented. Power quality measurements are discussed over the frequency range of 16.66 Hz to 5 kHz. A discussion of the limitations of optical noise on low current measurements is given. The experimental and calculated sensor response functions are compared. The limitations for low current measurements due to the IEC 61869 standard digital output are presented. [ABSTRACT FROM AUTHOR]

A study is made of the optical inline-Sagnac interferometer current sensor/transducer with active phase modulation and with spun polarization maintaining fiber. A brief review of the common sensor types is made to give context to the discussion of the optical inline-Sagnac current sensor theory. A new discussion is made of the limitations of the optical inline-Sagnac interferometer current sensor caused by the spun polarization maintaining fiber, the polarizing fiber design, and the temperature effects of each type of fiber. These combined temperature effects limit the sensor to a practical scale factor temperature sensitivity range of about 80 to 200 ppm/°C. The fiber component optical-wavelength effects require a broad-band light source to have a wavelength stability of <0.65 nm to achieve a ±0.1% sensor scale factor stability. The opto-mechanical effects from available spun polarization maintaining fibers limit the measurement head to diameters >30 mm. The transit-time of the light through the sensor is the ultimate bandwidth limit for the device. However, most practical sensors have −3 dB bandwidths >20 kHz. In utility applications the isolation of the sensor to nearby currents is estimated to be −96 dB. [ABSTRACT FROM AUTHOR]

Extensive simulations have been carried out so far of transient voltages superimposed onto the DC voltage of HVDC cable transmission systems. With the advent of VSC HVDC cable systems, attention has turned to long Temporary Over-voltages in such systems. Preliminary experiments on the possible adverse effects of these long TOVs on the insulation of VSC HVDC cables have started, but no simulation models for estimating their effect on cable life and reliability have been developed yet. This investigation fills this gap by carrying out the simulative evaluation of the life lost by HVDC extruded cables subjected to long TOVs (Part 1) and switching impulses applied during Type Tests (Part 2), so as to compare the severity of these two transient voltages superimposed onto the DC voltage of HVDC extruded cables. This Part 1-paper is focused on estimating the severity of TOVs on extruded cable insulation by: calculating the electric field during the TOV; comparing it with the field during Type Test load cycles; using Miner's law of cumulated damage to calculate the life lost during the TOV, thereby also locating the most severely stressed point of insulation. In Part 2-paper, a similar evaluation for switching impulses and an overall comparison are performed. [ABSTRACT FROM AUTHOR]