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Line-commutated converters are extensively used as the interface between ac grids and classic HVDC systems. At the inverter side, commutation failure of switches is one of the most common faults that can pose threats to the system operation. Practical and reliable study of such phenomena relies on accurate and efficient converter models for simulations. Recently, a parametric average-value model (PAVM) has been presented for ac–dc rectifiers, which considers the internal faults of the converter. In this paper, the PAVM methodology is extended to the dc–ac inverter systems, including the commutation failure of switches. The proposed PAVM also augments an automatic fault detection technique to determine the faulty switches. Using comprehensive simulation studies, the developed model is verified to accurately predict the commutation failure of switches and reconstruct the waveforms consistent with the detailed switching models of inverters while being computationally more efficient. The proposed PAVM is envisioned to be an efficient and accurate asset for simulation of HVDC systems and inevitable when faults of switches need to be considered. [ABSTRACT FROM AUTHOR]

VSC-HVDC systems are being increasingly employed in the power systems. The recently installed HVDC systems have a power capacity similar to traditional power plants. Hence, they are expected to have a similar behaviour as traditional synchronous generators during faults in AC grid, within their limits of course. Recent grid codes require HVDC converter stations to incorporate fault ride-through (FRT) capabilities in order to avoid HVDC converter station disconnection from AC grid for certain fault characteristics. In this paper, two FRT mechanisms are suggested for the two converter stations of an HVDC system. One FRT mechanism is added to the DC voltage control loop of the master converter station, while the other FRT mechanism is added to the active power control loop of the slave converter station. The objective is to ensure the stable operation of the HVDC system during faults that may occur in AC grids located on both sides of the HVDC system. The performance and stability of the suggested FRT mechanisms are tested considering the pre-fault power flow direction and all possible types of balanced and unbalanced faults. Simulation results confirm the effectiveness of the FRT mechanisms and revealed the critical modes during FRT operation. [ABSTRACT FROM AUTHOR]

In a previous paper (Part 1) the authors have performed the simulative evaluation of the life lost by HVDC extruded cables subjected to long TOVs occurring in VSC HVDC cable systems. The conclusions were that it cannot be completely ruled out that the field levels and the duration of such TOVs are a potential threat to certain cable designs, and tests other than Load Cycling Type Tests after CIGRÉ Technical Brochure 496 could assess quantitatively the potential threat associated with long TOVs. For these reasons, in this Part 2 superimposed switching impulses applied during Type Tests after TB 496 are analyzed in order to check if such impulses might be equivalent to long TOVs as for their electro-thermal stress effects on extruded insulation. The analysis is similar to that carried out for long TOVs in Part 1, i.e., it consists of: calculating the electric field during superimposed switching impulses; comparing it with the field during long TOVs; calculating with Miner's law of cumulated damage the life lost during superimposed switching impulses and comparing it with the loss of life during TOVs. A brief literature survey of potential high field effects during long TOVs is also reported. [ABSTRACT FROM AUTHOR]

Medium voltage direct current (MVDC) power systems are in their early phase of development, but the lack of efficient and reliable DC circuit breakers is currently one of the most significant bottlenecks for widespread adoption of MVDC applications. Compared to protection devices in high voltage direct current (HVDC) systems, MVDC circuit breakers are expected to interrupt fault currents with higher rates of rise in more power-dense and more controllable structures. A hybrid approach with a piezoelectrically actuated fast mechanical switch in parallel to a solid-state circuit breaker is expected to meet the above requirements. A prototype of a 15 kV-class piezoelectrically actuated fast mechanical switch is presented in this paper. The prototype demonstrates an actuator opening time of 1 ms, a breakdown voltage of over 20 kV, and a continuous current rating of 500 A. After integrating the fast mechanical switch into a hybrid circuit breaker testbed, the fast mechanical switch was able to open within 1.5 ms and the fault was cleared within 5 ms. Therefore, piezoelectrically actuated fast mechanical switches can enable fast, reliable and controllable protection for various MVDC systems like electric ships, electric aircraft and microgrids that integrate distributed energy resources. [ABSTRACT FROM AUTHOR]

In a line-commutated converter based high-voltage direct-current (LCC-HVDC) system, the inverter control system usually includes constant extinction angle (CEA) controller, constant current (CC) controller, current error controller (CEC), and voltage-dependent current order limiter (VDCOL). However, the interaction influence of multiple controllers may cause repetitive commutation failure (CF). For this purpose, this paper deeply investigates the mechanism and the influencing factors of repetitive CF caused by controller interaction. It is found that the lower limit value of CEA controller can affect the control switching process and thus the probability of repetitive CF. Besides, the minimum gamma measurement (MGM) unit prevents the system from acquiring the real extinction angle in time, which results in the DC current fluctuation during the recovery process. Moreover, the probability of control-induced repetitive CF is much higher when the HVDC inverter is connected to a weak AC system or the AC fault is not serious but not cleared in time. Based on the above analyses, an improved control method is proposed for recovery performance improvement, which is mainly realized by modifying the lower and upper limits of the CEA controller during recovery. Finally, the simulation and experimental results verify the theoretical analyses and the proposed control method. [ABSTRACT FROM AUTHOR]

This paper introduces an averaging control strategy of the phase-unit losses of modular multilevel converters (MMCs). The quantitative analysis of the MMC phase-unit loss distribution under unbalanced ac conditions is carried out by investigating the individual component of the MMC arm currents. It shows that the unbalanced arm currents will result in unbalanced phase-unit losses. To address this issue, this paper proposes a predictive closed-loop-control-based zero-sequence voltage injection method that results in much averaged loss distribution under unbalanced ac conditions. The essence of the new method is that it adjusts the three-phase sinusoidal references so that the unbalanced arm currents are fully utilized to average phase-unit losses. This paper shows the effectiveness of the new approach by electromagnetic transient simulations on PSCAD/EMTDC. [ABSTRACT FROM AUTHOR]

Initiation of ac fault may lead to the commutation failure, and the high-voltage direct current (HVDC) system is still confronted with the risk of subsequent commutation failure (SCF) during recovery process prior to the fault clearance. In this paper, the mechanism of subsequent commutation failure is investigated through the analysis of controller response and ac-dc interaction under the symmetrical and asymmetrical faults. According to the modulation theory, a switching function method based on the line-to-line voltages is introduced to depict the voltage transfer characteristics of converters under asymmetrical faults. The early warning criterion and its corresponding early warning system for the subsequent commutation failure (SCF-EWS) are developed by taking the risks of controller regulation and the variations of electrical quantities into account. For the purpose of suppression, an emergency advance control strategy against the subsequent commutation failure (SCF-EAC) is also presented. The analysis and the proposed schemes are verified by the CIGRE benchmark model that is shipped with the PSCAD/EMTDC software under different fault conditions, and the simulation results demonstrate the feasibility and superior performance. [ABSTRACT FROM AUTHOR]

This paper presents the essential reason for subsequent commutation failures (SCFs) in high voltage direct current (HVDC) systems, and accordingly proposes a novel adaptive extinction angle recovery (AEAR) control strategy to prevent SCFs. Firstly, based on the changes of the inverter control mode after the first CF, the interaction process of inverter control loops is divided into 3 stages and analyzed in detail. It is found that the control aim of DC current is ambiguous in stage 2, causing the output of current error control (CEC) to persist above zero. In stage 3, however, the CEC output drops rapidly, leading to an uncontrolled status of extinction angle and bringing the risk of SCFs. Furthermore, the precondition for the control mode switching is derived. On the basis of that, an AEAR control strategy is proposed. By adopting an adaptive extinction angle reference, the proposed scheme maintains the inverter at the constant extinction angle (CEA) mode after the first CF. Thus, the uncontrolled status of extinction angle can be avoided. The problem of SCFs due to improper inverter control interactions is also able to be fixed at the root. Simulation results show the validity of the analysis and the superiority of the proposed control strategy in preventing SCFs. [ABSTRACT FROM AUTHOR]

Pole-to-pole dc short circuit fault blocking capability is a major concern when modular multilevel converters (MMCs) are applied in high voltage direct current (HVDC) transmission systems. Traditional MMCs based on half-bridge submodules (HBSMs) cannot block the fault current, thus needing expensive direct current circuit breakers (DCCBs). There are MMCs based on improved submodule topologies that can block dc faults, but usually with significantly increased device cost. This paper proposes an improved HBSM-based MMC (HB-MMC) which needs fewer extra semiconductor devices. The improved HB-MMC is more competitive than other schemes when it comes to investment cost and loss. An H-bridge circuit composed of two director switches and two diode valves is installed around one arm of the HB-MMC, which will not change the direction of current during the normal operation, whereas it can change the direction of the fault current when a pole-to-pole dc short circuits fault is detected. After two director switches have been turned off, a reverse-biased voltage provided by one arm can block the fault current. The topology can be further improved to provide reactive power during faults. Simulation results are presented to validate the features of the proposed improved HB-MMC. [ABSTRACT FROM AUTHOR]

Two key problems in meshed high-voltage direct current (HVDC) transmission grids are managing line power flows and protection against dc faults. Current flow controllers (CFCs) will be required to balance cable currents in meshed dc grids, in order to prevent individual line power capacity limits restricting overall power flow in the grid. Direct current circuit breakers (DCCBs) will be also required to protect HVDC grids from dc faults. This paper demonstrates that the current flow controller functionality can be added into a hybrid CB's design. This paper proposes integrating an interline CFC into the load commutation switch (LCS) of a hybrid DCCB. The integrated design LCS/CFC is analyzed and a state-space model is derived. The control of the CFC is designed and the performance of the LCS/CFC during normal operation is verified by means of MATLAB Simulink and PSCAD simulations. A comparison of the integrated LCS/CFC and the separate design is given. The case studies show a reduction in total power losses, and improved protection operation times can be achieved. [ABSTRACT FROM PUBLISHER]

This paper begins by presenting a generalized methodology for conceptualizing modular multilevel converter (MMC)-based dc–dc topologies, which is predicated on the concept of harmonic power balance. A compelling implication is that MMC-based variants of conventional switched-mode converter structures can be realized. As an example case study, this paper introduces a new dc–dc MMC for HVdc applications, which is derived from the classical buck–boost dc–dc converter. This new topology, which is revealed to be an alternative option to the well-known dual active bridge (DAB) converter with an intermediate transformer, offers buck–boost functionality and bidirectional dc fault blocking, using only two quadrant switching cells. Comparative analysis shows the proposed topology has lower operating losses and a lower total magnetics rating in comparison to an MMC-based DAB solution for dc stepping ratios around unity. A dynamic controller is developed that regulates the converter dc power throughput while maintaining balanced capacitor voltages. The converter operating principle, dynamic controller performance, and dc fault blocking are verified by simulation. [ABSTRACT FROM PUBLISHER]

An increasing number of offshore wind farms are connected to the public grid with large-scale HVDC links. The electrical transients caused by the energization of the export transformers appear more significant in the converter-driven offshore AC grid with low short-circuit power, than in direct AC grid connections. This may lead to a violation of the 2% voltage dip criterion, thus seriously affecting the production of neighboring wind farms. Additionally, the transformer and the entire insulation system are exposed to mechanical and dielectric stress. This paper investigates the influence of three factors, namely excitation, switching angle, and remnant core magnetization, onto the inrush current. Electromagnetic transient simulations and field measurements show that with a smart use of the on load tap changer, point on wave switching, and a demagnetization of the core by a cable-shunt swing circuit, the three factors above can be used as degrees-of-freedom to effectively mitigate the inrush current phenomenon. [ABSTRACT FROM AUTHOR]

This paper examines two new bidirectional hybrid dc circuit breaker (CB) topologies for application in meshed dc grids. The goal is to retain performance of hybrid dc CB with bidirectional current interruption while reducing semiconductor count, dc CB size, and weight. The fault current is routed to the unidirectional internal valve using multiple additional ultrafast disconnectors. Operation of both topologies is studied using a 320-kV, 16-kA simulation model, as well as demonstrated on a 900-V, 500-A lab prototype. The control systems are presented and discussed in detail. The low-voltage hardware prototypes verify performance of several new technical and operating solutions in laboratory conditions. A comparison is made with the existing dc CB topologies and performance and reliability compromises of each topology are assessed. The conclusion is that it might be possible to halve the dc CB semiconductor count while retaining same 2 ms opening speed and bidirectional operation. [ABSTRACT FROM AUTHOR]

Commutation failure is one of the most frequent failures in line-commutated converter based high-voltage direct-current (LCC-HVdc) systems which may lead to the outage of HVdc links, and thus affect the performance of the power system. Most commutation failures are caused by voltage reduction due to ac system faults. In this paper, a commutation failure prevention module (CFPM) is developed, which inserts the optimal value of resistance proportional to the reduced extinction angle in series with the fault current path using a simple switching method. When a fault occurs at the inverter ac side, a self turn-off switch starts switching with a pre-specified frequency and controlled modulation index, which limits the fault current to the desired value and inhibits commutation failure. The salient feature of the proposed CFPM is that it is fully controllable. In addition, despite the available controller modification methods which are not effective for low-impedance faults, the proposed CFPM can prevent commutation failure regardless of the fault severity. The practical performance and feasibility of the developed CFPM is validated through laboratory testing, using the real-time Opal-RT hardware prototyping platform. The experimental results demonstrate that the proposed strategy can effectively eliminate the commutation failure or repetitive commutation failures under different fault types. [ABSTRACT FROM AUTHOR]

In this paper, a new dc switchyard structure for a multiterminal dc (MTDC) grid is proposed. Fast fault current breaking capability, which is essential for a dc grid, can be achieved with available HVDC breaker solutions (e.g., ABB's hybrid HVDC breaker). However, the hybrid HVDC breaker concept also opens up possibilities for unconventional (relative to ac) switchyard solutions which may be more cost effective. The main aim of this paper is to expound how the proposed dc switchyard can be built with hybrid HVDC breakers in a configuration where the number of components is much less compared to a conventional switchyard structure. After that, the switchyard operation, fault current handling flexibility, and actions against component failure are described conceptually. Finally, the performance of the proposed switchyard is validated and compared with that of a conventional double breaker double busbar switchyard structure for selected cases through time-domain simulations [ABSTRACT FROM PUBLISHER]

The standard alternative-arm converters (AAC) with the sweet spot or short overlap operation have faced a challenge of balancing submodule (SM) capacitor voltages, where this issue has not been paid much attention so far. In this paper, a new control strategy for the SM-capacitor voltage balancing of the AAC applied in high-voltage dc transmission systems is proposed. The suggested control technique is composed of three regulators, where a control for the average voltage of all SM capacitors, the voltage balancing among the converter arms, and the voltage balancing of the individual SM capacitor are performed. Based on the operation principle of the standard AAC, which activates only three of six converter arms simultaneously, the energy balancing of the three activated arms is performed every one sixth of the fundamental cycle by the converter common offset voltage. Band-stop filters with the central frequencies at the fundamental, second-, and third-order components of the line frequency are applied to obtain the average values of the SM capacitor voltages for the feedback controllers. The simple proportional and integral controllers are employed for this scheme and the voltages of SM capacitors are mostly balanced during the steady states and kept closely to the rating with overshoot of less than 7% under the transient conditions. The proposed control method is verified by simulation results for a 33-level AAC under both normal and fault conditions. [ABSTRACT FROM AUTHOR]

With the development of HVdc transmission technology, the isolation of dc faults is becoming increasingly important. As the most effective solution, hybrid HVdc circuit breaker (CB) is not mature enough, which has restricted its engineering application. Accordingly, this paper proposes an auxiliary dc CB scheme suitable for HVdc grid. In this scheme, the traditional half-bridge modular multilevel converter (MMC) is partially innovated to have the ability of auxiliary breaking operation. With the effect of the MMC auxiliary breaking (MAB) operation at both ends of the fault line, the dc fault current can be easily interrupted and isolated by low-cost CB unit installed in the dc transmission line. The equivalent circuit under MAB process is analyzed, and the fault isolation sequences are designed. Furthermore, the economic comparative analysis among three schemes is performed. Finally, a four-terminal bipolar HVdc grid test model is built in PSCAD/EMTDC; in addition, an MMC prototype with proposed scheme is also developed. The simulation and experimental results validate the effectiveness of the proposed scheme. [ABSTRACT FROM AUTHOR]

Future multi-terminal dc networks are envisioned for the large-scale integration of renewable energy sources into today's power systems. An essential aspect for the reliable operation of these systems is the fast and selective dc-side fault handling and separation of faulted lines. The objective of this paper is the development and evaluation of a multi-terminal dc protection strategy based on fault-blocking converters (e.g., full-bridge based modular multi-level converters) and high-speed switches. Both a suitable fault control and a new high-speed switch design for a fast separation of faulted dc lines are elaborated. The novel concept is intended to reduce the requirements on the high-speed switches compared to dc circuit breakers and to ensure a fast restoration of the active power transmission capability, as well as the dc voltage. The fault-clearing strategy is analyzed using electromagnetic transient (EMT) simulations under variation of the fault location, type, and resistance. The investigations are carried out in a cable-based multi-terminal HVdc system with full-bridge modular multi-level converters in symmetrical monopole configuration. [ABSTRACT FROM AUTHOR]

A parallel hybrid modular multilevel converter (PHMMC) belongs to the class of modular multilevel converters, which have become potential candidates for high-voltage direct-current (HVDC) transmission systems. Due to the circuit topology of a PHMMC, the dc bus voltage contains low-order harmonics and cannot be fully regulated at a constant dc voltage. The dc bus voltage, if not properly controlled, leads to improper power transfer and increases the magnitude of dc current ripple on the dc transmission line. This paper proposes a zero-sequence voltage injection (ZSVI)-based model predictive control (MPC) strategy to control the dc current/power flow and simultaneously minimize the dc current ripple. The proposed strategy takes advantage of a cost function minimization technique to determine and inject the optimal zero-sequence voltage components into the dc- bus voltage of a PHMMC system. This paper derives a discrete-time dynamic model of the dc transmission-line current and, correspondingly, develops a predictive model. The predictive model is used to inject the appropriate amount of zero-sequence voltage components to the dc bus reference voltage waveform. Compared with the existing triplen harmonics injection method, the proposed ZSVI-MPC strategy improves the performance of a PHMMC system in terms of minimization of the dc current/voltage ripple. Performance of the proposed strategy for a 21-level PHMMC-based HVDC station system is evaluated based on time-domain simulation studies in the PSCAD/EMTDC software environment. The reported results demonstrate superior performance of the PHMMC-HVDC station operating based on the proposed ZSVI-MPC strategy, under various operating conditions, as opposed to the existing triplen harmonics injection method. [ABSTRACT FROM AUTHOR]

This paper presents a breaker arrangement concept, the multiline breaker (MLB), for the protection of multiterminal high voltage dc (MTdc) networks. Based on the design of a hybrid breaker, the MLB is an economically attractive solution for the protection of multiple dc lines in nodal connection using a single main breaker path. By using commutation units, the MLB directs the fault current through the main breaker in a unidirectional way, irrespective of the fault location. Hence, this study presents the design requirements for the MLB, regarding both hardware and control, and evaluates its operation within a grid. For this reason, a four-terminal half-bridge multilevel modular converters-based MTdc grid in radial configuration was used and pole-to-ground dc fault conditions were investigated. The dc fault response of the grid with one MLB at the central node is compared to the respective response of the grid when one hybrid breaker is employed at each dc line. The simulations show that the MLB is feasible and that the overall MTdc grid fault response for the two protection systems is very similar. As a result, the design advantages of the MLB make it a promising solution for the dc fault isolation in MTdc grids. [ABSTRACT FROM AUTHOR]

This paper studies the dc fault development stages and analyzes the fault dynamics in a point-to-point multilevel modular converters (MMC)-based dc connection. First, the effect of the dc grid configuration on the normal operation was investigated by comparing an asymmetric monopole with metallic return and a symmetric monopole. Then, the main parameters that affect the dc fault response of a grid, such as the fault type, impedance and converter blocking, were examined. Compared to previous studies, which are based on simulation results, the analysis is performed hereby both in theory, deriving the equations that describe the dc fault stages, as well as using experimental results obtained in the designed laboratory setup. The setup consists of two MMC terminals connected to two ac sources representing independent ac grids. These terminals are connected using a simple dc link based on pi-section equivalent of dc cables. The obtained results, which verified the theoretical analysis, can be used to determine the protection function thresholds of the MMC, as well as to estimate the developed stresses on dc lines during fault conditions and to define the design requirements for dc breakers. [ABSTRACT FROM PUBLISHER]

The current-carrying capability of dc lines is limited by their thermal and electric stress limits. Thus, the line current must be maintained within the permissible operational region to protect the lines from damage. In a dense dc grid, control over each line current cannot be achieved without including additional control devices. In this paper, a dual H-bridge current flow controller (2B-CFC) is used to manage the dc grid line power flow by providing dc voltage compensation in series with dc lines. A centralized hierarchical control system is proposed to coordinate the operation between multiple CFCs. A novel voltage-sharing control scheme is demonstrated. It is shown that such a scheme reduces the workload on a single CFC by sharing the required control voltage between multiple CFCs, and, in addition, can be used to avoid control conflicts among active CFCs during communication failure. An experimental platform consisting of a three-terminal dc grid and small-scale 2B-CFC prototypes has been developed to validate the concepts. For completeness, the CFC performance has been analyzed for overload conditions and when no communication exists. Small-scale dc circuit breakers have been developed to study the CFC performance under a pole-to-pole fault. [ABSTRACT FROM PUBLISHER]

High-voltage direct current (HVDC) grids will require the development of dc protections that provide fast fault isolation and minimize the disturbance caused to the existing ac power networks. This paper investigates how the dc fault recovery performance of a half-bridge modular multilevel converter (HB-MMC) is impacted by different dc protection design choices. An HB-MMC point-to-point HVDC system that is protected with dc circuit breakers (CBs) is simulated on a real-time digital simulator using detailed switch models of the converters and switch gear. A dc CB controller has been developed and implemented in a software-in-the-loop fashion, and has been made available free for download. A novel blocking scheme for the HB-MMC is proposed, which limits the prospective dc-side fault current, benefiting dc switch gear. A comparison of circulating current controllers shows that the standard d —q controller is likely to be unsuitable for fault studies. Finally, benchmarking shows that a 48% reduction in power-flow recovery time and a 90% reduction in the energy dissipated in the circuit breaker can be achieved, along with other benefits, depending on the protection design. [ABSTRACT FROM PUBLISHER]

The ground return current of a high voltage direct current system will intrude the transformers adjacent to the grounding electrode in the case of monopole operation, leading to the half-cycle saturation of transformers. To mitigate the adverse effect, placing dc blocking devices (BDs) in transformer neutrals is popularly advocated. The conventional switching method of BDs may redirect the dc flow from one transformer with a BD to neighboring transformers without BDs. In this case, the dc currents through the neutrals of those transformers may possibly exceed the threshold undesirably. This problem is due to the lack of guidance for dc current distribution from the global view by means of finite BDs. Thus, this paper presents an optimization approach for the switching of BDs based on the gravitational search algorithm. A mathematical model for investigating the dc global distribution is established with the equivalent resistive network of an ac system, the location distribution of substations and grounding electrodes. Then, an optimal switching scheme to minimize the adverse impact of dc bias is presented, and the principle and the concrete implementation process are detailed. The feasibility and the advantage of the proposed scheme are demonstrated by numerous comparative case studies. [ABSTRACT FROM AUTHOR]

A control technique is proposed in this paper for control of modular multilevel converters (MMC) in high-voltage direct current (HVDC) transmission systems. Six independent dynamical state variables are considered in the proposed control technique, including two ac currents, three circulating currents, and the dc-link voltage, for effectively attaining the switching state functions of MMCs, as well as for an accurate control of the circulating currents. Several analytical expressions are derived based on the reference values of the state variables for obtaining the MMC switching functions under steady state operating conditions. In addition, dynamic parts of the switching functions are accomplished by the direct Lyapunov method to guarantee stable operation of the proposed technique for control of MMCs in HVDC systems. Moreover, the capability curve of MMC is developed to validate maximum power injection from MMCs into the power grid and/or loads. The impacts of the variations of MMC output and dc-link currents on the stability of dc-link voltage are also evaluated in detail by small-signal analysis. [ABSTRACT FROM PUBLISHER]

Without additional circuitry, the half-bridge modular multilevel converter (HB-MMC) is endangered under dc-side faults. Typically, a bypass thyristor is augmented to each HB cell to take up fault current until ac circuit breakers interrupt the dc fault. This paper proposes a dc fault protection concept for HB-MMC stations that requires insignificant extra silicon area relative to the thyristor bypass concept. Herein, bypass thyristors of typical HB cells are rearranged such that an independent modular shadow rectifier bridge (SRB) is formed. A low-loss switch assembly is utilized to immediately isolate the MMC following fault detection and the SRB suppresses the fault current by injecting a reverse dc voltage. Among several advantages, the proposed arrangement incurs insignificant losses in steady state, and in some arrangements the MMC is capable of operating in STATCOM mode briefly after fault inception to support ac grid voltage. The proposed concept may be suitable for clearing temporary faults on overhead HVdc lines. Several structural variations will be viewed and discussed. Applicability for a two-level voltage source converter will be addressed. The concept is validated by detailed numerical simulations of a ±200-kV HB-MMC station under dc fault. [ABSTRACT FROM PUBLISHER]

This paper proposes a startup sequence for a modular multilevel converter (MMC) HVDC-connected offshore wind farm (OWF) and demonstrates how it can be simulated using an electromagnetic transient-type tool. The objective is to analyze inrush currents of transformers and cables (HVAC and HVDC). Modeling accuracies and computational performances are examined using three existing modeling methods for the MMCs. [ABSTRACT FROM PUBLISHER]

The large number of switching elements in the modular multilevel converter (MMC) is a challenging problem when modeling the MMC-HVDC systems for the computation of electromagnetic transients. The modeling complexity increases even further when a multiterminal (MT) MMC-HVDC system is used to integrate offshore wind farms (OWFs) with power-electronics-based wind energy converters, such as doubly fed induction generators (DFIGs). This paper compares modeling accuracy and computational performances for various combinations of MMC and OWF models. Onshore and offshore ac fault simulations are performed for an OWF system composed of DFIG-type wind turbines and connected to a practical ac grid through an MT MMC-HVDC system. The OWF system model includes the detailed representation of the offshore collector grid and the associated overcurrent protection. The offshore MMC controls include an offshore fault current limiter and fast OWF power generation reduction-based fault-ride-through function. [ABSTRACT FROM PUBLISHER]

Multimodule converter-based high-voltage dc (HVDC) power transmission incorporates numerous voltage-source converters (VSCs) connected in series/parallel to provide increased voltage/current and, hence, power ratings. When a selective harmonic elimination pulsewidth-modulation (SHE-PWM) technique is employed, the switching losses of the VSC modules are reduced but the voltages of the series-connected dc capacitors are not naturally balanced. In this paper, a voltage-balancing technique is reported. The technique relies on monitoring the voltage of each dc capacitor and when such voltage exceeds its preset band, the realization of the multilevel waveform reallocates the task to another VSC module to ensure that voltage balance between all capacitors is achieved. Three-phase bipolar VSC modules are considered in this paper and each one is modulated by a precalculated multilevel SHE-PWM waveform. The time-domain waveforms and their line-to-line voltage spectra are verified by simulation using PSCAD/EMTDC. The selected results are presented to confirm the viability of the proposed method. [ABSTRACT FROM PUBLISHER]

This paper presents a new solution method that combines state-space and nodal analysis for the simulation of electrical systems. The presented flexible clustering of state-space-described electrical subsystems into a nodal method offers several advantages for the efficient solution of switched networks, nonlinear functions, and for interfacing with nodal model equations. This paper extends the concept of discrete companion branch equivalent of the nodal approach to state-space described systems and enables natural coupling between them. The presented solution method is simultaneous and enables benefitting from the advantages of two different modeling approaches normally exclusive from one another. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) is a newly introduced switch-mode converter topology with the potential for high-voltage direct current (HVDC) transmission applications. This paper focuses on the dynamic performance of an MMC-based, back-to-back HVDC system. A phase-disposition (PD) sinusoidal pulsewidth modulation (SPWM) strategy, including a voltage balancing method, for the operation of an MMC is presented in this paper. Based on the proposed PD-SPWM switching strategy, a mathematical model for the MMC-HVDC system, under both balanced and unbalanced grid operation modes, is developed. Dynamic performance of the MMC-based back-to-back HVDC converter system, based on time-domain simulation studies in the PSCAD/EMTDC environment, is then evaluated. The reported time-domain simulation results show that based on the adopted PD-SPWM switching strategy, the MMC-HVDC station can respond satisfactorily to the system dynamics and control commands under balanced and unbalanced conditions while maintaining voltage balance of the dc capacitors. [ABSTRACT FROM PUBLISHER]

Double 12-pulse ultra HVDC transmission systems of \pm 800 kV and \pm 660 kV have larger transmission capacities, more complicated configurations, more complex operation modes, and more components, in comparison to \pm 500 kV or less HVDC transmission systems. Hence, the reliability evaluation of the ultra HVDC transmission system is more complicated than that of the HVDC system. To thoroughly describe different operating modes, this paper presents two new reliability measures for ultra HVDC transmission systems, that is, partial monopole forced outage times and partial bipole-forced outage times. Reliability evaluation models for individual subsystems, including converter transformers (CT), ac filters, converter valve groups, and smoothing reactors have been built considering operation modes and configuration characteristics. In particular, the reliability model of the CT subsystem was built by considering the type and the number of standby CTs, and that of the ac filter subsystem was built by considering the capacity state table of filters. A reliability evaluation model for ultra HVDC transmission systems was proposed by combining reliability logic relationships among subsystems and using the state enumeration method. Case studies of practical ultra HVDC transmission systems illustrate the correctness of indices and the proposed models. In addition, sensitivity analysis and standby analysis of major components were also conducted. [ABSTRACT FROM PUBLISHER]

Multilevel current source converters are a smart choice for the high-power applications with low-voltage and high-current requirements. This paper presents the detailed analysis of a current source modular multilevel converter (CSMMC) and its application as a STATCOM. Various properties of CSMMC are compared with the voltage-source modular multilevel converter (VSMMC). The submodule inductance selection method and a sorting-based algorithm for inductor current balancing are proposed for CSMMC. The validity of the inductance selection method and the inductor current balancing algorithm are confirmed by the simulation of a three-phase CSMMC using PSCAD/EMTDC. The carrier phase-shifted sinusoidal pulsewidth modulation is used as the switching technique. The performance of a converter is analyzed with interleaved and noninterleaved carrier signals for the upper and lower arms. Results show that CSMMCs and corresponding VSMMCs have analogous features. Hence, the development on VSMMCs can be used for reference to CSMMCs and vice-versa. Furthermore, the control designs for CSMMC-based STATCOM are presented and verified using simulations. The obtained results of the proposed STATCOM show that the steady-state and transient performance of the system are quite satisfactory. This makes the CSMMC suitable for HVDC and flexible ac transmission systems applications. [ABSTRACT FROM PUBLISHER]

The three-phase series-connected modular multilevel converter (SC-MMC) is presented as one option for high-voltage direct current (HVDC) tap to reduce the cost of an HVDC station. Compared with conventional three-phase parallel-connected MMC, the number of semiconductor switches in SC-MMC is reduced by one-third to withstand the same dc voltage. First, the paper studies the operating principle of SC-MMC, and then presents an interspacing phase-shifted pulsewidth-modulated method which could improve the waveform of the output ac voltage for a given switching frequency. Next, the control strategy based on the identical real power input of each phase is proposed to balance the dc voltage of each phase under an unbalanced grid condition. The current limit of switching devices is also taken into consideration to protect SC-MMC from overcurrent. Furthermore, a universal zero-sequence current controller is developed as one part of the control strategy. In addition, an innovative method to suppress the third harmonics of ac current is presented. With the third harmonic suppression strategy, the SC-MMC can operate with much smaller SM capacitors without deteriorating the ac current, which contributes to the cost reduction further. Finally, simulation results obtained in PSCAD/EMTDC are provided to validate the proposed control strategies. [ABSTRACT FROM PUBLISHER]

This paper compares how a dc fault affects a multiterminal dc (MTdc) network depending on the HVDC transmission system topology. To this end, a six-step methodology is proposed for the selection of the necessary dc fault protection measures. The network consists of four voltage-source converters converters radially connected. The converters natural fault response to a dc fault for the different topologies is studied using dynamic simulation models. For clearing of the dc faults, four different dc breaker technologies are compared based on their fault interruption time, together with a current direction fault detection method. If necessary, the converters are reinforced with limiting reactors to decrease the peak value and rate of rise of the fault currents providing sufficient time for the breakers to isolate the fault without interrupting the MTdc network operation. The study shows that the symmetric monopolar topology is least affected by dc contingencies. Considering bipolar topologies, the bipolar with metallic return exhibits better fault response compared to the one with ground return. Topologies with ground or metallic return require full semiconductor or hybrid breakers with reactors to successfully isolate a dc fault. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) has become the most promising converter technology for high-voltage direct current (HVDC) transmission systems. However, similar to any other voltage-sourced converter-based HVDC system, MMC-HVDC systems with the half-bridge submodules (SMs) lack the capability of handling dc-side short-circuit faults, which are of severe concern for overhead transmission lines. In this paper, two new SM circuit configurations as well as a hybrid design methodology to embed the dc-fault-handling capability in the MMC-HVDC systems are proposed. By combining the features of various SM configurations, the dc-fault current path through the freewheeling diodes is eliminated and the dc-fault current is enforced to zero. Several MMC configurations based on the proposed hybrid design method and various SM circuits, that is, the half-bridge, the full-bridge, the clamp-double, and the five-level cross-connected SMs, as well as the newly proposed unipolar-voltage full-bridge and three-level cross-connected SMs, are investigated and compared in terms of the dc-fault-handing capability, semiconductor power losses, and component requirements. The studies are carried out based on time-domain simulation in the PSCAD/EMTDC software environment for various SM configurations and dc-fault conditions. The reported study results demonstrate the proposed hybrid-designed MMC-HVDC system based on the combination of the half-bridge and the proposed SM circuits is the optimal design among all evaluated systems in terms of the dc-fault-handing capability, semiconductor power losses, and component requirements. [ABSTRACT FROM PUBLISHER]

This paper presents an average-value model of a line-commutated converter-based HVDC system using dynamic phasors. The model represents the low-frequency dynamics of the converter and its ac and dc systems, and has lower computational requirements than a conventional electromagnetic-transient (EMT) switching model. The developed dynamic-phasor model is verified against an EMT model of the CIGRE HVDC Benchmark. Simulation results confirm the validity and accuracy of the average value model in predicting the low-frequency dynamics of the ac- and dc-side quantities. Merits and applicability limitations of the average model are highlighted. [ABSTRACT FROM AUTHOR]

This paper presents a new method based on piecewise analytical formulas to evaluate the valve losses of the modular multilevel converter based high-voltage direct current (MMC-HVDC) transmission systems. According to the generating mechanism, the total valve losses of the MMC are divided into three parts: 1) conduction losses; 2) essential switching losses; and 3) additional switching losses. Due to the large number of arm submodules in MMC–HVDC links, the harmonic components in the arm voltages and currents are omitted. Therefore, the conduction losses and the essential switching losses can be precisely represented by analytical formulas. The additional switching losses are described by an analytical upper limit. The case studies are performed on a 400-MW\pm 200-kV MMC-HVDC system under 12 typical operating conditions. Both the relative errors of the conduction losses and the essential switching losses between the analytical and the simulated results are within \pm4%. The analytical upper limits cover almost all of the simulated results for additional switching losses. Finally, an acceptable number for the analytical method is described based on the simulation results, which proves the effectiveness of this method and clarifies the potential to take advantage of this method in engineering applications. [ABSTRACT FROM AUTHOR]

Modular multilevel converters (MMCs) may contain numerous insulated-gate bipolar transistors. The modeling of such converters for electromagnetic transient-type (EMT-type) simulations is complex. Detailed models used in MMC-HVDC simulations may require very large computing times. Simplified and averaged models have been proposed in the past to overcome this problem. In this paper, existing averaged and simplified models are improved in order to increase their range of applications. The models are compared and analyzed for different transient events on an MMC-HVDC system. [ABSTRACT FROM AUTHOR]

A high-voltage direct current system using modular multilevel converter (MMC-HVDC) is a potential candidate for grid integration of renewable energy over long distances. The dc-link fault is an issue MMC-HVDC must deal with, especially for the nonpermanent faults when using overhead lines. This paper proposed a protection scheme to implement fast fault clearance and automatic recovery for nonpermanent faults on dc lines. By employing double thyristor switches, the freewheeling effect of diodes is eliminated and the dc-link fault current is allowed to freely decay to zero. Then, the dc arc can be naturally extinguished and the insulation on the short-circuit point can be restored. The thyristor switches convert the dc-link fault into an ac short circuit of the ac grid through MMC arms. The ac short-circuit current can be cleared simply by turning off all thyristor switches. Since circuit breakers are not tripped during fault clearance, MMC can immediately and automatically rebuild the dc-link voltage and restart power transmission. Simulation results using PSCAD/EMTDC have verified the validity of the proposed protection scheme. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) is one of the most potential converter topologies for high-power/voltage systems, specifically for high-voltage direct current (HVDC). One of the main technical challenges of an MMC is to eliminate/minimize the circulating currents of converter arms while the capacitor voltages are maintained balanced. This paper proposes a model predictive control (MPC) strategy that takes the advantage of a cost function minimization technique to eliminate the circulating currents and carry out the voltage balancing task of an MMC-based back-to-back HVDC system. A discrete-time mathematical model of the system is derived and a predictive model corresponding to the discrete-time model is developed. The predictive model is used to select the best switching states of each MMC unit based on evaluation and minimization a defined cost function associated with the control objectives of MMC units and the overall HVDC system. The proposed predictive control strategy: 1) enables control of real and reactive power of the HVDC system; 2) achieves capacitor voltage balancing of the MMC units; and 3) mitigates the circulating currents of the MMC units. Performance of the proposed MPC-based strategy for a five-level back-to-back MMC-HVDC is evaluated based on time-domain simulation studies in the PSCAD/EMTDC software environment. The reported study results demonstrate a satisfactory response of the MMC-HVDC station operating based on the proposed MPC strategy, under various conditions. [ABSTRACT FROM AUTHOR]

This paper presents design and control methods for fault-tolerant operations with redundant converter modules, one of the most prominent features in modular multilevel converter (MMC) topology. In fully implementing MMC functionalities, a nearest level control is applied as a low-switching modulation method. A dual sorting algorithm is newly proposed for effectively reducing the switching commutations of each power module as well as for voltage balancing control. Built upon these primary MMC topological and control features, its redundant operation is comprehensively investigated for fail-safe energy transfer. In particular, a novel spare process is proposed to handle an emergency situation when the number of faulty power modules exceeds the module redundancy. Since topological redundancy may cause the switching commutations of power modules in an arm to be unevenly distributed, a practical and effective mitigation measure is incorporated to keep the energy balance while avoiding the undesired switching stresses. Rigorous simulation studies for MMC and its application for high-voltage direct current are performed to demonstrate the validity and effectiveness of the proposed spare process under normal and emergency conditions. [ABSTRACT FROM AUTHOR]

Voltage-source-converter (VSC) technologies present a bright opportunity in a variety of fields within the power system industry. New modular multilevel converters (MMCs) are expected to supersede two- and three-level VSC-based technologies for HVDC applications due to their recognized advantages in terms of scalability, performance, and efficiency. The computational burden introduced by detailed modeling of MMC-HVDC systems in electromagnetic-transients (EMT)-type programs complicates the study of transients especially when these systems are integrated into a large network. This paper presents a novel average-value model (AVM) for efficient and accurate representation of a detailed MMC–HVDC system. It also develops a detailed 401-level MMC-HVDC model for validating the AVM and studies the performance of both models when integrated into a large 400-kV transmission system in Europe. The results show that the AVM is significantly more efficient while maintaining its accuracy for the dynamic response of the overall system. [ABSTRACT FROM AUTHOR]