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The modular multilevel converter (MMC), owing to the presence of a large number of submodules (SMs) and energy storing elements, requires a large footprint and initial investment. To address these issues, this paper proposes the switched modular multilevel converter (SMMC). It consists of two major elements; the chain-links (CLs), consisting of cascade connection of SMs as in MMC, and the single-pole-triple-throw (SPTT) switches, which can be realized using either the T-type or NPC-type switch strings. The SMMC works on the principle of connecting all the phase-legs in series and their respective positions are mutually interchanged. It offers a compact structure as the SMs count is reduced to 33% of MMC, which results in a much lower energy storage requirement. Furthermore, it does not have inter-phase circulating current problem and hence the CL inductors can also be avoided. The SMMC structure, operating principles, control, and modulation schemes are explained in detail. A detailed comparison of SMMC with the other major existing converters is carried out to highlight the important features of SMMC. The efficacy of SMMC is validated using PSCAD simulation studies with a 19-level grid-connected SMMC model. A 3-phase 19-level SMMC laboratory prototype is developed to further validate its feasibility. [ABSTRACT FROM AUTHOR]

The safety of converters is key to the stable operation of AC/DC hybrid power grids after AC faults. Thyristor valve current is a direct manifestation of the converter observability, but there are no measuring elements inside the converter, so the thyristor valve current can be reflected only indirectly through external electrical quantities. This paper proposes a virtual measurement scheme based on the temporal features of the converter terminal current. First, under the action of the trigger pulse, the polarity characteristics of the AC current and temporal features between the valves are utilized to predictive estimate the valve state. Then, when commutation failures occur and the bypass paths form, the conduction state of valve is constructed based on the relationship between AC and DC current. Last, when the valve is to be shut-off in the bypass path, the blocking state of the valve is corrected based on the unidirectional conductance characteristics of the valve. According to the above analysis, combined with the topological current equation of the converter, the valve current can be calculated in the whole process. Through the simulation of the different valve states and bypass paths and analysis of the field record data, the results show that the valve current can still be accurately calculated based on the virtual measurement scheme. [ABSTRACT FROM AUTHOR]

Most microgrid protection schemes found in published literature suffer from a lack of generality in that they work well for the assumed topology, including type and placement of sources. Other generic protection schemes tend to be too complicated, too expensive, or both. To overcome these drawbacks, a topology-agnostic, scalable, and cost-aware protection based on fundamental principles that work in the presence of high penetration of inverter-based resources (IBRs) is developed and tested in this paper. The protection system also implements stable automatic reconfiguration of the healthy sections of the system after clearance of fault, thus increasing resilience by self-healing. To achieve this ambitious goal, stable inverter models are developed that operate in unbalanced networks in grid-connected and islanded modes, even with 100% IBRs, share power without conflicting controls, and can ride through faults while limiting fault currents. The scheme is tested for primary and backup protection and reconfiguration on the IEEE 123-node feeder in grid-connected and islanded modes with 15 IBRs connected to the system. [ABSTRACT FROM AUTHOR]

The missing capability of DC fault current limitation is an inherent disadvantage in the typical half-bridge modular multilevel converter (MMC), which restricts its application in long-distance high voltage direct current (HVDC) systems. The full-bridge submodule (FBSM) and clamped double submodule (CDSM) topologies allow for fault current self-clearing, but also suffer from additional hardware cost and power losses. In this paper, an improved submodule topology utilizing the new reverse-blocking insulated gate bipolar transistor (RB-IGBT) is proposed to improve system economy without compromising its performance. The operating principles and DC fault characteristics of the proposed topology are analyzed in details, including comparison with various topologies in terms of cost, losses, fault current clearing speed and thermal. Compared with the traditional CDSM topology, the proposed RBSM can clear DC faults faster with reduced cost of switching devices. A DC fault protection strategy for MMC-HVDC system is also presented. Simulation results under normal operating, permanent and transient fault conditions are carried out to verify the effectiveness of the proposed topology. [ABSTRACT FROM AUTHOR]

Network topology identification (TI) is an essential function for distributed energy resources management systems (DERMS) to organize and operate widespread distributed energy resources (DERs). In this paper, discriminant analysis (DA) is deployed to develop a network TI function that relies only on the measurements available to DERMS. The propounded method is able to identify the network switching configuration, as well as the status of protective devices. Following, to improve the TI resiliency against the interruption of communication channels, a quadratic programming optimization approach is proposed to recover the missing signals. By deploying the propounded data recovery approach and Bayes’ theorem together, a benchmark is developed afterward to identify anomalous measurements. This benchmark can make the TI function resilient against cyber-attacks. Having a low computational burden, this approach is fast-track and can be applied in real-time applications. Sensitivity analysis is performed to assess the contribution of different measurements and the impact of the system load type and loading level on the performance of the proposed approach. [ABSTRACT FROM AUTHOR]

DC transformer is an essential equipment for formation of multi-voltage-level DC grid. This paper proposes a novel non-isolated Boost-type alternate arm DC transformer (Boost-AADCT) for medium- and high-voltage level DC grid application. The Boost-AADCT is comprised of three submodule-cascaded arms, two thyristor-cascaded director switches, and two buffer capacitors. Bidirectional power transmission is achieved by alternatively charging and discharging of the intermediate arm following the Boost principle, while the pulsating power component caused by intermittent transmission is actively smoothened by grid-side buffer subcircuits formed by the buffer capacitors and grid-side arms. The active power buffering method increases the tolerance range of voltage ripple of the buffer capacitor, and the required energy storage capacity is resultantly reduced. Circuit configuration, operation principle, and mathematical model are first introduced. Then, the control strategy is proposed, the main circuit parameters are designed, and bidirectional fault-blocking capability is analyzed. Comparison with other DC-DC converters shows that the Boost-AADCT significantly reduces the requirement of semiconductors and has relatively lower synthetic cost. At last, performance of the Boost-AADCT and the proposed control strategies are evaluated by simulation tests conducted in MATLAB/Simulink environment. [ABSTRACT FROM AUTHOR]

The hybrid modular multilevel converter (HMMC), consisting of half-bridge and full-bridge submodules (SMs), has become a competitive topology due to the DC fault ride-through capability (FRTC). Redundancy schemes need to be employed to improve the reliability, including fixed-level and voltage-sharing active schemes, as well as passive scheme. However, different schemes affect reliability differently, which entails specific models. The contributions of this paper involve that analytical reliability models of HMMCs are proposed with considerations of voltage stress in active scheme, as well as imperfect bypass switch in passive scheme, and the comparison of different schemes is conducted to help the redundancy design. The reliability of HMMCs is divided into basic and extra components by the requirement of FRTC, which are modeled through the Markov chain and iteration method. A case study is conducted to validate the feasibility and accuracy of the proposed models, and the reliability analysis is presented, together with comparisons of different redundancy schemes. The results illustrate that reliability improvements of both fixed-level mode and passive scheme are prone to suffer saturation effect with the increase of redundant half-bridge SMs, which may even cause reliability decline in voltage-sharing mode. [ABSTRACT FROM AUTHOR]

Pole-to-pole dc short circuit fault blocking capability is a major concern when modular multilevel converters (MMCs) are applied in high voltage direct current (HVDC) transmission systems. Traditional MMCs based on half-bridge submodules (HBSMs) cannot block the fault current, thus needing expensive direct current circuit breakers (DCCBs). There are MMCs based on improved submodule topologies that can block dc faults, but usually with significantly increased device cost. This paper proposes an improved HBSM-based MMC (HB-MMC) which needs fewer extra semiconductor devices. The improved HB-MMC is more competitive than other schemes when it comes to investment cost and loss. An H-bridge circuit composed of two director switches and two diode valves is installed around one arm of the HB-MMC, which will not change the direction of current during the normal operation, whereas it can change the direction of the fault current when a pole-to-pole dc short circuits fault is detected. After two director switches have been turned off, a reverse-biased voltage provided by one arm can block the fault current. The topology can be further improved to provide reactive power during faults. Simulation results are presented to validate the features of the proposed improved HB-MMC. [ABSTRACT FROM AUTHOR]

Two key problems in meshed high-voltage direct current (HVDC) transmission grids are managing line power flows and protection against dc faults. Current flow controllers (CFCs) will be required to balance cable currents in meshed dc grids, in order to prevent individual line power capacity limits restricting overall power flow in the grid. Direct current circuit breakers (DCCBs) will be also required to protect HVDC grids from dc faults. This paper demonstrates that the current flow controller functionality can be added into a hybrid CB's design. This paper proposes integrating an interline CFC into the load commutation switch (LCS) of a hybrid DCCB. The integrated design LCS/CFC is analyzed and a state-space model is derived. The control of the CFC is designed and the performance of the LCS/CFC during normal operation is verified by means of MATLAB Simulink and PSCAD simulations. A comparison of the integrated LCS/CFC and the separate design is given. The case studies show a reduction in total power losses, and improved protection operation times can be achieved. [ABSTRACT FROM PUBLISHER]

This paper begins by presenting a generalized methodology for conceptualizing modular multilevel converter (MMC)-based dc–dc topologies, which is predicated on the concept of harmonic power balance. A compelling implication is that MMC-based variants of conventional switched-mode converter structures can be realized. As an example case study, this paper introduces a new dc–dc MMC for HVdc applications, which is derived from the classical buck–boost dc–dc converter. This new topology, which is revealed to be an alternative option to the well-known dual active bridge (DAB) converter with an intermediate transformer, offers buck–boost functionality and bidirectional dc fault blocking, using only two quadrant switching cells. Comparative analysis shows the proposed topology has lower operating losses and a lower total magnetics rating in comparison to an MMC-based DAB solution for dc stepping ratios around unity. A dynamic controller is developed that regulates the converter dc power throughput while maintaining balanced capacitor voltages. The converter operating principle, dynamic controller performance, and dc fault blocking are verified by simulation. [ABSTRACT FROM PUBLISHER]

This paper examines two new bidirectional hybrid dc circuit breaker (CB) topologies for application in meshed dc grids. The goal is to retain performance of hybrid dc CB with bidirectional current interruption while reducing semiconductor count, dc CB size, and weight. The fault current is routed to the unidirectional internal valve using multiple additional ultrafast disconnectors. Operation of both topologies is studied using a 320-kV, 16-kA simulation model, as well as demonstrated on a 900-V, 500-A lab prototype. The control systems are presented and discussed in detail. The low-voltage hardware prototypes verify performance of several new technical and operating solutions in laboratory conditions. A comparison is made with the existing dc CB topologies and performance and reliability compromises of each topology are assessed. The conclusion is that it might be possible to halve the dc CB semiconductor count while retaining same 2 ms opening speed and bidirectional operation. [ABSTRACT FROM AUTHOR]

The no-load curve of the dielectric recovery strength of the ultra-fast mechanical vacuum switch (MVS) changing with time is the theoretical foundation to optimize the turn-off strategy of the hybrid direct current circuit breaker with load commutation switch. To avoid the shortcomings of the classic synthetic circuit, a novel test circuit is proposed to measure the no-load dielectric recovery curve of the MVS in this paper. In the test circuit, a succession of pulse voltages is automatically applied on the MVS, and multiple breakdowns of the MVS occur in one test. Therefore, the dielectric strength of the MVS at multiple time points is obtained, and the envelope of the applied voltage on the MVS during one test can describe the dielectric recovery curve of the MVS; as a result, the test workload could be reduced dramatically and the measurement is more authentic. By changing test conditions, including the rate of rise of the test voltage and the operating speed of the MVS, no-load dielectric recovery characteristics are studied. The research has shown that the dielectric recovery speed of the MVS is irrelative with the rate of rise of the test voltage and it is directly proportional to the opening speed of the MVS. [ABSTRACT FROM AUTHOR]

This paper presents a new concept and approach for topology control and switching in distribution systems by extending the traditional circuit switching to laterals and single-phase loads. Voltage unbalance and other key performance indicators including voltage magnitudes, line loading, and energy losses are used to characterize and demonstrate the technical value of optimizing system topology on a per-phase basis in response to feeder conditions. The near-optimal per-phase topology control is defined as a series of hierarchical optimization problems. The proposed approach is applied to IEEE 13-bus and 123-bus test systems for demonstration, which included the impact of integrating electric vehicles (EVs) in the test circuit. It is concluded that the proposed approach can be effectively leveraged to improve voltage profiles with electric vehicles, the extent of which depends on the performance of the base case without EVs. [ABSTRACT FROM AUTHOR]

This paper presents a breaker arrangement concept, the multiline breaker (MLB), for the protection of multiterminal high voltage dc (MTdc) networks. Based on the design of a hybrid breaker, the MLB is an economically attractive solution for the protection of multiple dc lines in nodal connection using a single main breaker path. By using commutation units, the MLB directs the fault current through the main breaker in a unidirectional way, irrespective of the fault location. Hence, this study presents the design requirements for the MLB, regarding both hardware and control, and evaluates its operation within a grid. For this reason, a four-terminal half-bridge multilevel modular converters-based MTdc grid in radial configuration was used and pole-to-ground dc fault conditions were investigated. The dc fault response of the grid with one MLB at the central node is compared to the respective response of the grid when one hybrid breaker is employed at each dc line. The simulations show that the MLB is feasible and that the overall MTdc grid fault response for the two protection systems is very similar. As a result, the design advantages of the MLB make it a promising solution for the dc fault isolation in MTdc grids. [ABSTRACT FROM AUTHOR]

The dc tap or dc transformer will play an important role in interfacing different voltages of dc links in dc grids. This paper presents an isolated resonant mode modular converter (RMMC) with flexible modulation and assorted configurations to satisfy a wide variety of interface requirements for medium-voltage dc (MVdc) networks. The transformerless RMMC, as introduced in the literature, implemented a restricted modulation scheme leading to a very limited range of step ratio and the diode rectifier resulted in unidirectional power flow. Both of these limitations are removed in this proposal and galvanic isolation has also been added. Moreover, this new RMMC approach can serve as a building block for variety of configurations. Two such derived topologies are given, which inherently balance the voltage and current between different constituent circuits and realize the high power rating conversion for very low or very high step-ratio application. The theoretical analysis is validated by a set of full-scale simulations and a downscaled experimental prototype. The results illustrate that this isolated RMMC and its derivatives have promising features for dc taps or dc transformers in MVdc applications. [ABSTRACT FROM PUBLISHER]

This paper proposes a new reconfiguration heuristic in order to reduce the total power loss and the maximum current of electrical radial networks. It is based on the branch-and-bound strategy, which is an implicit enumeration method that uses a tree structure and bounds to organize the searching process. The search tree in this paper is constructed by subdividing the feasible set using the branch-exchange technique in the networks. The constraints and the Pareto dominance are responsible for pruning the search tree. The heuristic also returns a feasible switching plan for each solution. The algorithm was successfully applied to medium- and large-scale problems. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC or M2C) is an emerging attractive multilevel topology for medium-voltage high-power applications. The capacitor voltage balancing control and the improvement of output current rating are two challenging issues of MMC. This paper proposed a new parallel-connected diode-clamped M2C (DCM2C), in which each arm consists of two parallel-connected clusters. In this topology, the capacitor voltages can be balanced automatically without any balancing control algorithms. Theoretically, no voltage sensors are needed to measure the capacitor voltages theoretically. Thus, the control of the converter can be simplified greatly. With a simple current-sharing control, an equal current distribution can be achieved between the two clusters. Furthermore, an extended parallel-DCM2C is proposed for larger current applications, and the corresponding current-sharing control method is developed. Experimental results validated the voltage self-balancing capability of parallel-DCM2C and the effectiveness of the proposed current-sharing control. [ABSTRACT FROM PUBLISHER]

This paper proposes a new fault ride-through (FRT) configuration for a fixed-speed induction generator-based–wind turbine (FSIG–WT). It utilizes a nine-switch converter (NSC) to enable shunt and series compensation in response to the system dynamics and grid faults. The steady-state control strategy and transient-management scheme are developed to ensure proper performance in steady-state, dynamic operation as well as enhanced FRT capability of the FSIG–WT. In addition to that, the developed control strategy tackles the balanced and unbalanced operation of the electric grid with an enhanced positive- and negative-sequence compensation control scheme. The recently reported grid synchronization scheme, namely, the frequency-locked loop (FLL) is implemented to achieve fast phase detection and transient response. Consequently, the performance of the FLL has been compared with the multiple reference–frame–phase-locked loop (MRF–PLL) to demonstrate its superior performance for enhancing transient response. The proposed topology, FLL, and control strategies are verified through a comprehensive simulation study to demonstrate the enhancement of the transient response and FRT capability of FSIG-WT in adherence to grid-code requirements. [ABSTRACT FROM PUBLISHER]

A challenge raised in today's power system is assessing the system protection security and dependability after the topology has been changed due to relay operation upon the occurrence of cascading faults or intentional operator switching action. This paper proposes an automated setting calculation module which could be used to review the adequacy of the distance relay settings following network topology changes. The calculation procedure is broken down into blocks which could be processed in parallel in order to improve the computation speed. A new concept called distance of impact is proposed to reduce the computational burden by conducting the calculations on a limited portion of the network affected by the topology change. The module performance is tested on a synthetic IEEE 118-bus and real-life Alberta transmission operator systems. A sensitivity analysis in the form of N-2 contingency impact on the network relay settings coordination is conducted on the test systems. [ABSTRACT FROM PUBLISHER]

The high voltage direct current transmission system based on modular multilevel converter (MMC-HVDC) technology is now studied and used widely. But traditional half bridge topology of sub module (HBSM) of MMC can't block dc link fault current because of the freewheeling effect of diodes. In order to solve this problem, firstly, this paper improves HBSM topology, a series connected double sub module (SDSM) is designed and dc link fault current blocking capability is realized without tripping ac circuit breaker, so MMC-HVDC with this improved topology can immediately rebuild dc link voltage and resume power transmission. Secondly, the self starting and fault disposing procedure are also designed. At last, simulations in the software PSCAD/EMTDC are carried out to verify its effectiveness and feasibility. [ABSTRACT FROM AUTHOR]

This paper compares how a dc fault affects a multiterminal dc (MTdc) network depending on the HVDC transmission system topology. To this end, a six-step methodology is proposed for the selection of the necessary dc fault protection measures. The network consists of four voltage-source converters converters radially connected. The converters natural fault response to a dc fault for the different topologies is studied using dynamic simulation models. For clearing of the dc faults, four different dc breaker technologies are compared based on their fault interruption time, together with a current direction fault detection method. If necessary, the converters are reinforced with limiting reactors to decrease the peak value and rate of rise of the fault currents providing sufficient time for the breakers to isolate the fault without interrupting the MTdc network operation. The study shows that the symmetric monopolar topology is least affected by dc contingencies. Considering bipolar topologies, the bipolar with metallic return exhibits better fault response compared to the one with ground return. Topologies with ground or metallic return require full semiconductor or hybrid breakers with reactors to successfully isolate a dc fault. [ABSTRACT FROM AUTHOR]

This paper evaluates the abilities of fast tap-changer topologies by using insulated-gate bipolar transistors to mitigate flicker generated by the ac electric arc furnaces, based on technical and economic criteria. The design problems derived from the very high powers and currents involved have been solved to a preliminary industrial level. The operation of the best resulting topology is verified on a real 80-MVA arc furnace with a dedicated graphical-mathematical multilevel simulator developed to perform short- and long-term tests. Selected pattern windows of the arc voltage, taken from exhaustive logs of electric variables of a real 80-MVA furnace during a complete meltdown process, have been loaded into the simulator. This novel simulation strategy enables the testing of the proposed compensator under reproduced “real working conditions” with several degrees of flicker severity. The simulator includes an IEC flicker meter capable of checking the flicker level online at any point in the installation. The simple open-loop and closed-loop control tests confirm the new tap changer as a fast and economical competitor to other arc furnace compensators. It manages 16% of the furnace system power at a subcycle or supercycle tap changing rate (between 0 and 10 changes per half cycle), as required. This fast switching capacity reduces the compensating time to the very limited values imposed by the L/R time constant of the furnace installation. [ABSTRACT FROM AUTHOR]

This paper investigates a new family of converters for high-power transfer between dc buses with different voltage levels. The proposed converters achieve high-voltage dc-dc conversion without an intermediate ac conversion stage. Three converter circuits are investigated, all based on the use of a common switching cell module. The first is a step-down converter, the second is a step-up converter, and the third is an inverting step-up/downconverter. For each converter, the structure is presented, its operation principle is explained, and the design equations are derived. A comparative analysis between the converters is carried out to highlight the merits and limitations of each topology. [ABSTRACT FROM PUBLISHER]

This paper proposes an LCL dc-dc converter concept which is capable of achieving very high stepping ratios with megawatt-level power transfers. The converter can find potential application in connecting high-power dc sources to high-voltage dc transmission including future dc transmission networks. This converter is based on two ac/dc insulated-gate bipolar transistor-based converters and an internal passive LCL circuit without internal ac transformers. The LCL circuit is designed to enable voltage stepping without any reactive power circulation and with potentially soft switching operation which minimizes the switching losses. The designed converter has the ability to achieve current regulation even under extreme external dc faults and, therefore, the converter can operate through dc faults. The switch utilization is better than similar topologies and losses are reasonably low. A dual-active-bridge transformer-based converter design is presented to compare with the proposed LCL converter. A detailed PSCAD model confirms conclusions using a 100-MW 20-kV/300 kV test system. An LCL 200-W 20-V/100-V dc/dc prototype converter is built to validate the proposed topology. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) is based on the cascaded connection of identical submodules (SMs) enabling additional redundancies. This paper proposes the configuration of the MMC topology with redundant SMs and demonstrates the effects of active redundancies. The proposed configuration decreases the switching frequency per SM while reducing the SM capacitor voltage ripples. An analytical model for determining the SM capacitor voltage ripple and voltage dynamics is derived. The results from the analytical model are compared with the switching model for a 21-level MMC with five redundant (25 in total) SMs per arm. Experimental results based on a single-phase laboratory prototype with five SMs per arm and a single redundant cell further illustrate the operation and verify the derived mathematical model and simulation results. [ABSTRACT FROM AUTHOR]

This paper presents design and control methods for fault-tolerant operations with redundant converter modules, one of the most prominent features in modular multilevel converter (MMC) topology. In fully implementing MMC functionalities, a nearest level control is applied as a low-switching modulation method. A dual sorting algorithm is newly proposed for effectively reducing the switching commutations of each power module as well as for voltage balancing control. Built upon these primary MMC topological and control features, its redundant operation is comprehensively investigated for fail-safe energy transfer. In particular, a novel spare process is proposed to handle an emergency situation when the number of faulty power modules exceeds the module redundancy. Since topological redundancy may cause the switching commutations of power modules in an arm to be unevenly distributed, a practical and effective mitigation measure is incorporated to keep the energy balance while avoiding the undesired switching stresses. Rigorous simulation studies for MMC and its application for high-voltage direct current are performed to demonstrate the validity and effectiveness of the proposed spare process under normal and emergency conditions. [ABSTRACT FROM AUTHOR]