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This paper investigates the Multilevel Current Source Converter (MCSC) STATCOM. It proposes a new method of modulation. The new modulation method produces less THD and di/dt at the terminals of the MCSC STATCOM when compared to the widely used Phase-Shifted Carrier SPWM (PSC-SPWM). To ensure the inductors' currents remain balanced, a Current Balancing Algorithm (CBA) is presented. The CBA does not require any controls. It relies on assigning optimum switching states to each CSC module in real-time. In addition, two control strategies are presented in this paper. The first one assumes the STATCOM to be a SISO. Therefore, it only requires one PI controller. However, the gains for the controller must be changed if the STATCOM was to transition from capacitive mode to inductive mode, or vice versa. The second control strategy overcomes this problem by implementing a TITO integral state feedback controller. The contributions of this paper are validated via simulation and experimental results. [ABSTRACT FROM AUTHOR]

The three-phase series-connected modular multilevel converter (SC-MMC) is presented as one option for high-voltage direct current (HVDC) tap to reduce the cost of an HVDC station. Compared with conventional three-phase parallel-connected MMC, the number of semiconductor switches in SC-MMC is reduced by one-third to withstand the same dc voltage. First, the paper studies the operating principle of SC-MMC, and then presents an interspacing phase-shifted pulsewidth-modulated method which could improve the waveform of the output ac voltage for a given switching frequency. Next, the control strategy based on the identical real power input of each phase is proposed to balance the dc voltage of each phase under an unbalanced grid condition. The current limit of switching devices is also taken into consideration to protect SC-MMC from overcurrent. Furthermore, a universal zero-sequence current controller is developed as one part of the control strategy. In addition, an innovative method to suppress the third harmonics of ac current is presented. With the third harmonic suppression strategy, the SC-MMC can operate with much smaller SM capacitors without deteriorating the ac current, which contributes to the cost reduction further. Finally, simulation results obtained in PSCAD/EMTDC are provided to validate the proposed control strategies. [ABSTRACT FROM PUBLISHER]

The large number of voltage levels in a modular multilevel converter (MMC) make staircase modulation a feasible alternative, particularly in high-power applications. However, staircase waveforms do not necessarily mean operation of the MMC submodules (SMs) at the fundamental frequency. This paper presents an analysis of SM switching frequencies in staircase-modulated MMCs and their correlation to the modulation index and load phase angle. A carrier-based pulsewidth-modulation (CB-PWM) equivalent technique is also developed. This analysis demonstrates that CB-PWM techniques provide a similar switching frequency with superior harmonic performance and improved voltage balancing characteristics at all modulation indices compared to staircase modulation. The theoretical analysis is verified with extensive simulation results for MMCs with different SMs and experimental results from a laboratory prototype. [ABSTRACT FROM PUBLISHER]

Multimodule converter-based high-voltage dc (HVDC) power transmission incorporates numerous voltage-source converters (VSCs) connected in series/parallel to provide increased voltage/current and, hence, power ratings. When a selective harmonic elimination pulsewidth-modulation (SHE-PWM) technique is employed, the switching losses of the VSC modules are reduced but the voltages of the series-connected dc capacitors are not naturally balanced. In this paper, a voltage-balancing technique is reported. The technique relies on monitoring the voltage of each dc capacitor and when such voltage exceeds its preset band, the realization of the multilevel waveform reallocates the task to another VSC module to ensure that voltage balance between all capacitors is achieved. Three-phase bipolar VSC modules are considered in this paper and each one is modulated by a precalculated multilevel SHE-PWM waveform. The time-domain waveforms and their line-to-line voltage spectra are verified by simulation using PSCAD/EMTDC. The selected results are presented to confirm the viability of the proposed method. [ABSTRACT FROM PUBLISHER]

This paper describes a modified phase-shifted carrier-based pulsewidth-modulation (PSC-PWM) scheme for modular multilevel converters (MMC). In order to reduce the average device switching frequency, a reduced switching-frequency (RSF) voltage balancing algorithm is developed. This paper also proposes a circulating current suppressing controller (CCSC) to minimize the inner circulating current in an MMC. Based on the double line-frequency, negative-sequence rotational frame, the three-phase alternative circulating currents are decomposed into two dc components and are minimized by a pair of proportional integral controllers. Simulation results based on a detailed PSCAD/EMTDC model prove the effectiveness of the modified PSC-PWM method and the RSF voltage-balancing algorithm. The proposed CCSC not only eliminates the inner circulating current but also improves the quality of the converter ac output voltage. A simple loss evaluation demonstrates that the RSF voltage-balancing algorithm and the CCSC reduce the converter power losses. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) is a newly introduced switch-mode converter topology with the potential for high-voltage direct current (HVDC) transmission applications. This paper focuses on the dynamic performance of an MMC-based, back-to-back HVDC system. A phase-disposition (PD) sinusoidal pulsewidth modulation (SPWM) strategy, including a voltage balancing method, for the operation of an MMC is presented in this paper. Based on the proposed PD-SPWM switching strategy, a mathematical model for the MMC-HVDC system, under both balanced and unbalanced grid operation modes, is developed. Dynamic performance of the MMC-based back-to-back HVDC converter system, based on time-domain simulation studies in the PSCAD/EMTDC environment, is then evaluated. The reported time-domain simulation results show that based on the adopted PD-SPWM switching strategy, the MMC-HVDC station can respond satisfactorily to the system dynamics and control commands under balanced and unbalanced conditions while maintaining voltage balance of the dc capacitors. [ABSTRACT FROM PUBLISHER]

This paper presents theoretical, simulation, and experimental investigations of input current interharmonics in modern variable-speed drives based on voltage source inverters and diode input rectifiers that are caused by motor current imbalance. It investigates how a disturbance in the inverter dc side current created by unbalanced motor currents propagates from the inverter to the rectifier stage and appears as variable frequency interharmonic distortion in the rectifier input currents. Particular emphasis is given to theoretical analysis of the frequency transformations created by the inverter and rectifier stages and the magnification of the disturbance current caused by parallel resonance in the drive dc bus circuit. The theoretical results are confirmed by simulation and experimental results. They demonstrate that motor current imbalance can be responsible for high non-characteristic inter-harmonic distortion in the drive input currents. A calculation example outlines a procedure for estimation of the drive input current interharmonic distortion based on measurements of the motor currents. The paper should be helpful for people investigating the origin of problems caused by variable frequency interharmonic currents. [ABSTRACT FROM PUBLISHER]

Multilevel current source converters are a smart choice for the high-power applications with low-voltage and high-current requirements. This paper presents the detailed analysis of a current source modular multilevel converter (CSMMC) and its application as a STATCOM. Various properties of CSMMC are compared with the voltage-source modular multilevel converter (VSMMC). The submodule inductance selection method and a sorting-based algorithm for inductor current balancing are proposed for CSMMC. The validity of the inductance selection method and the inductor current balancing algorithm are confirmed by the simulation of a three-phase CSMMC using PSCAD/EMTDC. The carrier phase-shifted sinusoidal pulsewidth modulation is used as the switching technique. The performance of a converter is analyzed with interleaved and noninterleaved carrier signals for the upper and lower arms. Results show that CSMMCs and corresponding VSMMCs have analogous features. Hence, the development on VSMMCs can be used for reference to CSMMCs and vice-versa. Furthermore, the control designs for CSMMC-based STATCOM are presented and verified using simulations. The obtained results of the proposed STATCOM show that the steady-state and transient performance of the system are quite satisfactory. This makes the CSMMC suitable for HVDC and flexible ac transmission systems applications. [ABSTRACT FROM PUBLISHER]

This paper presents a neutral point voltage control strategy for the three-level active neutral point clamped (ANPC) converter using selective harmonic elimination pulsewidth modulation (SHE-PWM). The control strategy introduces a small change in the switching angles, which varies the duty cycle of the zero-level switching state, controls the neutral point current and, therefore, the neutral point voltage. The decision to vary a given switching angle takes into account the polarity of the output currents and the voltage across the lower dc-link capacitor. The effectiveness of the proposed strategy is verified through extensive simulation studies and experimentally validated using a low power laboratory prototype. [ABSTRACT FROM AUTHOR]

This letter presents a Space Vector Pulse Width Modulation (SVPWM) strategy for reducing the DC-link current harmonics in a multi– Voltage Source Inverter (VSI) topology with common DC-link bus. The DC current harmonic reduction is achieved by phase-shifting the PWM pattern of individual VSIs, with the inverters sharing the system total power. Simulation and experimental results are shown to validate the proposal. [ABSTRACT FROM AUTHOR]

The carrier-based pulse width modulation (CBPWM) with zero-sequence component injection is equivalent to the space-vector PWM (SVPWM), and hence it can be taken as a simplified alternative to the SVPWM. However, it is quite complex to calculate the zero-sequence component in CBPWM for three-level (3L) converters such as the T-type converter, making the 3L SVPWM still have a large computation burden. In this letter, unified expressions for the zero-sequence component are analytically derived, and the modulation waves of 3L SVPWM can be directly calculated by only 7 simple equations with 3 steps. The computation burden for implementing 3L SVPWM is therefore significantly reduced without sector determination, calculation and assignment of dwell times. [ABSTRACT FROM AUTHOR]

This letter proposes a new scheme of phase-shifted carrier pulse-width modulation for the modular multilevel converter with redundancy submodules (SMs). The proposed scheme can offer a smooth transition for the redundancy SM from the standby state to the startup operation when normally operating down. The operational feasibility of the proposed scheme was first verified through simulations with PSCAD/EMTDC, and then hardware-in-the-loop system tests with the real-time digital simulator. [ABSTRACT FROM PUBLISHER]