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The emergence of applications which require high-voltage switches has created a tendency to use semiconductor device series stacks. These series stacks permit operation at blocking voltages above semiconductor elements’ nominal voltage. Insulated-gate bipolar transistors (IGBT) are currently utilized for controllability and switching speed, when these topologies are employed. The main challenge therewith is guaranteeing voltage balance between IGBTs, both when blocked and when switching transistors. Most of the methods which have been proposed to mitigate static and dynamic voltage unbalances increase transistor losses. The series stack loss-less high voltage switch (LHVS) which mitigates voltage unbalances, thus reducing switching losses, is presented in this paper. LHVS consists of a circuit, which ensures soft IGBT switching, an energy recovery circuit, and a gate delay compensation circuit. Additionally, the insulation voltage level is guaranteed to be equal between control circuit and high-voltage side of each IGBT. The operating principle of the LHVS is detailed in this paper, as is experimental validation which has been performed for three series stack modules. Static unbalances are reduced to 1%, while the differences between collector–emitter voltage curves in switching “on” do not surpass 8 ns, and switching losses are reduced by 41%, as compared to the hard-switching topology. [ABSTRACT FROM AUTHOR]

Clamp mode snubbers are very well suited for the series structure of the insulated-gate bipolar transistors (IGBTs) in pulsed power applications. They properly meet the necessities expected from them such as the fast operating of the series IGBTs since they have no effect on the gate side. In addition, they can provide safe voltage condition for the IGBTs in short circuit faults, which are very probable in pulsed applications. The clamp mode snubber can perform its voltage balancing task whenever the power capacity of the snubber can support the injected powers due to the voltage unbalancing factors. This paper initially introduces the main factors injecting power to the snubbers. Then, it will be illustrated that the exact injected power to each predetermined snubber cannot be determined due to the uncertainties about the effect of the voltage unbalancing factors. Although it is impossible to determine the exact value of the power injected to each snubber, the total injected powers to the snubbers can be calculated. Therefore, as an effective remedy, this paper proposes a concentrated snubber. Using the proposal, all the injected powers are conducted to a centralized circuit and can be easily managed. In addition, analytical expressions are provided for proper dimensioning of the proposed concentrated snubber elements. Furthermore, the performance of the proposed concentrated snubber is evaluated using simulations and experimental prototyping. [ABSTRACT FROM AUTHOR]

In data center and telecommunication power supplies, the front-end dc–dc stage is required to operate with a wide input voltage range to provide hold-up time when ac input fails. Conventional LLC converter serving as the dc–dc stage is not suitable for this requirement, as the normal operation efficiency (at 400 V input) will be penalized once the converter is designed to achieve high peak gain (wide input voltage range). This paper examined the operation of the LCLC converter and revealed that the LCLC converter could be essentially equivalent to a set of LLC converters with different magnetizing inductors that are automatically adjusted for different input voltages. In nominal 400 V input operation, the LCLC converter behaves like an LLC converter with large magnetizing inductor, thus the resonant current is small. In the hold-up period, when the input voltage reduces, the equivalent magnetizing inductor will reduce together with switching frequency reducing, thus the converter achieves high peak gain. In this paper, a new design methodology is also proposed to achieve optimal utilization of the two resonant capacitors for high power application. To verify the effectiveness of the LCLC converter for hold-up operation, comprehensive analysis has been conducted; a detailed step by step design example based on capacitor voltage stress is introduced; an experimental LCLC prototype optimized at 400 V, with input voltage range of 250–400 V and 12 V/500 W as output has been presented. [ABSTRACT FROM AUTHOR]

This paper presents a unified framework for the modeling, analysis, and design of load-independent Class E and Class EF inverters and rectifiers. These circuits are able to maintain zero-voltage switching and, hence, high efficiency for a wide load range without requiring tuning or use of a feedback loop, and to simultaneously achieve a constant amplitude ac voltage or current in inversion and a constant dc output voltage or current in rectification. As switching frequencies are gradually stepping into the megahertz (MHz) region with the use of wide-bandgap (WBG) devices such as GaN and SiC, switching loss, implementing fast control loops, and current sensing become a challenge, which load-independent operation is able to address, thus allowing exploitation of the high-frequency capability of WBG devices. The traditional Class E and EF topologies are first presented, and the conditions for load-independent operation are derived mathematically; then, a thorough analytical characterization of the circuit performance is carried out in terms of voltage and current stresses and the power-output capability. From this, design contours and tables are presented to enable the rapid implementation of these converters given particular power and load requirements. Three different design examples are used to showcase the capability of these converters in typical MHz power conversion applications using the design equations and methods presented in this paper. The design examples are chosen toward enabling efficient and high-power-density MHz converters for wireless power transfer (WPT) applications and dc/dc conversion. Specifically, a 150-W 13.56-MHz Class EF inverter for WPT, a 150-W 10-MHz miniature Class E boost converter, and a lightweight wirelessly powered drone using a 20-W 13.56-MHz Class E synchronous rectifier have been designed and are presented here. [ABSTRACT FROM AUTHOR]

Superjunction MOSFETs in cascode configuration with low-voltage silicon MOSFETs are evaluated in this paper. The proposed structure combines the good switching performance provided by the cascode configuration with the benefits of the silicon technology such as its robustness, maturity, and low cost. This paper aims to explain and to demonstrate the reduction of switching losses of superjunction MOSFETs in cascode configuration with respect to their standalone counterparts (directly driven). A detailed simulation analysis of power loss contributions is carried out under hard-switching operation. Moreover, experimental evidence is provided using a boost converter (100–400 V) operating in continuous conduction mode for different switching frequencies (100–400 kHz) and output power levels (180–500 W). [ABSTRACT FROM AUTHOR]

The modeling and control of a buck–boost and stacked dual half-bridge (DHB) integrated bidirectional dc–dc converter have been studied in this paper. This converter features high-voltage transfer ratio, high efficiency, and the minimum number of switches. In this paper, an extended, continuous, full-order, state-space averaging modeling method is proposed. Compared with existing methods, the proposed method exhibits higher coincidence with the switching circuit simulation, in steady and especially dynamic states. Due to its high dynamic accuracy and low complexity, the proposed modeling method provides a better theoretical analysis and a fast simulation tool for transient process and control design of converters with dual-active-bridge units, especially with DHB units. By using this method, the high-frequency transformer series inductance current is directly divided into a sampled dc component and a fluctuant component. Only the sampled dc one is included into state variables, but both components are considered into state equations. Besides, this method regards the entire converter as a linear superposition of its subsections, which provides a stepwise modeling based on linearization of subsections. Moreover, a decoupled proportional-integral control method is proposed to enhance the stability and dynamic response of the converter. This control method is analyzed by the proposed models, which can be regarded as an application of the proposed modeling method. Simulation and experiments have validated both the proposed modeling and the decoupled control strategy. [ABSTRACT FROM PUBLISHER]

In this paper, direct torque control (DTC) of five-phase induction motor (FPIM) is implemented using three-level neutral point clamped (TL-NPC) inverter. One of the advantages of three-level inverter over two-level one for DTC operation is the low torque ripple. Also TL-NPC inverter through space vector modulation technique gives low $ dv/dt$ transition with better voltage waveform. By applying conventional lookup table for DTC, the TL-NPC inverter does not ensures lower $dv/dt$ transition. In this paper, a novel switching scheme for DTC of FPIM using TL-NPC inverter is proposed that ensures the low $ dv/dt$ transition and balancing of dc-link capacitor voltages of TL-NPC inverter. To form the lookup table for DTC operation, instead of using voltage vectors directly, virtual vectors (VVs) are utilized. Two switching states are used in one sample time to generate a VV in $\alpha \beta$ plane, which gives zero resultant voltage in $ xy$ plane. The switching strategy ensures low number of transitions to reduce the switching losses. The switching state redundancies are used in a novel way to balance the dc-link capacitor voltages without using any additional hardware. The proposed technique to balance the dc-link capacitor voltage gives lower switching frequency. The MATLAB/Simulink environment is used for the simulation and the results are validated through experiments. [ABSTRACT FROM AUTHOR]

This paper introduces a novel five-level nested neutral point piloted (NNPP) converter and analyzes the operating principle of five-level NNPP converter. This paper presents a novel space vector pulse width modulation (SVPWM) algorithm based on gh coordinate for five-level NNPP converter. First, the common-mode voltage is reduced by choosing the appropriate redundant switching states. After that, the floating-capacitor voltage balance control strategy is presented. The appropriate switch combinations of each phase are determined by the control requirements of floating-capacitor voltages respectively and the hardware mapping method of the switching states is presented. Furthermore, the neutral-point voltage balance control strategy is presented. In order to balance the dc-link capacitor voltages, the seven-segment switching sequence is selected according to the control requirements of dc-link capacitor voltages and the neutral-point voltage regulatory factor is introduced to regulate the durations of the redundant switching states in a switching cycle. Finally, the validity of the novel SVPWM algorithm with decoupling control strategies of floating-capacitor voltages and dc-link capacitor voltages is verified by the experimental results of five-level NNPP converter under steady-state and dynamic conditions. [ABSTRACT FROM AUTHOR]

This paper presents a pulsed power modulator with a new structure that utilizes the reverse recovery characteristics of diodes to achieve an effective pull-down circuit configuration. The proposed configuration for active pull-down applicable to negative pulsed power applications with a high-voltage direct switching method is implemented by adding a diode to the pulse discharging path of the modulator, instead of using a pull-down resistor. The diode is forward-biased while an output pulse voltage is applied to the load. When the pulse voltage applied to the load is removed, the residual energy in the load is quickly discharged through the reverse recovery path of the diode so that the pull-down function of the pulsed power supply system is efficiently performed. The operating principle of the proposed system is described, and each operating mode is analyzed in detail. In addition, the feasibility of the proposed system configuration is examined through various simulation results. Finally, it is proven that the proposed system can be used effectively in pulsed power application fields through a practical experiment in plasma source ion implantation applications. [ABSTRACT FROM AUTHOR]

This paper presents a self-adapting synchronized-switch harvesting (SA-SSH) interface circuit to extract energy from vibration-based piezoelectric energy harvesters (PEHs). The implemented circuit utilizes a novel switching technique to recycle optimum amount of harvested charge on piezoelectric capacitance to strengthen the damping force, and simultaneously achieve load-independent energy extraction with a single inductor. Charge recycling is realized by adjusting extraction time, and optimized through a maximum power point tracker based on charge-flipping dissipation. The circuit has been implemented using 180 nm HV CMOS technology with 0.9 × 0.6 mm2 active area. Self-adapting SSH circuit has been validated with both macro-scaled and MEMS PEHs with different inductor values. The interface circuit provides maximum energy extraction for the full storage voltage range of 1.8–3.7 V. The implementation harnesses have 500% more power compared to an ideal full-bridge rectifier, and output 3.4 μW for 2.24 V peak-to-peak open-circuit piezoelectric voltage from MEMS PEH excited at its resonant frequency. [ABSTRACT FROM AUTHOR]

Photovoltaic (PV) systems having rechargeable batteries are prone to be complex and costly because multiple converters are necessary to individually regulate a load, PV panel, and battery. This paper proposes novel nonisolated multiport converters (MPCs) integrating a bidirectional pulsewidth modulation (PWM) converter and phase-shift-switched capacitor converter (PS-SCC) for standalone PV systems. A PWM converter and PS-SCC are integrated by reducing the total switch count, realizing the simplified system and circuit. In the proposed MPCs, two control freedoms of duty cycle and phase shift angle are manipulated to individually regulate the load, PV panel, and/or battery. The detailed operation analysis was performed to mathematically derive gain characteristics and zero voltage switching operation boundaries. For the battery discharging mode, in which the PV panel is not available and the MPC behaves as a single-input–single-output converter with two control freedoms available, the optimized control scheme achieving the lowest rms current is also proposed to maximize power conversion efficiencies. Various kinds of experimental verification tests using a 200-W prototype were performed to verify the theoretical analysis and to demonstrate the performance of the proposed MPC. [ABSTRACT FROM AUTHOR]

This paper presents a bridgeless dual-mode single power-conversion ac–dc converter that can achieve a high conversion efficiency. By adopting a bidirectional switch, we remove a full-bridge diode rectifier from the grid side of the proposed converter, and thereby, reduce the number of components and the primary-side conduction loss. To adapt the converter to 1-kW power applications with a bidirectional switch, we used a series-resonant circuit in the output voltage doubler on the secondary side. The series-resonant circuit also provides zero-current switching turn-off at the output diode, and thereby, reduces the reverse-recovery loss. To attain medium–high power capability with an appropriate transformer, the proposed converter operates in both discontinuous conduction mode and continuous conduction mode. The operation principle of the converter is presented and analyzed. By using the dual-mode control algorithm, the proposed converter achieves a high power factor of 0.994 and maximum efficiency of 97.3 $\%$. Experimental results for a prototype 1-kW ac–dc converter verify these characteristics. [ABSTRACT FROM AUTHOR]

This paper proposes a voltage-source parallel resonant Class E inverter. The proposed circuit has a shunt capacitor including parasitic capacitance of a switching device and achieves zero-voltage switching and zero-voltage derivative switching at turning-on like a classical Class E inverter. Therefore, high power conversion efficiency is achieved under high operating frequency. Unlike the other Class E inverters, the proposed circuit has no choke inductor or dc blocking capacitor. Moreover, it has a parallel resonant tank unlike the classical Class E inverter. Thus, a circuit protection is not required in a wireless power transfer system. Circuit analysis, circuit simulations, and circuit experiments were carried out. The experimental circuit performed the desired operation and the power conversion efficiency was 93.2% with the output power 4.76 W at the operating frequency 1 MHz. [ABSTRACT FROM AUTHOR]

Parasitic ringing is commonly observed during the high-speed switching of wide band-gap (WBG) devices. Additional loss contributed by parasitic ringing becomes a concern especially for high switching frequency applications. This paper investigates the effects of parasitic ringing on the switching loss of WBG devices in a phase-leg configuration. An analytical switching loss model considering parasitics in power devices and application circuit is derived. Two switching commutation modes, gate drive dominated mode and power loop dominated mode, are investigated, respectively, and the switching loss induced by damping ringing is identified. It is found that this portion of the loss is at most the energy stored in parasitics, which always exists regardless of the switching speed and parasitic ringing. Therefore, with the given WBG device in the specific application circuit, damping more severe parasitic ringing during faster switching transient would not introduce higher switching loss. Additionally, the extra switching loss induced by resonance among parasitics and crosstalk is investigated. It is observed that severe resonance and its resultant over-voltage during the turn-on transient worsen the crosstalk, causing large shoot-through current and excessive switching loss. The theoretical analysis has been verified by the double pulse test with a 1200-V/50-A SiC-based phase-leg power module. [ABSTRACT FROM AUTHOR]

This paper describes the design of a high-efficiency energy management system for low-power, low-voltage energy harvesting powered wireless sensor systems. With typical voltages of less than 1 V and power levels lower than 1 mW, there are significant challenges when applying energy harvesting sources to supply pulsed power levels of up to 120 mW at voltage levels of 1.8–4 V as required by wireless sensor loads. The proposed approach integrates energy storage elements within a voltage step-up circuit to produce a new high-efficiency energy management circuit that converts the energy produced by a low-power, low-voltage source into a series of high power pulses. An optimized switched supercapacitor energy buffer circuit including a self-powered control circuit is proposed. Efficiencies of up to 91% are shown for an indoor solar cell source with a power level of 0.5 mW, supplying an equivalent wireless sensor with pulsed power levels of 10–120 mW. This is significantly higher than 83% achieved for the dc–dc stage of the existing best solution under the same source conditions, but requires an additional conversion step to provide high power pulses. [ABSTRACT FROM AUTHOR]

In addition to field-oriented control and direct torque control, the model predictive control (MPC) is another typical control method for permanent-magnet synchronous machine (PMSM) drives. In some critical applications, fault-tolerant controls are usually required. The faults of PMSM drives in this paper are limited as a single-phase open-circuit fault, which may be caused by open circuit or short circuit of one power switch. In the postfault operation, the neutral point of the PMSM is connected to a redundant leg. As is known, MPC is a model-based control method. Since the PMSM has different mathematical models in both normal and postfault operations, two different MPCs (MPC-I and MPC-II) should be, respectively, designed for both normal and postfault operations according to traditional thinking. However, it is first found in this paper that the faulty PMSM drive can be treated as an equivalent healthy PMSM drive, and MPC-I can be shared by both normal and postfault operations without any modification. The major contribution of this paper is to find this fact, and verify it with theoretical analysis and experimental validation. Obviously, this finding will simplify the whole control method of PMSM drives considering single-phase open-circuit fault. [ABSTRACT FROM AUTHOR]

Magnetically coupled impedance-source (MCIS) networks are recently introduced impedance networks intended for various high-boost applications. It employs coupled magnetic in the circuit to achieve higher voltage gain. Various MCIS networks have been proposed in the literature for myriad applications; however, due to effective role of system modeling in the closed-loop controller design, this paper is allocated to small-signal modeling and analysis of MCIS converters. The modeling is performed by means of the circuit averaging and averaged switch technique. A generalized small-signal derivation is demonstrated for pulse width modulation (PWM) MCIS converters and it is shown that the derived transfer functions can simply be applied to Y-source, Γ-source, and T-source impedance networks. Various transfer functions for capacitor voltage, output voltage, magnetizing current, input and output impedance are derived and have been validated through frequency and dynamic responses of computer simulation results. In addition, a comprehensive analysis has been done for all mentioned PWM MCIS converters regarding their circuit parameters. Furthermore, the effect of considering the equivalent series resistances of capacitor and inductor on the stability margin of MCIS converters is revealed in this paper. Finally, in order to validate the derived transfer functions and to consolidate the perfumed analysis, experimental results are presented for all mentioned MCIS converters. [ABSTRACT FROM PUBLISHER]

Pulse-width-modulated (PWM) converters have been widely applied for power processing, and they are typically the stems of other types of converters, such as quasi-resonant, Z-source, and switched-inductor hybrid converters. Development of PWM converters has been spanning over a century, starting from the buck converter. The well-known PWM converters include buck, boost, buck–boost, Ćuk, single ended primary inductive converter (SEPIC), zeta, Z-source, quasi-Z source, etc. Many attempts have been proposed to develop these converters based mostly on canonical cell concepts and by introducing extra LC filters to the cells. This paper presents an enhancement to the layer and graft schemes by introducing the ideas of dc voltage/current offsetting, capacitor/inductor component splitting, diode grafting, and inverse operation of PWM converters. The PWM converters, which can be operated in continuous conduction mode (CCM) or discontinuous conduction mode (DCM), therefore can be synthesized systematically according to decoded transfer gains. Decoding and synthesizing PWM converters uniquely bridge transfer gains to converter topologies and provide readers a comprehensive understanding of PWM-converter evolution from the original converter, the buck converter. Additionally, in this paper, the Ćuk, SEPIC, and zeta converters all with the same transfer gain of $D/(1 - D)$ are proved to be equivalent to the buck–boost converter with an extra LC filter. For further illustrating the proposed approaches, various types of Z-source converters, switched-capacitor/switched-inductor hybrid converters, and a single-stage interleaved converter are reviewed, and new PWM converters are developed. [ABSTRACT FROM AUTHOR]

A component-minimized and low-voltage-stress single-phase power factor correction rectifier without electrolytic capacitor is proposed in this paper. Component minimization is achieved by embedding an active pulsating-power-buffering (PPB) function within each switching period, such that typical add-on power electronic circuits for PPB are no longer needed. Additionally, with a three-level flying-capacitor configuration, the voltage stresses of switching devices can be reduced more than 50% as compared to existing solutions that are based on embedded PPB. The relationship between the inductance requirement and the patterns of the modulation carriers, and how it can be utilized to minimize the magnetics of the rectifier, is also discussed. A 110 W hardware prototype is designed and tested to demonstrate the feasibilities of the proposed rectifier. An input power factor of more than 0.97, peak efficiency of 95.1%, and an output voltage ripple of less than 4.3% across a wide load range have been experimentally obtained. [ABSTRACT FROM AUTHOR]

Many research works have been conducted on increasing the efficiency of interleaved boost converters (IBCs) applied for power factor correction (PFC) by using high-performance power electronic devices and soft switching circuits, which are not helpful in reducing the hardware cost and systematic complexity. In this paper, three intrinsic parameters affecting the efficiency of IBC PFC are found and analyzed, including the switching frequency value, boost inductor value, and output voltage value. Based on the findings, considering the limitations of current ripples, power factor, maximum magnetic flux density, and volume of a boost inductor, an optimization design method for high-efficiency IBC PFC is proposed. A 3.3-kW IBC PFC prototype is developed based on Si devices. The experimental result verifies that the proposed method can improve the efficiency of IBC PFC with low-cost low-performance devices in the full-load range. [ABSTRACT FROM AUTHOR]

Active pulsating power buffering (PPB) function can effectively reduce the twice-line frequency energy storage requirement in a single-phase rectifier. Existing single-phase solutions with active PPB must utilize more than two active switches in their circuits. Compared with conventional single-active-switch solutions without active PPB (e.g., a boost power-factor-correction (PFC) rectifier), the cost of additional semiconductor switches and gate drive circuitry in an active PPB-based rectifier may not be justified for low-power applications. This paper presents a family of single-switch single-phase rectifier with active PPB. Taking advantage of the on-time and off-time of a single switch, the proposed rectifiers are formulated by merging two converters that are duty and frequency controlled. The steady-state characteristics of these converters are analyzed. A step-by-step design procedure is provided, and an active control method for limiting the maximum switching frequency for wide-load-range operation is presented. A 100-W prototype is built for the demonstration of the proposed single-switch rectifier concept. It is envisaged that this concept, when combined with other circuit formulation techniques, e.g., partial power processing, dc-voltage feedback, may lead to new derivatives of single-switch rectifiers with more advanced features. [ABSTRACT FROM AUTHOR]

Flyback converter has advantages of simple circuit configuration and easy control. However, it suffers two problems. One is the active switch is hard switching. The other is a very high voltage spike when the active switch is turned off. In order to solve these problems, this paper presents a novel dc-to-dc converter that mainly consists of two interleaved flyback converters. Both active switches can achieve zero-voltage switching on without the use of any active clamp circuit or snubber circuit. In addition, the leakage flux energy can be delivered to the output by using two added diodes. It helps to reduce the voltage spikes on the active switches and improve circuit efficiency. The steady-state analyses at different operation modes and the mathematical equations for parameters design are provided. Finally, a 200-W prototype circuit for driving high-brightness light-emitting diodes (LEDs) is built and tested to verify the feasibility of the proposed circuit. The LEDs are dimmed from 100% to 10% full power. Satisfactory performances are obtained from the experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a family of multiport switched-capacitor multilevel inverter (SCMLI) topologies for high-frequency ac power distribution. It employs asymmetric dc voltage sources with a common ground that makes it ideal to be employed in renewable energy farms and modern electric vehicles. The proposed family of step-up SCMLI attains higher number of output voltage steps with optimum component count in comparison to several existing topologies. The problem of capacitor voltage balancing is solved as the capacitors are inherently charged to a finite voltage every half cycle. In-depth study on two staircase modulation strategies, namely, selective harmonic elimination and minimum total harmonic distortion (THD) scheme is presented with study on the variation of switching angles and THD with modulation indices under both schemes. Working principle and analysis are presented for the proposed family of topologies. Simulation outcomes are validated with experimental results under both the aforementioned modulation schemes with equal and unequal output voltage waveform steps. [ABSTRACT FROM AUTHOR]

This paper presents a self-powered interface circuit to extract energy from ambient vibrations for powering up microelectronic devices. The circuit interfaces a piezoelectric energy harvesting micro electro-mechanical systems (MEMS) device to scavenge acoustic energy. Synchronous electric charge extraction (SECE) technique is deployed through the implementation of a novel multistage energy extraction (MSEE) circuit in 180 nm HV CMOS technology to harvest and store energy. The circuit is optimized to operate with minimum power losses when input power is limited, and adapts well to operating conditions with higher input power. The highly accurate peak detector was validated for a wide piezoelectric frequency range from 20 Hz to 4 kHz. A charging efficiency of about 84% has been achieved for 4.75 V open-circuit piezoelectric voltage excited at 390 Hz input vibration under nominal input power range of 30–80 μW. Power optimizations enable the circuit to maintain a conversion efficiency of 47% at input power level as low as 3.12 μW. MSEE provides up to 15% efficiency improvement compared to traditional SECE, and maintains power efficiency as high as possible for a wide input power range. [ABSTRACT FROM AUTHOR]

A simple buck–boost LED driver suitable for battery operated applications with limited input voltage level is presented in this paper. Soft switching performance is provided for the main switch via a resonant circuit to improve the converter efficiency. The incorporated auxiliary switch also performs under zero voltage switching condition. Both power switches can be driven with a simple gate drive circuit, so, the additional switch does not add any driving complexity. In addition, only one magnetic element is utilized in the proposed LED driver which contributes to circuit simplicity and lower weight and size. Also, all diodes turn off at zero current switching which eliminates the reverse recovery losses and improves efficiency. A laboratory prototype converting 12 V input voltage to 32 V output operating at 26 W output power is implemented and tested to verify the effectiveness of the proposed LED driver. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

Piezoelectric vibration energy harvesting (PVEH) has been proved to be much promising in making low power electronics completely self-powered due to wide availability and high energy density. Self-powered synchronized switching harvesting on an inductor (SSHI) circuits have been proved to greatly increase the performance of a PVEH device and peak detector-based self-powered switches are widely used. In practice, however, the switch is impossible to turn on simultaneously at peak displacements due to nonlinear components so that switching delay (SD) always exists. Furthermore, the SD will degrade the performance of PVEH devices, so it must be reduced. Therefore, for this kind of SSHI circuits, the purpose of this paper is to explore basic causes of generating SD and investigate the corresponding solution. First, theoretical model of SD in self-powered parallel SSHI (SP-PSSHI) is derived and the SD is first proved to be positive. Then, effects of key component parameters on the SD are studied. Based on above results, an improved SP-PSSHI (ISP-PSSHI) circuit is proposed by adding a voltage divider and its SD is proved to be less than that of the SP-PSSHI circuit. Next, the key factor is discussed, namely the divider resistor. Circuit simulations validate theoretical results and also expose that there are optimal resistor and capacitor of the envelope detector for achieving the maximum harvested power. In the end, experimental results show that the ISP-PSSHI circuit can improve the averaged harvested power about 11% more than that of the SP-PSSHI circuit under choosing optimal components. [ABSTRACT FROM AUTHOR]

Common-mode voltage (CMV) is known as a major cause of premature motor failures. The form and amplitude of the CMV generated by any converter depends on both the circuit topology and modulation technique. Among single stage ac–ac converters employed in drive applications, the Z-source ultra sparse matrix converter (ZSUSMC) is a desirable choice due to reduced number of switches in its structure and voltage boosting capability. Based on these considerations, this paper aims to: 1) theoretically determine and compare the CMV of the ZSUSMC with four well-known impedance networks, namely, cascaded, switched-inductor, quasi, and series, in its structure and 2) propose modulation techniques for CMV reduction in the ZSUSMCs. To this end, first, it is shown that the ZSUSMC, depending on the impedance network used in its structure, provides more freedom to choose from redundant switching states compared to the ultra sparse matrix converter. Then, by taking advantage of this feature, novel modulation strategies that attenuate the CMV without affecting the boosting capability are developed. The proposed modulation schemes are based on avoiding the switching states most contributing to the CMV during a switching period. Through hardware-in-the-loop studies, the effectiveness of the proposed modulation strategies in reducing the CMV of the ZSUSMCs is verified. [ABSTRACT FROM AUTHOR]

Although high-frequency circulating current exists in parallel-operated inverters, it has not attracted as much attention as low-frequency circulating current, and thus has not been analyzed in detail previously. In this paper, a mathematical model and analysis are presented, which reveal the spectrum components and their changing trends of the circulating currents caused by carrier phase differences. The impact of carrier phase difference on high-frequency circulating current is also analyzed and verified. A closed-loop control scheme is proposed to suppress the switching frequency circulating current caused by carrier phase difference. In addition, the deadbeat and closed-loop control are combined to suppress the low- and high-frequency circulating currents simultaneously, to improve the overall performance of circulating current suppression. The effectiveness of the proposed scheme is verified by the simulation and experimental results acquired from a laboratory platform. [ABSTRACT FROM AUTHOR]

Self-powered realization for synchronous switching circuits is a hot spot for piezoelectric vibration energy harvesting. Two typical kinds of switches, bipolar junction transistor (BJT) or metal–oxide semiconductor field effect transistor (MOSFET) are popularly used without a clear understanding about the performance difference. In this paper, comparative investigations about adopting these two types of switches based on a case study are performed. It is determined that the performance difference comes from three aspects: the gate parasitic capacitance, the turning-on threshold, and the driven mechanism. In particular, the third one imposes a critical influence on the performance. Investigations are performed on the self-powered synchronous switching circuit of two possible methods: with electronic breakers or with external control units. The results from simulations and experiments show that the current-driven mechanism limits the available performance in the case of the BJT switch in comparison with the case of the MOSFET switch. The difference is especially obvious for the cases of large piezoelectric capacitance and open-circuit voltage. A preliminary design guideline is concluded that the MOSFET is probably a better choice with the same voltage and current ratings in most cases. [ABSTRACT FROM AUTHOR]

The neutral-point potential fluctuation in single-phase three-level rectifiers leads to coupling between the line current regulation and dc-link capacitor voltage balancing, deteriorating waveform quality of the line current. For addressing this issue, this paper proposes a low-complexity model predictive current control (MPCC) with constant switching frequency, which achieves a decoupling control of the line current and the neutral-point potential under the unbalanced load condition. The switching frequency is fixed by combining the MPCC scheme with predefined switching sequences. The boundary of the durations for voltage vectors in switching sequences is presented to balance the capacitor voltage without worsening the line current quality. The optimal switching sequence and the corresponding optimal durations of voltage vectors in the switching sequence are readily derived without the assessment of the cost function, which dramatically simplifies the complexity of the MPCC scheme. Finally, simulations and experimental results are conducted to verify the effectiveness of the proposed MPCC scheme. [ABSTRACT FROM AUTHOR]

A wide-range soft-switching high-efficiency cycloconverter-type high-frequency-link inverter with dual-phase-shift modulation strategy is proposed in this paper. By adding an auxiliary inductor in primary-side full bridge circuit and adopting center-tapped four-winding transformer structure, the soft-switching range for primary-side switches has been extended. The secondary-side active clamper network is designed to recycle leakage inductor energy, and suppress voltage spikes caused by the resonance of the leakage inductor and the parasitic capacitance of switches. One feature of the proposed inverter is that both the primary-side full-bridge and active clamper network employ phase-shift modulation technique where all switches are driven with nearly 50% duty cycle square signals, hence a simple and reliable transformer-isolated gate drive circuit with small transmission delay is presented. Moreover, all switches in the proposed inverter achieve zero voltage switching, which contributes to higher conversion efficiency as well as higher switching frequency. Analysis, design, and implementation of the proposed inverter are discussed in detail. A 200-kHz laboratory prototype for the high-voltage audio amplifier application is developed and the experimental results are presented to validate the analysis and performance of the proposed inverter. [ABSTRACT FROM AUTHOR]

In dc microgrid (MG) systems, energy storage systems (ESSs) capable of short- or long-term energy buffering are indispensable for energy management and providing high-quality electric energy. The MG should be able to operate in both islanded and grid-connected modes. A sudden failure of ac utility grids can lead to an inoperable condition of the MG or a large transient phenomenon accompanied by oscillation and overshoot during the mode transition. This paper proposes a control scheme of the bidirectional dc–dc converter for the ESS to resolve the issue associated with mode switching. The proposed control scheme provides autonomous and smooth mode switching, thereby reducing the reliance on the communication with the central controller, and enhancing the reliability of the system. To validate the proposed concept, simulation results and experimental results are provided. [ABSTRACT FROM AUTHOR]

Pulse generator in an ultrasound system produces electrical pulsing signals to drive piezoelectric transducer, which causes mechanical vibration of the crystals and generates sound waves. Different from conventional imaging short pulses, high-power ultrasonic system for therapeutic applications requires MHz pulses bursts of up to tens of milliseconds. The capability of switching high voltage (±90 V) at multi-MHz, delivering effective power efficiently, is crucial for practical systems. The advantages of low device loss at high switching frequency, and high power density make gallium nitride (GaN) high electron mobility transistors better devices than traditional silicon (Si) MOSFETs in such system. The GaN-based high-frequency transformer push–pull inverter presented in this paper is capable to produce high energy pulsating output with burst pulse length up to 50 ms and bipolar pulse amplitude of 180 Vpp. The maximum pulse frequency can be up to 10 MHz. The peak output power is 90 W with power density of 50.85 W/in2. The peak power for all the 128 pulser channels reaches up to 11.5 KW with average power of 192 W. This is the highest output power for pulse drivers that have been reported. A novel power transistor based RF switch circuit is also proposed in this design as the interface between image signal, high power signal, and return signal. [ABSTRACT FROM AUTHOR]

In this paper, a novel platform for the single phase switched-capacitor multilevel inverters (SCMLIs) is presented. It has several advantages over the classical topologies, such as an appropriate boosting property, higher efficiency, lower number of required dc voltage sources, and other accompanying components with less complexity and lower cost. The basic structure of the proposed converter is capable of making nine-level of the output voltage under different kinds of loading conditions. Hereby, by using the same two capacitors paralleled to a single dc source, a switched-capacitor (SC) cell is made that contributes to boosting the value of the input voltage. In this case, the balanced voltage of the capacitors can be precisely provided on the basis of the series–parallel technique and the redundant switching states. Afterward, to reach the higher number of output voltage levels, two suggested SC cells are connected to each other with a new extended configuration. Therefore, by the use of a reasonable number of required power electronic devices, and also by utilizing only two isolated dc voltage sources, which their magnitudes can be designed based on either symmetric or asymmetric types, a 17- and 49-level of the output voltage are obtained. Based on the proposed extended configuration, a new generalized version of SCMLIs is also derived. To confirm the precise performance of the proposed topologies, apart from the theoretical analysis and a complete comparison, several simulation and experimental results are also given. [ABSTRACT FROM AUTHOR]

This paper presents a merged-two-stage circuit topology suitable for either wide-range dc input voltage or ac line voltage at low-to-moderate power levels (e.g., up to 30 W). This two-stage topology is based on a soft-charged switched-capacitor preregulator/transformation stage and a high-frequency magnetic regulator stage. Soft charging of the switched capacitor circuit, zero voltage switching of the high-frequency regulator circuit, and time-based indirect current control are used to maintain high efficiency, high power density, and high power factor. The proposed architecture is applied to an LED driver circuit, and two implementations are demonstrated: a wide input voltage range dc-dc converter and a line interfaced ac-dc converter. The dc-dc converter shows 88%-96% efficiency at 30-W power across 25-200-V input voltage range, and the ac-dc converter achieves 88% efficiency with 0.93 power factor at 8.4-W average power. Contributions of this paper include: 1) demonstrating the value of a merged two-stage architecture to provide substantial design benefits in high-input voltage, low-power step down conversion applications, including both wide-range-input dc-dc and line-input ac-dc systems; 2) introduction of a multimode soft-charged SC stage for the merged architecture that enables compression of an 8:1 input voltage range into a 2:1 intermediate range, along with its implementation, loss considerations, and driving methods; and 3) merging of this topology with an resonant transition discontinuous-mode inverted buck stage and pseudocurrent control to enable step-down power conversion (e.g., for LED lighting) operating at greatly increased frequencies and reduced magnetics size than with more conventional approaches. [ABSTRACT FROM AUTHOR]

This paper presents a generalized multilevel direct power control (ML-DPC) scheme for grid-connected multilevel power converters. The proposed method extends the original DPC operating principle by considering only the closest subset of two-level voltage vectors to the present switching state. The implementation of this principle requires the power derivatives for feedback, which can present numerical problems when applied experimentally, mainly due to high measurement noise sensitivity. Therefore, a derivative estimator is proposed based on the converter-grid model in the synchronous reference frame. In addition, a virtual flux observer is developed to achieve synchronization and improve robustness in the presence of grid voltage harmonics. The proposed method is applicable to any multilevel converter topology of any number of levels. In this paper, simulations and experimental results are presented for a seven-level cascaded H-bridge converter. [ABSTRACT FROM AUTHOR]

This paper presents a fast and generalized space vector pulse width modulation (SVPWM) scheme for any multilevel inverter. The SVPWM scheme generates all the available switching states and switching sequences based on two simple and general mappings, and calculates the duty cycles simply as if for a two-level SVPWM, thus independent of the level number of the inverter. Because the switching states, duty cycles, and switching sequences are all obtained by simple calculation in the proposed SVPWM scheme, no lookup table is needed and the scheme is computationally fast. The generalized method of generating the switching states (first mapping), calculating the duty cycles, and determining the switching sequence (second mapping) is described in this paper. The scheme is suitable for any reference vector with any modulation index, and can be conveniently extended to meet specific requirements, such as symmetric switching sequences. Compared with prior methods, the SVPWM scheme proposed in this paper provides two more degrees of freedom, i.e., the adjustable switching sequences and duty cycles, thus offering significant flexibility for optimizing the performance of multilevel inverters. The influence of redundant switching sequences in the output phase voltage of inverters is demonstrated for a nine-level inverter. This paper also thoroughly compares the proposed SVPWM scheme with prior methods. Both simulation and experimental results are given. [ABSTRACT FROM AUTHOR]

Due to their remarkable merits, the soft-switching ac-link universal power converters have received noticeable attention during the last few years. These converters, which can be configured as dc-dc, dc-ac, ac-dc, or ac-ac, are compact, reliable, and offer longer life time compared to the other types of converters. However, they require more switches, which make the control process more complicated. This paper proposes a modified configuration for the dc-ac power conversion, which reduces the number of switches without changing the principles of operation. This converter, which is named sparse ac-link buck-boost inverter, reduces the number of switches from 20 to 18. Despite reducing the number of switches, the partial resonant time, during which no power is transferred, is as short as the original configuration. An important feature of this inverter is that it can be fabricated by IGBT modules, which are more compact and more cost-effective compared to the discrete devices. This paper presents the principles of the operation of this configuration, and compares the efficiency, the failure rate, and the current rating of the switches in the proposed and original inverters. It is shown that the failure rates of the sparse configuration are lower than the original configuration. Therefore, they have longer lifetime. The efficiency of the sparse configuration is slightly lower than that of the original configuration. However, by using reverse blocking IGBTs in the sparse configuration, the efficiency of the proposed inverter will be improved significantly. This paper evaluates the performance of the proposed inverter through simulation and experiment. [ABSTRACT FROM AUTHOR]

In this paper, a resonant damping circuit to suppress the switching ringing of full SiC mosfet is proposed. It reveals that the ringing phenomenon caused by parasitic impedances of switching circuit can be damped out using air core PCB transformer which has a properly designed secondary side circuit. The design method for PCB transformer and the secondary circuit are developed considering the physical dimension applied to the PCB transformer inserted between full SiC mosfet module and snubber capacitor. Experimental results using 1200 V–180 A full SiC mosfet module validate the design method and the performance of the proposed air core PCB circuit. Thanks to the damping circuit, the resonant component due to the switching ringing has been reduced to a half compared to that of system without damping circuit. [ABSTRACT FROM AUTHOR]

The temperature-dependent characteristics of the third-generation 10-kV/20-A SiC MOSFET including the static characteristics and switching performance are carried out in this paper. The steady-state characteristics, including saturation current, output characteristics, antiparallel diode, and parasitic capacitance, are tested. A double pulse test platform is constructed including a circuit breaker and gate drive with >10-kV insulation and also a hotplate under the device under test for temperature-dependent characterization during switching transients. The switching performance is tested under various load currents and gate resistances at a 7-kV dc-link voltage from 25 to 125 ˚C and compared with previous 10-kV MOSFETs. A simple behavioral model with its parameter extraction method is proposed to predict the temperature-dependent characteristics of the 10-kV SiC MOSFET. The switching speed limitations, including the reverse recovery of SiC MOSFET's body diode, overvoltage caused by stray inductance, crosstalk, heat sink, and electromagnetic interference to the control are discussed based on simulations and experimental results. [ABSTRACT FROM AUTHOR]

Several single-stage topologies have been introduced since kicking off the three-phase Z-source inverter (ZSI), and among these topologies, the quasi-ZSI (qZSI) is the most common one due to its simple structure and continuous input current. Furthermore, different modulation strategies, utilizing multiple reference signals, have been developed as well. However, prior art modulation methods have some demerits, such as the complexity of generating the gate signals, the increased number of switch commutations with continuous commutation at high current level during the entire fundamental cycle, and the multiple commutations at a time. Hence, this paper proposes two modified space vector modulation strategies, aimed at the reduction of the qZSI number of switch commutations at high current level for shorter periods during the fundamental cycle, i.e., reducing the switching loss, simplifying the generation of the gate signals by utilizing only three reference signals, and achieving a single-switch commutation at a time. These modulation strategies are analyzed and compared to the conventional ones, where a reduced-scale 1-kVA three-phase qZSI is designed and simulated using these different modulation strategies. Finally, the 1-kVA three-phase qZSI is implemented experimentally to validate the performance of the proposed modulation strategies and verify the reported analysis. [ABSTRACT FROM PUBLISHER]

This paper presents a new active gate drive (AGD) for switching performance improvement and overvoltage protection of high-power insulated gate bipolar transistors (IGBTs). In addition to the conventional gate drive (CGD) based on fixed voltage sources and fixed gate drive resistors, the proposed AGD has a complementary current source to provide extra gate drive current into the gate. Specific transient switching stages of the IGBT can be therefore accelerated, leading to higher switching speed and lower switching loss of the IGBT. Additionally, the turn-off voltage overshoot of the IGBT can be controlled at a preset reference value with a fast closed-loop overvoltage protection circuit. Moreover, the switching speed of the IGBT, including the turn-on/off delay times and the turn-on/off voltage slopes, can be effectively regulated with an adaptive switching speed control method. Accordingly, the gate drive is capable of operating the IGBT at specified delay times and fixed voltage slopes when varying the switching conditions (e.g., temperature, load current). The operation principle of the proposed AGD and control concept are presented. By comparing with the CGD, the proposed method is experimentally verified on a 3.3 kV/1.5 kA IGBT module in both double-pulse and multipulse tests. [ABSTRACT FROM PUBLISHER]

In this paper, a new topology of the class E power amplifier (PA) is proposed. The output circuit in the proposed PA is different from that in the conventional class E PA. The conventional output circuit of class E PA consists of shunt capacitor, resonant capacitor, resonant inductor, and shifting inductor. An additional shunt capacitance is added between the resonant capacitance and the shifting inductor to shape the reduced switch voltage. The peak switch voltage of the proposed class E PA is approximately 78% of that of the conventional one, which shows a reduction in peak switch voltage. The lower peak switch voltage reduces the breakdown voltage of the active device. Also, the proposed structure can introduce a new family of switching PAs with interesting specifications. Several values of switch voltage reduction and output power capability could be achieved by varying the circuit elements. Zero voltage and zero derivative switching conditions are achieved in the switch voltage of the designed circuit. The simulation of the proposed circuit is performed using PSpice software. For verification, the presented PA is fabricated and measured. [ABSTRACT FROM PUBLISHER]

ZSVM1, ZSVM2, and ZSVM6 are three traditional space vector modulation (SVM) strategies for three-phase Z-source inverter. The shoot-through times of ZSVM1, ZSVM2, and ZSVM6 are divided into two equal parts, four equal parts, and six equal parts, respectively. Although these control strategies are easy to be implemented in program, their inductor current ripples are not optimized, causing large current ripple. This paper proposes new SVM strategies, named ZSVMD6 and ZSVMD1, for reducing inductor current ripples of Z-source inverter. The principle of volt–second balance is used in the proposed strategies to divide shoot-through times in real time. So every divided shoot-through time is not equal, and changing in real time. The divided shoot-through time can ensure that the sum of the inductor charging current ripple and discharging current ripple is zero at each time, therefore reducing the inductor current ripples. The derivation details of the proposed strategies are given. The inductor current ripples of the proposed strategies and traditional ones are compared and analyzed. Simulation and experiment results show that the inductor current ripples of the proposed strategies are much lower than that of the traditional ones, verifying the effectiveness of the proposed strategies. [ABSTRACT FROM PUBLISHER]

In this paper, a class of single-phase Z-source (ZS) ac–ac converters is proposed with high-frequency transformer (HFT) isolation. The proposed HFT isolated (HFTI) ZS ac–ac converters possess all the features of their nonisolated counterparts, such as providing wide range of buck-boost output voltage with reversing or maintaining the phase angle, suppressing the in-rush and harmonic currents, and improved reliability. In addition, the proposed converters incorporate HFT for electrical isolation and safety, and therefore can save an external bulky line frequency transformer, for applications such as dynamic voltage restorers, etc. The proposed HFTI ZS converters are obtained from conventional (nonisolated) ZS ac–ac converters by adding only one extra bidirectional switch, and replacing two inductors with an HFT, thus saving one magnetic core. The switching signals for buck and boost modes are presented with safe-commutation strategy to remove the switch voltage spikes. A quasi-ZS-based HFTI ac–ac is used to discuss the operation principle and circuit analysis of the proposed class of HFTI ZS ac–ac converters. Various ZS-based HFTI proposed ac–ac converters are also presented thereafter. Moreover, a laboratory prototype of the proposed converter is constructed and experiments are conducted to produce output voltage of 110 Vrms / 60 Hz, which verify the operation of the proposed converters. [ABSTRACT FROM AUTHOR]

In this paper, a novel soft-switching full-bridge converter with an additional secondary switch and a nondissipative energy recovery snubber is proposed. Thanks to the combination of an active switch and the capacitor—diode–diode snubber employed at the secondary side of the converter, the proposed converter can achieve zero-voltage zero-current switching for all of the primary switches and rectifier diodes over the entire load range. As a result, the rectifier diodes have no reverse-recovery problem and their ringing voltage is clamped. In addition, since no phase shift is used for the gate signals of the primary-side switches, the converter control can be implemented easily and it has no circulating current inherently. The converter exhibits a significant improvement in terms of efficiency, especially under light-load conditions, which is difficult to achieve with conventional phase-shift full-bridge converters. A 3-kW prototype circuit is implemented to verify the superior performance of the proposed converter. [ABSTRACT FROM AUTHOR]

In this paper, a new fault tolerant dc–ac converter-fed induction motor drive is proposed to maintain motor as close as possible to its desired normal operation under open- and short-circuit switch failures. The operational principles for fault detection and isolation schemes are provided. Two control strategies including predictive control and voltage mode-controlled PWM with integral-double-lead controller for two stage of the converter are presented in conjunction with the elaborated discussion. The control strategy determines appropriate switching states for continuous operation of the drive after a fault. The proposed topology makes it possible to integrate the minimal redundant hardware and full tolerance capability which is an important advantage of the proposed topology. Moreover, the most important advantages of the proposed topology are a fast response in a fault condition and low cost of the converter in comparison with the evaluated topologies. A Joule-integral-based method for selecting an appropriate rating of applied fuses has been presented to provide a reliable fault-isolation operation. Also, a comparison with currently available fault-tolerant dc–ac converters is given to show the merits of the proposed topology. Finally, the experimental results are presented to verify the validity of the theoretical analysis and industrial feasibility of the proposed converter. [ABSTRACT FROM AUTHOR]

To prevent partial-shading issues in photovoltaic (PV) systems, various kinds of voltage equalizers that virtually unify characteristics of shaded and unshaded modules have been proposed. Although PV string utilization can be dramatically improved, PV systems tend to be complex and costly because, in addition to the main converter for string control, voltage equalizers are separately necessary. This paper proposes the single-switch single-magnetic pulse width modulation (PWM) converter integrating the voltage equalizer using the series-resonant voltage multiplier (SRVM) for standalone PV systems. By utilizing a square wave voltage generated across a filter inductor in a PWM buck converter for driving the SRVM, the main PWM converter and voltage equalizer can be integrated into a single unit with reducing the total switch and magnetic component counts, achieving not only system-level but also circuit-level simplifications. The experimental test using the prototype for three PV modules connected in series was performed emulating a partial-shading condition. The integrated converter effectively precluded the partial-shading issues and significantly improved the power available at a load, demonstrating its efficacy. [ABSTRACT FROM AUTHOR]

The traditional finite-control-set model predictive control (FCS-MPC) method for a cascaded H-bridge (CHB) rectifier has two main issues: heavy computational burden and low steady-state current performance. In this paper, a novel FCS-MPC method has been proposed for a single-phase CHB rectifier. The proposed method solves the optimization problem of FCS-MPC for one cell by one cell, like a “pipeline.” In the proposed method, the sampling period is divided into equal intervals by the number of cells. At the beginning of the first interval, the first cell selects its switching state to be applied. Then, the following cell selects its switching state to be applied at the beginning of next interval. Finally, the selected switching state of last cell will be applied at the beginning of the last interval. A cost function presenting the control objectives of common source current error and itself dc-link voltage error is evaluated for each cell. A single-phase three-cell CHB rectifier controlled by a DSpace DS1104 is tested and the experimental results show that a significant reduction in computational time, an improved steady-state current performance, and a comparable dynamic response are achieved in the proposed method in comparison with the traditional FCS-MPC method. [ABSTRACT FROM AUTHOR]