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In an open-end winding permanent magnet synchronous machines drive with single dc voltage source, zero-sequence current (ZSC) can lead to a high current stress of power modules and loss of motor. Therefore, some modulation strategies have been employed to alleviate ZSC by suppressing zero-sequence voltage (ZSV). However, ZSC still exists in the system because ZSV can also be generated by other nonlinear factors of inverter such as the dead time of system. In addition, zero-sequence back electromotive force in the zero-sequence path can also enlarge torque ripple and ZSC. In order to deal with above problems, first, this paper proposes a full-order adaptive zero-sequence observer to estimate future ZSC and ZSV, which are able to compensate one-step control delay. Second, to achieve the maximum voltage dc bus utilization, this paper proposes a novel deadbeat predictive current control (DPCC) scheme with alternate sub-hexagonal center pulsewidth modulation strategy to suppress ZSC and torque ripple simultaneously. Finally, this paper presents a comparative study of two types of methods, namely traditional DPCC scheme and the proposed DPCC scheme. Simulation and experimental results are demonstrated to verify the effectiveness of the proposed DPCC scheme. [ABSTRACT FROM AUTHOR]

This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

This paper investigates a Vienna rectifier as a charger for series-connected battery packs. Focusing on carrier-based pulsewidth modulation (CBPWM), the ripple current flowing through the neutral point (NP) results in the voltage oscillation if the loads are resistive. To reduce the ripple of average NP current with mitigated distortion under balanced and unbalanced dc-link voltages conditions, a novel CBPWM with segmented component injection scheme (SCIS) is proposed in this paper. After dc component injection, continuous intervals for optimized component injection and clamping intervals for compensation component injection are identified. Optimized components are calculated originally based on unbalanced factor to make the average NP current zero-size in one switching period. Moreover, unique compensation components generate suitable NP current to shape the sinusoidal input currents according to the circuit analysis. In consequence, the SCIS not only keeps the input current with low-harmonic distortion, but also minimizes the oscillation of dc-link voltage under balanced and unbalanced conditions. In addition, the value of the NP current during the clamping intervals is analyzed under various operating conditions. The effectiveness and the performance of the proposed SCIS are verified by simulation and experiments. [ABSTRACT FROM AUTHOR]

This paper proposes a novel discontinuous pulse-width modulation (DPWM) method to reduce the current harmonics and improve the system efficiency for a single-phase three-level neutral-point clamped inverter. In single-phase inverters, the unipolar pulse-width modulation (UP-PWM) method is commonly used. However, this method has the disadvantage of power losses due to numerous switching operations. Conventional DPWM methods reduce the power losses and improve efficiency but increase the current total harmonic distortion (THD). To overcome these weaknesses, this paper proposes a hybrid DPWM switching method combining two PWM methods: the UP-PWM method and the conventional DPWM method called one-pole clamped PWM method. Since the proposed DPWM method offers all the advantages of both PWM methods, the optimal performance—with regard to the power losses and current THD—is obtained. The combination of two PWM methods is investigated by analyzing the power losses and current THD. Based on the analysis, the process determining the optimal operating condition is introduced. The effectiveness of the proposed DPWM method is demonstrated through simulations and experiments. [ABSTRACT FROM AUTHOR]

The output voltage of power electronic converters is a very important quantity for dynamic control of power electronic systems. In electrical drives without electromechanical position or speed sensor, the terminal reference voltage is used to obtain the rotor position. Dead-time effects and semiconductor voltage drop lead to distortion in the actual output voltage and degrade the control performance when the back electromotive force magnitude is low. Thus, for stable low-speed operation, output voltage sensing becomes necessary. Due to the switching nature of power electronic systems, this is not a trivial task, especially when instantaneous measurement of the terminal voltage is required. In this paper, an instantaneous switching-period average voltage sensing technique is proposed that utilizes a combined approach of oversampling and filtering. Based on the theoretical analysis of the sampling- and filter-induced measurement distortion, a general solution for an optimal filter design is derived. The additional sensing circuit is integrated into the low-side gate driver of the converter outputs. This paper includes details about the hardware implementation and extensive verification measurements. [ABSTRACT FROM AUTHOR]

This paper proposes a new single-phase single-stage switched-boost inverter with four switches. Like the quasi-Z-source inverter and quasi-switched boost inverter (qSBI), the proposed inverter has the main features as continuous input current, buck/boost voltage with single-stage conversion, and shoot-through immunity. Compared to the qSBI, the proposed inverter uses one more capacitor and one less switch. This paper presents the operating principles, pulse-width modulation control strategy, parameter design guidelines, and simulation results for the proposed inverter. To verify the performance of the proposed inverter, an 800-W prototype was built with an 110 V/50 Hz output voltage in stand-alone and grid-connected modes. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

Common-mode voltage output is closely associated with switching states in three-phase three-wire neutral point clamped converter. Detailed analysis shows avoiding redundant states can effectively improve the common-mode voltage, so this paper proposes a pulse width modulation (PWM) technique with zero redundant state to reduce the common-mode voltage output, and evaluates their performance with the conventional PWM schemes. This paper also takes the compensation of neutral point potential deviation into consideration. Laboratory test results are presented to verify the effectiveness of the proposed scheme. [ABSTRACT FROM PUBLISHER]

This paper targets the reduction of common-mode voltage in an indirect matrix converter (IMC) through an intelligent space-vector-based modulation technique. This mode of control results in lower dV/dt at the motor terminals, thereby, reducing voltage stress to windings; and reduced output voltage distortion resulting in lower machine losses. The conventional indirect space vector pulse-width modulation method of controlling matrix converters involves independent control of either the rectifying stage or the inverting stage of the converter. However, in this paper, by suitable selection of space vectors, the rectifying stage of the matrix converter generates different levels of virtual dc-link voltage. Therefore, the responsibility of formulating output voltages with a particular magnitude and frequency, which can be translated to different machine speeds, has been transferred solely to the rectifying stage of the IMC. Estimation of the degree of distortion in the three-phase output voltage is another facet discussed in this paper, which aids the sizing and designing of output passive filters. The analysis of output voltage distortion and the proposed modulation strategies have been substantiated by simulations in MATLAB/Simulink and experimentally verified on a scaled down laboratory prototype. [ABSTRACT FROM AUTHOR]

In photovoltaic applications, many previous research works have focused on pulsewidth modulation (PWM) resonant converters in order to achieve a high efficiency with a wide input voltage range. Conventional approaches utilized symmetric boosting modulation at the secondary side rectifier to obtain a symmetric operation, and they utilized two boosting modes in a switching period. Among various rectifier structures, the voltage doubler structure has a strong advantage due to a small number of components. However, it suffers from serious hard switching losses in the secondary side rectifier. In this paper, a new converter with a novel asymmetrical modulation is proposed and verified. The strong point of the proposed converter is that it eliminates hard switching turn-on losses from the rectifier, while maintaining the minimized number of components. Although the proposed converter adopts an asymmetric modulation, the offset current on the transformer becomes zero inherently. Furthermore, a “forced half resonance” operation of the proposed converter keeps rms current stresses at the same level as conventional converter although it has a higher peak current. Accordingly, the proposed converter achieves a superior efficiency with the minimum number of components at 35–25 V input and 380 V/300 W output specification. [ABSTRACT FROM AUTHOR]

The pulse-width modulated (PWM) switching rectification that can achieve a high power factor (PF) for increasing the energy transfer efficiency between an LC resonator and a rectifier and voltage step-up and -down conversion is proposed for a wireless power transfer (WPT) receiver. The proposed method can emulate the switching rectifier as a resistive load by using an inductor and integrated phase synchronizers. Additionally, similar to a switched-inductor converter that controls the duty cycle ratio (D), the proposed PWM rectifier can control the output voltage VOUT when the input is a rectified, wirelessly coupled voltage instead of a constant voltage. Thus, unlike a conventional PWM switching rectifier for ac mains, an additional voltage conditioning circuit would not be needed after the proposed rectifier for WPT. The proposed PWM switching rectification is implemented in the AMS 0.18 μm 1.8 V/5 V CMOS process. PF = 1 is measured, indicating the most efficient energy transfer, compared to only 0.55–0.65 in a peak detection rectifier. Additionally, 88.2% of peak power conversion efficiency of the switching rectifier is achieved, and the maximum output power is 80.3 mW at 500 kHz of the WPT frequency. Moreover, the measured voltage conversion ratios ranging between 0.73× and 2× are demonstrated in this paper. [ABSTRACT FROM AUTHOR]

This paper proposes a generalized design framework for three-phase Vienna rectifiers to handle the neutral point voltage balance issue. On the basis of the design framework, it is convenient to construct various neutral point voltage balancing methods with the guarantee of stability. As demonstration, three representative neutral point voltage balance approaches are presented by choosing different zero-sequence voltages. A comprehensive comparison among the three approaches is given in the aspects of input current quality, capacitor voltage fluctuation, and system efficiency. The comparison results provide guidance for constructing the most appropriate approach based on the specific requirement. Finally, simulation and experimental results verify the correctness and effectiveness of the presented approaches and the related performance analysis. [ABSTRACT FROM AUTHOR]

In order to reduce switching loss of neutral point clamped three-level inverter (NPC TLI), generally discontinuous pulsewidth modulation (DPWM) is used. But it can result in dc offset and ac ripple on neutral point (NP) voltage. So a novel pulse sequence DPWM (NPSDPWM) is proposed to reduce switching loss and control NP voltage simultaneously in this paper. NP voltage is controlled by choosing proper clamping modes. To avoid unexpected switching action during changing clamping mode, an improved pulse sequence is also presented. The switching loss and NP voltage ripple of NPSDPWM, traditional and proposed DPWM in previous literature are compared, respectively. The experimental results show that NPSDPWM has well NP voltage control ability and the switching losses are reduced effectively. [ABSTRACT FROM AUTHOR]

In this paper, a novel discontinuous pulsewidth modulation (DPWM) modulation strategy for a neutral-point-clamped (NPC) three-level converter (TLC) is proposed to reduce the switching loss, reduce common-mode voltage (CMV), and remove dc offset from the neutral-point (NP) voltage simultaneously, which is named as RCMV_DPWM. Based on the space vector diagram with reduced CMV, all clamping modes under RCMV_DPWM are revealed. Then, the NP voltage is controlled by selecting proper clamping mode. The realization of RCMV_DPWM is also discussed. Moreover, the performances of RCMV_DPWM are analyzed and compared with other PWM strategies in term of the NP voltage ripple, switching loss, and waveform quality. Finally, the feasibility and superiority of RCMV_DPWM are verified by experiments. [ABSTRACT FROM AUTHOR]

Rotor position estimated with high-frequency (HF) voltage injection methods can be distorted by voltage errors due to inverter nonlinearities, motor resistance, and rotational voltage drops, etc. This paper proposes an improved HF square-wave voltage injection algorithm, which is robust to voltage errors without any compensations meanwhile has less fluctuation in the position estimation error. The average position estimation error is investigated based on the analysis of phase harmonic inductances, and deduced in the form of the phase shift of the second-order harmonic inductances to derive its relationship with the magnetic field distortion. Position estimation errors caused by higher order harmonic inductances and voltage harmonics generated by the SVPWM are also discussed. Both simulations and experiments are carried out based on a commercial PMSM to verify the superiority of the proposed method and the investigations in this paper. [ABSTRACT FROM AUTHOR]

This paper studies pulse width modulation (PWM) techniques suitable for a four-level five-phase open-end winding (OeW) drive. The drive comprises a five-phase induction machine, supplied using two two-level voltage source inverters with isolated and unequal dc-link voltages, in the ratio 2:1. A decoupled carrier-based (CB) PWM modulation strategy, based on unequal voltage reference sharing between the two converters, is introduced in this paper. The stability of dc-link voltages in OeW drives is investigated next, using a novel analysis technique. Several modulation methods are analyzed and the results show that application of the coupled PWM technique, with carriers having in-phase disposition, leads to overcharging of the capacitor in the dc-link of the inverter intended to operate with the lower dc-link voltage. On the other hand, the proposed decoupled CB PWM scheme naturally eliminates the dc-link capacitor overcharging problem. These findings are verified experimentally, using open-loop V/f control. Two different decoupled CB modulation methods are compared and the best performing modulation method is selected and incorporated further into an OeW drive with field-oriented control. The presented steady state and transient experimental results demonstrate that the decoupled CB PWM technique is suitable for high-performance variable speed drive applications. [ABSTRACT FROM AUTHOR]

This paper presents a pulse width modulation (PWM) technique for the minimization of the leakage current in the grid-connected/stand-alone transformerless photovoltaic (PV)-cascaded multilevel inverter (CMLI). The proposed PWM technique is integrated with the MPPT algorithm and is applied to the five-level CMLI. Furthermore, using the proposed PWM technique the high-frequency voltage transitions in the terminal and common mode voltages are minimized. Thus, the proposed PWM technique minimizes the leakage current of the PV array and electromagnetic interference filter requirement in the system without addition of any extra switches. Furthermore, this paper also presents the analysis for the terminal voltage across the PV array and the common mode voltage of the inverter based on the switching function. Using the given analysis, the effect of the PWM technique can be analyzed, as it directly links the switching function with the common mode voltage and leakage current. Also, the proposed PWM technique requires reduced number of carrier waves compared to the conventional sinusoidal pulse width modulation technique for the given CMLI. Complete details of the working principle and analysis with the support of simulation and experimental results of the proposed PWM technique are presented in this paper. [ABSTRACT FROM PUBLISHER]

In transformerless high-power pulse width modulation (PWM) current-source drives, common-mode inductor is implemented to attenuate the common-mode voltage (CMV). However, the common-mode inductor is bulky and costly, so that scaling down the size of the common-mode inductor can achieve the system size reduction and efficiency enhancement. The size of the common-mode inductor is mainly related to the maximum common-mode current, which occurs at the resonant frequency of the common-mode circuit when motor speed is low. Previous research demonstrates that 3-segment average-value-reduction (AVR) space vector modulation (SVM) has good common-mode resonance suppression performance by attenuating the third-order CMV from the inverter. However, as studied in this paper, when modulation index of the inverter is lower than 0.4, the performance of 3-segment AVR SVM is affected as the dwell time of zero vector becomes too long to effectively compensate the CMV introduced by the active vectors. To overcome this problem, three modified AVR SVM schemes are proposed in this paper, where the single long zero vector is separated into two segments in the PWM sequence. The working principles, CMV reduction performance, harmonic performance, and switching frequency analysis of the proposed SVM methods are presented in detailed. Experiments are conducted to verify the effectiveness of the proposed methods. [ABSTRACT FROM PUBLISHER]

This paper proposes a dual-space vector control scheme for the open-end winding permanent magnet synchronous motor (OEW-PMSM) drive fed by the dual inverter with a single dc supply. Potential zero-sequence current in the open-end winding drive system has to be considered since it causes circulating current in the winding and leads to high current stress of power semiconductor devices and high losses. Zero-sequence current in open-end winding ac motor drives is usually caused by the zero-sequence voltage, and therefore switching combinations which do not produce zero-sequence voltage are used to synthesize the reference voltage in existing methods. But even so, the zero-sequence voltage can also be produced by the dead time of the inverter. In order to suppress zero-sequence current in the OEW-PMSM drive, a dual-space vector control scheme is proposed and a novel dual-inverter space vector pulse width modulation (PWM) with the zero-sequence voltage reference is employed to regulate system zero-sequence voltage in this paper. Compared with existing dual inverter PWM strategies, the novel algorithm build a regulation mechanism for the zero-sequence voltage. The proposed method is compared with the conventional vector control by simulations and experiments, and the results shown that the proposed scheme can suppress zero-sequence current effectively. [ABSTRACT FROM AUTHOR]

Magnetically coupled impedance-source (MCIS) networks are recently introduced impedance networks intended for various high-boost applications. It employs coupled magnetic in the circuit to achieve higher voltage gain. Various MCIS networks have been proposed in the literature for myriad applications; however, due to effective role of system modeling in the closed-loop controller design, this paper is allocated to small-signal modeling and analysis of MCIS converters. The modeling is performed by means of the circuit averaging and averaged switch technique. A generalized small-signal derivation is demonstrated for pulse width modulation (PWM) MCIS converters and it is shown that the derived transfer functions can simply be applied to Y-source, Γ-source, and T-source impedance networks. Various transfer functions for capacitor voltage, output voltage, magnetizing current, input and output impedance are derived and have been validated through frequency and dynamic responses of computer simulation results. In addition, a comprehensive analysis has been done for all mentioned PWM MCIS converters regarding their circuit parameters. Furthermore, the effect of considering the equivalent series resistances of capacitor and inductor on the stability margin of MCIS converters is revealed in this paper. Finally, in order to validate the derived transfer functions and to consolidate the perfumed analysis, experimental results are presented for all mentioned MCIS converters. [ABSTRACT FROM PUBLISHER]

Based on the Z-source inverter, this paper proposes a novel commutation torque ripple reduction strategy for brushless DC motor (BLDCM). The proposed strategy employs the same modulation mode in both the normal conduction period and the commutation period, and the commutation torque ripple is reduced by regulating the shoot-through vector and active vector duty cycles. The proposed detection method acquires the end point of commutation by comparing the clamped terminal voltages with reference zero level, and the signal-noise-ratio of the detection is improved by avoiding the attenuation of the terminal voltages. Furthermore, a certain pulse width of the shoot-through vector can not only reduce the commutation torque ripple but also provide a new opportunity to detect the end point of commutation. Moreover, Z-source inverter provides the buck–boost ability for BLDCM drive system, then the dc voltage utilization can be improved, and the safety of the drive system can also be improved. In addition, this paper analyzes the terminal voltages during each vector. The experimental results verify the correctness of the theories and the effectiveness of the proposed approach. [ABSTRACT FROM PUBLISHER]

This paper extends the high-frequency transformer isolation concept to the Z-source (ZS) ac–ac converters and introduces a new family of high-frequency transformer isolated (HFTI) ZS ac–ac converters. The proposed HFTI-ZS converters retain all the benefits of their existing nonisolated counterparts, such as providing a larger range of output voltage with buck–boost functionality, reversing or maintaining the phase angle, reducing the in-rush and harmonic currents, and improving reliability. In addition to these benefits, the high-frequency (20 kHz) transformer (HFT) in the proposed ZS ac–ac converters provides the electrical isolation and safety with high power density as it eliminates the need for bulky and heavy line frequency (50 or 60 Hz) transformer for galvanic isolation, in applications such as dynamic voltage restorers, etc. The dc-blocking capacitor added in series with the HFT results in only ac voltage applied across its windings, which avoids its saturation. Various ZS-based HFTI ac–ac converters are proposed in this paper, and to verify their operation and advantages, example of quasi-ZS (qZS)-based isolated ac–ac converter is considered in detail. The commutation strategy is also developed to achieve the safe commutation, which avoids the current and voltage spikes without using any RC snubber. A 200-W laboratory prototype of HFTI-qZS ac–ac converter is fabricated and experiments are performed to validate the advantages of the proposed ac–ac converters. [ABSTRACT FROM PUBLISHER]

This paper proposes novel pulsewidth modulation (PWM) schemes for multi-space-vector pulsewidth modulation (MSVPWM), which is used in position sensorless control of interior permanent-magnet synchronous motor drives. The estimation of the rotor position is based on magnetic saliency and employs high-frequency components of voltage and current, which are excited by MSVPWM. The difference between the instantaneously applied voltage vector and the reference voltage vector causes current ripple. Since six or four voltage vectors are generated during a PWM period, the sequences of the error voltage vectors lead to different types of current ripples. In this paper, the proposed MSVPWM schemes employ six sequences for zero-/low-speed operation and 24 sequences for high-speed operation to reduce line current ripple. Experimental results confirm that the proposed MSVPWM schemes lead to significant reduction in harmonic current while maintaining high performance of sensorless estimation. [ABSTRACT FROM AUTHOR]

The increasing interest in multiphase drive systems has led to the extension of inverter topologies and pulse width modulation (PWM) methods from three-phase to multiphase occasions. Carrier-based PWM (CPWM) dominates space vector PWM when the phase number increases, because of its simple computation and modular implementation. Although intensive work has been done on modifying PWM methods to reduce the common-mode voltage (CMV), not enough work has been done on CPWM methods with CMV reduction for multiphase drives. This paper extends the phase-shifted sinusoidal PWM (PS-SPWM) method for five-phase and six-phase two-level voltage-source inverters (VSI) and employs the intersection-plotting method and Fourier analysis to reveal the nature of the CMV. Both experiment and simulation results comply with theoretical analysis that compared with the conventional SPWM, the PS-SPWM can effectively reduce the CMV in peak-to-peak value and RMS value, though it leads to a higher phase current distortion. In addition, the hardware realization of PS-SPWM for multiphase inverters by a distributed control system is presented in this paper. [ABSTRACT FROM AUTHOR]

Core loss estimation of filter inductors is increasingly important for modeling and optimizing high-frequency, high-efficiency, and high-density pulsewidth modulation (PWM) power electronic converters. However, data provided by inductor core manufacturers are insufficient for core loss estimation in PWM converters, particularly in the case of customized gapped inductors. This paper presents a whole process of characterizing and estimating the core loss of a customized high-current gapped inductor for PWM converters. To excite the inductor for the B–H loop measurement, a test circuit formed by a half-bridge structure is proposed, which has the ability to compensate the asymmetric rectangular voltage on the inductor caused by the device voltage drops. To overcome the other challenges raised by a high excitation current, a refined discontinuous test procedure, triple pulse test, is proposed to reduce the requirements of the high-current test setup (thermal stress, current–time stress for current probes, capacity of dc sources, etc.). For practical purposes, a user-friendly loss map approach is proposed involving only time-domain and electrical variables to replace magnetic variables to enable the straightforward loss mapping process and core loss calculations. Presented experimental results show consistency between the estimated inductor loss and measured values. Overall, the proposed testing approach can be easily implemented on the user's side to develop a loss map of a given inductor. The established core loss map enables the users to accurately and rapidly estimate the core loss of a tested inductor for given PWM waveforms. [ABSTRACT FROM AUTHOR]

In this paper, a fast-processing implementation method of the current-ripple-loss-optimized common-mode voltage reduction pulsewidth modulation (CRLO-CMVRPWM) is studied. With the novel sector definitions and the simplified method to solve the constraint nonlinear programming model, the compute burden of the proposed method is reduced by 82.8% and 50.5% for the case where the modulation index is below and above $4\sqrt 3 /9$ , respectively. In addition, the effects of the optimized zero-sequence voltage errors caused by the adopted linear fitting strategy are proven to be negligible by studying the harmonic characteristics difference between the fast-processing and original CRLO-CMVRPWM. Simulated and experimental results are given to validate the effectiveness. [ABSTRACT FROM AUTHOR]

In this paper, a novel space-vector pulsewidth modulation technique for a five-level active neutral-point clamped (5L-ANPC) inverter is proposed to eliminate the common-mode voltage (CMV). For the 5L-ANPC inverter, which produces a good output voltage performance and lowdv/dt, the total 125 voltage vectors can be generated, among which the proposed scheme employs only 19 voltage vectors producing a zero CMV. Due to the limitation of voltage vectors selected, the dc-link capacitor voltages of the 5L-ANPC inverter cannot be balanced by themselves. Therefore, the capacitor voltages of the inverter should be controlled by choosing the redundant switching states appropriately. The validity of the proposed modulation scheme has been verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

High step-down voltage conversion is necessary to bridge the voltage gap between main power converters and low-voltage auxiliary electronics in power conversion systems. Switched capacitor converters (SCCs) are an attractive candidate as a high step-down converter, but their poor voltage regulation capability may limit their applications. Pulsewidth modulation (PWM) SCCs with adjustable high step-down voltage conversion are proposed in this paper. The proposed PWM SCCs can be derived from traditional SCCs by replacing an energy transfer capacitor with a switched-capacitor-inductor (SCL) cell that comprises inductors, capacitors, and diodes to realize PWM-controllable voltage conversion. The voltage step-down ratio of the proposed PWM SCCs is not only PWM controllable but also adjustable with structures of SCCs and SCL cells. Two representative PWM SCCs were taken as examples to perform the operational analysis. The prototypes of both representative PWM SCCs were built and tested to demonstrate the proposed concept. [ABSTRACT FROM AUTHOR]

Common-mode voltage (CMV) is known as a major cause of premature motor failures. The form and amplitude of the CMV generated by any converter depends on both the circuit topology and modulation technique. Among single stage ac–ac converters employed in drive applications, the Z-source ultra sparse matrix converter (ZSUSMC) is a desirable choice due to reduced number of switches in its structure and voltage boosting capability. Based on these considerations, this paper aims to: 1) theoretically determine and compare the CMV of the ZSUSMC with four well-known impedance networks, namely, cascaded, switched-inductor, quasi, and series, in its structure and 2) propose modulation techniques for CMV reduction in the ZSUSMCs. To this end, first, it is shown that the ZSUSMC, depending on the impedance network used in its structure, provides more freedom to choose from redundant switching states compared to the ultra sparse matrix converter. Then, by taking advantage of this feature, novel modulation strategies that attenuate the CMV without affecting the boosting capability are developed. The proposed modulation schemes are based on avoiding the switching states most contributing to the CMV during a switching period. Through hardware-in-the-loop studies, the effectiveness of the proposed modulation strategies in reducing the CMV of the ZSUSMCs is verified. [ABSTRACT FROM AUTHOR]

In voltage-source inverters (VSIs), dead time is used to prevent shoot-through over switching devices. However, the existence of the dead time will distort the output phase current, which degrades the performance of the inverter as well as influences the common-mode voltage (CMV), particularly in CMV elimination relevant modulation schemes, such as zero-common-mode (CM) pulsewidth modulation (PWM)-based paralleled inverters. In the light of the situation that the normal sampling-based dead-time compensation (DTC) methods are often disturbed by the current ripple, this paper introduces a novel DTC method for the VSI, which can mitigate the impact of the current ripple and improve the accuracy of DTC. The proposed method deduces the real-time current ripple, which can reconstruct the actual trajectory of phase-leg currents, and the peak values corresponding to rising and falling edges for PWM signals can be predicted. In this way, DTC can be implemented based on the direction of relevant instantaneous switching currents and finally improves the accuracy. Especially, the current-ripple-prediction-based DTC can help to improve the CMV distortion caused by the dead time for paralleled inverters with zero-CM PWM. Simulation and experimental results are provided to validate that the proposed method can be applied to different topologies and modulation schemes with good performance. [ABSTRACT FROM AUTHOR]

A cascaded H-bridge (CHB) converter-based medium or high-voltage motor drive system, that consists of three single-phase CHB chains, may suffer a severe second-harmonic ripple power issue. Oversizing dc capacitors and using active power decoupling control with additional active or passive components are the two possible ways to address this issue, but this is achieved at the expense of increased system cost and complexity. This paper proposes a power decoupling control to tackle this issue without using any extra components for regenerative CHB-based converters. By introducing a set of negative-sequence decoupling currents to the front-end pulsewidth-modulated rectifier of each submodule, the second-harmonic ripple power can be removed from the submodule dc capacitors, and all the ripple power in the transformer core legs can be counteracted without affecting the magnetic flux and the grid current. The decoupling current is derived from the input and output measurements of the CHB converter. It gives the minimal increase of the modulation index and has no impacts on the input and output power quality. The effectiveness of the proposed control is verified in simulations and a 72-kW experimental prototype. [ABSTRACT FROM AUTHOR]

At present, virtual flux voltage oriented control strategy is one of the widely used control strategies without grid voltage sensor. To solve the dc bias resulting from voltage vector integration in vector calculation of virtual flux and further avoid the steady-state error, a virtual flux observer with negative feedback resonant filter is presented in this paper based on virtual flux principle and a delay compensation algorithm is also proposed to solve the delay of virtual flux. In addition, the control system diagram of the pulsewidth modulated rectifier without grid voltage sensor is brought forth. Then, simulation system and experimental platform are both established to simulate and test the rectifier. Eventually, the correctness and feasibility of the proposed algorithm are verified through the analysis of simulation and experimental results. [ABSTRACT FROM AUTHOR]

With the development of insulated gate bipolar transistor (IGBT) and pulsewidth modulation control strategy, the voltage source converter (VSC) is getting more and more popular, which can be used in high-voltage frequency converter, VSC-HVDC, FACTS, and custom power. In high voltage and high power applications, serial connection of IGBTs is a good solution to overcome the voltage limitation of the single IGBT. However, for using IGBTs in this way, a comprehensive range of issues need to be addressed, especially the static and dynamic voltage-sharing of each IGBT module. This paper presents the theoretical and practical study on how to use serial-connected IGBTs in a VSC, including adaptive dynamic voltage-balance strategy, voltage-balance circuit, power supply system, and valve vase electronics. A three-phase two-level VSC consisted of 6 arms multiplied by 12 serial-connected 3300 V IGBT modules is also developed. To test the performance of the VSC, pulse test of the one arm and inverter operation test of the whole VSC are carried out. The experimental results show that the maximum voltage imbalance is about 10%, the voltage shoots are less than 12%; and the VSC works stably, which indicates a solid foundation for industrial application. [ABSTRACT FROM AUTHOR]

This paper proposes the new clamping angle control (CAC) pulse width modulation (PWM) method to restore its maximum linear modulation range of voltage source inverters (VSIs) reduced by the duty ratio limitation in hardware implementation, which makes the VSIs to operate nonlinearly in the high modulation range. The deadtime and the bootstrap gate driver circuit mainly cause this duty ratio limitation in practice. In particular, the bootstrap gate driver circuit is used in many industrial applications by avoiding the additional power supply to apply the gate-source voltage of power switches, and therefore making the VSIs to be small size with the low cost. First, the proposed CACPWM method is theoretically analyzed. Then, it is applied in the high modulation range to overcome the limitation of the duty ratio due to the use of the bootstrap gate driver circuit. Thereafter, its practical effectiveness is verified by both simulation and experimental tests. Also, the resulting harmonic distortions are compared with those by the conventional PWM methods. [ABSTRACT FROM AUTHOR]

In this paper, a new pulse width modulation (PWM) scheme and commutation method is presented for one phase loss operation of three-phase isolated buck matrix-type rectifier. With the proposed PWM scheme, the maximum allowable voltage gain for one phase loss operation can be achieved, which permits the continuous operation of the converter to deliver two-third of the rated power and regulate the output voltage with maximum output voltage drop less than 5% of nominal output voltage. In addition, with the proposed commutation method, a safe transition from one phase loss operation to normal operation and vice versa can occur with minimum commutation steps (two-step) under zero-voltage switching condition. The performance of the proposed PWM scheme and commutation schemes with one phase loss operation is evaluated and verified by simulations and experiments on a 5 kW prototype. [ABSTRACT FROM AUTHOR]

This paper has focused on the novel space vector pulse-width modulation (SVPWM) strategy for the two-level three-phase inverter, which could eliminate the harmonics nearby pulse width modulation (PWM) frequency. Ear-piercing high-frequency electromagnetic noise from motor is common due to PWM technique. The proposed SVPWM is able to remove the high-frequency harmonics located nearby the PWM frequency and other odd multiples by changing the original switching states. The unpleasant acoustic noise could be removed with the novel strategy whose PWM frequency is selected near 10 kHz. By comparison, it is near 20 kHz for conventional SVPWM to achieve the similar performance. Therefore, the switching losses are significantly reduced using the novel method. Furthermore, the proposed technique neither changes the characteristics of the fundamental wave nor employs the additional circuits in the drive. At last, the effectiveness of proposed strategy is verified by simulation and experiment. [ABSTRACT FROM AUTHOR]

For the purpose of reducing cost and volume, as well as to increase reliability in hostile environments, techniques of reconstructing three-phase current through a single current sensor have been reported for a three-phase alternating current motor vector control system. Based on the phase current reconstruction method, this paper proposes a novel open-circuit fault diagnosis method for the low-power voltage source inverter in the three-phase permanent-magnet synchronous motor drive. Other than sampling the single dc-link current sensor, the zero voltage vector sampling method (ZVVSM) is adopted to implement the fault diagnosis. By placing the single current sensor at a special position, ZVVSM is able to sample current during the two zero voltage vectors and reconstruct the three-phase currents. The reconstructed three-phase currents are used to generate the diagnostic variables that can detect and locate the faulty power switches. The PWM modulation strategy remains unchanged in this method and the reconstructed phase currents are with less waveform distortion and less harmonic contents, which are suitable for the fault diagnosis. The effectiveness of the proposed method is verified by experiments. [ABSTRACT FROM AUTHOR]

In this paper, a new single-stage half-bridge (HB) resonant $LLC$ converter additionally employing one resonant capacitor and two relays with one package is proposed, compared with a single-stage HB $LLC$ converter. Moreover, a center-tapped transformer is replaced with a coupled transformer. Since the proposed converter changes the turns ratio of the coupled transformer using a relay according to low- or high-input-voltage range, it can decrease the range of its needed voltage gain. It means that the proposed converter can be designed with large transformer magnetizing inductance compared with the conventional single-stage HB $LLC$ converter. As a result, the primary conduction and turn-off losses are reduced. Moreover, in low input voltage range, it has smaller total primary wire resistance of the transformer due to parallel connection of the coupled transformer, which decreases its conduction loss. In addition, additionally employed small-sized components can be inserted to the conventional system. To confirm the operation, features, and validity of the proposed converter, universal input with low line and high line and 16.5 V/60 W output laboratory prototype targeting laptop adapters with wide-input-voltage range is built and tested. [ABSTRACT FROM AUTHOR]

This paper presents the active capacitor voltage-balancing (ACVB) methods based on the dynamic model for a five-level nested neutral-point piloted (NNPP) converter using hybrid carrier modulation. The traditional hybrid carrier modulation provides natural voltage balancing of floating capacitors and dc-link capacitors. First, the natural voltage-balancing ability under steady-state and ideal conditions is theoretically proved. However, there are accumulated errors and deviations of capacitor voltages in practical applications, especially under dynamic conditions. In order to address the accumulated errors and deviations of capacitor voltages, the dynamic models of floating-capacitor voltages and neutral-point voltage are established. Moreover, the ACVB method based on the dynamic model of the neutral-point voltage is proposed by injecting the zero-sequence voltage. And the ACVB method based on the dynamic model of floating-capacitor voltages is proposed by introducing the adjustment variables. The proposed ACVB methods have the advantages of simple formula, definite physical meaning, and high accuracy. Furthermore, the output voltage quality and current quality are evaluated in term of total harmonic distortion and the effect of model parameter mismatch on the proposed ACVB methods is presented. Finally, the comparative simulation and experimental results verify the correctness of the proposed ACVB methods based on the dynamic model under different conditions. [ABSTRACT FROM AUTHOR]

In this paper, a high-performance grid simulator based on a parallel structure fractional repetitive control scheme is employed to emulate various operation scenarios of power grids for testing power products. In this paper, a simple fractional repetitive control scheme is proposed for grid simulators to achieve high-accuracy tracking performance. Using parallel branches, the proposed repetitive controller can flexibly select the interested harmonics for compensation, and independently, tune the convergency rate at selective harmonic frequencies. Compared with the conventional repetitive control, the proposed control scheme achieves faster transient response. Moreover, the number of delay units required in the proposed repetitive controller is reduced to at least half of that in a conventional repetitive controller. Design process and stability criteria are presented in details. A set of experimental results is provided to verify the effectiveness of the proposed approach. [ABSTRACT FROM PUBLISHER]

This paper discusses the voltage error caused by the dead time in voltage-source PWM converters. The theoretical analysis in this paper derives the nonlinear voltage error paying attention to the parasitic output capacitance in each switching device. The analytical result reveals that the turn-off current or the switching current ripple strongly affects the voltage error. In addition, it is clarified that the conventional compensation methods based on linear and three-level approximation are suitable under small and large current ripple conditions, respectively. A simple calculation method of current ripples in three-phase PWM converters is also developed to estimate the turn-off currents. Turn-off transition compensation method which is a new compensation method based on the analysis is developed and compared with three different conventional methods in experiments using a 200-V, 5-kW three-phase grid-connection converter. The proposed method exhibits a good compensation performance having a lower voltage THD than the conventional methods in all over the operating range. [ABSTRACT FROM AUTHOR]

Based on the Z-source inverter, this paper proposed a novel approach to zero-crossing point (ZCP) detections during the shoot-through vectors for sensorless brushless dc motor (BLDCM). The proposed approach separates the ZCP detections from speed adjustment, and makes the shoot-through vector not influence the motor speed-adjustment directly, while the zero-vectors and active-vectors are used exclusively to adjust the speed of BLDCM. With the proposed approach, the sensorless BLDCM can operate in a wide speed range without switching the detection points and the reference levels, and it is unnecessary to change the reference levels according to the PWM technique. The terminal voltages limited by diode can be directly compared with the reference zero level during the shoot-through vectors, so as to reduce the detection error caused by attenuation. Moreover, Z-source inverter not only provides boost voltage for sensorless BLDCM drive system, but also improves the utilization rate of dc source voltage and the safety of the drive system. In addition, this paper analyzed the terminal voltages of the floating phase during each vector. The experimental results verified the correctness of above theories and proved the effectiveness of the proposed approach. [ABSTRACT FROM AUTHOR]

Full-bridge (FB)-boost converter is suitable for applications with wide input voltage range and galvanic isolation requirement, and a two-mode phase-shift (PS)-two-edge modulation (TEM) control scheme based on two modulation signals and one carrier can be used to achieve automatic mode shifting and high efficiency. In order to reduce the influence of the input voltage disturbance on the output voltage, the small-signal model of FB-boost converter is built and the input voltage feed-forward (IVFF) functions under different operating modes are derived in this paper. In view of the small-signal and large-signal control laws of the derived IVFF functions, the two-mode PS-TEM control schemes with small-signal and large-signal IVFF compensations are proposed, respectively. Both of them can realize automatic selection of operating modes and the corresponding IVFF compensations, and thus high efficiency and improved input transient response can be guaranteed. Besides, the IVFF function in boost mode is simplified for easy implementation, and the comparisons among the two-mode PS-TEM control schemes with small-signal, large-signal, and without IVFF compensations are presented in this paper. Finally, a 250-500-V input, 360-V output, and 6-kW-rated power prototype demonstrates the effectiveness of the proposed control schemes. [ABSTRACT FROM AUTHOR]

Pulse width modulation (PWM) converters generate switching common-mode voltages (CMVs) across the load terminals. These voltages cause common-mode currents, leading to bearing failure in motor loads and electromagnetic interference problems. This paper presents a generalized carrier-based PWM technique for open-end winding motor drives that completely eliminates switching CMV. The proposed method is applicable to both dual two-level voltage source inverter and dual matrix converter-based open-end winding drives. Detailed analysis shows that the carrier-based method requires significantly less computation compared to the corresponding space vector implementation. This paper also outlines the relationship between the two implementations. The carrier-based method is shown to achieve superior performance in terms of resource requirements and execution time when implemented on a field-programmable gate array-based real-time control platform. Simulation and experimental results have been presented to validate the proposed method. [ABSTRACT FROM AUTHOR]

Many publications have been presented on the modulation and control of the modular multilevel converter, some of which are based on phase-shifted carrier modulation. This paper presents an analysis of how the switching frequency affects the capacitor voltages, circulating currents, and alternating voltages using phase-shifted carrier modulation. It is found that switching frequencies that are integer multiples of the fundamental frequency should be avoided as they can cause the capacitor voltages to diverge. Suitable switching frequencies are derived for which the arm and line quantities will be periodic with symmetric operating conditions in the upper and lower arms. Thus, the practical outcome of this paper is a detailed description of how the switching frequency should be chosen in order to achieve advantageous operating conditions. The theoretical results from the analysis are validated by both simulations and experimental results. [ABSTRACT FROM AUTHOR]

A modular multilevel converter (MMC) is an attractive solution for power conversion without transformers. The MMC consists of cascade connections of floating dc capacitors. In this paper, an adaptive observer design has been proposed to estimate the capacitor voltages from the measurement of arm currents. This work introduces the capacitance value of the cell capacitors as a parameter uncertainty for making the system performance robust with unknown constant parameters. It may be used for predictive control, condition monitoring for capacitors, and diagnosis check for capacitor health. In addition, a pulsewidth modulation (PWM) technique for MMC has been explored. The PWM technique is performed using a carrier-based level-shifted PWM strategy. It does not necessitate the calculation of duty cycles, and can be easily implemented in a DSP. By using the PWM technique, harmonics in the phase voltage is shifted to twice the switching frequency. Theoretical analysis is included in this paper for showing stability and convergence of the proposed observer. Analytical expressions are verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a new multilevel selective harmonic elimination pulse-width modulation (MSHE-PWM) technique for transformerless static synchronous compensator (STATCOM) system employing cascaded H-bridge inverter (CHI) configuration. The proposed MSHE-PWM method optimizes both the dc-voltage levels and the switching angles, enabling more harmonics to be eliminated without affecting the structure of the inverter circuit. The method provides constant switching angles and linear pattern of dc-voltage levels over the modulation index range. This in turns eliminates the tedious steps required for manipulating the offline calculated switching angles and therefore, easing the implementation of the MSHE-PWM for dynamic systems. Although the method relies on the availability of the variable dc-voltage levels which can be obtained by various topologies, however, the rapid growth and development in the field of power semiconductor devices led to produce high-efficiency dc-dc converters with a relatively high-voltage capacity and for simplicity, a buck dc-dc converter is considered in this paper. Current and voltage closed loop controllers are implemented for both the STATCOM and the buck converter to meet the reactive power demand at different loading conditions. The technique is further compared with an equivalent conventional carrier-based pulse-width modulation to illustrate its enhanced characteristics. The effectiveness and the theoretical analysis of the proposed approach are verified through both simulation and experimental studies. [ABSTRACT FROM AUTHOR]

This paper presents a fast and generalized space vector pulse width modulation (SVPWM) scheme for any multilevel inverter. The SVPWM scheme generates all the available switching states and switching sequences based on two simple and general mappings, and calculates the duty cycles simply as if for a two-level SVPWM, thus independent of the level number of the inverter. Because the switching states, duty cycles, and switching sequences are all obtained by simple calculation in the proposed SVPWM scheme, no lookup table is needed and the scheme is computationally fast. The generalized method of generating the switching states (first mapping), calculating the duty cycles, and determining the switching sequence (second mapping) is described in this paper. The scheme is suitable for any reference vector with any modulation index, and can be conveniently extended to meet specific requirements, such as symmetric switching sequences. Compared with prior methods, the SVPWM scheme proposed in this paper provides two more degrees of freedom, i.e., the adjustable switching sequences and duty cycles, thus offering significant flexibility for optimizing the performance of multilevel inverters. The influence of redundant switching sequences in the output phase voltage of inverters is demonstrated for a nine-level inverter. This paper also thoroughly compares the proposed SVPWM scheme with prior methods. Both simulation and experimental results are given. [ABSTRACT FROM AUTHOR]

Insertion of dead time, transfer links between micro control unit (MCU) and voltage source inverter (VSI), VSI's nonideal characteristics all lead to deviation that cannot be ignored between the actual output voltage and the command voltage, which seriously affects the performance of the ac induction motor (ACIM) control system. Among many dead-time effect compensation methods, VSI usually operates under an open-loop condition, thus making complete compensation hard to achieve. This paper studies methods to obtain the two key elements of compensation voltage amplitude and current polarity and a novel phase voltage compensation method is proposed. In this method, a simple hardware circuit is applied to obtain the actual output of the VSI as feedback with which precise compensation amplitude can be calculated. And judgment of current polarity is accurately realized by reconstructing phase current from filtered current components under M-T coordinate with a Kalman filter. The compensation in a zero-crossing region is also closely discussed in this paper. To verify the validity of the method, simulations and experiments are carried out. The experiments emphasize on the efficacy of feedback, steady-state, and transient performance of current reconstruction; and the performance of a conventional method to that of the proposed method are also compared. Results show that the proposed method proves to be effective. [ABSTRACT FROM AUTHOR]

Switch fault diagnosis is an important design aspect for pulse width modulation (PWM) dc-dc power converters. It can prevent power converters from further damage, and also make preparations for remedial actions. In this paper, a fast switch fault diagnostic method is proposed for PWM dc-dc converters operating in continuous conduction mode. The proposed method utilizes the magnetic component (inductor or transformer) voltage for fault diagnosis. Based on the real-time voltage measurement and switch gate-driver signals, characteristics of switch open-circuit faults and short-circuit faults are rapidly extracted, and thus, switch faults can be quickly detected. The magnetic component voltage can be measured by an auxiliary winding in the magnetic core, and gate-driver signals can be easily got from the control circuit. Moreover, the fault detection can be implemented by a low-cost logical hardware circuit, and this circuit can be integrated into the control circuit. The fault diagnosis principle, design considerations, and implementation are discussed in this paper. Experiments are conducted to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

The flying-capacitor modular multilevel converter (FC-MMC) overcomes the low/zero-speed operation issues of conventional MMC-based drive. The FC-MMC injects no common-mode voltage (CMV) to the drive system. However, the pulse width modulator (PWM) introduces switching ripples, which appear as CMV on motor stator windings. To completely get rid of the CMV, an elimination method based on a new modulation scheme is proposed in this paper. The modulation algorithm places the switching pulses end to end for upper and lower arms, respectively. The consistent switching positions between upper and lower arms lead to the complete CMV elimination for FC-MMC-based drive system in entire speed range. Although the proposed method slightly increases the switching frequency as compared to conventional phase-shifted PWM, it is still acceptable in medium-voltage applications. The validation of the proposal is proved by simulations and experiments. [ABSTRACT FROM PUBLISHER]