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This paper proposes a novel polygonal voltage space vector structure (SVS) having 30 sides, for a star-connected induction motor drive. The SVS eliminates the presence of harmonics up to 25th order from motor phase voltage throughout the entire modulation range, providing a torque profile devoid of lower order pulsations. Linear modulation is extended till 99.63% of base speed without exceeding the motor phase voltage rating. Topology consists of a dc-link fed primary inverter and two equal low voltage modular capacitor fed secondary inverters. Here the harmonics generated by the primary inverter is canceled by the secondary inverter which acts as a switched capacitive filter. Detailed description of the SVS generation and timing calculations are provided in this paper. Effectiveness of the proposed scheme is validated using experimental results, inverter loss calculations, and harmonic analysis. [ABSTRACT FROM AUTHOR]

This paper proposes a fifth-order resonant immittance network based dual-active-bridge (DAB) converter and an optimal modulation method that will ensure high-efficiency operation of the converter under wide-range variations in voltage ratio and output power level. The proposed modulation method is based on the concept of total power loss minimization, where a loss model is developed and an optimization algorithm is formulated to compute the optimal set of internal and external phase shift parameters that will lead to the maximum efficiency for a given set of operating parameters including voltage ratio and output power level. It is found that to maintain high-efficiency operation under wide-range variations in voltage ratio and output power level, the DAB converter is required to switch between different operation modes and neither soft-switching operation nor unity-power-factor operation is able to achieve wide-range high efficiency performance when used alone. The importance of $reconfigurability$ of operation mode for achieving wide-range high efficiency performance is clearly illustrated in this paper. [ABSTRACT FROM AUTHOR]

This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

In low-power applications of photovoltaic (PV) systems, the transformerless grid-connected inverters have been preferred to increase the efficiency and reduce the cost, size, and power losses when they are compared to the ones with the transformer. A transformerless single-phase inverter topology with a single dc-link capacitor for the grid-connected PV systems is proposed in this paper. The proposed inverter has been simulated by using a cooperation process of the MATLAB and SPICE package programs and it has been implemented for experimental verification. The proposed inverter reduces the high-frequency common-mode leakage current caused by parasitic capacitances of PV panels, whereas it is controlled with the unipolar sinusoidal pulsewidth modulation. Also, the results show that the common-mode voltage remains constant. The efficiency of the proposed inverter has been compared to that of the most common topologies having the dc-link decoupling during the zero voltage states. This paper is accompanied by a video file demonstrating the power loss distribution in the inverter. [ABSTRACT FROM AUTHOR]

This paper describes a dc-link voltage control method of a single-phase back-to-back cascaded H-bridge inverter (SBCI) for a medium-voltage motor drive system. The main advantage of the SBCI topology over the conventional regenerative cascaded H-bridge topology with a three-phase active front-end (AFE) is a simple system structure, which is composed of an input transformer, a power cell, a current sensor, etc. However, the challenging points of the SBCI are larger voltage ripple in the dc-link capacitor and imbalance of dc-link voltages of each phase. The asymmetric dc-link voltage of each power cells could cause unstable operation such as over-modulation due to the lack of the dc-link voltage of a particular phase and result in over-voltage or under-voltage faults. In this paper, the control strategy of the dc-link voltage for the SBCI that uses the negative-sequence voltage of the converter is described. The proposed control method is verified with a computer simulation whose target is a 6.6-kV–1.25-MW medium-voltage drive system. Also, through the experimental setup with the prototype SBCI whose power rating is 16.2 kVA, the dc-link voltage of each AFE has been controlled within a 0.5% error of its reference value at the full load. [ABSTRACT FROM AUTHOR]

The photovoltaic (PV) output voltage varies over a wide range depending on operating conditions. Thus, the PV-connected converters should be capable of handling a wide input voltage range while maintaining high efficiencies. This paper proposes a new series resonant dc–dc converter for PV microinverter applications. Compared with the conventional series resonant converter, a dual-mode rectifier is configured on the secondary side, which enables a twofold voltage gain range for the proposed converter with a fixed-frequency phase-shift modulation scheme. The zero-voltage switching turn-on and zero-current switching turn-off can be achieved for active switches and diodes, thereby, minimizing the switching losses. Moreover, a variable dc-link voltage control scheme is introduced to the proposed converter, leading to a further efficiency improvement and input-voltage-range extension. The operation principle and essential characteristics (e.g., voltage gain, soft-switching, and root-mean-square current) of the proposed converter are detailed in this paper, and the power loss modeling and design optimization of components are also presented. A 1-MHz 250-W converter prototype with an input voltage range of 17–43 V is built and tested to verify the feasibility of the proposed converter. [ABSTRACT FROM AUTHOR]

This paper proposes a novel dc power electronic transformer (DCPET) topology for locomotive, ac/dc hybrid grid, dc distribution grid, and other isolated medium-voltage and high-power applications. Compared with conventional PET topology, the proposed DCPET has fewer power semiconductor devices and high-frequency isolation transformers, which can improve the power density and reliability. Fault handling or redundancy design can be achieved to further improve the reliability when some dc–dc modules break down. Also, input voltage sharing control can be omitted to simplify the control system and improve the stability. Meanwhile, soft switching is guaranteed for all the switches, which is beneficial to increase switching frequency and improve power density. In this paper, the principle, evolution, and control of the proposed DCPET are respectively presented and studied in detail. Finally, a prototype of the proposed DCPET is built and the experimental results verify the validity and superiority of the proposed topology. [ABSTRACT FROM AUTHOR]

This paper proposes a novel method for instantaneous balancing of neutral-point (NP) voltages with stacked multilevel inverters (MLIs) for variable-speed drives. The stacked MLI uses series-connected dc sources and NPs (connecting points of dc sources) to obtain the desired levels. The balancing of NP voltages are obtained by using a low-voltage-capacitor-fed cascaded H-bridge (CHB) per phase of a symmetrical six-phase induction machine (IM), which ensures zero current drawn from NPs (at any given instant). Since no current is drawn from NPs, the single dc-link operation with stacked capacitors is also possible. The scheme is suitable for applications, where low-voltage dc sources and batteries are stacked to form a dc link. A variable-speed operation is done using a seven-level inverter scheme for a symmetrical six-phase IM, which is formed by three dc-link stacked capacitors cascaded with two low-voltage-capacitor-fed CHBs per phase. Furthermore, the method is extended for an open-end IM to obtain a seven-level common-mode eliminated space vector structure using a single dc link. The generalization of this method for any stacked $n$ -level inverter without NP voltage deviation is also presented in this paper. The experimental results and analysis are included to validate the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents the digital implementation of a boundary controller with unipolar switching characteristic for single-phase voltage source full-bridge inverters. This paper expands the application of a second-order switching surface-based control method to unipolar switching of single-phase voltage source inverters (VSIs) using a finite-state machine. The finite-state machine has been formulated considering four different states of the inverter; positive,zero1, negative, andzero2. The second-order boundary control governs the current state of the system and provides proper switching action to keep the system within the desired reference. The control law is implemented digitally in F28m35x digital control card. A full-bridge inverter topology is used to achieve the three-level voltage switching. Various simulations and experiments were performed in a 550 VA, 120 V, 60 Hz VSI with a digitally implemented controller to verify the theoretical predictions. A high-quality voltage output was obtained for various loading conditions. The transient performance of the controller was investigated using a reference and load changes. A comparison of the implementation was made with the existing classical controllers to verify the fast-dynamic response of the system. [ABSTRACT FROM AUTHOR]

This paper presents a comprehensive optimization control scheme to improve efficiency and dynamic response of dual-active-bridge (DAB) dc–dc converters. Unified-phase-shift (UPS) control is widely used to increase the efficiency of DAB dc–dc converters by minimizing the peak current, but dynamic performance of the converters needs to be further enhanced. In this paper, to gain superior dynamic performance of DAB dc–dc converters, an equivalent power-balancing (PB) model is employed, which is capable of predicting dynamic behavior of converter output voltages due to input voltage fluctuation and load disturbance. And then, combining the UPS control and the PB control, a comprehensive UPS and PB (UPS-PB) scheme is proposed to improve the efficiency and dynamic performance simultaneously. This work also includes the detailed inductance parameter sensitivity of the proposed UPS-PB scheme and a zonal voltage control strategy to further improve dynamic responses of the output voltage under the start-up process or a large step change of the output voltage reference. Moreover, the variant of UPS-PB scheme for constant power load is analyzed in the experimental part. Finally, experimental results have verified the excellent performance of the proposed UPS-PB scheme and correctness of theoretical analysis in this work. [ABSTRACT FROM AUTHOR]

In dc distribution networks, the parallel H-bridge dc/dc converters (HBDCs) are widely adopted to convert voltage levels with the higher power rating and reliability, in which the parallel HBDCs are naturally connected in input-parallel output-parallel (IPOP) form. However among IPOP HBDCs, there are complicated circulating currents that will influence the safe and steady operation of dc distribution networks. This paper focuses on the suppression of these circulating currents. First, the detailed mathematic models of circulating currents among IPOP HBDCs are derived. Through the model, it is found that various types of circulating currents exist in the system, including the circulating currents within the single HBDC and the circulating currents among the multiple HBDCs. Hence, the suppression of circulating currents among IPOP HBDCs is a multiobjective control problem. In this paper, it is proven that the conventional one degree of freedom control based on the bipolar modulation cannot eliminate all the circulating currents. Second, a novel two degrees of freedom control method is proposed to suppress all kinds of circulating currents based on the improved modulation way of HBDCs, which consists of two parts. The droop based control is used to suppress the circulating currents among the multiple HBDCs, whereas the common mode control is used to control the circulating currents within the single HBDC. All the theoretical analyses are verified by the real-time hardware-in-loop tests. [ABSTRACT FROM AUTHOR]

The modular smart transformer (ST) is composed by several basic converters rated for lower voltage and power. In this paper, the quadruple active bridge (QAB) is used as the basic block for the modular ST. In this application, the efficiency and cost are the most important design parameters. Therefore, the paper focus on the design of the converter, with the aim to optimize its efficiency, taking the cost into consideration. To do so, the losses of all components are carefully modeled and a computer-aided design is used, where an algorithm to calculate the losses and cost is developed, allowing to perform multiobjective optimization. Additionally, silicon IGBTs and silicon carbide mosfets are considered for the design and the performance of the converter using both semiconductors technology is compared. Experimental results obtained for the optimized 20 kW QAB converter has shown an efficiency of 97.5%. [ABSTRACT FROM AUTHOR]

Dual active bridge (DAB) based converters offer the benefit of smaller volume due to high-frequency isolation and controllability of active power flow, making them attractive for various applications, such as renewable energy generation, plug-in hybrid vehicles, and distribution systems. This paper presents a novel converter topology along with a modulation strategy for a DAB-based three-phase ac to dc converter. The major benefits are single-stage conversion, no unreliable intermediate dc-link capacitor, reduced number of switches, i.e., only two active switches on the ac side, simple control scheme, open-loop unity power factor operation, bidirectional power flow, and partial soft-switching. This paper presents the analysis of all the operating modes of the converter, resulting in the analytical estimation of power transfer and rms winding current and investigation of soft-switching conditions for the power devices. Simulation and experimental results have been presented to demonstrate the advantages of the proposed technique and accuracy of the analysis.1 [ABSTRACT FROM AUTHOR]

The asymmetrical half-bridge (AHB) converter has been deeply analyzed as second stage in ac–dc light emitting diode (LED) drivers. Galvanic isolation, high reliability and high efficiency are their main advantages while a limited duty cycle range (i.e., 0–0.5) and a poor dynamic behavior are their main disadvantages. As second stage of an LED driver, the most demanding requirement for its control loop is cancelling the low-frequency ripple introduced by the first stage. According to its limited maximum attainable bandwidth, this is normally achieved by implementing a feedforward loop. Nonetheless, the static gain of the standard AHB converter presents a nonlinear relation between the output voltage and the duty cycle. As a consequence, the effectiveness of this feedforward loop is limited. In this paper, the use of the zeta AHB converter as second stage of an LED driver is analyzed and an optimized design is proposed. Regarding its advantages, it presents an extended duty cycle range (theoretically, 0–1.0). Besides, it presents a linear relation between the output voltage and the duty cycle. Therefore, although its dynamic behavior is still limited, it can perfectly cancel the low-frequency ripple introduced by the first stage of the LED driver by means of a straightforward feedforward loop. The optimized design proposed in this paper is focused on minimizing the losses in the magnetic components (transformer and inductor) by wisely choosing the value of the two turns ratios of the transformer. [ABSTRACT FROM AUTHOR]

This paper proposes a new bidirectional resonant dc–dc converter suitable for wide voltage gain range applications (e.g., energy storage systems). The proposed converter overcomes the narrow voltage gain range of conventional resonant dc–dc converters, and meanwhile achieves high efficiency throughout the wide range of operation voltage. It is achieved by configuring a full-bridge mode and a half-bridge mode operation during each switching cycle. A fixed-frequency phase-shift control scheme is proposed and the normalized voltage gain can be always from 0.5 to 1, regardless of the load. The transformer root-mean-square (rms) currents in both the forward and reverse power flow directions have a small variation with respect to the voltage gain, which is beneficial to the conduction losses reduction throughout a wide voltage range. Moreover, the power devices are soft-switched for minimum switching losses. The operation principles and characteristics of the proposed converter are firstly analyzed in this paper. Then the analytical solutions for the voltage gain, soft-switching, and rms currents are derived, which facilitates the parameters design and optimization. Finally, the proposed topology and analysis are verified with experimental results obtained from a 1-kW converter prototype. [ABSTRACT FROM PUBLISHER]

An extended-duty-ratio (EDR) boost converter is studied extensively in this paper for high voltage gain applications with a wide input (and/or output) voltage range. The EDR is a unique combination of an interleaved, multiphase boost converter and switched capacitor configuration that achieves high voltage gain with significantly lower switch voltage stress and switching losses compared to conventional high-gain solutions. Most of the switches in the multiphase EDR experience only a fixed fraction of the output voltage ($1/M, 2/M$ , etc., where $M$ is the number of phases). Through extensive analysis over a wide operating range, it is shown here that the EDR boost converter has inherent current sharing among the phases only in a limited range of duty ratio— $(M-1)/M \leq D \leq 1$. As the duty ratio reduces beyond this range as required in wide input voltage applications, inherent current sharing property is lost. In this paper, techniques to ensure current sharing under all operating zones without requiring current sensors are presented. Instead of having equal duty ratio for each phase, it is adjusted for each phase according to the operating region of the converter. Extensive analysis is presented to derive the required duty ratio changes for the different phases. The proposed concept is validated with experimental results from a 250 W, 3-phase EDR boost, and GaN-based hardware prototype. [ABSTRACT FROM AUTHOR]

DC/DC converters connected in series or parallel allow low power devices to be used in high power conversions. The input series output series (ISOS) connection is suitable for situations where both the input and output sides are high voltage fields. To ensure that each module shares voltage with the other, this paper proposes an active output voltage sharing (AOVS) control scheme. The scheme introduces sharing control in the output side so that the isolation is not needed between the input and output sides in the control loop. The AOVS control scheme, consisting of a common output voltage loop and individual output voltage sharing loop, has a master–slave structure. To improve the reliability and realize a hot-plug, this paper also provides an automatic master–slave form of the AVOS control scheme. A simulation of the frequency and time domains is used to verify the accuracy of the small signal model, and an ISOS-connected prototype consisting of three forward converters is made to test the steady and dynamic characteristics of the proposed scheme. [ABSTRACT FROM AUTHOR]

This paper presents a fault diagnosis technique for high-resistance connection (HRC) in a nine-phase flux-switching permanent-magnet (FSPM) machine based on zero-sequence voltage components (ZSVC), where the neutral-point connection mode is considered. A nine-phase FSPM machine topology is first introduced and no-load back electromotive force waveforms are analyzed. Moreover, the topologies of the nine-phase FSPM drive with different neutral-point connection modes are studied. Then, the mathematical model of a nine-phase FSPM machine with HRC is established with the consideration of the neutral-point connection mode and then the influence of the HRC on the ZSVC is analyzed based on the established model. It is shown that the HRC may be diagnosed by monitoring the change of the spectral contents of the ZSVC. Furthermore, this paper focuses on the situation of the nine-phase FSPM machine with one neutral point. In this case, to remove the influence of the FSPM machine operating point, an effective fault indicator is defined and used for HRC fault detection. Finally, the simulation and the experiment are carried out to validate the proposed method. Both the results show that the proposed method can be applied for the HRC fault diagnosis in a nine-phase FSPM machine. [ABSTRACT FROM AUTHOR]

A new static synchronous compensator (STATCOM) based on the diode-clamped modular multilevel converter (DCM2 C) is proposed in this paper. In this converter topology, the capacitor voltage is clamped by using a low power rating diode in each submodule. The quantity of voltage sensors is significantly reduced and is free from the number of voltage levels. Furthermore, the voltage balancing control method becomes very simple and the capacitor voltage balance speed is fast. Based on the structure of modular multilevel converter, the DCM2C-STATCOM has the capability of Var compensation and negative-sequence current compensation. The topology characteristics and compensation control method of DCM2C-STATCOM are investigated in this paper. Experimental results obtained from a laboratory prototype validate that the capacitor voltage of the proposed DCM2C-STATCOM can be well balanced and the Var and negative-sequence current compensations are effective. [ABSTRACT FROM AUTHOR]

The three-phase buck rectifier (3ph-BR) is suitable for applications where a voltage step-down function is required. In this paper, an improved 3ph-BR topology is proposed to reduce the voltage stress on the transistors. The freewheeling diode in the conventional topology is split into two diodes in series and the input neutral point is connected to the common point of the two diodes. With the proposed topology and the corresponding modified modulation scheme, the transistors only need to withstand the input phase voltage instead of the line-to-line voltage, bringing about the significant reduction of voltage stress. The proposed topology enables a more cost-efficient and flexible selection of the transistors. Experimental results have verified the validity of the modified topology and associated modulation scheme. [ABSTRACT FROM AUTHOR]

Multilevel converters are widely applied in medium voltage (MV) drive systems due to the attractive features, such as the ability to use devices with lower voltage ratings, high equivalent switching frequency, etc. Recently, a multilevel topology, named seven-level hybrid clamped (7L-HC), is proposed for MV drives. It has a competitive number of devices, showing the potential to build low-cost 7L converters. However, to ensure the wide frequency range operation and power quality of MV drives, its dc-link capacitors and floating capacitors must be controlled properly with balanced voltages. In this paper, an active voltage balancing method is proposed for the 7L-HC converter. This method can effectively balance all the capacitor voltages under a wide frequency range. The method is embedded in the PWM procedure without modifying the control strategies. Simulation and experimental results are provided to validate the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents a voltage multiplier topology that is a hybrid between a Cockcroft–Walton multiplier and a Dickson charge pump. The Cockcroft–Walton structure exhibits significant output voltage drop under load as the number of multiplier stage increases. This is because all coupling capacitors are connected in series. Dickson charge pump mitigates this issue by connecting all capacitors in parallel. But this solution comes at the expense of large capacitor voltage stress at the last multiplier stage. The proposed hybrid structure arranges some capacitors in parallel and others in series, thereby achieving low output voltage drop and low capacitor voltage stress at the same time. We develop a model that predicts hybrid multiplier's performance and validates it experimentally. We also demonstrate a 60–2.25 kV dc–dc converter based on a 16-stage hybrid voltage multiplier which achieves a voltage gain of 12.8 while keeping the highest capacitor voltage stress to 660 V. [ABSTRACT FROM AUTHOR]

In this paper, a dual half-bridge LLC resonant converter with magnetic control is proposed for the battery charger application. The primary switches are shared by two LLC resonant networks, and their outputs are connected in series. One of the LLC resonant converters is designed to operate at the series resonant frequency, which is also the highest efficiency operating point, and the constant output voltage characteristic is achieved at this operating point. The second LLC resonant converter adopts magnetic control to regulate the total output current and voltage during both constant current charge mode and constant voltage charge mode. Meanwhile, the function decoupling idea is adopted to further improve the system efficiency. The significant amount of the power is handled by the LLC resonant converter operating at the series resonant frequency, whereas the second LLC resonant converter fulfills the responsibility to achieve closed-loop control. By carefully designing the resonant networks, the zero-voltage switching for primary switches and zero-current switching for secondary diodes can be achieved for whole operation range. A 320-W experimental prototype is built to verify the theoretical analysis, and the maximum efficiency is measured about 95.5%. [ABSTRACT FROM AUTHOR]

Load-independent output characteristics of inductive power transfer (IPT) systems are increasingly popular in battery charging. This paper proposes a novel variable-parameter T-circuit (VT) for an IPT system charging a battery with constant current (CC) or constant voltage (CV) output. The VT can transfer a CC/CV input to a CC or CV output by using an ac switch and a passive component (inductor or capacitor). An IPT system with a VT for CC–CV charging can reduce the number of passive components and ac switches. Besides, the proposed VT merits more design freedom of charge current/voltage with the constraints imposed by the loosely coupled transformer parameters compared to that of the traditional one. In addition, there are three kinds of VTs for various IPT charging systems with different requirements. A 400 W laboratory-scale prototype with a 150 mm air gap was built to verify the theoretical analyses. Both electronic load and lead-acid battery are utilized to verify the charging profile of the proposed method. The experimental results of the IPT system indicate that the fluctuation of the charging current in CC mode is less than 2%, and the change rate of charging voltage in CV mode is within 2.9%. The maximum overall efficiency 93.93% of the charging system is achieved from a dc 110 V input to a dc 100 V output. [ABSTRACT FROM AUTHOR]

A fast output voltage equalization control strategy applied to 10-kV/100-kW high power density photovoltaic dc–dc converter system is proposed in this paper. The converter modules in the system have two dynamic priority factor loops for fast response with an inconsistent voltage between modules and a soft start-up circuit to precharge output capacitance for solving inrush current problem in boost circuit. The proposed strategy can realize fast voltage equalization control under inconsistent leakage inductance and parasitic resistance parameters condition between modules compared to the traditional unified duty cycle control strategy. The fast equalization performance is verified by 10-kV/100-kW photovoltaic dc–dc converter system. The converter system adopts an isolated boost full-bridge topology and input parallel output series structure, which meets high conversion ratio and high-power density requirements. [ABSTRACT FROM AUTHOR]

A systematic method for developing ultra-wide output voltage range power supply based on modular switched-converter principle is proposed in this paper. The basic symmetric switched-converter (SSC) module is composed of two dc–dc modules, two diodes, and one active switch. Multi-stage SSC modules are generated by symmetric cascaded connection method. By controlling the active switches in multi-stage SSC modules, the connections of all the dc–dc modules’ output ports can be changed flexibly among series, parallel, and partial–parallel–partial-series connections. Then segmented regulation can be realized and system output voltage range can be widely extended. Meanwhile, the voltage range of each dc–dc module can be narrowed and the voltage/current stress can be reduced to simplify the design, increase device utilization ratio, and improve overall efficiency. A full-bridge isolated buck–boost converter with a semiactive rectifier, which features soft-switching and wide voltage adjustment range, is adopted as the dc–dc module to realize the proposed system. Input current sharing control strategy is adopted to ensure proper power balancing in all possible operating modes. The stability of the proposed system is also explored. Simulation and experimental results are provided to verify the effectiveness and advantages of the proposed system configuration, the switched-converter principle, and the control strategies. [ABSTRACT FROM AUTHOR]

The three-level full-bridge (TLFB) dc−dc converter has been widely used in high-voltage, high-power applications. In the experimental test, the neutral-point voltage deviation appears; moreover, it has also been found out that if the flying capacitors are introduced, the input capacitor voltages could realize self-balance even if no active balancing solutions are adopted. In the previous publications, the role of flying capacitors is generally considered to extend the range of soft switching; however, the self-balance ability has not been mentioned or investigated in any publications thus far. In order to fill this gap, this paper provides the detailed mode operation analysis of the TLFB converter and reveals the cause of the imbalance. In addition, the mechanism of the self-balance ability provided by the flying capacitors is explained in detail, which gives a deep insight into the converter. At last, the influence factor of the voltage error in steady state has been analyzed, and the specific expression of the voltage error is also derived. The feasibility of the theoretical analysis is verified by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a three-phase, five-level, non-regenerative pulsewidth modulated rectifier using only two active switches (minimum required) per phase, which drastically reduces gate driver requirement and hardware complexity. It draws sinusoidal input current at close to unity power factor. All the semiconductor devices are rated at only one fourth of the dc-link voltage, and none of them requires any transient voltage balancing snubber. A total of 8 out of the 14 diodes per phase undergo soft switching transition under all operating conditions, which increases its efficiency. No extra hardware circuitry for balancing the flying capacitors (FCs) or the dc-link mid-point voltage are required, which further reduces hardware complexity and increases the conversion efficiency. The proposed topology does not need any sophisticated startup procedure for charging the FCs either, which solves the problem of semiconductor overvoltage during starting. A 3-kW laboratory prototype is built to experimentally verify the proposed topology. The maximum efficiency obtained from the prototype is 98.7%, and it is always more than 96% for the load range from 15% to its rated. [ABSTRACT FROM AUTHOR]

This paper proposes a carrier-based fault-tolerant control strategy for T-type three-level rectifier with neutral-point (NP) voltage oscillations suppression when an open-circuit fault occurs. The proposed fault-tolerant control is demonstrated by dividing fault into two conditions: the faulty condition of outer switches and inner switches. In the case of outer switches open-circuit fault, the requirement to maintain the normal operation with sinusoidal currents is demonstrated. Meanwhile, in order to suppress the NP voltage oscillations, a hybrid NP voltage control strategy, which is implemented by adding a compensation value to the reference voltage, and a dc bias are used. In the case of inner switches open-circuit fault, the fundamental period of the input current is divided into two areas: normal half-cycle and abnormal half-cycle. In the abnormal half-cycle, the reference voltage of the faulty leg is compared with a single carrier. In addition, a compensation value is added to the reference voltage to suppress the NP voltage oscillations. While in the normal half-cycle, the hybrid NP voltage control strategy and the dc bias are applied. The feasibility and performance of the proposed tolerant control are illustrated and verified through the simulation and experimental results. [ABSTRACT FROM AUTHOR]

A hybrid modular multilevel converter (MMC) consists of both half-bridge submodule (HBSM) and full-bridge submodule (FBSM) in each arm. It has several advantages over other MMC topologies, such as low system loss, reduced cost of the system, but still maintains fault ride-through capability against a solid dc-side fault. However, the hybrid MMC may have a difficulty of submodule (SM) voltage balancing under variation of its dc-bus voltage. Since the voltage unbalance of SMs results in SM capacitor overvoltage and low reliability of the system, the voltage of SMs, which can be also represented as energy of SMs, should be balanced at all time. In this paper, to extend the narrow adjustable range of dc-bus voltage due to the voltage/energy unbalance, new feedback and feedforward energy balancing controllers with revised sorting algorithm are proposed. The feedback control ensures the zero steady-state error, while the feedforward control provides fast dynamic response in the energy balancing control. By applying the proposed control scheme, the hybrid MMC can keep the voltage balance between HBSMs and FBSMs in wider range of dc-bus voltage. The full-scale computer simulation results and down-scale experimental results demonstrate the validity of the proposed control scheme. [ABSTRACT FROM AUTHOR]

Generating dense multilevel voltage space structure using polygons of higher sides is one of the novel and elegant method to suppress low-order harmonics and to obtain refined sinusoidal voltages using voltage source inverters for variable frequency drive application without passive filters. Apart from the advantages of conventional multilevel inverter topologies, schemes generating polygonal voltage space vector structure can equip full dc-bus utilization, low switching frequency strategies to eliminate low-order harmonics, and increased linear modulation range. In this paper, an induction motor drive scheme generating a highly dense multilevel 24-sided polygonal voltage space vector structure using a single dc source, which can eliminate harmonics till 23rd order from phase voltages, is presented. Cascaded power circuit topology with a flying capacitor inverter fed with a dc source and two low voltage floating capacitor fed H-bridge inverters is used. Detailed experimentally validated results, under scalar as well as indirect rotor field oriented control of induction motor are provided. Studies on voltage ripple and reactive energy in various floating capacitors, harmonic performance of output voltage for wide range of speed operation, are also included. [ABSTRACT FROM AUTHOR]

In order to provide high and extendable power levels for inductive power transfer (IPT) system, a parallel multi-inverter system based on modular inverter is presented. Various power requirements can be implemented by an adjustment of the number of paralleled inverters, which provides a high modularity. A master−slave scheme is employed for the switching-driver signals of parallel inverters, where one acts as a leader while others act as followers. Despite the master−slave scheme, the proposed circuit topology has natural robustness because of the equality in terms of the hardware configuration of each modular inverter. For proper parameters, the output phase (current lagging corresponding voltage) of an inverter is lower than the average of output phase of all inverters, when its output voltage lags behind others, and vice versa. Based on this approach, PI controllers are designed to implement phase synchronization for output voltages of all inverters. An IPT prototype supplied by the proposed parallel multi-inverter with three inverters was designed, built, and tested. Experiments show that the proposed parallel multi-inverter system has not only good circulating current suppression capacity but also excellent performance of phase synchronization. The maximum dc−dc efficiency was 94% at a 35.1 kW receiving power. This paper is accompanied by a Matlab/Simulink file demonstrating phase synchronization control. [ABSTRACT FROM AUTHOR]

This paper contains a comparison between three topologies of a three-phase two-level inverter: A quasi-Z-source inverter (qZSI), a voltage-source inverter with a boost converter and a voltage-source inverter with an interleaved boost converter. experimental results obtained from laboratory tests of equivalent 6-kW 100-kHz inverters based on SiC mosfets and Schottky diodes are provided. The following parameters are compared: Quality of input inductor current and output phase voltage as well as total power losses in the inverters. The results for these parameters are obtained for input voltage ranging from 325 V to almost 600 V (where feasible), for two sets of equivalent modulation methods (two regular methods and two reduced-loss methods), for a couple of characteristic values of deadtime and for the operation both at the maximum value of modulation index and at equal values of voltage across the inverter bridge. Results of the experiments show that the qZSI topology may, at certain conditions, surpass the traditional two-stage inverter topologies in the areas of input inductor current quality, output voltage quality and also power losses (at high values of input voltage). What is needed to obtain that is a careful examination of operating conditions, applied modulation method and deadtime value. [ABSTRACT FROM AUTHOR]

This paper presents a modified negator-based switched-capacitor (NSC) dc–dc converter to achieve fine-grained voltage conversion ratios. Based on a concept of reconfiguring several 2:1 switched-capacitor (SC) converters in series and parallel at the last stage, the proposed asymmetrical shunt SC (ASSC) converter provides more controllable variables of forward gain and feedback gain to decide different power path interconnections and increase the available conversion ratios, with a little sacrifice of its slow switching limit output impedance. The switching loss of the bottom-plate parasitic capacitance in the ASSC converter is less than the switching loss of the NSC topology because the two moderate voltages instead of the power rail are fed to the last stage 2:1 SC unit and reduce the voltage swing. The bottom-plate swapping prototype further reduces the parasitic loss at high conversion ratios. To handle a large number of conversion ratios in closed-loop regulation, the ASSC converter uses the fast optimum ratio searching (FORS) technique, which evaluates the transient voltage drop to quickly search for target ratios and reduce the transient recovery time. A three-stage ASSC converter achieving 187 conversion ratios is fully integrated in the test chip, which is fabricated in 0.25-μm CMOS process with an active area of 7.14 mm2. Furthermore, 2389 conversion ratios can be derived in theory for a four-stage ASSC converter. The proposed reconfigurable SC converter provides an output voltage range of 0.4 to 2.8 V under no load conditions, and greater than 80% power efficiency at an output voltage level of 0.9 to 1.5 V over a load range of 3 to 9.5 mA. Due to the FORS technique, the measured transient recovery time is reduced from 7 to 1.5 μs in case of load current step of 7 mA. [ABSTRACT FROM AUTHOR]

In this paper, a systematic and analytical study of non-isolated topologies belonging to the family of reduced redundant power processing (R2P2) converters is presented. Based on this study, all the non-isolated R2P2 topologies that can be implemented in reality are derived. Detailed examples clarify all possible cases of this analysis. In addition to this, the voltage ratio and the efficiency for each one of the R2P2 configurations are calculated, being further illustrated with examples. A comparison among configurations is also discussed with criteria the high step-up voltage gain and efficiency, aiming for high-power applications. One of these R2P2 converters is selected for further examination, as the most suitable for such applications. The theoretical analysis, as well as the calculations of the step-up voltage ratio and efficiency of the selected converter, is compared to experimental results conducted on a 2-kW laboratory prototype designed to operate in various step-up voltage ratios and in a high-power range, proving the effectiveness of the proposed investigation. [ABSTRACT FROM AUTHOR]

In the context of reducing total CO $_2$ emissions as well as reducing the total copper cable length and weight on cars, automotive manufacturers propose to derive all the supply voltages from a single $\text{48 V}$ bus through high step-down ratio dc–dc converters. The series capacitor tapped inductor (SCTI) converter is a promising topology for efficient single-stage step-down conversion from the $\text{48 V}$ bus. In the synchronous version of the SCTI, however, turn-off of the synchronous rectifier at positive drain-to-source current leads to a voltage spike and to a potential catastrophic failure of the converter. In this paper, a simple control technique is proposed, which prevents the foregoing condition to occur. The approach enables a reliable operation of the synchronous SCTI topology without disrupting its main features and advantages, and eliminating the need for additional snubbers, voltage clamps or auxiliary windings. The approach is validated via computer simulations and experimental tests on a $\text{48}$ -to- $\text{1.5}\;\text{V}$ , $\text{4 A}$ SCTI converter prototype. [ABSTRACT FROM AUTHOR]

Photovoltaic (PV) inverters form the backbone of PV generation. This paper proposes an all-film-capacitor, transformerless single-phase inverter for PV application. The topology is a combination of a front-end boost stage, a half-bridge (HB) inverter stage, and a buck–boost power decoupling stage. The grid ripple power is decoupled by a large swing of the HB capacitors along with a limited ripple on the dc link, thus reducing the capacitance requirement and converter volume. Being an HB-derived inverter, the high-frequency common mode leakage current through the PV parasitic capacitance is mitigated. Furthermore, the dc-link average is optimally controlled to ensure a higher efficiency over wide operating load and power factor range. To validate its operation, a Silicon Carbide based 1-kVA laboratory prototype is built and closed-loop experimental results are provided at 100/75 kHz switching frequency over wide operating conditions. [ABSTRACT FROM AUTHOR]

A three-phase three-level (TPTL) converter is an optimal alternative for high-input and high-power dc/dc conversion system. The voltage stress on the primary switch is only half of the input voltage due to its three-level (TL) structure, and the current rating of power devices can be reduced by the three-phase configuration. To achieve soft switching and improve efficiency, the resonant tank can be introduced to optimize the performance of the converter. In this paper, a novel TPTL LC-type series resonant converter with few switches and simple configuration is proposed. The voltage stress on all switches can be reduced to the half of the input voltage, and the voltage across output rectifiers is clamped to the output voltage; as a result, the proposed converter is suitable for high-input/output applications. Meanwhile, the ripple frequency of the output current can be increased significantly, resulting in a reduced filter requirement. Variable frequency control strategy is adopted in order to obtain zero-voltage switching for all switches and zero-current switching for all rectifier diodes in wide input voltage and load range. In this paper, the comprehensive analysis on the proposed converter is carried out, including the operation mode classification, the operating mechanism under different operation mode, along with the circuit model, and gain characteristics of the converter by the fundamental harmonic analysis. Experimental results from a 440–590 V input and 400 V/5 A output are presented to verify the theoretical analysis and the performance of the converter. [ABSTRACT FROM AUTHOR]

This paper extends the voltage-doubler concept to the single-phase SEPIC rectifier in discontinuous conduction mode and, as a consequence, novel rectifiers are proposed. A comparison with the classic SEPIC rectifier shows that the proposed converters can either provide reduced voltage stress on the semiconductors for the same output voltage level or supply double the gain of the output voltage with the same voltage stress. The proposed voltage-doubler SEPIC rectifiers provide a high power factor with no current control and they can be applied in order to improve the static gain of the structure, which can make the SEPIC rectifier suitable for applications that require a high voltage level. In this paper, the generic structure based on a three-state switch, four different implementations of the proposed concept (including bridgeless structures), steady-state analysis, a dynamic model, system control, and experimental results are presented. The proposed rectifiers were verified by experimental results obtained with a prototype built with the following specifications: 1000 W output power, 220 V input voltage, 400 V output voltage, and 50 kHz switching frequency. Peak efficiency of 95.84%, THD of 2%, and power factor of 0.9997 were obtained and, most importantly, double the gain of the output voltage was verified. [ABSTRACT FROM AUTHOR]

For the conventional PFC rectifiers, the high efficiency cannot be achieved over a wide input range, and the efficiency will be greatly decreased at low-input voltages. In order to overcome the efficiency bottleneck under low-line input, a flexible mode bridgeless boost power factor correction (PFC) rectifier is proposed in this paper. According to the input voltage, the proposed rectifier can be flexibly adapted to the suitable operating mode to obtain the maximum efficiency. Meanwhile, the circuit components can be reused by different operating modes, so the extra cost is low. In the proposed rectifier, a back-to-back bridgeless boost PFC topology is adopted at high-line conditions and a three-level bridgeless boost PFC topology is rebuilt to reduce the switching losses at low-line conditions. Compared with the traditional bridgeless boost PFC rectifier, an extra low-voltage bidirectional switch (usually composed of two switches) is added, so the increased cost is low. In addition, the low common-mode noise can be achieved at both high- and low-line conditions due to the direct connection between the input mains and the output electrolytic capacitor. The detailed principle analysis about the proposed rectifier is presented in this paper. Finally, an experimental prototype is built to verify the feasibility and the effectiveness of the proposed topology. [ABSTRACT FROM AUTHOR]

This paper studies pulse width modulation (PWM) techniques suitable for a four-level five-phase open-end winding (OeW) drive. The drive comprises a five-phase induction machine, supplied using two two-level voltage source inverters with isolated and unequal dc-link voltages, in the ratio 2:1. A decoupled carrier-based (CB) PWM modulation strategy, based on unequal voltage reference sharing between the two converters, is introduced in this paper. The stability of dc-link voltages in OeW drives is investigated next, using a novel analysis technique. Several modulation methods are analyzed and the results show that application of the coupled PWM technique, with carriers having in-phase disposition, leads to overcharging of the capacitor in the dc-link of the inverter intended to operate with the lower dc-link voltage. On the other hand, the proposed decoupled CB PWM scheme naturally eliminates the dc-link capacitor overcharging problem. These findings are verified experimentally, using open-loop V/f control. Two different decoupled CB modulation methods are compared and the best performing modulation method is selected and incorporated further into an OeW drive with field-oriented control. The presented steady state and transient experimental results demonstrate that the decoupled CB PWM technique is suitable for high-performance variable speed drive applications. [ABSTRACT FROM AUTHOR]

This paper presents a novel family of single-switch resonant dc–dc converters with low switch voltage stress. The single-switch resonant converter which has a ground-referenced switch is advantageous for implementing the gate drive circuit and operating at several-MHz switching frequency. However, the conventional ones mostly have high voltage stress on the switch, roughly 4–5 times the input voltage. In this paper, we propose the single-switch converter topologies derived from the drain-source impedance networks consisting of two inductors and two capacitors. The switch voltage of the proposed converters is shaped into a near trapezoid by designing the resonant networks to have the desired drain-source impedance. Furthermore, a simple and specific design scheme is presented here so that the peak switch voltage is lowered to 2.2–2.5 times the input voltage while zero voltage switching is achieved. Experimental results from a 20-W GaN-based prototype operating at 10 MHz demonstrate the feasibility of the proposed converter topologies and the design method. [ABSTRACT FROM AUTHOR]

The growing installation of distributed generation (DG) units in low-voltage distribution systems has popularized the concept of nonlinear load harmonic current compensation using multifunctional DG interfacing converters. It is analyzed in this paper that the compensation of local load harmonic current using a single DG interfacing converter may cause the amplification of supply voltage harmonics to sensitive loads, particularly when the main grid voltage is highly distorted. To address this limitation, unlike the operation of conventional unified power quality conditioners with series converter, a new simultaneous supply voltage and grid current harmonic compensation strategy is proposed using coordinated control of two shunt interfacing converters. Specifically, the first converter is responsible for local load supply voltage harmonic suppression. The second converter is used to mitigate the harmonic current produced by the interaction between the first interfacing converter and the local nonlinear load. To realize a simple control of parallel converters, a modified hybrid voltage and current controller is also developed in the paper. By using this proposed controller, the grid voltage phase-locked loop and the detection of the load current and the supply voltage harmonics are unnecessary for both interfacing converters. Thus, the computational load of interfacing converters can be significantly reduced. Simulated and experimental results are captured to validate the performance of the proposed topology and the control strategy. [ABSTRACT FROM AUTHOR]

This paper proposes a dual-space vector control scheme for the open-end winding permanent magnet synchronous motor (OEW-PMSM) drive fed by the dual inverter with a single dc supply. Potential zero-sequence current in the open-end winding drive system has to be considered since it causes circulating current in the winding and leads to high current stress of power semiconductor devices and high losses. Zero-sequence current in open-end winding ac motor drives is usually caused by the zero-sequence voltage, and therefore switching combinations which do not produce zero-sequence voltage are used to synthesize the reference voltage in existing methods. But even so, the zero-sequence voltage can also be produced by the dead time of the inverter. In order to suppress zero-sequence current in the OEW-PMSM drive, a dual-space vector control scheme is proposed and a novel dual-inverter space vector pulse width modulation (PWM) with the zero-sequence voltage reference is employed to regulate system zero-sequence voltage in this paper. Compared with existing dual inverter PWM strategies, the novel algorithm build a regulation mechanism for the zero-sequence voltage. The proposed method is compared with the conventional vector control by simulations and experiments, and the results shown that the proposed scheme can suppress zero-sequence current effectively. [ABSTRACT FROM AUTHOR]

In this paper, the Z-source converter is introduced to power factor correction (PFC) applications. The concept is demonstrated through a wireless power transfer (WPT) system for electric vehicle battery charging, namely Z-source resonant converter (ZSRC). Due to the Z-source network (ZSN), the ZSRC inherently performs PFC and regulate the system output voltage simultaneously, without adding extra semiconductor devices and control circuitry to the conventional WPT system such as conventional PFC converters do. In other words, the ZSN can be categorized as a family of the single-stage PFC converters. In addition, the ZSN is suitable for high-power applications since it is immune to shoot-through states, which increases reliability and adds a boost feature to the system. The ZSRC-based WPT system operating principle is described and analyzed in this paper. Simulations and experimental results based on a 1-kW prototype with 20-cm air gap between the system primary and secondary sides are presented to validate the analysis and demonstrate the effectiveness of the ZSN in the PFC of the WPT system. [ABSTRACT FROM PUBLISHER]

Various magnetically coupled impedance source (MCIS) networks have been proposed in the literature for increasing voltage gain and modulation index simultaneously while reducing the number of passive components used in the converter. However, applications of such networks have been limited by their discontinuous currents drawn from the sources and/or high stresses experienced by their components. This paper thus proposes three new MCIS networks named, respectively, as quasi-Y-source, quasi-Γ-Z-source, and quasi-T-source or quasi-trans-Z-source networks. These new networks inherit all advantages of the existing MCIS networks. In addition, they demonstrate advantages like continuous input currents, reduced source stresses, and lower component ratings that are not achievable by other existing networks. Further, dc-current-blocking capacitors used in the networks help to avoid saturation of magnetic core. Derivations of all two-winding MCIS networks, including existing and new networks, from the generalized three-winding MCIS networks are then systematically illustrated, before comparing them. Operational principles, mathematical derivations, simulation, and experimental results of all studied networks have been presented in the paper. [ABSTRACT FROM PUBLISHER]

Modular multilevel converters (MMCs) are being developed for the grid connection of offshore wind or tidal farms. In order to reduce the construction and maintenance costs, it is desirable to reduce the weight and volume of the system. In current MMC submodule designs, the reservoir capacitor usually accounts for over 50% of the total volume and 80% of weight. This paper presents a new design concept and control principle for a submodule using the stacked switched capacitor (SSC) architecture that can significantly reduce the capacitor size in an MMC. Practical considerations for a high-voltage high-power SSC-based MMC submodule are presented in this paper, through the design of a 21-level, 40-kV (pole-pole dc), 19.1-MW, grid-connected system, and the concept is demonstrated experimenttally on a scaled-down 400-V, 12.3-Apeak laboratory prototype submodule. It is shown that with the proposed SSC architecture, the total volume of capacitors in each submodule can be reduced by more than 40% without significantly increasing the power loss. [ABSTRACT FROM AUTHOR]

This paper proposes a new soft-stalling control strategy for grid-connected small wind turbines operating in the high and very high wind speed conditions. The proposed method is driven by the rated current/torque limits of the electrical machine and/or the power converter, instead of the rated power of the connected load, which is the limiting factor in other methods. The developed strategy additionally deals with the problem of system startup preventing the generator from accelerating to an uncontrollable operating point under a high wind speed situation. This is accomplished using only voltage and current sensors, not being required direct measurements of the wind speed nor the generator speed. The proposed method is applied to a small wind turbine system consisting of a permanent magnet synchronous generator (PMSG) and a simple power converter topology. Simulation and experimental results are included to demonstrate the performance of the proposed method. The paper also shows the limitations of using the stator back electromotive force to estimate the rotor speed in PMSG connected to a rectifier, due to significant $d$-axis current at high load. [ABSTRACT FROM AUTHOR]

The increasing interest in multiphase drive systems has led to the extension of inverter topologies and pulse width modulation (PWM) methods from three-phase to multiphase occasions. Carrier-based PWM (CPWM) dominates space vector PWM when the phase number increases, because of its simple computation and modular implementation. Although intensive work has been done on modifying PWM methods to reduce the common-mode voltage (CMV), not enough work has been done on CPWM methods with CMV reduction for multiphase drives. This paper extends the phase-shifted sinusoidal PWM (PS-SPWM) method for five-phase and six-phase two-level voltage-source inverters (VSI) and employs the intersection-plotting method and Fourier analysis to reveal the nature of the CMV. Both experiment and simulation results comply with theoretical analysis that compared with the conventional SPWM, the PS-SPWM can effectively reduce the CMV in peak-to-peak value and RMS value, though it leads to a higher phase current distortion. In addition, the hardware realization of PS-SPWM for multiphase inverters by a distributed control system is presented in this paper. [ABSTRACT FROM AUTHOR]

This paper proposes a novel modular equalization architecture for series-connected electric double-layer capacitor (EDLC) modules, each consisting of multiple cells connected in series. Cell voltages in a module are equalized by an inductive voltage divider (IVD)-voltage multiplier (VM)-based cell equalizer, while module voltages are unified by switched capacitor converters (SCCs). Square wave voltages generated at switching nodes of the IVD-VM-based cell equalizers are utilized to drive the SCC-based module equalizers, realizing the switchless topology of SCC-based module equalizers. The required switch count of the proposed system can be halved compared to conventional systems, allowing simplified circuit. An experimental equalization test for three EDLC modules, each consisting of six cells in series, was performed from an initially voltage-imbalanced condition. Module and cell voltages were equalized at different rates, and the equalization performance of the proposed modular equalization system was successfully demonstrated. [ABSTRACT FROM AUTHOR]