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The basic requirement of all the scalar modulation strategies employed for matrix converter, is to define the desired output voltages. The output phase voltages, if not optimized, results in underutilization of semiconductor device ratings. For better utilization, the output reference phase voltages are modified such that the sinusoidal nature of line voltages is not altered. Multiphase drives are in consideration and much work is being done and reported on multiphase matrix converter-based system. New modulation strategies for such systems are being formulated. Most of these new strategies are based on scalar approach; which in contrast to the space vector pulse width modulation, require addition of friendly harmonics in order to achieve optimized output reference phase voltages and maximum utilization of the matrix converter semiconductor switches. On the other hand, in space vector pulse width modulation, the maximum voltages are inherently achieved. This paper presents a generalized theory, explained in mathematical as well as graphical manner, defining the optimized output reference phase voltages for any number of input and output phases, whether odd or even, for m × n matrix converter. Further, this paper also explores the Venturini method for m × n case. It is found that the method is extendable to 3 × n matrix converters only. Finally, a simple and generalized algorithm, applicable to all m × n matrix converter configurations, is discussed. Results for 3 × 5 matrix converter are validated by simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper presents the analysis and design of an isolated high-voltage LLC resonant dc–dc full-bridge converter based on symmetrical quadrupler rectifier (SQR). Unlike conventional Cockcroft–Walton and full-bridge diode rectifiers, the SQR circuit provides significant improvement in power density by reducing the transformer turns-ratio without much increase in the output impedance. Moreover, the LLC converter can provide additional voltage boost, if operated, below the series resonant frequency of the LLC tank. The operating region of the converter is chosen in such a way that the converter always operates in ZVS for all line and load conditions with additional voltage boost. A new method based on basic differential equation is proposed for the accurate analysis and design of the converter and subsequently, the key results are compared with a first harmonic approximation based analysis method. A 120 V dc input, 2 kV output, 200 W laboratory prototype has been designed, built, and tested. Simulation and experimental results shown in this paper demonstrate the validity of the analysis and design of the presented converter. [ABSTRACT FROM AUTHOR]

For the conventional PFC rectifiers, the high efficiency cannot be achieved over a wide input range, and the efficiency will be greatly decreased at low-input voltages. In order to overcome the efficiency bottleneck under low-line input, a flexible mode bridgeless boost power factor correction (PFC) rectifier is proposed in this paper. According to the input voltage, the proposed rectifier can be flexibly adapted to the suitable operating mode to obtain the maximum efficiency. Meanwhile, the circuit components can be reused by different operating modes, so the extra cost is low. In the proposed rectifier, a back-to-back bridgeless boost PFC topology is adopted at high-line conditions and a three-level bridgeless boost PFC topology is rebuilt to reduce the switching losses at low-line conditions. Compared with the traditional bridgeless boost PFC rectifier, an extra low-voltage bidirectional switch (usually composed of two switches) is added, so the increased cost is low. In addition, the low common-mode noise can be achieved at both high- and low-line conditions due to the direct connection between the input mains and the output electrolytic capacitor. The detailed principle analysis about the proposed rectifier is presented in this paper. Finally, an experimental prototype is built to verify the feasibility and the effectiveness of the proposed topology. [ABSTRACT FROM AUTHOR]

The degradation in power quality causes adverse economical impact on the utilities and customers. Harmonics in current and voltage are one of the most commonly known power quality issues and are solved by the use of a hybrid series active power filter (HSAPF). In this paper, a new controller design using sliding-mode controller-2 is proposed to make the HSAPF more robust and stable. An accurate averaged model of a three-phase HSAPF is also derived in this paper. The design concept of the robust HSAPF has been verified through simulation and experimental studies, and the results obtained are discussed. [ABSTRACT FROM AUTHOR]

Finding and replacing the defective insulated-gate bipolar transistor (IGBT) module timely by monitoring the ageing state of IGBT can improve the reliability of a power converter and reduce the loss caused by IGBT failure. A method for detecting the condition of bond wires in IGBT module by identifying the short-circuit current of IGBT module is presented in this paper. It is based on the fact that parasitic parameters of IGBT module are affected by the local damage induced by ageing over time, and these changes can be easily detected by monitoring the difference of short-circuit current. The study results indicate that short-circuit current of IGBT module decreases with module ageing over time, and the difference of short-circuit current caused by junction temperature is much smaller than that caused by bond wires fatigue on a specific gate driving voltage. Therefore, the IGBT module in the power converter can be diagnosed by detecting the difference of short-circuit current without considering the effects of junction temperature. Finally, a confirmatory experiment is carried out, and the correctness of the method proposed in this paper is verified. [ABSTRACT FROM AUTHOR]

This paper presents a single-switch isolated dc–dc converter suited for a very high-frequency switching operation, especially above 10 MHz. The converter features a small number of passive components, low-switching loss, and low-voltage stress on the switch. In order to achieve low-voltage stress while maintaining zero voltage switching, the voltage waveform across the switch is shaped by designing the resonant network of the converter. The resonant network includes main parasitic components, such as leakage inductances of the transformer and the junction capacitance of the switch. Furthermore, some resonant elements are entirely replaced by these parasitic components under the specific condition. This paper derives the conditions and then minimizes the number of passive components. To validate the design procedure and the performance of the proposed converter, a GaN-based prototype was implemented. It operates at 10 MHz and provides the output power of 10 W from the dc input voltage of 50 V. The output voltage is regulated to 20 V by the ON–OFF control. Experimental results show that the peak voltage on the switch is reduced to 2.2–2.3 times the dc-input voltage and the efficiency of 69% is achieved under the full load. [ABSTRACT FROM AUTHOR]

This paper studies pulse width modulation (PWM) techniques suitable for a four-level five-phase open-end winding (OeW) drive. The drive comprises a five-phase induction machine, supplied using two two-level voltage source inverters with isolated and unequal dc-link voltages, in the ratio 2:1. A decoupled carrier-based (CB) PWM modulation strategy, based on unequal voltage reference sharing between the two converters, is introduced in this paper. The stability of dc-link voltages in OeW drives is investigated next, using a novel analysis technique. Several modulation methods are analyzed and the results show that application of the coupled PWM technique, with carriers having in-phase disposition, leads to overcharging of the capacitor in the dc-link of the inverter intended to operate with the lower dc-link voltage. On the other hand, the proposed decoupled CB PWM scheme naturally eliminates the dc-link capacitor overcharging problem. These findings are verified experimentally, using open-loop V/f control. Two different decoupled CB modulation methods are compared and the best performing modulation method is selected and incorporated further into an OeW drive with field-oriented control. The presented steady state and transient experimental results demonstrate that the decoupled CB PWM technique is suitable for high-performance variable speed drive applications. [ABSTRACT FROM AUTHOR]

This paper presents a novel family of single-switch resonant dc–dc converters with low switch voltage stress. The single-switch resonant converter which has a ground-referenced switch is advantageous for implementing the gate drive circuit and operating at several-MHz switching frequency. However, the conventional ones mostly have high voltage stress on the switch, roughly 4–5 times the input voltage. In this paper, we propose the single-switch converter topologies derived from the drain-source impedance networks consisting of two inductors and two capacitors. The switch voltage of the proposed converters is shaped into a near trapezoid by designing the resonant networks to have the desired drain-source impedance. Furthermore, a simple and specific design scheme is presented here so that the peak switch voltage is lowered to 2.2–2.5 times the input voltage while zero voltage switching is achieved. Experimental results from a 20-W GaN-based prototype operating at 10 MHz demonstrate the feasibility of the proposed converter topologies and the design method. [ABSTRACT FROM AUTHOR]

The growing installation of distributed generation (DG) units in low-voltage distribution systems has popularized the concept of nonlinear load harmonic current compensation using multifunctional DG interfacing converters. It is analyzed in this paper that the compensation of local load harmonic current using a single DG interfacing converter may cause the amplification of supply voltage harmonics to sensitive loads, particularly when the main grid voltage is highly distorted. To address this limitation, unlike the operation of conventional unified power quality conditioners with series converter, a new simultaneous supply voltage and grid current harmonic compensation strategy is proposed using coordinated control of two shunt interfacing converters. Specifically, the first converter is responsible for local load supply voltage harmonic suppression. The second converter is used to mitigate the harmonic current produced by the interaction between the first interfacing converter and the local nonlinear load. To realize a simple control of parallel converters, a modified hybrid voltage and current controller is also developed in the paper. By using this proposed controller, the grid voltage phase-locked loop and the detection of the load current and the supply voltage harmonics are unnecessary for both interfacing converters. Thus, the computational load of interfacing converters can be significantly reduced. Simulated and experimental results are captured to validate the performance of the proposed topology and the control strategy. [ABSTRACT FROM AUTHOR]

This paper proposes a transformerless bipolar multistring dc–dc converter based on series-connected submodules. It is intended for converting dc voltage and managing power flow for medium-voltage high-power dc networks. This new converter has a flexible structure of multistrings and each string consists of four valves with their middle points crossly connected through two cost-effect dc capacitors to form power balancing channels between valves. Its transformerless solution and single-stage configuration greatly reduce the converter volume, weight, cost, and power loss. In this paper, voltage ratio range and its influence on submodule design are analyzed. Moreover, a control strategy with focus on current sharing control and submodule capacitor voltage control is proposed. A simulation model rated at ±10 kV 2 MW verifies the feasibility of the proposed dc–dc converter. Experimental results obtained from a 100-V 1.5-kW laboratory setup also confirm the validation of the proposal. [ABSTRACT FROM PUBLISHER]

A family of bidirectional switched-capacitor (SC) converters with high-gain ratio of any positive integer is proposed in this paper for distributed energy resources applications. As compared with other existing SC converters achieving a same conversion gain, the main advantages of the proposed converters are that they require a relatively lower number of switches and capacitors, have a relatively lower switch's and capacitor's stress, and that their associated driver circuits are simpler to realize. Importantly, with the achievable conversion ratio being flexible and that the input and output of the proposed converters are of common ground, the proposed converters are widely suitable for many applications. Moreover, as the proposed converters do not possess magnetic component or any component that can severely degrade the converters’ performance at high temperature, they are especially useful for high-temperature applications. Besides, the proposed converters are capable of delivering bidirectional power, which is a key requirement for emerging applications with battery storages. Different aspects of the proposed converters, including a simple auxiliary power supply circuit for the MOSFETs’ drivers, will be discussed in this paper. A nine-time SC converter prototype that operates with 20-V input voltage, 100-W output, and at 75 kHz, is constructed and tested. Experiment results show that the maximum efficiency achievable with this prototype is over 98% (without driver's loss) and the efficiency over the entire load range between 25 and 100 W is over 95.5% including the driver's loss. The output voltage ripple of the SC converter is less than 1%. When the SC converter is open-loop controlled, the load voltage regulation is relatively well kept at less than 5% between full load and no load conditions. [ABSTRACT FROM PUBLISHER]

This paper presents a pulse width modulation (PWM) technique for the minimization of the leakage current in the grid-connected/stand-alone transformerless photovoltaic (PV)-cascaded multilevel inverter (CMLI). The proposed PWM technique is integrated with the MPPT algorithm and is applied to the five-level CMLI. Furthermore, using the proposed PWM technique the high-frequency voltage transitions in the terminal and common mode voltages are minimized. Thus, the proposed PWM technique minimizes the leakage current of the PV array and electromagnetic interference filter requirement in the system without addition of any extra switches. Furthermore, this paper also presents the analysis for the terminal voltage across the PV array and the common mode voltage of the inverter based on the switching function. Using the given analysis, the effect of the PWM technique can be analyzed, as it directly links the switching function with the common mode voltage and leakage current. Also, the proposed PWM technique requires reduced number of carrier waves compared to the conventional sinusoidal pulse width modulation technique for the given CMLI. Complete details of the working principle and analysis with the support of simulation and experimental results of the proposed PWM technique are presented in this paper. [ABSTRACT FROM PUBLISHER]

A robust field-weakening method for direct-torque-controlled (DTC) synchronous reluctance motors is presented in this paper. The proposed algorithm achieves smooth transition between the constant torque and field-weakening regions. Maximum torque per ampere is utilized below base speed, while both the current and voltage limits of the drive system are satisfied in the field-weakening region. The proposed method is robust to the variations in the machine dq -axis inductances. This ensures the system stability during field-weakening operation, especially along the maximum torque per flux trajectory. The proposed algorithm is incorporated into the duty ratio regulation-based DTC to achieve high-performance torque and flux control in the field-weakening region. Experimental results included in this paper confirm the veracity of the proposed method. [ABSTRACT FROM AUTHOR]

In transformerless high-power pulse width modulation (PWM) current-source drives, common-mode inductor is implemented to attenuate the common-mode voltage (CMV). However, the common-mode inductor is bulky and costly, so that scaling down the size of the common-mode inductor can achieve the system size reduction and efficiency enhancement. The size of the common-mode inductor is mainly related to the maximum common-mode current, which occurs at the resonant frequency of the common-mode circuit when motor speed is low. Previous research demonstrates that 3-segment average-value-reduction (AVR) space vector modulation (SVM) has good common-mode resonance suppression performance by attenuating the third-order CMV from the inverter. However, as studied in this paper, when modulation index of the inverter is lower than 0.4, the performance of 3-segment AVR SVM is affected as the dwell time of zero vector becomes too long to effectively compensate the CMV introduced by the active vectors. To overcome this problem, three modified AVR SVM schemes are proposed in this paper, where the single long zero vector is separated into two segments in the PWM sequence. The working principles, CMV reduction performance, harmonic performance, and switching frequency analysis of the proposed SVM methods are presented in detailed. Experiments are conducted to verify the effectiveness of the proposed methods. [ABSTRACT FROM PUBLISHER]

This paper proposes a dual-space vector control scheme for the open-end winding permanent magnet synchronous motor (OEW-PMSM) drive fed by the dual inverter with a single dc supply. Potential zero-sequence current in the open-end winding drive system has to be considered since it causes circulating current in the winding and leads to high current stress of power semiconductor devices and high losses. Zero-sequence current in open-end winding ac motor drives is usually caused by the zero-sequence voltage, and therefore switching combinations which do not produce zero-sequence voltage are used to synthesize the reference voltage in existing methods. But even so, the zero-sequence voltage can also be produced by the dead time of the inverter. In order to suppress zero-sequence current in the OEW-PMSM drive, a dual-space vector control scheme is proposed and a novel dual-inverter space vector pulse width modulation (PWM) with the zero-sequence voltage reference is employed to regulate system zero-sequence voltage in this paper. Compared with existing dual inverter PWM strategies, the novel algorithm build a regulation mechanism for the zero-sequence voltage. The proposed method is compared with the conventional vector control by simulations and experiments, and the results shown that the proposed scheme can suppress zero-sequence current effectively. [ABSTRACT FROM AUTHOR]

In this paper, the Z-source converter is introduced to power factor correction (PFC) applications. The concept is demonstrated through a wireless power transfer (WPT) system for electric vehicle battery charging, namely Z-source resonant converter (ZSRC). Due to the Z-source network (ZSN), the ZSRC inherently performs PFC and regulate the system output voltage simultaneously, without adding extra semiconductor devices and control circuitry to the conventional WPT system such as conventional PFC converters do. In other words, the ZSN can be categorized as a family of the single-stage PFC converters. In addition, the ZSN is suitable for high-power applications since it is immune to shoot-through states, which increases reliability and adds a boost feature to the system. The ZSRC-based WPT system operating principle is described and analyzed in this paper. Simulations and experimental results based on a 1-kW prototype with 20-cm air gap between the system primary and secondary sides are presented to validate the analysis and demonstrate the effectiveness of the ZSN in the PFC of the WPT system. [ABSTRACT FROM PUBLISHER]

Magnetically coupled impedance-source (MCIS) networks are recently introduced impedance networks intended for various high-boost applications. It employs coupled magnetic in the circuit to achieve higher voltage gain. Various MCIS networks have been proposed in the literature for myriad applications; however, due to effective role of system modeling in the closed-loop controller design, this paper is allocated to small-signal modeling and analysis of MCIS converters. The modeling is performed by means of the circuit averaging and averaged switch technique. A generalized small-signal derivation is demonstrated for pulse width modulation (PWM) MCIS converters and it is shown that the derived transfer functions can simply be applied to Y-source, Γ-source, and T-source impedance networks. Various transfer functions for capacitor voltage, output voltage, magnetizing current, input and output impedance are derived and have been validated through frequency and dynamic responses of computer simulation results. In addition, a comprehensive analysis has been done for all mentioned PWM MCIS converters regarding their circuit parameters. Furthermore, the effect of considering the equivalent series resistances of capacitor and inductor on the stability margin of MCIS converters is revealed in this paper. Finally, in order to validate the derived transfer functions and to consolidate the perfumed analysis, experimental results are presented for all mentioned MCIS converters. [ABSTRACT FROM PUBLISHER]

Based on the Z-source inverter, this paper proposes a novel commutation torque ripple reduction strategy for brushless DC motor (BLDCM). The proposed strategy employs the same modulation mode in both the normal conduction period and the commutation period, and the commutation torque ripple is reduced by regulating the shoot-through vector and active vector duty cycles. The proposed detection method acquires the end point of commutation by comparing the clamped terminal voltages with reference zero level, and the signal-noise-ratio of the detection is improved by avoiding the attenuation of the terminal voltages. Furthermore, a certain pulse width of the shoot-through vector can not only reduce the commutation torque ripple but also provide a new opportunity to detect the end point of commutation. Moreover, Z-source inverter provides the buck–boost ability for BLDCM drive system, then the dc voltage utilization can be improved, and the safety of the drive system can also be improved. In addition, this paper analyzes the terminal voltages during each vector. The experimental results verify the correctness of the theories and the effectiveness of the proposed approach. [ABSTRACT FROM PUBLISHER]

This paper extends the high-frequency transformer isolation concept to the Z-source (ZS) ac–ac converters and introduces a new family of high-frequency transformer isolated (HFTI) ZS ac–ac converters. The proposed HFTI-ZS converters retain all the benefits of their existing nonisolated counterparts, such as providing a larger range of output voltage with buck–boost functionality, reversing or maintaining the phase angle, reducing the in-rush and harmonic currents, and improving reliability. In addition to these benefits, the high-frequency (20 kHz) transformer (HFT) in the proposed ZS ac–ac converters provides the electrical isolation and safety with high power density as it eliminates the need for bulky and heavy line frequency (50 or 60 Hz) transformer for galvanic isolation, in applications such as dynamic voltage restorers, etc. The dc-blocking capacitor added in series with the HFT results in only ac voltage applied across its windings, which avoids its saturation. Various ZS-based HFTI ac–ac converters are proposed in this paper, and to verify their operation and advantages, example of quasi-ZS (qZS)-based isolated ac–ac converter is considered in detail. The commutation strategy is also developed to achieve the safe commutation, which avoids the current and voltage spikes without using any RC snubber. A 200-W laboratory prototype of HFTI-qZS ac–ac converter is fabricated and experiments are performed to validate the advantages of the proposed ac–ac converters. [ABSTRACT FROM PUBLISHER]

Various magnetically coupled impedance source (MCIS) networks have been proposed in the literature for increasing voltage gain and modulation index simultaneously while reducing the number of passive components used in the converter. However, applications of such networks have been limited by their discontinuous currents drawn from the sources and/or high stresses experienced by their components. This paper thus proposes three new MCIS networks named, respectively, as quasi-Y-source, quasi-Γ-Z-source, and quasi-T-source or quasi-trans-Z-source networks. These new networks inherit all advantages of the existing MCIS networks. In addition, they demonstrate advantages like continuous input currents, reduced source stresses, and lower component ratings that are not achievable by other existing networks. Further, dc-current-blocking capacitors used in the networks help to avoid saturation of magnetic core. Derivations of all two-winding MCIS networks, including existing and new networks, from the generalized three-winding MCIS networks are then systematically illustrated, before comparing them. Operational principles, mathematical derivations, simulation, and experimental results of all studied networks have been presented in the paper. [ABSTRACT FROM PUBLISHER]

Modular multilevel converters (MMCs) are being developed for the grid connection of offshore wind or tidal farms. In order to reduce the construction and maintenance costs, it is desirable to reduce the weight and volume of the system. In current MMC submodule designs, the reservoir capacitor usually accounts for over 50% of the total volume and 80% of weight. This paper presents a new design concept and control principle for a submodule using the stacked switched capacitor (SSC) architecture that can significantly reduce the capacitor size in an MMC. Practical considerations for a high-voltage high-power SSC-based MMC submodule are presented in this paper, through the design of a 21-level, 40-kV (pole-pole dc), 19.1-MW, grid-connected system, and the concept is demonstrated experimenttally on a scaled-down 400-V, 12.3-Apeak laboratory prototype submodule. It is shown that with the proposed SSC architecture, the total volume of capacitors in each submodule can be reduced by more than 40% without significantly increasing the power loss. [ABSTRACT FROM AUTHOR]

This paper proposes a new soft-stalling control strategy for grid-connected small wind turbines operating in the high and very high wind speed conditions. The proposed method is driven by the rated current/torque limits of the electrical machine and/or the power converter, instead of the rated power of the connected load, which is the limiting factor in other methods. The developed strategy additionally deals with the problem of system startup preventing the generator from accelerating to an uncontrollable operating point under a high wind speed situation. This is accomplished using only voltage and current sensors, not being required direct measurements of the wind speed nor the generator speed. The proposed method is applied to a small wind turbine system consisting of a permanent magnet synchronous generator (PMSG) and a simple power converter topology. Simulation and experimental results are included to demonstrate the performance of the proposed method. The paper also shows the limitations of using the stator back electromotive force to estimate the rotor speed in PMSG connected to a rectifier, due to significant $d$-axis current at high load. [ABSTRACT FROM AUTHOR]

This paper is a continuation of part I, which presented interturn fault (ITF) models for interior permanent magnet synchronous motors (IPMSMs). ITFs are defined by two ITF parameters: the healthy turn ratio and the fault contact resistance. First, this paper presents a proof that the two fault parameters defining a given ITF condition cannot be individually estimated from motor information and drive information (applied voltage, phase current, rotor speed, etc.) because they have multiple solutions. However, it is also shown that the additional Ohmic loss, which is the most important factor in heat generation and deterioration due to ITFs, is not dependent on these solutions. Thus, after arbitrarily setting one fault parameter, the other can be estimated for a given ITF condition; this model can be used to represent the effect of an ITF, particularly its Ohmic power loss. In this paper, an online fault parameter estimation method for IPMSMs is proposed after presenting one of the two fault parameters. The proposed method utilizes a searching algorithm that finds the fault parameter that has the minimum negative-sequence voltage error between the applied voltage and the ITF models (presented in part I). An experiment was performed to verify the proposed fault parameter estimation method. [ABSTRACT FROM AUTHOR]

The low threshold voltage of Gallium Nitride enhancement mode FETs is a concern in synchronous dc–dc buck converters. This paper presents a converter using a gate drive with a negative biased gate voltage on the low-side FET to improve the dV/dt robustness. The resulting much larger voltage drop during the dead time conduction is a concern as it can quickly overcharge the bootstrap capacitor voltage. This paper demonstrates that with a negative biased gate voltage, the rise in the bootstrap capacitor voltage is predominantly caused by the change in effective dead time conduction due to a variation in output load. A spice model to estimate the change is presented and verified. This paper also found that a change in the bootstrap capacitor voltage must be prevented as it leads to a significant change in turn-on dynamics, resulting in higher dV/dt stress with an increase in output load. To prevent a change in bootstrap capacitor voltage, different techniques such as Zener diode clamping and an external free-wheeling Schottky diode are tested and discussed. Finally, a modification of a standard bootstrap circuit using a series inductor is proposed and tested. It has been found to be the most effective method in preventing a variation in the bootstrap capacitor voltage and should be included when using a negative gate drive in a GaN dc–dc buck converter. [ABSTRACT FROM AUTHOR]

This paper proposes a new control method of three-phase active power filters for reducing the dc capacitor voltage fluctuations in transient load change. The proposed control method introduces a new \boldsymbolk-step compensator, which maintains the mean active power flowing into the dc capacitor at zero every \boldsymbol1/(k-1) ac line period. Therefore, the compensator can suppress the transient voltage fluctuations across the dc capacitor even when a quick load change occurs. This paper theoretically reveals the relationship between the step number \boldsymbolk and the reduction effect of the dc voltage fluctuations. The experimental setup introducing the proposed seven-step compensator exhibits a good suppression effect of the dc voltage fluctuations and makes it possible to reduce the required capacitance value of the dc capacitor by a factor of seven. [ABSTRACT FROM AUTHOR]

This paper proposes novel pulsewidth modulation (PWM) schemes for multi-space-vector pulsewidth modulation (MSVPWM), which is used in position sensorless control of interior permanent-magnet synchronous motor drives. The estimation of the rotor position is based on magnetic saliency and employs high-frequency components of voltage and current, which are excited by MSVPWM. The difference between the instantaneously applied voltage vector and the reference voltage vector causes current ripple. Since six or four voltage vectors are generated during a PWM period, the sequences of the error voltage vectors lead to different types of current ripples. In this paper, the proposed MSVPWM schemes employ six sequences for zero-/low-speed operation and 24 sequences for high-speed operation to reduce line current ripple. Experimental results confirm that the proposed MSVPWM schemes lead to significant reduction in harmonic current while maintaining high performance of sensorless estimation. [ABSTRACT FROM AUTHOR]

The increasing interest in multiphase drive systems has led to the extension of inverter topologies and pulse width modulation (PWM) methods from three-phase to multiphase occasions. Carrier-based PWM (CPWM) dominates space vector PWM when the phase number increases, because of its simple computation and modular implementation. Although intensive work has been done on modifying PWM methods to reduce the common-mode voltage (CMV), not enough work has been done on CPWM methods with CMV reduction for multiphase drives. This paper extends the phase-shifted sinusoidal PWM (PS-SPWM) method for five-phase and six-phase two-level voltage-source inverters (VSI) and employs the intersection-plotting method and Fourier analysis to reveal the nature of the CMV. Both experiment and simulation results comply with theoretical analysis that compared with the conventional SPWM, the PS-SPWM can effectively reduce the CMV in peak-to-peak value and RMS value, though it leads to a higher phase current distortion. In addition, the hardware realization of PS-SPWM for multiphase inverters by a distributed control system is presented in this paper. [ABSTRACT FROM AUTHOR]

This paper identifies extra junction capacitances and switching commutation loops introduced by line-frequency devices (i.e., non-active every other half line cycle) in three-level ac/dc converters and investigates the corresponding effects. Junction capacitances and power loops are well known as the key factors that impact converter switching loss and device stress, thus influence device selection, power stage layout, and thermal design. By examining switching transients of the commonly used T-shaped and I-shaped three-level converters, the cause and mechanism of the extra junction capacitances and power loops are presented. The impacts on switching loss, device voltage stress, and ac-side voltage/current distortion are respectively reported and analyzed. A loss calculation scheme for the three-level converter to include that extra loss is proposed. A power layout scheme to mitigate the device voltage stress is provided. Compensation and modeling of the voltage and current distortion are also proposed. Experimental results conducted on several types of three-level converter prototypes including a gallium nitride based 115 $V_{{\text{ac}}}{\text{/650}}$ Vdc/1.5-kW/450-kHz Vienna-type rectifier and a SiC mosfet based 1-kV/10-kW/280-kHz three-level active neutral-point-clamped inverter confirm the presented effects and verify the associated analysis and solutions. [ABSTRACT FROM AUTHOR]

This paper proposes a novel modular equalization architecture for series-connected electric double-layer capacitor (EDLC) modules, each consisting of multiple cells connected in series. Cell voltages in a module are equalized by an inductive voltage divider (IVD)-voltage multiplier (VM)-based cell equalizer, while module voltages are unified by switched capacitor converters (SCCs). Square wave voltages generated at switching nodes of the IVD-VM-based cell equalizers are utilized to drive the SCC-based module equalizers, realizing the switchless topology of SCC-based module equalizers. The required switch count of the proposed system can be halved compared to conventional systems, allowing simplified circuit. An experimental equalization test for three EDLC modules, each consisting of six cells in series, was performed from an initially voltage-imbalanced condition. Module and cell voltages were equalized at different rates, and the equalization performance of the proposed modular equalization system was successfully demonstrated. [ABSTRACT FROM AUTHOR]

It is difficult to achieve wide voltage range for full-bridge-based bidirectional resonant dc/dc converter due to the large resonant current caused by the small magnetizing inductance. A half-bridge modulation was proposed to extend the output voltage range by offering an additional step-down voltage step of 0.5 normalized gain. But in backward operation, the converter cannot provide the two-times step-up voltage gain to match the forward 0.5 step-down voltage gain, which disables the converter to truly work bidirectionally with large voltage range. This paper proposes a double voltage rectification (DVR) modulation on the rectification side to achieve twice the voltage gain for the backward direction to effectively widen the operation voltage range, which matches the ratio of the two dc port voltages where the half-bridge modulation is used in the forward direction. In the DVR modulation, the operation of the input-side resonant tank is the same as that of the conventional modulation. The switches on the input side still turn on with zero-voltage switching (ZVS), and the body diodes on the rectification side still turn off with zero-current switching. Moreover, the turning on and off of the mosfets on the rectification side are also ZVS, which causes no additional losses and guarantees high-frequency operation. The rotational operation of the rectification-side switches improves the thermal balance condition, enlarging the power capacity and improving the reliability of the converter. A smooth transition method between the two modulations is also proposed, which still guarantees ZVS turning on for the rectification-side switches. The symmetrical CLLLC resonant converter is taken as an example to illustrate the operation principle and features of the proposed modulation. And other bidirectional resonant converters for the DVR modulation are also presented. Finally, a 3-kW bidirectional CLLLC resonant converter prototype with 100-kHz resonant frequency is built to verify the proposed modulation. [ABSTRACT FROM AUTHOR]

The strive to increase the energy yield of photovoltaic (PV) power systems has made PV module integrated dc–dc converters (dc-MICs) a reality of modern PV plants. These converters regulate their input voltage, and their dynamic behavior is heavily influenced by the non-linear characteristic of the PV module. The regulation of the PV module voltage and average inductor current by means of a linear cascaded controller is a popular control technique, simplifying the converter dynamics, and providing inherent current limiting; however, it is prone to instability depending on the interaction between the PV source and the interfacing converter, as well as the value of the controller parameters. These factors present a clear challenge for control design; moreover, the converter transient response undesirably depends on the PV module operating point. In order to solve these issues, while maintaining regulation of PV module voltage and average inductor current, this paper proposes to adopt a non-linear controller designed with the feedback linearization control (FLC) technique. The control laws are derived and implemented in a non-inverting buck–boost dc module integrated converter, as this is a favorite topology for the PV interfacing application. A digitally controlled converter prototype is built and used to obtain experimental results, where the FLC technique is compared with a linear cascaded control technique. The results confirm the superior performance of the presented FLC technique, which is robust and able to regulate the converter input voltage with fast and consistent dynamics, regardless of the PV module or load operating conditions. [ABSTRACT FROM AUTHOR]

Electric spring (ES) was originally proposed as a distributed demand-side management (DSM) technology for stabilizing power distribution network in the presence of intermittent power generation without using communication. This paper explores the practical use of consensus control for a cluster of ESs through a WiFi communication layer for new functions not previously realized in practice. This approach can be considered as a form of DSM for smart grid technology. A novel consensus control is introduced to enable distributed ES circuits to provide local voltage and system frequency regulations in a microgrid with shared responsibility of active and reactive power compensation. The practical implementation details of consensus control for a cluster of ESs are addressed. New plug-and-play functions of ESs are practically demonstrated for the first time under consensus control. Practical results indicate that droop control (without communication) and consensus control (with communication) are complementary. Under normal condition when the communication network is available, distributed ESs can perform with shared power compensation efforts based on consensus control. If the communication network fails, ESs can revert to perform under droop control. [ABSTRACT FROM AUTHOR]

In this paper, a novel control scheme of the bidirectional isolated dual-active-bridge (DAB) dc–dc converters is proposed to regulate the output voltage and current, based on a sliding mode (SM) control. At first, a mathematical model of the DAB converter is expressed in a state-space form. Then, the output voltage and current controllers of the DAB converter are designed with the double-integral SM control theory, which is robust to the model uncertainty and disturbance. The proposed control method provides not only the zero steady-state error without any chattering but also the fast transient response for load variations and reference changes. The validity of the proposed control algorithm has been verified by simulation and experimental results for a 1.5-kW DAB converter. [ABSTRACT FROM AUTHOR]

SiC mosfets allow a higher frequency, lighter weight inverter over their Si counterparts for electric vehicle (EV) applications. However, using SiC-based EV traction inverters is likely to increase the shaft voltage in an ac motor drive system, which significantly affects the reliability of the system. This paper investigates the impact of high-speed switching of SiC devices and high switching frequency of SiC-based inverter on the common-mode voltage (CMV) and the shaft voltage. It is theoretically illustrated and experimentally demonstrated that the high switching frequency increases the amplitude of the shaft voltage, while the fast switching speed has limited influence on both CMV and the shaft voltage. Afterward, active zero state pulsewidth modulation (AZSPWM) and common-mode chokes are employed to mitigate the shaft voltage. The experimental results show that either the AZSPWM modulation scheme or common-mode chokes have the capability to minimize the shaft voltage. Better performance can be achieved by utilizing both techniques simultaneously. It is also observed that the high switching frequency enabled by the fast-speed SiC device is able to be helpful to the use of reduced shaft voltage technologies. [ABSTRACT FROM AUTHOR]

Many research works have been conducted on increasing the efficiency of interleaved boost converters (IBCs) applied for power factor correction (PFC) by using high-performance power electronic devices and soft switching circuits, which are not helpful in reducing the hardware cost and systematic complexity. In this paper, three intrinsic parameters affecting the efficiency of IBC PFC are found and analyzed, including the switching frequency value, boost inductor value, and output voltage value. Based on the findings, considering the limitations of current ripples, power factor, maximum magnetic flux density, and volume of a boost inductor, an optimization design method for high-efficiency IBC PFC is proposed. A 3.3-kW IBC PFC prototype is developed based on Si devices. The experimental result verifies that the proposed method can improve the efficiency of IBC PFC with low-cost low-performance devices in the full-load range. [ABSTRACT FROM AUTHOR]

In this paper, a nonisolated high step-up dc/dc converter, belonging to the family of reduced redundant power processing converters (R2P2), is investigated for high-power applications. The selection of this topology as the most suitable for such applications among those belonging to the R2P2 family is justified. Emphasis is given on the theoretical analysis of the real step-up voltage ratio of the converter, and voltage and current stresses under continuous and discontinuous conduction modes of operation, taking into account the nonideality of the topology components, namely the parasitic resistances of semiconductor devices and inductors and the voltage drop of diodes. The theoretical analysis and the behavior of the selected converter are experimentally validated through a 2 kW prototype. Moreover, the overall efficiency of the chosen converter is experimentally investigated for various step-up voltage ratios and for a high-power range, considering a waste heat recovery system for a maritime application. [ABSTRACT FROM AUTHOR]

This paper presents an improved H8 power converter for common-mode voltage (CMV) reduction and electromagnetic interference suppression. The proposed H8 converter can realize zero CMV variation when entering and leaving the zero state, which is mainly achieved by both the improvement of the structure and the control strategy. For the system structure, two switches are added on the dc bus to float the ac part of the three-phase converter in the zero state. Besides, additional capacitors are used to realize controllable CMV. For the control strategy, a simple control strategy is proposed for the H8 converter. It can automatically adapt to the flowing orientation of the load current to realize synchronous switching of the power switches, which effectively eliminates the impact of the dead time. Through analysis, simulations, and experiment, a comparison between the proposed H8 converter and the conventional H6 converter is performed. Results validate the effectiveness of the H8 topology. [ABSTRACT FROM AUTHOR]

Due to the zero-sequence currents in the four-wire systems, the three-phase currents become more complex on both amplitudes and phases in the unbalanced load conditions, so that the existing open-circuit (OC) fault diagnosis methods of the switching devices cannot be directly used. In this paper, an OC fault diagnosis strategy applied to four-wire T-type converter systems is proposed, which is implemented by decomposing the circuit model into a positive- and negative-sequence model and a zero-sequence model, and locating the OC fault based on the law of positive- and negative-sequence voltage error offsets and zero-sequence voltage error offsets. The proposed diagnosis method is suitable for both unbalanced load and unbalanced input voltage conditions. Meanwhile, the differences of fault-tolerant control between four-wire and three-wire systems are analyzed and compared. An effective fault tolerance strategy for inner OC faults applied to four-wire T-type converter systems is presented, which owns the ability to suppress dc bus imbalance. Simulation and experimental results are presented to verify the correctness of the proposed strategy. [ABSTRACT FROM AUTHOR]

Several applications need a high power, high output voltage ac/dc converter. The structure includes a dc/dc resonant stage, which is fed from a three-phase line. Due to standards, rectified dc input voltage varies largely from 400 to 750 V affecting the adversely overall design and current levels. In fact, losses in the inverter become unbearable if both switching frequency and transferred power are desired beyond a certain level. In those cases, it is necessary to connect several switches in parallel. As an alternative, the new switches can configure a new modular structure instead, adding more flexibility in the control to compensate input voltage variations. As a result, the required circulating current is reduced to a half, with benefits in total power losses. Moreover, the nature of the topology allows a reconfiguration of the resonant net (LCC) for low power, reducing even further the minimum circulating current under those conditions (fluoroscopy, for instance). In this paper, the new multilevel resonant topology is mathematically modeled and proposed for radiography and fluoroscopy. An example illustrates the design procedure for a given application at 100 kW, 50–150 kV. [ABSTRACT FROM AUTHOR]

Copper-loss-minimizing torque control (CLMTC) method has been widely studied to reduce electromagnetic torque ripple and minimize copper loss of a brushless dc motor (BLDCM), but still suffers challenges to improve its performance. This paper presents a quantitative analysis of stator iron loss and current-loop delay effects on CLMTC. In the analysis, the iron-loss-included torque equation that only suits for sinusoidal back electromotive force (EMF) is modified to cover the case of nonsinusoidal back EMF. It is concluded that the iron loss effect brings about significant torque generation error and the delay effect leads to torque ripple that increases linearly with the delay angle. Two improvements are proposed, one of which redefines the condition of an optimal motor current vector to compensate for the iron loss effect. The other one aims to suppress the delay effect by preshaping current reference based on delay characteristic of the loop. The improvements can be performed effectively on a microprocessor to realize a better CLMTC method with reduced torque generation error and torque ripple. Both the analysis and improvements are experimentally validated on a 0.95 kW BLDCM setup. [ABSTRACT FROM AUTHOR]

Core loss estimation of filter inductors is increasingly important for modeling and optimizing high-frequency, high-efficiency, and high-density pulsewidth modulation (PWM) power electronic converters. However, data provided by inductor core manufacturers are insufficient for core loss estimation in PWM converters, particularly in the case of customized gapped inductors. This paper presents a whole process of characterizing and estimating the core loss of a customized high-current gapped inductor for PWM converters. To excite the inductor for the B–H loop measurement, a test circuit formed by a half-bridge structure is proposed, which has the ability to compensate the asymmetric rectangular voltage on the inductor caused by the device voltage drops. To overcome the other challenges raised by a high excitation current, a refined discontinuous test procedure, triple pulse test, is proposed to reduce the requirements of the high-current test setup (thermal stress, current–time stress for current probes, capacity of dc sources, etc.). For practical purposes, a user-friendly loss map approach is proposed involving only time-domain and electrical variables to replace magnetic variables to enable the straightforward loss mapping process and core loss calculations. Presented experimental results show consistency between the estimated inductor loss and measured values. Overall, the proposed testing approach can be easily implemented on the user's side to develop a loss map of a given inductor. The established core loss map enables the users to accurately and rapidly estimate the core loss of a tested inductor for given PWM waveforms. [ABSTRACT FROM AUTHOR]

Impedance-source inverters using coupled inductors have been investigated as alternatives for providing high step-up voltages. However, leakage inductances of the coupled inductors have commonly led to lower overall effectiveness, in addition to generating high dc-link voltage spikes. The latter raises voltage stresses of switches, which in turn, may reduce the power levels of the inverters. A high step-up Y-source inverter has therefore been proposed in this paper to provide a high boost with a smooth dc-link voltage ensured by proper recycling of the leakage energy. These features have been verified by comparing simulation and experimental results of an existing Y-source and the proposed inverters. Factors compared are their respective boost ratios, voltage stresses, current stresses, and dc-link voltage spikes. [ABSTRACT FROM AUTHOR]

In this paper, a developed structure is proposed for high step-up nonisolated noncoupled inductor based multiport dc–dc converters. The voltage gain per number of devices of the proposed topology is higher than that of similar topologies. This means that, by using the same number of devices, the proposed topology can generate higher gains than other structures. In other words, the proposed topology utilizes less number of devices for producing the same voltage gain, which leads to less total cost, size, weight, and complexity. Despite high voltage gain, the normalized peak inverse voltage (NPIV) on switches/diodes is low. Higher number of input ports leads to higher gains and lower NPIVs on devices. The load energy can be absorbed and stored in first input unit. Modularity, simple structure, continuous input currents, and low input current ripple are the other profits of proposed topology. Low/medium power applications are suggested for the proposed structure. Proposed topology has been explained and operational modes along with steady-state analysis have been discussed. For better verification, the proposed topology has been compared with several multiport high gain converters. Comparison results confirm the advantages of the proposed topology. Finally, the proper performance of the proposed topology has been validated by experimental results. [ABSTRACT FROM AUTHOR]

A decentralized control method for power module (PM) capacitor voltage and switching frequency balancing in modular multilevel converter is presented in this paper. The proposed method is composed of a central controller, six arm controllers, and several group controllers. The group controller is only in charge of the PM capacitor voltage balancing within a corresponding group, and the arm controller is in charge of the PM capacitor voltage balancing and PM switching frequency balancing among groups within an arm. A control method based on a PI controller using the average PM capacitor voltage of each group to keep voltage balancing among groups is proposed. A dynamically adjusted extra exchange number strategy based on the voltage difference of each group is also developed to balance the PM switching frequency among groups. The key advantages of the proposed method are the reduction in the number of the PM capacitor voltages that need to be transmitted and sorted in each group controller as well as the reduction of the communication burden between the group and arm controllers. The proposed method is also highly effective under PM faults. The voltage ripple factor and the PM switching frequency of the proposed method are almost identical to the conventional centralized methods. The RT-LAB-based real-time control hardware in the loop test results of a ±350 kV/1000 MW MMC system verify the correctness and effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

Modular multilevel converters are increasingly being considered or used for various medium voltage applications. Multiple control methods have been proposed for the control of the direct to three-phase modular multilevel converter. They differ one from another in the way the capacitor voltage ripples are handled, i.e., either neglected, estimated, reconstructed by filtering or measured. This has implications on the performance level that can be obtained. This paper provides insights on the advantages and drawbacks of each control method, in inverter and rectifier mode, with a fair and thorough assessment supported by extensive simulations, with converter ratings that are realistic for medium voltage applications. Finally, this works highlights the impact of the higher dynamics for medium voltage direct current (dc) applications compared to high voltage dc ones on the choice of the control method. [ABSTRACT FROM AUTHOR]

In order to improve the stability of brushless DC (BLDC) motors at low speed, a high-stability position-sensorless control method is proposed in this paper. Because the back electromotive force (EMF) is very small at low speed, a novel algorithm is proposed to detect the zero crossing point of back EMF accurately. First, the line-to-line back EMF is computed based on the mathematical model of BLDC motors. Then, a low-pass filter (LPF) with alterable cutoff frequency is used to reduce the disturbance of the line-to-line back EMF. Last, the commutation signal is obtained by detecting the zero crossing point (ZCP) of the line-to-line back EMF. However, the commutation signal is delayed by the LPF. For this reason, based on the three-phase back EMF, a novel compensation algorithm including an open loop and a close loop is proposed to compensate for commutation error. Moreover, the speed feedback has a big delay at low speed. According to this, a novel speed calculation algorithm is presented to decrease the delay. Both the simulation and experimental results validate the high stability and reliability of the proposed method. [ABSTRACT FROM AUTHOR]

Electrolytic capacitor with a dc-side inductor is a typical dc-link filtering configuration in grid-connected diode rectified adjustable speed drives (ASDs). The criteria to size the dc-link filter are mainly from the aspects of stability and power quality. Nevertheless, the reliability of the dc-link filter is also an essential performance factor to be considered, which depends on both the component inherent capability and the operational conditions (e.g., electrothermal stresses) in the field operation. Nowadays, unbalanced voltage has the most frequent occurrence in many distribution networks. It brings more electrical-thermal stress to the component, affecting the reliability of the capacitors. In order to study the reliability performance of the LC filter in an ASD system quantitatively, this paper proposes a mission profile based reliability evaluation method for capacitors. Different from the conventional lifetime estimation, a nonlinear accumulated damage model is proposed for the long-term estimation, considering the nonlinear process of equivalent series resistor growth and capacitance reduction during the degradation. Based on the proposed lifetime estimation procedure, four case studies are investigated: first, lifetime benchmarking of capacitors in LC filtering and slim capacitor filtering configurations; second, scalability analysis for the lifetime of capacitors in terms of system power rating and grid-unbalanced levels; third, lifetime estimation of capacitors in the dc-link filter with long-term mission profile; and fourth, the impact of the capacitor sizing on the lifetime of the dc-link capacitor under grid-balanced and grid-unbalanced conditions. The results serve as a guideline for proper selection of dc-link configurations and parameters to fulfill a specification in ASDs. [ABSTRACT FROM AUTHOR]

For field-oriented control (FOC) of induction motors, accurate estimation of flux is important. Among the various flux estimation methods, the voltage model flux observer exhibits superior performance in situations where there is detuning of rotor parameters, such as rotor resistance and mutual inductance, because this model is robust to the detuning of these parameters. However, it is difficult to implement the voltage model, which includes pure integration, because of the dc saturation and dc drift problems. A number of methods have been developed to overcome this problem, including the Gopinath model flux observer, which can completely solve these problems. However, this model has a critical weakness in terms of parameter sensitivity in the mid-speed region because of the property of its characteristic function. In this paper, an analysis of parameter sensitivity of existing flux observers is discussed. A method for a voltage model flux observer design based on the Gopinath model is presented. Through an analysis of the characteristic function of the observer, the voltage model is designed. Finally, the operation of the proposed method is proven by simulations and experiments. [ABSTRACT FROM AUTHOR]

An LLC resonant converter would have light-load voltage regulation problems due to the effect of parasitic capacitances in a high-frequency range. In this paper, an energy feedback control method is proposed to improve the light-load regulation capacity by using synchronous rectifiers (SRs). The SR bridges are controlled ahead of the primary inverter bridges to deliver the energy from load to source, reducing the output voltage independent of the load. Then the desired voltage can be achieved even in no-load conditions by regulating the operation time of the energy feedback mode. The gain, voltage ripple, and efficiency performances of the proposed control method are discussed based on the precise analysis and an accurate model of the converter. Moreover, the light-load operations of the LLC resonant converter are analyzed deriving the critical load condition. Finally, the proposed control method is verified by the experiments of a 12 V/8 A LLC resonant converter prototype. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) is attractive for medium- or high-power applications because of the advantages of its high modularity, availability, and high power quality. Reliability is one of the most important challenges for the MMC consisting of a large number of submodules (SMs). The capacitor monitoring is one of the important issues in the MMC. This paper proposed a reference submodule (RSM)-based capacitor monitoring strategy for the capacitance estimation in the MMC, where the capacitances in the monitoring SMs can be estimated based on the capacitor voltage relationship between the RSM and the monitoring SMs. The proposed monitoring strategy does not rely on the information of all capacitor voltage and current, which effectively simplifies the algorithm for capacitance estimation. The simulation studies with the time-domain professional tool PSCAD/EMTDC are conducted and a down-scale MMC prototype is also tested in the laboratory with the proposed capacitor monitoring strategy. The study results confirm the effectiveness of the proposed capacitor monitoring strategy. [ABSTRACT FROM AUTHOR]