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A novel fault diagnosis method and a fault tolerant scheme for open-circuit faults on a traction rectifier are proposed in this paper. When an open-circuit fault occurs in any leg of the rectifier, indication will be generated accurately to identify the faulty leg without utilization of any extra sensors. Furthermore, the faulty rectifier can be reconfigured to maintain its full output rate to prevent traction rectifier breakdown. The fault diagnosis process is neither related to control trigger signal nor the load fluctuation. The involved parameters are the input and output voltage of the rectifier, which are the most common parameters in rectifier control. Working under zero voltage and zero current, five additional switch sets are adopted for the fault-tolerant control process to reconfigure the topological structure between the traction rectifier and the traction transformer, meanwhile the original structure of the rectifier is retained. Analysis, design, and implementing consideration for both normal and abnormal operating situations of the traction rectifier are present in this paper. The experiment is processed to verify the effectiveness of the theoretical analysis. [ABSTRACT FROM PUBLISHER]

A family of bidirectional switched-capacitor (SC) converters with high-gain ratio of any positive integer is proposed in this paper for distributed energy resources applications. As compared with other existing SC converters achieving a same conversion gain, the main advantages of the proposed converters are that they require a relatively lower number of switches and capacitors, have a relatively lower switch's and capacitor's stress, and that their associated driver circuits are simpler to realize. Importantly, with the achievable conversion ratio being flexible and that the input and output of the proposed converters are of common ground, the proposed converters are widely suitable for many applications. Moreover, as the proposed converters do not possess magnetic component or any component that can severely degrade the converters’ performance at high temperature, they are especially useful for high-temperature applications. Besides, the proposed converters are capable of delivering bidirectional power, which is a key requirement for emerging applications with battery storages. Different aspects of the proposed converters, including a simple auxiliary power supply circuit for the MOSFETs’ drivers, will be discussed in this paper. A nine-time SC converter prototype that operates with 20-V input voltage, 100-W output, and at 75 kHz, is constructed and tested. Experiment results show that the maximum efficiency achievable with this prototype is over 98% (without driver's loss) and the efficiency over the entire load range between 25 and 100 W is over 95.5% including the driver's loss. The output voltage ripple of the SC converter is less than 1%. When the SC converter is open-loop controlled, the load voltage regulation is relatively well kept at less than 5% between full load and no load conditions. [ABSTRACT FROM PUBLISHER]

This paper presents a topology for bidirectional solid-state transformers with a minimal device count. The topology, referenced as dynamic-current or Dyna-C, has two current-source inverter stages with a high-frequency galvanic isolation, requiring 12 switches for four-quadrant three-phase ac/ac power conversion. The topology has voltage step-up/down capability, and the input and output can have arbitrary power factors and frequencies. Further, the Dyna-C can be configured as isolated power converters for single- or multiterminal dc, and single- or multiphase ac systems. The modular nature of the Dyna-C lends itself to be connected in series and/or parallel for high-voltage high-power applications. The proposed converter topology can find a broad range of applications such as isolated battery chargers, uninterruptible power supplies, renewable energy integration, smart grid, and power conversion for space-critical applications including aviation, locomotives, and ships. This paper outlines various configurations of the Dyna-C, as well as the relative operation and controls. The converter functionality is validated through simulations and experimental measurements of a 50-kVA prototype. [ABSTRACT FROM PUBLISHER]

This paper presents a pulse width modulation (PWM) technique for the minimization of the leakage current in the grid-connected/stand-alone transformerless photovoltaic (PV)-cascaded multilevel inverter (CMLI). The proposed PWM technique is integrated with the MPPT algorithm and is applied to the five-level CMLI. Furthermore, using the proposed PWM technique the high-frequency voltage transitions in the terminal and common mode voltages are minimized. Thus, the proposed PWM technique minimizes the leakage current of the PV array and electromagnetic interference filter requirement in the system without addition of any extra switches. Furthermore, this paper also presents the analysis for the terminal voltage across the PV array and the common mode voltage of the inverter based on the switching function. Using the given analysis, the effect of the PWM technique can be analyzed, as it directly links the switching function with the common mode voltage and leakage current. Also, the proposed PWM technique requires reduced number of carrier waves compared to the conventional sinusoidal pulse width modulation technique for the given CMLI. Complete details of the working principle and analysis with the support of simulation and experimental results of the proposed PWM technique are presented in this paper. [ABSTRACT FROM PUBLISHER]

This paper deals with a thorough analysis of zero-voltage switching, especially for bidirectional inductorless piezoelectric transformer-based switch-mode power supplies with a half-bridge topology. Practically, obtaining zero-voltage switching for all of the switches in a bidirectional piezoelectric power converter is a difficult task. However, the analysis in this paper will be convenient for overcoming this challenge. The analysis defines the zero-voltage region indicating the operating points whether or not soft switching can be met over the switching frequency and load range. For the first time, a comprehensive analysis is provided, which can be used as a design guideline for applying control techniques in order to drive switches in piezoelectric transformer-based converters. This study further conveys the proposed method to the region where all the switches can obtain soft switching. Moreover, the analysis can be applied to other types of resonant converters with or without piezoelectric transformers. Experimental and simulation results are provided verifying the performed analysis. [ABSTRACT FROM AUTHOR]

The cascode structure is widely used for high-voltage normally-on GaN devices. However, the capacitance mismatch between the high-voltage GaN device and the low-voltage normally-off Si MOSFET may induce several undesired features, such as Si MOSFET reaches avalanche during turn-off and the high-voltage GaN device loses zero-voltage switching turn-on condition internally during a soft-switching turn-on process in every switching cycle. This paper presents another issue associated with the capacitance mismatch in the cascode GaN devices. Divergent oscillation could occur at high-current turn-off condition and, eventually, destroys the device. The intrinsic reason of this phenomenon is analyzed in detail in this paper. A simple solution is proposed by adding an additional capacitor whose position is critical and should be optimized. Experimental results validate the theoretical analysis and show that the proposed method improves device performance significantly under high-current turn-off condition. [ABSTRACT FROM AUTHOR]

To achieve the highest possible grade for server or computer power supplies in terms of efficiency, various solutions for high line input already exist on the market. In this paper, a new topology is investigated closely, showing that the titanium grade may be achievable at low line input with traditional silicon devices by the utilization of low voltage mosfets, which have an excellent figure of merits, by connecting two converter stages in parallel for low line input or in series for high line input. This paper presents simulation results which are verified with measurements from a developed prototype for 1 kW of power and 12 V output consisting of a triangular current mode power factor correction followed by a well-known phase shifted zero voltage switched bridge. Furthermore, a detailed description of the loss estimation by simulation, enhanced with additional calculations, is presented. [ABSTRACT FROM AUTHOR]

Soft switching is required to attain high efficiency in high-frequency power converters. Piezoelectric-transformer-based converters can benefit from soft switching in terms of significantly diminished switching losses and stresses. Adequate dead time is needed in order to deliver sufficient energy to charge and discharge the input capacitance of piezoelectric transformers in order to achieve zero-voltage switching. This paper proposes a method for detecting the optimum dead time in piezoelectric transformer-based switch-mode power supplies. The provision of sufficient dead time in every cycle of the switching period results in the quick start-up of resonant current inside the transformer. The new method is implemented by dynamically detecting the optimum dead time for each resonant cycle and results in reduced energy loss and, consequently, increased efficiency in the converter during initialization time and steady-state operation. The theory of optimum dead time operation is also discussed in this paper. Experimental results and simulation are provided to show the implementation of the concept. [ABSTRACT FROM AUTHOR]

This paper presents a method for generating a multilevel dodecagonal voltage space vector structure using a single dc source for induction motor drives. Multilevel dodecagonal structure combines the advantages of both multilevel and dodecagonal structures, and hence, generates low dv/dt phase voltage along with the elimination of fifth- and seventh-order harmonics over the entire modulation range. This eliminates low-order harmonic currents and prevents the generation of sixth-order torque ripple in the motor. The topology used requires only one dc source making four-quadrant operation of the drive system simpler compared to previously proposed multilevel topologies generating dodecagonal space vector structures. The topology used consists of a three-level flying capacitor (FC) inverter cascaded with a capacitor fed H-bridge. The FC inverter operates at a lower switching frequency and the low-order harmonics are eliminated by the switching action of the cascaded H-bridge inverter. The capacitors in the cascaded H-bridge modules are maintained at a substantially smaller voltage compared to the dc-link voltage and are inherently balanced during the pulsewidth modulation operation. This results in low switching loss, in the FC inverter as well as in the cascaded H-bridge inverter. Experimental results are included to validate the operation of the topology and modulation scheme presented in this paper. [ABSTRACT FROM AUTHOR]

This paper proposes a modular multilevel converter (MMC) topology for high-voltage dc (HVdc) system applications. The proposed MMC employs two half-bridge converters, a cascade of networks that consist of electronic switches, and multiple capacitors. Thus, charged capacitors are inserted in series with the arm current path, for a desired level of the output ac voltage. The switches that must be turned on are judiciously selected for the most efficient current path. The proposed MMC also offers dc-side fault handling capability. The paper compares the proposed MMC with the half-bridge submodule-based MMC, full-bridge submodule-based MMC, and clamp-double submodule-based MMC technologies. It is shown that the proposed MMC is more efficient than the three aforementioned MMC technologies, while it offers the same fault handling capability as that of an equivalent full-bridge-based MMC. Time-domain simulation studies confirm the effectiveness of the proposed MMC under various normal and faulted operating scenarios, using detailed as well as reduced models. [ABSTRACT FROM AUTHOR]

To reduce current stress and improve efficiency of dual active bridge (DAB) dc–dc converters, various control schemes have been proposed in recent decades. Most control schemes for directly minimizing power losses from power loss modeling analysis and optimization aspect of the adopted converter are too difficult and complicated to implement in real-time digital microcontrollers. Thus, this paper focuses on a simple solution to reduce current stress and improve the efficiency of the adopted DAB converter. However, traditional current-stress-optimized (CSO) schemes have some drawbacks, such as inductance dependency and an additional load-current sensor. In this paper, a simple CSO scheme with a unified phase-shift (UPS) control, which can be equivalent to the existing conventional phase-shift controls, is proposed for DAB dc–dc converters to realize current stress optimization. The simple CSO scheme can overcome those drawbacks of traditional CSO schemes, gain the minimum current stress, and improve efficiency. Then, a comparison of single-phase-shift (SPS) control, simple CSO scheme with dual-phase-shift (CSO-DPS) control, simple CSO scheme with extended-phase-shift (CSO-EPS) control, and simple CSO scheme with UPS (CSO-UPS) control is analyzed in detail. Finally, experimental results verify the excellent performance of the proposed CSO-UPS control scheme and the correctness of theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper proposes a dual-space vector control scheme for the open-end winding permanent magnet synchronous motor (OEW-PMSM) drive fed by the dual inverter with a single dc supply. Potential zero-sequence current in the open-end winding drive system has to be considered since it causes circulating current in the winding and leads to high current stress of power semiconductor devices and high losses. Zero-sequence current in open-end winding ac motor drives is usually caused by the zero-sequence voltage, and therefore switching combinations which do not produce zero-sequence voltage are used to synthesize the reference voltage in existing methods. But even so, the zero-sequence voltage can also be produced by the dead time of the inverter. In order to suppress zero-sequence current in the OEW-PMSM drive, a dual-space vector control scheme is proposed and a novel dual-inverter space vector pulse width modulation (PWM) with the zero-sequence voltage reference is employed to regulate system zero-sequence voltage in this paper. Compared with existing dual inverter PWM strategies, the novel algorithm build a regulation mechanism for the zero-sequence voltage. The proposed method is compared with the conventional vector control by simulations and experiments, and the results shown that the proposed scheme can suppress zero-sequence current effectively. [ABSTRACT FROM AUTHOR]

This paper presents a digital control technique to achieve valley switching in a bidirectional flyback converter used to drive a dielectric electroactive polymer-based capacitive incremental actuator. This paper also provides the design of a low input voltage (24 V) and variable high output voltage (0–2.5 kV) bidirectional dc–dc flyback converter for driving a capacitive incremental actuator. The incremental actuator consists of three electrically isolated mechanically connected capacitive actuators. It requires three high-voltage (HV) (2–2.5 kV) bidirectional dc–dc converters to accomplish the incremental motion by charging and discharging the capacitive actuators. The bidirectional flyback converter employs a digital controller to improve the efficiency and charge/discharge speed using the valley switching technique during both charge and discharge processes, without the need to sense signals on the output HV side. Experimental results verifying the bidirectional operation of a HV flyback converter are presented using a 3-kV polypropylene-film capacitor as the load. The energy-loss distributions of the converter are presented when 4- and 4.5-kV HV mosfets are used on HV side. The flyback prototype with a 4 kV mosfet demonstrated 89% charge energy efficiency to charge the capacitive load from 0 V to 2.5 kV, and 84% discharge energy efficiency to discharge it from 2.5 kV to 0 V. [ABSTRACT FROM AUTHOR]

In this paper, the near-state pulsewidth modulation (NSPWM), adapted to be implemented in dual-voltage-source inverter (VSI) fed open-end motor, is proposed with the aim of mitigating low-order harmonics (which lead to current total harmonic distortion (THD) minimization). The following two proposed methods are studied in detail: 1) fixing phase angle displacement (PAD) between two VSIs to 120° while adjusting the modulation index (MI); and 2) fixing MI to the predetermined value (wherein low-order harmonics are highly mitigated) while adjusting PAD. Furthermore, the proposed approaches enhance efficiency by limiting the number of commutations within the switching interval. The paper also presents the mathematical approaches to accurately determine low-order harmonic components and switching losses for dual-VSI structure. The experimental setup, including dual-VSI and open-end induction motor, is assembled in the laboratory to evaluate performance of the proposed method. Finally, the simulation results, carried out in the MATLAB/Simulink environment, are found to be in close agreement with experimental data. [ABSTRACT FROM AUTHOR]

In this paper, a nonisolated two-channel light-emitting diode (LED) driver with automatic current balance and zero-voltage switching (ZVS) is presented. In this LED driver, a dc-blocking capacitor is connected with one side of the coupled inductor. Therefore, based on the ampere–second balance, a current source is generated with the average value of the positive current identical to the absolute average value of the negative current. Accordingly, the LED currents can be balanced naturally without extra active components or current sharing transformer. Consequently, the circuit components can keep at a low count. In addition, the proposed LED driver can achieve ZVS turn-on. Thus, the switching loss can be decreased. Above all, the proposed two-channel LED driver can be extended to a multichannel LED driver. In this paper, detailed theoretical analyses and experimental results are provided to verify the feasibility and effectiveness of the proposed LED driver. [ABSTRACT FROM AUTHOR]

In this paper, the Z-source converter is introduced to power factor correction (PFC) applications. The concept is demonstrated through a wireless power transfer (WPT) system for electric vehicle battery charging, namely Z-source resonant converter (ZSRC). Due to the Z-source network (ZSN), the ZSRC inherently performs PFC and regulate the system output voltage simultaneously, without adding extra semiconductor devices and control circuitry to the conventional WPT system such as conventional PFC converters do. In other words, the ZSN can be categorized as a family of the single-stage PFC converters. In addition, the ZSN is suitable for high-power applications since it is immune to shoot-through states, which increases reliability and adds a boost feature to the system. The ZSRC-based WPT system operating principle is described and analyzed in this paper. Simulations and experimental results based on a 1-kW prototype with 20-cm air gap between the system primary and secondary sides are presented to validate the analysis and demonstrate the effectiveness of the ZSN in the PFC of the WPT system. [ABSTRACT FROM PUBLISHER]

Magnetically coupled impedance-source (MCIS) networks are recently introduced impedance networks intended for various high-boost applications. It employs coupled magnetic in the circuit to achieve higher voltage gain. Various MCIS networks have been proposed in the literature for myriad applications; however, due to effective role of system modeling in the closed-loop controller design, this paper is allocated to small-signal modeling and analysis of MCIS converters. The modeling is performed by means of the circuit averaging and averaged switch technique. A generalized small-signal derivation is demonstrated for pulse width modulation (PWM) MCIS converters and it is shown that the derived transfer functions can simply be applied to Y-source, Γ-source, and T-source impedance networks. Various transfer functions for capacitor voltage, output voltage, magnetizing current, input and output impedance are derived and have been validated through frequency and dynamic responses of computer simulation results. In addition, a comprehensive analysis has been done for all mentioned PWM MCIS converters regarding their circuit parameters. Furthermore, the effect of considering the equivalent series resistances of capacitor and inductor on the stability margin of MCIS converters is revealed in this paper. Finally, in order to validate the derived transfer functions and to consolidate the perfumed analysis, experimental results are presented for all mentioned MCIS converters. [ABSTRACT FROM PUBLISHER]

Based on the Z-source inverter, this paper proposes a novel commutation torque ripple reduction strategy for brushless DC motor (BLDCM). The proposed strategy employs the same modulation mode in both the normal conduction period and the commutation period, and the commutation torque ripple is reduced by regulating the shoot-through vector and active vector duty cycles. The proposed detection method acquires the end point of commutation by comparing the clamped terminal voltages with reference zero level, and the signal-noise-ratio of the detection is improved by avoiding the attenuation of the terminal voltages. Furthermore, a certain pulse width of the shoot-through vector can not only reduce the commutation torque ripple but also provide a new opportunity to detect the end point of commutation. Moreover, Z-source inverter provides the buck–boost ability for BLDCM drive system, then the dc voltage utilization can be improved, and the safety of the drive system can also be improved. In addition, this paper analyzes the terminal voltages during each vector. The experimental results verify the correctness of the theories and the effectiveness of the proposed approach. [ABSTRACT FROM PUBLISHER]

This paper proposes a new fault-tolerant strategy for a multilevel converter with an integrated impedance-source network. The proposed fault-tolerant strategy leverages the flexibility provided by the impedance-source network to implement the fundamental phase-shift compensation (FPSC) method in order to restore operation of a multilevel converter with one or more faulty switches to the prefault conditions. In case of a fault occurrence, the proposed fault-tolerant strategy makes the most use of the remaining converter capacity and generates balanced line-to-line voltages, while evenly distributing an inevitable voltage stress increase, over all converter switches. In this paper, first, a brief background about an impedance-source based cascaded H-bridge converter and a suitable modulation method for it is provided. Then, the FPSC method is explained and the proposed fault-tolerant strategy based on this method is introduced. Finally, several experimental results from a prototype converter are provided to validate the operation of the proposed strategy. [ABSTRACT FROM PUBLISHER]

AC voltage regulation is required in both the domestic and industrial sectors to avoid undesired effects from random voltage variations of the power supply. The paper introduces an ac voltage stabilizer/converter (ACVS) that is based on a controllable autotransformer technology. The proposed ACVS offers a specified strategy of voltage regulation, less harmonics, and low cost. The paper explains the operating principle of the ACVS and derives its nonlinear mathematical model. To ensure the desired performance of the ACVS while it is subject to uncertain input voltage and load variations, an optimal control strategy is designed. It is achieved via transforming the ACVS model extending with fictive axis emulation into a rotating reference frame and the linearization of the model via specific orientation of the reference frame and introducing a linear control action. Operation of the ACVS is simulated under different disturbances due to load and grid voltage changes, and compared to voltage stabilization with application of I and PI controllers. Experimental results are presented to demonstrate the voltage regulation technology. [ABSTRACT FROM PUBLISHER]

In several electrical dc–ac power conversions, the ac output voltage is higher than the input voltage. If a voltage-source inverter (VSI) is used, then an additional dc–dc boosting stage is required to overcome the step-down VSI limitations. Recently, several impedance source converters are gaining higher attentions [1], [2], as they are able to provide buck-boost capability in a single conversion stage. This paper proposes the merging of the boost stage and the VSI stage in a single stage dc–ac power conversion, denoted as split-source inverter (SSI). The proposed topology requires the same number of active switches of the VSI, three additional diodes, and the same eight states of a conventional space-vector modulation. It also shows some merits compared to Z-source inverters, especially in terms of reduced switch voltage stress for voltage gains higher than 1.15. This paper presents the analysis of the SSI and compares different modulation schemes. Moreover, it presents a modified modulation scheme to eliminate the low frequency ripple in the input current and the voltage across the inverter bridge. The proposed analysis has been verified by simulation and experimental results on a 2.0-kW prototype. [ABSTRACT FROM PUBLISHER]

Various magnetically coupled impedance source (MCIS) networks have been proposed in the literature for increasing voltage gain and modulation index simultaneously while reducing the number of passive components used in the converter. However, applications of such networks have been limited by their discontinuous currents drawn from the sources and/or high stresses experienced by their components. This paper thus proposes three new MCIS networks named, respectively, as quasi-Y-source, quasi-Γ-Z-source, and quasi-T-source or quasi-trans-Z-source networks. These new networks inherit all advantages of the existing MCIS networks. In addition, they demonstrate advantages like continuous input currents, reduced source stresses, and lower component ratings that are not achievable by other existing networks. Further, dc-current-blocking capacitors used in the networks help to avoid saturation of magnetic core. Derivations of all two-winding MCIS networks, including existing and new networks, from the generalized three-winding MCIS networks are then systematically illustrated, before comparing them. Operational principles, mathematical derivations, simulation, and experimental results of all studied networks have been presented in the paper. [ABSTRACT FROM PUBLISHER]

Modular multilevel converters (MMCs) are being developed for the grid connection of offshore wind or tidal farms. In order to reduce the construction and maintenance costs, it is desirable to reduce the weight and volume of the system. In current MMC submodule designs, the reservoir capacitor usually accounts for over 50% of the total volume and 80% of weight. This paper presents a new design concept and control principle for a submodule using the stacked switched capacitor (SSC) architecture that can significantly reduce the capacitor size in an MMC. Practical considerations for a high-voltage high-power SSC-based MMC submodule are presented in this paper, through the design of a 21-level, 40-kV (pole-pole dc), 19.1-MW, grid-connected system, and the concept is demonstrated experimenttally on a scaled-down 400-V, 12.3-Apeak laboratory prototype submodule. It is shown that with the proposed SSC architecture, the total volume of capacitors in each submodule can be reduced by more than 40% without significantly increasing the power loss. [ABSTRACT FROM AUTHOR]

The paper proposes a method of active switching harmonics current reduction in the dc-link capacitor of a two-level, three-phase, back-to-back converter. Based on the derived analytical solution for switching harmonic currents in the dc-link, it is shown that by specific control over the pulsewidth-modulated (PWM) carriers’ phase angles, the targeted harmonics of the rectifier and the inverter can be synchronized in phase such that their cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. A three-step procedure to implement the method is detailed in the paper. The effectiveness of the proposed approach is verified experimentally. [ABSTRACT FROM AUTHOR]

This paper proposes a new topological configuration for a unified power quality conditioner (UPQC). Generally, the power structure of the three-phase three-wire UPQC consists of two back-to-back connected six-switch inverters. For this configuration, out of 12 switches, six of the series inverter switches will be underutilized most of the time. To improve the semiconductor utilization and consequently to reduce the total switch count, this paper proposes a new reduced switch topology for the UPQC. The proposed topology is realized using only ten switches and retains all the performance merits of the 12-switch UPQC while minimizing its underutilization without increasing the switch VA rating. The paper provides a detailed analytical study and evaluation by comparing the proposed topology with the twelve- and nine-switch-based UPQC system configurations. The feasibility of the proposed topology is validated through experimental investigation. [ABSTRACT FROM AUTHOR]

This paper proposes a new fault-tolerant strategy for the purpose of revamping the performance of three-phase multilevel (ML) converters with faulty switches. The proposed fault-tolerant strategy is based on an adaptation of the modified space vector modulation (SVM) technique to the fundamental phase-shift compensation method. The proposed fault-tolerant strategy generates balanced line-to-line voltages with increased voltage levels in the faulty condition. In this paper, first a brief background about cascaded H-bridge (CHB) ML converters and SVM technique is provided. Then the proposed fault-tolerant strategy and the modified SVM technique are presented. Finally, several experimental results are provided to validate operation of the proposed strategy. [ABSTRACT FROM AUTHOR]

Aimed at the problem that the auxiliary commutation circuit (ACC) of auxiliary resonant commutated pole (ARCP) inverters has a high loss in commutation processes, this paper presents a novel modulation strategy with shunt dead time based on a double ARCP (DARCP) inverter. In comparison with the original modulation strategy, this modulation strategy cannot only achieve soft switching for all switches, but also avoid the superposition of resonance current and load current at commutation moments in double ACCs (DACCs) and make the maximum current through DACCs approximately equal to load current in commutation processes. So, the circulating current loss in DACCs and the current stress of auxiliary switches can be effectively reduced. According to the equivalent circuits in different operation modes under the novel modulation strategy, this paper analyzes the operation principle, soft-switching implementation condition, and optimal parameter design procedure of the DARCP inverter. Finally, a 10-kW–16-kHz DARCP inverter prototype with insulated gate bipolar transistor-based switches is built. Experimental results are given to demonstrate the validity and features of the DARCP inverter under the novel modulation strategy. [ABSTRACT FROM AUTHOR]

The low threshold voltage of Gallium Nitride enhancement mode FETs is a concern in synchronous dc–dc buck converters. This paper presents a converter using a gate drive with a negative biased gate voltage on the low-side FET to improve the dV/dt robustness. The resulting much larger voltage drop during the dead time conduction is a concern as it can quickly overcharge the bootstrap capacitor voltage. This paper demonstrates that with a negative biased gate voltage, the rise in the bootstrap capacitor voltage is predominantly caused by the change in effective dead time conduction due to a variation in output load. A spice model to estimate the change is presented and verified. This paper also found that a change in the bootstrap capacitor voltage must be prevented as it leads to a significant change in turn-on dynamics, resulting in higher dV/dt stress with an increase in output load. To prevent a change in bootstrap capacitor voltage, different techniques such as Zener diode clamping and an external free-wheeling Schottky diode are tested and discussed. Finally, a modification of a standard bootstrap circuit using a series inductor is proposed and tested. It has been found to be the most effective method in preventing a variation in the bootstrap capacitor voltage and should be included when using a negative gate drive in a GaN dc–dc buck converter. [ABSTRACT FROM AUTHOR]

This paper presents concepts and results of an investigation of power electronic thyristor-based switched-capacitor voltage multipliers (SCVMs). A concept of the SCVM power converters assumes the utilization of resonant circuits for the zero-current switching operation. The topology makes it possible to apply thyristors as active switches that create the possibility of composing the resonant switch-mode converters for high-voltage gain, high power, and low cost, and opens a huge area of applications. This paper presents an in-depth analysis of the SCVM configured as the resonant high-power thyristor-based converter. The operation with regard to the specific switching conditions of thyristors, as well as efficiency of the converter is analyzed providing the unique relationship important for the converter design, optimization, and efficiency improvement. An experimental validation confirms the feasibility and the operation concept of the SCVM and demonstrates the efficiency range. The SCVM converter can be optimized to the topology with a decreased number of switches. This paper also presents a novel topology of the resonant converter with a reduced number of switches, resonant switched capacitor voltage multiplier (RSCVM), dedicated for thyristor implementation. The RSCVM requires the specific component selection and control. The analysis of the configuration, operation, efficiency, and component selection of the RSCVM converter, as well as simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

Pulse-width-modulated (PWM) converters have been widely applied for power processing, and they are typically the stems of other types of converters, such as quasi-resonant, Z-source, and switched-inductor hybrid converters. Development of PWM converters has been spanning over a century, starting from the buck converter. The well-known PWM converters include buck, boost, buck–boost, Ćuk, single ended primary inductive converter (SEPIC), zeta, Z-source, quasi-Z source, etc. Many attempts have been proposed to develop these converters based mostly on canonical cell concepts and by introducing extra LC filters to the cells. This paper presents an enhancement to the layer and graft schemes by introducing the ideas of dc voltage/current offsetting, capacitor/inductor component splitting, diode grafting, and inverse operation of PWM converters. The PWM converters, which can be operated in continuous conduction mode (CCM) or discontinuous conduction mode (DCM), therefore can be synthesized systematically according to decoded transfer gains. Decoding and synthesizing PWM converters uniquely bridge transfer gains to converter topologies and provide readers a comprehensive understanding of PWM-converter evolution from the original converter, the buck converter. Additionally, in this paper, the Ćuk, SEPIC, and zeta converters all with the same transfer gain of $D/(1 - D)$ are proved to be equivalent to the buck–boost converter with an extra LC filter. For further illustrating the proposed approaches, various types of Z-source converters, switched-capacitor/switched-inductor hybrid converters, and a single-stage interleaved converter are reviewed, and new PWM converters are developed. [ABSTRACT FROM AUTHOR]

This paper describes active shunt LC decoupling circuit with ceramic capacitors, allowing volume reduction and lifetime improvement of the high-voltage dc filters. Active filtering is based on the energy exchange between high-voltage coupling and low-voltage auxiliary capacitors. The coupling capacitor enables use of the low-voltage switched-mode power stage and low-voltage auxiliary decoupling capacitor. Advantageously, this allows to reduce power dissipation, switching frequency ripple current, and to reduce volume of the circuit. Additionally, power efficiency and capacitor lifetime are improved by using recent high-voltage coupling multilayer ceramic capacitors, reaching very low ESR. This paper provides description of the active decoupling capacitor, and shows an example of the feedback control. Obtained performances are demonstrated on the prototype of 1300-μF/450-V capacitor, allowing to reduce volume by three, when compared to ordinary 450-V electrolytic capacitor. [ABSTRACT FROM AUTHOR]

The increasing interest in multiphase drive systems has led to the extension of inverter topologies and pulse width modulation (PWM) methods from three-phase to multiphase occasions. Carrier-based PWM (CPWM) dominates space vector PWM when the phase number increases, because of its simple computation and modular implementation. Although intensive work has been done on modifying PWM methods to reduce the common-mode voltage (CMV), not enough work has been done on CPWM methods with CMV reduction for multiphase drives. This paper extends the phase-shifted sinusoidal PWM (PS-SPWM) method for five-phase and six-phase two-level voltage-source inverters (VSI) and employs the intersection-plotting method and Fourier analysis to reveal the nature of the CMV. Both experiment and simulation results comply with theoretical analysis that compared with the conventional SPWM, the PS-SPWM can effectively reduce the CMV in peak-to-peak value and RMS value, though it leads to a higher phase current distortion. In addition, the hardware realization of PS-SPWM for multiphase inverters by a distributed control system is presented in this paper. [ABSTRACT FROM AUTHOR]

This paper presents a novel interleaved high-conversion-ratio bidirectional dc–dc converter based on switched capacitors and coupled inductors. Series-connected switched capacitor and inductor cells were used to increase the voltage conversion ratio, reduce voltage stresses on power switches, realize soft-charging/discharging of switched capacitors, and achieve autocurrent-sharing in parallel inductors. The interleaved structure combined with switched capacitors was adopted to reduce current ripple at the side having lower voltage, thus enabling applications that require high power levels. In this paper, we first review the status of high-voltage-ratio bidirectional dc–dc converters. Then, the evolution of the proposed extensible topologies and the steady-state operating principle under the inductor current continuous conduction mode is presented. Finally, the performance and features such as voltage gain, voltage and current stress, and the autocurrent-sharing mechanism that are realized by switched capacitors are verified; the optimal design of coupled-inductors, switched-capacitors, and the chip size of switches are given. A specific design of the driving circuit that facilitates actual applications is described. A 1-kW prototype converter, employing a hybrid configuration of SiC and Si mosfets, was constructed to verify the theoretical analysis, and achieved an optimal compromise between conversion efficiency and low cost. [ABSTRACT FROM AUTHOR]

Isolated, zero-voltage-switching dc–dc converter topologies represent attractive solutions in the continuous run toward higher switching frequencies, allowing more compact power supplies. Among them, the asymmetrical half-bridge flyback converter represents an interesting option, featuring simple duty-cycle control at constant switching frequency, as opposed to the popular LLC converter. The majority of papers dealing with this topology consider an approximated voltage gain similar to that of an isolated buck converter operating in continuous conduction mode, i.e., proportional to the duty cycle and, practically, load independent. On the contrary, the true voltage gain is nonmonotonic at high duty-cycle values. Anytime the converter is designed for a resonant operation, as is advisable to eliminate any reverse recovery problem of the rectifier diode, the voltage gain not only increases, but also becomes a function of the switching frequency. This article investigates the converter's voltage gain in detail, deriving a theoretical framework capable of capturing its real behavior and dependencies. The proposed analytical model has been verified through simulations as well as experimental measurements taken on a 160-W prototype working at 400 kHz. [ABSTRACT FROM AUTHOR]

This paper proposes a practical solution of high-frequency-link dc transformer based on switched capacitor (SCDCT) for medium-voltage dc (MVDC) power distribution application. Compared to the traditional dc transformer scheme, the proposed SCDCT can disconnect from MVDC distribution grid effectively as a dc breaker when a short fault occurs in the distribution, can enhance power transfer capacity, and always ensures high-frequency-link voltage match to improve current impact and efficiency performances, and the redundancy design can be achieved when some submodules fail to improve the reliability. In the paper, the topology, voltage and power characterization, control strategy, startup, and fault solution of SCDCT are presented and analyzed comprehensively. At last, an SCDCT prototype is built and the experimental results verify the correctness and effectively of the proposed solution. [ABSTRACT FROM AUTHOR]

A novel high step-up converter, which is suitable for a renewable energy system, is proposed in this paper. The proposed converter is composed of the dual switches structure, three-winding coupled inductor, and two voltage multiplier cells in order to achieve the high step-up voltage gain. The dual switches structure is beneficial to reduce the voltage stress and current stress of the switch. In addition, two multiplier capacitors are, respectively, charged during the switch-on period and switch-off period, which increases the voltage conversion gain. Meanwhile, the energy stored in the leakage inductor is recycled with the use of clamped capacitors. Thus, two main power switches with low on-resistance and low current stress are available. As the leakage inductor, diode reverse-recovery problem is also alleviated. Therefore, the efficiency is improved. This paper illustrates the operation principle of the proposed converter; discusses the effect of the leakage inductor; analyzes the influence of parasitic parameters on the voltage gain and efficiency, the voltage stresses and current stresses of power devices are shown; and a comparison between the performance of the proposed converter and the previous high step-up converters is performed. Finally, the prototype circuit with input voltage 20 V, output voltage 200 V, and rated power 200 W is operated to verify its performance. [ABSTRACT FROM AUTHOR]

This paper presents a topology of a single-phase floating full-bridge three-level pulse width modulation (PWM) power inverter suitable for high-voltage/high-power dc–ac conversion. High power efficiency is obtained thanks to the slow (50/60 Hz) biasing of the H-bridge power supply terminals, allowed by a particular arrangement and control of two complementary active neutral point clamped voltage-source converters. As result, the main PWM switching voltage as well as the maximum drain–source voltage $V_{{\rm DSS}} of related transistors are reduced to one-half of the input VDD voltage. This is allowed by the internally generated and accurately balanced middle-node voltage VDD/2. Consequently, advantageous $r_{{\rm DS}({\rm on})}$ of the low-voltage transistors, along with reduced switching PWM voltage result in considerable decreasing of power losses in whole output power range. This paper introduces the main concept of the floating H-bridge topology, and presents in detail the circuit realization. The performances are demonstrated on $450 V_{{\rm DC}}/230 V_{{\rm AC}}$ 2 kW power inverter exhibiting 98.6% peak efficiency and realized in very small $100\times 60\times 30$ mm3 volume. [ABSTRACT FROM AUTHOR]

This paper proposes a direct space-vector modulation (DSVM) method that can reduce the common-mode voltage (CMV) as well as the switching losses for matrix converters in a high voltage transfer ratio. Even though the previous DSVM improvements can reduce the CMV peak value to 42%, compared to the conventional DSVM method, they incur high switching losses. The DSVM method proposed in this paper provides the same CMV peak value as previous methods with lower switching losses. The switching losses are theoretically analyzed through the accumulated switched voltage in a switching period and compared to those of previous methods. Simulation and experimental results are given to verify the input/output waveforms, CMV reduction, and lower switching losses of the proposed DSVM method. [ABSTRACT FROM AUTHOR]

The five-level active neutral-point-clamped (5L-ANPC) converter is becoming an attractive topology of multilevel converter family. A novel SVPWM algorithm based on line voltage coordinate was studied in this paper to overcome shortcomings of the traditional algorithm. Through coordinate transformation, steps of determining the basic vectors and the solution about the basic vector corresponding action time are simplified. Combining with the characteristics of 5L-ANPC converter and the new control algorithm, a method of controlling the voltage balancing of dc-link capacitors and floating-capacitors is proposed. According to the voltage of dc-link capacitors, the suitable switching sequence which can balance the voltage of dc-link capacitors is chosen. The high common-mode voltage will affect the service life of motor and reduce the reliability of the system especially in high-voltage converter. The common-mode voltage is also reduced by choosing the right switching state in this paper. The validity of the proposed method was proved by the experimental results. [ABSTRACT FROM AUTHOR]

I2 average current mode control is a promising control technique featuring fast dynamic response, cycle-by-cycle current limiting and accurate current control. It can be treated as peak current mode control with no peak-to-average error. By combining direct current feedback and average current feedback, I 2 average current mode control is a three-loop control system. Since it is a new control technique proposed in 2013, few papers exist which discuss the small-signal model for this control method. In this paper, a small-signal model for constant frequency I2 average current mode control is proposed which successfully predicts the subharmonics oscillation when the duty cycle is close to or greater than 0.5. The characteristics of I2 average current mode control are also compared with average current mode control and peak current mode control to show its advantages. [ABSTRACT FROM AUTHOR]

This paper introduces a high-gain single-stage boosting inverter (SSBI) for alternative energy generation. As compared to the traditional two-stage approach, the SSBI has a simpler topology and a lower component count. One cycle control was employed to generate ac voltage output. This paper presents theoretical analysis, simulation and experimental results obtained from a 200 W prototype. The experimental results reveal that the proposed SSBI can achieve high dc input voltage boosting, good dc–ac power decoupling, good quality of ac output waveform, and good conversion efficiency. [ABSTRACT FROM AUTHOR]

In this paper, angular modulation index (AMI) implemented through a modified space vector modulation for the dual voltage source inverters (VSI) is proposed with the primarily aiming to reduce switching losses. The desired voltage across the load is synthesized by applying appropriate phase-angle displacement between space vector references. The proposed approach avoids the use of a dc/dc boost converter (which imposes loss and weight/price penalty to duplicate the dc-link voltage) and results to be particularly suitable for electrical/hybrid vehicle applications. Namely, the application of saving energy to keep driving has been identified as major concern. Hence, this work focuses on the strategy to enhance efficiency. The principles of the proposed controlling method and switching loss, which is reduced at least by 50%, are theoretically evaluated. This paper proposes a pioneering mathematical approach to correctly determine total harmonic distortion (THD) value of the voltage/current for the dual-VSI structure. Furthermore, simulation and experimental results prove that the proposed method insures benefits in terms of common-mode voltage, THD of the voltage, and switching loss reduction. The dual-VSI prototype supplying 1.5-kW induction motor is assembled in the laboratory to experimentally evaluate performance of the proposed method. Also, the simulation results carried out through MATLAB/Simulink environment are given to confirm performance of this easy-to-implement and high-efficient method. [ABSTRACT FROM PUBLISHER]

Impedance-source converters, an emerging technology in electric energy conversion, overcome limitations of conventional solutions by the use of specific impedance-source networks. Focus of this paper is on the topologies of galvanically isolated impedance-source dc–dc converters. These converters are particularly appropriate for distributed generation systems with renewable or alternative energy sources, which require input voltage and load regulation in a wide range. We review here the basic topologies for researchers and engineers, and classify all the topologies of the impedance-source galvanically isolated dc–dc converters according to the element that transfers energy from the input to the output: a transformer, a coupled inductor, or their combination. This classification reveals advantages and disadvantages, as well as a wide space for further research. This paper also outlines the most promising research directions in this field. [ABSTRACT FROM PUBLISHER]

This paper presents a new application of power and voltage balance control schemes for the cascaded H-bridge multilevel inverter (CHMI)-based solid-state transformer (SST) topology. To reduce load on the controller and simplify modulation algorithm, a master–slave control (MSC) strategy is designed for the dual active bridge (DAB) stage. The master controller executes all control and modulation calculations, and the slave controllers manage only device switching and protection. Due to the inherent power and dc-link voltage unbalance in cascaded H-bridge-based SST, this paper presents a compensation strategy based on three-phase dq decoupled current controller. An optimum zero-sequence component is injected in the modulation scheme so that the three-phase grid currents are balanced. Furthermore, to tightly regulate the output voltage of all the DAB modules to target value, a dynamic reference voltage method is also implemented. With this proposed control method, the three-phase grid currents and dc-link voltage in each module can be simultaneously balanced. Finally, simulation and experimental results are presented to validate the performance of the controller and its application to microgrid SST. [ABSTRACT FROM PUBLISHER]

Modulation schemes can significantly change the performance of a converter in the steady state. They have, thus, been extensively studied, but directed more at three-phase topologies, where triplen offsets are added. Single-phase systems, including ac–dc–ac, are less widely pursued, even though various topologies have since been proposed. The intention of this paper is, thus, to study two promising single-phase ac–dc–ac converters using reduced number of switches, and subsequently proposes modulation schemes for them. The proposed schemes help the converters to achieve better thermal spread among their switches, while keeping their dc-link voltages low. Single points of failure are thus minimized, allowing the converters to have longer lifetimes. Simulation and experimental results have demonstrated the intended performances, hence verifying the analyses presented in this paper. [ABSTRACT FROM PUBLISHER]

This paper investigates a control approach for achieving reliable zero-voltage switching transitions within the entire operating range of a conventional nonisolated bidirectional dc–dc converter that utilizes synchronous rectification. The approach is based on operation in the discontinuous conduction mode with a constant reversed current of sufficient amplitude, which is achieved by load-dependent variation of the switching frequency. This paper focuses on the obtained resonant voltage transitions and provides analytical models for determining the reversed current and timing parameters that would ensure safe, reliable, and highly efficient operation of the converter. In addition, the proposed approach solves the synchronous transistor's spurious turn-on and body diode reverse recovery induced issues, does not require any additional components or circuitry for its realization, and can be entirely implemented within a digital signal controller. The effectiveness and performance of the presented control approach was confirmed in a 1-kW experimental bidirectional dc–dc converter that achieved 97% efficiency over a wide range of output powers at switching frequencies above 100 kHz. [ABSTRACT FROM PUBLISHER]

Modular multilevel converters (MMCs) are widely used in different applications. Due to low-loss operation, compactness, and high modularity, MMC is extremely attractive for high-voltage direct-current (HVDC) transmission systems. The HVDC station loss is highly related to the converter switching pulse pattern, which is generated by modulation algorithm and cell selection methods. This paper formulates the switching pulse pattern generation, as a versatile optimization problem. The problem constraints and objectives are formulated for HVDC applications and compared with similar problems in the field of computer science. To overcome the computational complexity in solving the introduced optimization problem, a heuristic method is proposed for cell selection algorithm. The method utilizes the current level in order to obtain lossless switching at zero-current crossings. The study of the proposed method, in a time-domain simulation platform, shows that the method can reduce the switching converter losses by 60% compared to carrier-based modulation, maintaining the same capacitor voltage ripple. Eventually, the practical functionality of the proposed method is verified in a real-time digital simulator, RTDS, for a 512-level converter in a point to point HVDC link. Although this paper focuses on HVDC, the mathematical model is applicable for any MMC application. [ABSTRACT FROM PUBLISHER]

This paper proposes a new fault-tolerant strategy to revamp performance of three-phase multilevel converters with a single faulty switch. The proposed fault-tolerant strategy is based on the application of a modified selective harmonic elimination (SHE) technique in conjunction with the fundamental phase-shift compensation method. The proposed fault-tolerant strategy makes the most use of the converter capacity in the faulty condition, generates balanced line voltages, and eliminates a wide range of lower order harmonics to limit the total harmonic distribution of the converter voltages in the faulty condition. In this paper, first, a brief background about cascaded H-bridge multilevel converters and SHE technique is provided. Then, the proposed fault-tolerant strategy and the modified SHE technique are presented. Finally, several experimental results are provided to validate the operation of the proposed strategy. [ABSTRACT FROM PUBLISHER]

This paper proposes a line current distortion compensation method, which is a fusion of the conventional variable on-time (VOT) control and the average current mode (ACM) control, for DCM/CRM boost PFC converter with zero current switching (ZCS)/zero voltage switching (ZVS)/valley switching (VS)/switching frequency limitation (SFL) functions. In this paper, the mathematical analyses of the line current distortion for the DCM/CRM boost PFC converter with ZCS/ZVS/VS/SFL functions are also derived to explain the causes of the line current distortion. In order to increase efficiency, the ZVS/VS/SFL functions are needed but the line current will be further distorted. To compensate the distorted line current, the ACM-based VOT (ABVOT) control for the DCM/CRM boost PFC converter is proposed. In addition, the constant-on-time-based noise-immunity S/H method is proposed to replace the multiplier, which is always needed for the conventional ACM-based control. The performance of the proposed ABVOT control with S/H method will be demonstrated by simulation and experiment results. [ABSTRACT FROM PUBLISHER]

This paper proposes a new bidirectional three-phase push–pull converter that has a simple structure and achieves zero-voltage switching turn-on of switches. Also, due to use of a single inductor, an imbalance among phase currents on the low-voltage high-current side is trivial in the proposed converter although no current sharing control is employed. In this paper, a new dual asymmetrical pulse width modulation (PWM) switching method is proposed for bidirectional power flow control with seamless mode change. The proposed switching method offers reduced circulating current and makes the converter easier to implement compared to the PWM plus phase shift-based control method since it is a general PWM method having two independent duty cycle controls on each side. Experimental results from a 3-kW prototype are provided to validate the proposed concept. [ABSTRACT FROM PUBLISHER]