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The main standard for avionic equipment DO-160G defines a set of tests that require compliance before the employment of a device in aircraft. An important test involves the generator voltage and consequential current distortion of the three-phase load in the variable 360–800 Hz frequency grid. The main purpose of this paper is to present and analyze a systematic design methodology for three-phase boost and buck rectifiers in order to meet with the voltage distortion test requirement. For a given voltage harmonic profile, the current harmonic limits that have to be satisfied are translated into equivalent per-harmonic admittances and a profile of maximum rectifier input admittance versus frequency is obtained. The defined profile, due to normalization, is applicable to arbitrary power level with simple shifting by the base admittance governed by the converter nominal power. It is shown that for boost-type rectifiers there is a tradeoff between current controller bandwidth and input inductor size, while for the buck-type rectifiers main limitation lies in the input LC filter design used for differential electromagnetic interference filtering. The experimental results conducted on an SiC three-phase 10 kW VIENNA rectifier are tightly backing up the proposed theoretical analysis. This paper is accompanied by three videos demonstrating experimental measurement of d-axis open-loop duty cycle to inductor current transfer function, loop-gain of d-axis current controller with 3.8 kHz bandwidth and variable grid frequency 360–800 Hz operation of the converter under 0% and 10% input three-phase voltage total harmonic distortion. [ABSTRACT FROM AUTHOR]

The paper proposes a method of active switching harmonics current reduction in the dc-link capacitor of a two-level, three-phase, back-to-back converter. Based on the derived analytical solution for switching harmonic currents in the dc-link, it is shown that by specific control over the pulsewidth-modulated (PWM) carriers’ phase angles, the targeted harmonics of the rectifier and the inverter can be synchronized in phase such that their cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. A three-step procedure to implement the method is detailed in the paper. The effectiveness of the proposed approach is verified experimentally. [ABSTRACT FROM AUTHOR]

Light-emitting diodes (LEDs) are coming strongly into the lighting market due to their advantages over conventional lighting solutions: energy efficient, controllable in both light and color, long lifetime, lack of a warm-up period, and high power density. Some of these advantages will make LED light sources to be more than just a light bulb, being able to transmit data, control light color, hue, and intensity or even detect people in indoor environments. Nevertheless, these advantages attributed to LED capabilities are, in reality, achieved thanks to the LED driver. This paper reviews the current state-of-the-art strategies to drive LEDs from ac power grids with special emphasis into removing the most limiting component from the point of view of the lifetime, which is the electrolytic capacitor, while achieving a flicker-free performance of the light output of the LED driver. Moreover, it focuses on analyzing the required regulations, challenges, and applicability of LED drivers in both single-phase and three-phase ac power grids. [ABSTRACT FROM AUTHOR]

High-brightness light-emitting diodes (HB-LEDs) are recognized as being potential successors of incandescent bulb lamps due to their high luminous efficiency and long lifespan. To achieve these advantages, HB-LED ballast must be durable and efficient. Furthermore, for this specific application, ac-dc HB-LED ballast requires a high-step-down ratio, high power factor and low cost. This paper presents a tapped-inductor buck power factor corrector (PFC) operating in boundary conduction mode design for replacing incandescent bulb lamps. This low-cost solution presents a suitable high-step-down ratio without galvanic isolation in order to produce an output voltage of about 20 V from line voltage. In addition, the tapped-inductor buck PFC maintains high efficiency in comparison to other one stage solutions widely used to design low-cost ac-dc HB-LED drivers (e.g., flyback PFCs). Static analysis, input current distortion analysis, and an average small signal model of the tapped-inductor buck PFC have been implemented in this paper both to check the validity of the proposed solution and to provide a suitable design procedure of the ac-dc HB-LED driver. Finally, a 12-W experimental prototype was developed to validate the theoretical results presented. [ABSTRACT FROM PUBLISHER]

This paper presents a new component within the flexible ac-transmission system (FACTS) family, called distributed power-flow controller (DPFC). The DPFC is derived from the unified power-flow controller (UPFC). The DPFC can be considered as a UPFC with an eliminated common dc link. The active power exchange between the shunt and series converters, which is through the common dc link in the UPFC, is now through the transmission lines at the third-harmonic frequency. The DPFC employs the distributed FACTS (D-FACTS) concept, which is to use multiple small-size single-phase converters instead of the one large-size three-phase series converter in the UPFC. The large number of series converters provides redundancy, thereby increasing the system reliability. As the D-FACTS converters are single-phase and floating with respect to the ground, there is no high-voltage isolation required between the phases. Accordingly, the cost of the DPFC system is lower than the UPFC. The DPFC has the same control capability as the UPFC, which comprises the adjustment of the line impedance, the transmission angle, and the bus voltage. The principle and analysis of the DPFC are presented in this paper and the corresponding experimental results that are carried out on a scaled prototype are also shown. [ABSTRACT FROM PUBLISHER]

This paper presents the analysis, design, and control of a four-wire rectifier system using split-capacitor topology. The proposed controller does not require any complex transformation or input voltage sensing. A detailed analysis of the distortions in the line and the neutral currents is presented. It is shown that the single-carrier-based, conventional sine-triangle PWM (CSPWM) scheme results in a peak-to-peak neutral current ripple, which is greater than the peak-to-peak ripple of any of the line currents. Also, for the same operating condition, the distortions in the line and the neutral currents increase considerably, when a three-limb boost inductor is used instead of three single-phase inductors. A three-carrier-based SPWM scheme is proposed in this paper. Compared to CSPWM, the proposed scheme significantly reduces the neutral current ripple when three single-phase inductors are used, and reduces both line and neutral current ripples when a three-limb inductor is used. The control scheme is verified through Matlab simulation. It is implemented on an field-programmable gate-array (FPGA)-based digital controller and tested on a proto-type. Simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

Energy storage (ES) integration into the grid is typically achieved using a two- or three-level dc/ac converter with ES interfaced directly to the inverter's dc link or through a dc/dc converter. In both cases, long-series connected strings of batteries are required to efficiently maintain the necessary dc-link voltage. Such configurations are susceptible to reliability issues, as shutdown of a battery string due to individual battery failure, overheating, or overcharging/discharging results in loss of a large fraction of ES capacity. To increase the reliability of an ES system, shorter strings of batteries are preferable. In this study, the ES is subdivided into many banks of short-series strings, which are integrated into the submodules of a modular multilevel converter (MMC). To further enhance the reliability, the MMC should also be unaffected by an ES bank shutdown. This paper investigates the robustness of the MMC to ES bank failure by assessing the power balance between submodules when a subset of ES banks is not operational. The analysis concludes that as many as 33% of ES banks may be shutdown without affecting MMC power exchange with the grid, and is supported with both simulation and experimental results. [ABSTRACT FROM AUTHOR]