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Insertion of dead time, transfer links between micro control unit (MCU) and voltage source inverter (VSI), VSI's nonideal characteristics all lead to deviation that cannot be ignored between the actual output voltage and the command voltage, which seriously affects the performance of the ac induction motor (ACIM) control system. Among many dead-time effect compensation methods, VSI usually operates under an open-loop condition, thus making complete compensation hard to achieve. This paper studies methods to obtain the two key elements of compensation voltage amplitude and current polarity and a novel phase voltage compensation method is proposed. In this method, a simple hardware circuit is applied to obtain the actual output of the VSI as feedback with which precise compensation amplitude can be calculated. And judgment of current polarity is accurately realized by reconstructing phase current from filtered current components under M-T coordinate with a Kalman filter. The compensation in a zero-crossing region is also closely discussed in this paper. To verify the validity of the method, simulations and experiments are carried out. The experiments emphasize on the efficacy of feedback, steady-state, and transient performance of current reconstruction; and the performance of a conventional method to that of the proposed method are also compared. Results show that the proposed method proves to be effective. [ABSTRACT FROM AUTHOR]

Switch fault diagnosis is an important design aspect for pulse width modulation (PWM) dc-dc power converters. It can prevent power converters from further damage, and also make preparations for remedial actions. In this paper, a fast switch fault diagnostic method is proposed for PWM dc-dc converters operating in continuous conduction mode. The proposed method utilizes the magnetic component (inductor or transformer) voltage for fault diagnosis. Based on the real-time voltage measurement and switch gate-driver signals, characteristics of switch open-circuit faults and short-circuit faults are rapidly extracted, and thus, switch faults can be quickly detected. The magnetic component voltage can be measured by an auxiliary winding in the magnetic core, and gate-driver signals can be easily got from the control circuit. Moreover, the fault detection can be implemented by a low-cost logical hardware circuit, and this circuit can be integrated into the control circuit. The fault diagnosis principle, design considerations, and implementation are discussed in this paper. Experiments are conducted to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

Soft switching pulse-width modulation (PWM) dc–dc full-bridge converter with controlled rectifier on the secondary side of the high-frequency power transformer is presented in this paper. An active secondary switch, including new nondissipative passive energy recovery turn-off snubber on the secondary side and modified PWM control algorithm, provide conditions for zero-voltage and zero-current turn-on and zero-current turn-off of IGBT transistors on the primary side of the high-frequency dc–dc converter. The simple passive energy recovery snubber ensures also zero-voltage turn-off of the transistor on the secondary side of the power transformer. The principle of operation is explained and analyzed and consequently verified on a 2 kW, 50 kHz laboratory model of the converter. [ABSTRACT FROM PUBLISHER]

This paper presents a general space vector modulation (SVM) method for the modular multilevel converter (MMC). Compared with earlier modulation methods, the proposed SVM method not only utilizes the maximum level number (i.e., $2n+ 1$, where $n$ is the number of submodules in the upper or lower arm of each phase) of output phase voltages, but also leads to an optimized control performance in terms of capacitor voltage balancing, circulating current suppression, and common-mode voltage reduction. The maximum level number is achieved by introducing a new equivalent circuit of the MMC, and the optimized control is obtained by selecting the optimal redundant switching states. Since the computational burden of the SVM scheme is independent of the voltage level number, the proposed method is well suited to the MMC with any number of submodules. Simulation and experimental results are presented to validate the proposed method. [ABSTRACT FROM PUBLISHER]

This paper proposes a hybrid strategy by combining fundamental pulsewidth modulation excitation (FPE) and additional test vectors, which is used in interior permanent-magnet synchronous motor (IPMSM) sensorless control. In contrast to the typical indirect flux detection by on-line reactance measurement-based methodology where the rotor position is calculated and updated in every three successive pulsewidth modulation (PWM) cycles, the proposed hybrid strategy can achieve the one-cycle acquisition of the rotor position by utilizing both response currents of FPE and additional test vectors, which makes the proposed strategy more robust and suitable in higher speed or load sudden change conditions. Meanwhile, a new PWM scheme for four-space-vector PWM (FSVPWM) is presented, which sharply simplifies the implementation process. Furthermore, for the case that the amplitude of the object fundamental voltage is so small that it cannot satisfy minimum time demand for the slopes of response currents sampling, a compensation technique is presented. In addition, the multiple-point current sampling (MPCS) technology and linear least square fitting method are used to decrease the current sampling disturbance, which improves obviously the accuracy of position estimation. Finally, the experimental results confirm that the proposed strategy can obtain the rotor position accurately and simply. [ABSTRACT FROM PUBLISHER]

This paper proposes a switched-capacitor multilevel inverter for high-frequency ac power distribution systems. The proposed topology produces a staircase waveform with higher number of output levels employing fewer components compared to several existing switched-capacitor multilevel inverters in the literature. This topology is beneficial where asymmetric dc voltage sources are available, e.g., in case of renewable energy farms based ac microgrids and modern electric vehicles. Utilizing the available dc sources as inputs for a single inverter solves the major problem of connecting several inverters in parallel. Additionally, the need to stack voltage sources, like batteries or supercapacitors, in series which demand charge equalization algorithms, are eliminated as the voltage sources employed share a common ground. The inverter inherently solves the problem of capacitor voltage balancing as each capacitor is charged to the value equal to one of the input voltage every cycle. State analysis, losses, and the selection of capacitance are examined. Simulation and experimental results at different distribution frequencies, power levels, and output harmonic content are provided to demonstrate the feasibility of the proposed multilevel inverter topology. [ABSTRACT FROM PUBLISHER]

The flying-capacitor modular multilevel converter (FC-MMC) overcomes the low/zero-speed operation issues of conventional MMC-based drive. The FC-MMC injects no common-mode voltage (CMV) to the drive system. However, the pulse width modulator (PWM) introduces switching ripples, which appear as CMV on motor stator windings. To completely get rid of the CMV, an elimination method based on a new modulation scheme is proposed in this paper. The modulation algorithm places the switching pulses end to end for upper and lower arms, respectively. The consistent switching positions between upper and lower arms lead to the complete CMV elimination for FC-MMC-based drive system in entire speed range. Although the proposed method slightly increases the switching frequency as compared to conventional phase-shifted PWM, it is still acceptable in medium-voltage applications. The validation of the proposal is proved by simulations and experiments. [ABSTRACT FROM PUBLISHER]

In this paper, a novel optimized switching repetitive control (OSRC) scheme is developed and applied to a constant-voltage constant-frequency pulse width modulation inverter to enhance the stability and tracking performance with low sampling frequency. In OSRC, a switching integral phase lead compensator is applied to enlarge the stability margin, which is impaired by the phase lag of the inverter system. With the optimized switching strategy, the stable region can be much wider, which means that a larger robust filter $Q$ can be applied to reduce the tracking error. The stability analysis and optimized design procedure are also given. Comparative experiments in different load situations are performed to demonstrate the validity of the proposed scheme. [ABSTRACT FROM PUBLISHER]

This paper proposes a pulse width modulation plus phase-shift (PPS) control for nonisolated high gain soft-switching bidirectional dc–dc converter (HSBDC). The phase-shift angle is used to control the direction and amount of power flow of the bidirectional dc–dc converter, while the duty cycle is used to balance the voltage between two high voltage side (HVS) capacitors. The HSBDC with PPS control has the advantages of simple control structure and symmetrical switching patterns, ensured soft-switching in both forward and backward modes at all load under wide voltage range, and reduced voltage ratings of the HVS capacitors and switches. The operation principle of the HSBDC with PPS control is analyzed in detail. Based on the analysis the passive component is designed to achieve higher efficiency. A 3-kW prototype is implemented and tested to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

Maximum efficiency point tracking (MEPT) control has been adopted in state-of-the-art wireless power transfer (WPT) systems to meet the power demands with the highest efficiency against coupling and load variations. Conventional MEPT implementations use dc/dc converters on both transmitting and receiving sides to regulate the output voltage and maximize the system efficiency at the expense of increased overall complexity and power losses on the dc/dc converters. Other implementations use phase-shift control or on–off control of the transmitting side inverter and the receiving side active rectifier instead of dc/dc converters but cause new problems, e.g., hard switching, low average efficiency, and large dc voltage ripples. This paper proposes a pulse density modulation (PDM) based implementation for MEPT to eliminate all the mentioned disadvantages of existing implementations. Delta-sigma modulators are used as an example to realize the PDM. A dual-side soft switching technique is proposed for the PDM. The ripple factor of the output voltage with PDM is derived. A 50 W WPT system is built to validate the proposed method. The system efficiency is maintained higher than 70% for various load resistances when the power transfer distance is 0.5 m, which is 1.67 times the diameter of the coils. [ABSTRACT FROM AUTHOR]

Neutral-point (NP) voltage imbalance is an inherent problem of three-level neutral-point clamped (NPC) converter. To solve this problem, an improved virtual space vector pulse width modulation (VSVPWM) is proposed in this paper. A new repartitioning of the space vector sectors is proposed for three-level NPC converter by considering the amplitude variations of small vectors under NP voltage imbalance. The factor k of the NP voltage imbalance is introduced. The small vector favorable to the NP voltage balance is selected based on the factor k and phase current direction to achieve precise control and balancing of NP voltage. The proposed method can effectively maintain NP voltage balance and eliminate the low frequency oscillation of the NP voltage over the whole modulation index range. The improved VSVPWM also has advantages of good dynamic performance. The method has been tested and verified by simulations and experiments. [ABSTRACT FROM AUTHOR]

The noninverting buck–boost converter has attracted significant attention in the photovoltaic (PV) module integrated application, as it offers high efficiency while maintaining a low cost and a simple topology. When this converter is employed, special care must be taken at the transition between buck and boost operating modes, as a dead-zone in the voltage transfer function can cause abrupt perturbations in the controlled voltage, decreasing the regulation quality and ultimately lowering the power conversion efficiency. In this paper, a new dead-zone compensation technique is proposed with the scope of smoothing the transition between operating modes, eliminating the voltage ripple and improving the regulation performance, while maintaining high efficiency. The converter under analysis is studied together with its gate driving circuit, which is based on a bootstrap capacitor power supply for the high-side switches. The proposed dead-zone compensation technique is deduced by using the principle of maintaining the ideal voltage gain function across the converter operating range. The technique is analyzed, implemented and tested on a purposely built PV module integrated noninverting buck–boost converter. The experiments reveal a sensible improvement of the voltage regulation during mode transition, confirming the effectiveness of the proposed technique and its fitness for the PV application. [ABSTRACT FROM AUTHOR]

Five-level hybrid-clamped (5L-HC) converter is a newly proposed topology which is suitable for high-performance medium-voltage high-power conversions without switches directly connected in series. The critical issue of this converter is that two flying capacitor voltages of each phase and two neutral-point potentials of the dc-link need to be balanced. This paper presents a decoupled voltage balancing method for this 5L-HC converter based on modified phase-shifted pulse width modulation (PS-PWM) and optimal zero-sequence voltage injection. The voltages across the central dc-link capacitor and two flying capacitors are balanced first by adjusting the width of four PWM signals. Second, the relationship between the neutral-point currents and the output phase voltage is studied and the upper and lower dc-link capacitor voltages are balanced by zero-sequence voltage injection. Both steady-state and dynamic-state simulation and experimental results are presented to confirm the validity of this method. [ABSTRACT FROM AUTHOR]

Presently, the neutral-point potential offset is an inherent problem for three-level converters on three-phase four-wire active power filters. The conventional three-dimensional space vector pulse width modulation (3-D-SVPWM) strategy is adopted as a normal solution to the problem, but the selection of space vector sectors for four-wire converter is both abstract and complicated in practice. This paper proposes a new PWM strategy accordingly to simplify the selection process and the calculation of duration. Compared to the conventional 3D-SVPWM, the proposed method locates the sector of optimal vector directly with the polarity of three-phase reference voltage. Then, by applying voltage–second balance rule, it can perform a fast calculation of the duration and generate PWM signals to control the switching devices’ on/off. As an approach to correct the imbalance dc-link capacitor voltage, this strategy reconstructs the switching sequence. A portion of state O duration is disassembled into states P and N to suppress the neutral-point potential offset. The proposed strategy is validated with a range of experiments. The results indicate that this simplified PWM strategy can effectively reduce the computational burden, and also the dc-link capacitor voltage is well controlled. [ABSTRACT FROM PUBLISHER]

This paper introduces series work of common-mode (CM) voltage reduction for the paralleled inverters. The paralleled inverters’ phase-legs are connected through coupling inductors and the combined three-phase currents are provided to the load. Interleaving is an approach to reduce the CM voltage for the paralleled inverters but it cannot eliminate CM voltage. A novel pulse-width-modulation (PWM) method for paralleled inverters which can theoretically achieve zero CM voltage is developed. Considering the basic voltage vectors in each inverter, novel paralleled voltage vectors which have zero CM voltage are proposed to combine the reference voltage vector. The action time's distribution and voltage vectors’ sending sequence for each inverter are also introduced. The proposed PWM method can make sure the voltage of the two inverters are balanced in each switching cycle and limits the circulating current through small coupling inductors. Similar to interleaving space vector PWM, the proposed zero CM PWM also has the ability to reduce the output current ripple and electromagnetic interference (EMI). Simulation and experimental results are provided to show the advantage of paralleled inverters in CM voltage reduction and validate the proposed method has good performance to reduce CM current and CM EMI noise. [ABSTRACT FROM PUBLISHER]

High-power three-phase voltage source inverter (VSI) is used in the drive line of hybrid electric and electric vehicles mainly to drive the traction motor. VSI is supplied by battery on board, which gets charged and discharged under various control strategies in these vehicles. Throughout a drive cycle, the control signal to the VSI keeps changing. The high switching frequency of power electronics devices increase the stress on the VSI. The response of a three-phase VSI under these circumstances has been studied in this paper. The transient analysis of VSI including nonlinearities has been done using axis transformation and average and canonical modeling. The three-phase pulse width modulation signals are also linearized using d–q axis transformation in synchronous reference frame. It has been observed that a VSI is always a very stable system with nonlinearities and with reference to dc input variation but a very unstable inverse system with respect to the control signal. The results obtained are very important for the controller and observer design and also to study the effects of these transients on the mechanical components of vehicular drive line. [ABSTRACT FROM PUBLISHER]

A dual-buck inverter (DBI) possesses no shoot-through worries and can boost efficiency by using power mosfet s. The main drawback of a DBI is the use of more inductors than in a traditional full-bridge inverter. This greater number of inductors decreases the power density and increases system cost. In this paper, a modified cascaded full-bridge DBI is proposed. It retains all the advantages of the conventional cascaded full-bridge DBI, possesses no shoot-through issues, and can be operated with no pulse-width-modulation dead-times. It can be implemented with power mosfet without reverse recovery issues of a body diode to boost efficiency. The cascaded modules in the proposed inverter share current limiting inductors. Therefore, the number of inductors and inductor footprints, the complexity of the circuit layout, required inductance, and magnetic volume can all be decreased. To show the advantages of the proposed inverter, detailed theoretical analysis and experimental results are provided. [ABSTRACT FROM PUBLISHER]

This paper discusses the operation of a single-stage, isolated, high-frequency ac-link-based single-phase dc–ac converter, suitable for photovoltaic microinverter applications, controlled using phase modulation of the secondary-side cycloconverter devices. A detailed analysis is presented explaining the impact of prominent circuit nonidealities such as device capacitance and transformer leakage inductance on circuit behavior. The proposed extended-dead-time based modulation scheme helps in achieving zero-voltage-switching of the primary devices over the entire line cycle of the ac output and also offers the benefit of reduced transformer rms current due to absence of circulating current in the zero state. A flyback-based regenerative clamp circuit is used for mitigating voltage spikes on the secondary devices arising due to leakage inductance induced oscillations. A generic commutation strategy is also discussed, which makes operation with nonunity power factor loads also possible. Experimental results on a 260-W laboratory prototype under different load conditions are presented to illustrate the discussed principles and highlight the performance improvements. [ABSTRACT FROM PUBLISHER]

Four-level nested neutral-point clamped (NNPC) inverters experience severe voltage balancing problems under low output-frequency conditions when the conventional four-level space vector modulation (4L-SVM) technique is applied, which limits their wider application. In order to get a complete control of the flying-capacitor voltages, and to alleviate the calculation burden of conventional 4L-SVM, a simplified but effective 4L-SVM technique along with the voltage balance control (VBC) function is proposed in this paper. For low modulation indexes, zero and small vectors are selectively utilized and distributed to force the average charging and discharging time of flying capacitors to be equal to each other during every switching period, so that voltage ripples are greatly reduced to be within an acceptable level under low output-frequency conditions. For high modulation indexes, the simplification of conventional 4L-SVM for NNPC inverters into two-level SVM is proposed to reduce the computation complexity. Principles of the proposed 4L-SVM and VBC are elaborated in detail. The steady-state, transient-state, and VBC performances are investigated and compared with the case where the conventional 4L-SVM is applied. Simulation results of a 5 MVA inverter system and experimental results of a scaled-down 5 kVA inverter system are presented to validate the proposed method. [ABSTRACT FROM PUBLISHER]

Conventional voltage-source inverters used for induction motor drives generate a hexagonal space vector structure. In the overmodulation range, the hexagonal space vector structure generates low-order harmonics in the phase voltage resulting in low-order torque ripple in the motor. Inverter topologies with an octadecagonal (18 sided) space vector structure eliminate fifth-, seventh-, eleventh-, and thirteenth-order harmonics from the phase voltage, and hence, the dominant sixth- and twelfth-order torque ripple generation is eliminated. Octadecagonal space vector structures proposed in the past require multiple dc sources, which makes four-quadrant operation of the drive system difficult and costly. In this paper, the formation of a multilevel nine-concentric octadecagonal space vector structure using a single dc source is proposed. Detailed experimental results, using open-loop $V/f$ control and rotor field-oriented control, are presented to validate the effectiveness of the proposed drive scheme. [ABSTRACT FROM PUBLISHER]

An open-end winding machine configuration and a suitable control strategy for medium-voltage ac motor drives applications are proposed in this paper in order to reduce the distortion of phase voltages in multilevel inverters (MLIs). Differently than standard open-end winding configurations, where two inverters provide active power to both sides of the stator winding, a main MLI supplies in this case the machine on one side, while an auxiliary two-level inverter acts as active power filter on the other side. A high efficiency step modulation manages the MLI, while the auxiliary unit is pulse width modulation (PWM) operated. As the phase current harmonic content is improved, the torque ripple is reduced and the drive efficiency is increased. By exploiting the proposed approach, the apparent switching frequency of the system is that typical of a PWM inverter, although the main unit is operated according to a voltage step modulation strategy. Simulation and experimental results confirm the consistency of the proposed methodology. [ABSTRACT FROM PUBLISHER]

ZSVM1, ZSVM2, and ZSVM6 are three traditional space vector modulation (SVM) strategies for three-phase Z-source inverter. The shoot-through times of ZSVM1, ZSVM2, and ZSVM6 are divided into two equal parts, four equal parts, and six equal parts, respectively. Although these control strategies are easy to be implemented in program, their inductor current ripples are not optimized, causing large current ripple. This paper proposes new SVM strategies, named ZSVMD6 and ZSVMD1, for reducing inductor current ripples of Z-source inverter. The principle of volt–second balance is used in the proposed strategies to divide shoot-through times in real time. So every divided shoot-through time is not equal, and changing in real time. The divided shoot-through time can ensure that the sum of the inductor charging current ripple and discharging current ripple is zero at each time, therefore reducing the inductor current ripples. The derivation details of the proposed strategies are given. The inductor current ripples of the proposed strategies and traditional ones are compared and analyzed. Simulation and experiment results show that the inductor current ripples of the proposed strategies are much lower than that of the traditional ones, verifying the effectiveness of the proposed strategies. [ABSTRACT FROM PUBLISHER]

This paper presents a current sensorless technique for current-driven full-bridge dc/dc converters. The proposed technique is able to precisely estimate the transformer current and in turn input/output current of the converter. Since the high-frequency current is estimated, different current-based modulations schemes (e.g., self-sustained oscillating control (SSOC), modulators for synchronous rectifications, etc.) can be implemented using the proposed current sensorless technique. In the proposed technique, the current is estimated using the precise model of dc/dc converters instead of the averaged model. Thus, the accurate current waveform is derived within a switching cycle. The mathematical analysis of the system observability and the practical concerns related to the implementation of the proposed technique are also described in detail. Experimental results on a current-driven dc/dc converter are presented to show the feasibility of the proposed technique and verify its performance. [ABSTRACT FROM AUTHOR]

This paper introduces a new concept of common mode voltage cancellation for pulse width modulated motor drives, aiming at solving issues such as ground leakage current, common mode electromagnetic interference, and bearing current. The balanced inverter topology and dual-winding stator configuration are proposed as a practical realization. Implementation considerations on the influence of circuit asymmetry are also investigated. Finally, a gallium nitride HEMT based induction motor drive prototype is built and tested to evaluate the performance of the cancellation concept in a practical situation. [ABSTRACT FROM AUTHOR]

To prevent partial-shading issues in photovoltaic (PV) systems, various kinds of voltage equalizers that virtually unify characteristics of shaded and unshaded modules have been proposed. Although PV string utilization can be dramatically improved, PV systems tend to be complex and costly because, in addition to the main converter for string control, voltage equalizers are separately necessary. This paper proposes the single-switch single-magnetic pulse width modulation (PWM) converter integrating the voltage equalizer using the series-resonant voltage multiplier (SRVM) for standalone PV systems. By utilizing a square wave voltage generated across a filter inductor in a PWM buck converter for driving the SRVM, the main PWM converter and voltage equalizer can be integrated into a single unit with reducing the total switch and magnetic component counts, achieving not only system-level but also circuit-level simplifications. The experimental test using the prototype for three PV modules connected in series was performed emulating a partial-shading condition. The integrated converter effectively precluded the partial-shading issues and significantly improved the power available at a load, demonstrating its efficacy. [ABSTRACT FROM AUTHOR]

The six-step operation of surface-mounted permanent magnet machine drives in a flux weakening region has many advantages compared to the pulse width modulation mode, such as the reduced switching loss and fully utilized inverter output voltage. However, if the ratio of the sampling frequency to the fundamental frequency is low in fixed sampling system, the low-frequency oscillation in the current can be incurred in the six-step operation. The low-frequency current causes a system stability problem and reduces system efficiency due to an excessive heat and high power loss. Therefore, this paper proposes the variable time step controller for six-step operation. By updating an output voltage, sampling phase currents, and executing the digital controller synchronized with the variable sampling time, the turn on and off switch signals for six-step operation can be generated at the exact moment. As a result, the low-frequency oscillation in the phase current can be eliminated. In addition, the system transfer function of the proposed control method is discussed for the system stability and system dynamic analysis. The effectiveness of the proposed method is verified by the comparative simulation and experimental results. [ABSTRACT FROM AUTHOR]

In this paper, the commutation torque ripple is studied in the brushless DC motor (BLDCM) braking operation. As the phase currents flow in the reversed directions in the braking operation, the current circuits in the braking operation are different from those in the motor operation. For this reason, it is found that the commutation torque ripple can be reduced in the speed range from the rated speed to zero just by the common braking pulse width modulation strategies, where the three-phase modulation is not needed. However, it is impossible in motor operation. Under the common braking pulse width modulation strategies, the speed ranges where commutation torque ripple can be reduced are derived and compared. Based on the analysis of these speed ranges, a simple braking method is proposed. With this method, the BLDCM can be slowed down without commutation torque ripple in the whole braking process from the rated speed to zero. Experiment results verify the effectiveness of the method and the correctness of the theory. [ABSTRACT FROM AUTHOR]

Active gate driving has been demonstrated to beneficially shape switching waveforms in Si- and SiC-based power converters. For faster GaN power devices with sub-10-ns switching transients, however, reported variable gate driving has so far been limited to altering a single drive parameter once per switching event, either during or outside of the transient. This paper demonstrates a gate driver with a timing resolution and range of output resistance levels that surpass those of existing gate drivers or arbitrary waveform generators. It is shown to permit active gate driving with a bandwidth that is high enough to shape a GaN switching during the transient. The programmable gate driver has integrated high-speed memory, control logic, and multiple parallel output stages. During switching transients, the gate driver can activate a near-arbitrary sequence of pull-up or pull-down output resistances between 0.12 and 64 Ω. A hybrid of clocked and asynchronous control logic with 150-ps delay elements achieves an effective resistance update rate of 6.7 GHz during switching events. This active gate driver is evaluated in a 1-MHz bridge-leg converter using EPC2015 GaN FETs. The results show that aggressive manipulation of the gate-drive resistance at sub-nanosecond resolutions can profile gate waveforms of the GaN FET, thereby beneficially shaping the switch-node voltage waveform in the power circuit. Examples of open-loop active gate driving are demonstrated that maintain the low switching loss of constant-strength gate driving, while reducing overshoot, oscillation, and EMI-generating high-frequency spectral content. [ABSTRACT FROM PUBLISHER]

Galvanic isolation based high-frequency transformers have become very attractive in bidirectional dc/ac converters. This paper presents a new pulse width modulation (PWM) switching technique for controlling a bidirectional isolated dc–ac–ac converter employing a high-frequency link transformer. The proposed PWM technique has the ability to control the input dc current and to inject a sinusoidal three-phase current to the grid at unity power factor. The primary-side is an H-bridge converter used to convert the dc voltage to a high-frequency square-wave single-phase voltage. The secondary side is a matrix converter used to convert the grid three-phase voltage to a high-frequency single-phase waveform. The dc–ac–ac converter utilizes a high-frequency link transformer for the galvanic isolation between the H-bridge and matrix converters as alternative for the bulky line-frequency transformers (50/60 Hz). The bidirectional power flow is controlled by the phase shift angle between the primary and secondary voltages of the high-frequency transformer. The mathematical model and the circuit operational modes are presented along with the voltage controllable limit. The feasibility of the proposed PWM switching technique and the accuracy of the mathematical model are demonstrated experimentally by using a 200 V/1 kW laboratory prototype system. [ABSTRACT FROM PUBLISHER]

Power electronic transformers (PETs) offer the advantage of size and weight reduction compared to line-frequency transformers by operating at much higher frequencies than line frequency. In this paper, a push–pull-based ac/dc PET has been proposed and analyzed. The PET offers bidirectional power flow between single-phase ac and dc, using the dual-active bridge principle. Such a system may find applications in interfacing plug-in hybrid and electric vehicles to the grid. The proposed PET offers advantages of open-loop unity power factor operation, soft switching of secondary-side converter power switches for all operating points, high power density owing to use of a high-frequency transformer, and high utilization factor (UF), compared to previous work. Analysis has been done for power transfer, UF, and soft switching. Simulation and experimental results have been provided to demonstrate the operation of the PET. [ABSTRACT FROM PUBLISHER]

This paper first starts with reviewing several commonly practiced PWM schemes for the three-phase isolated buck matrix-type rectifier. Then, an optimal six-segment PWM scheme (“Type A”) is proposed. The analysis shows “Type A” PWM scheme has lower duty-cycle loss, maximum output inductor current ripple, and minimum switching loss comparing with other PWM schemes when the mosfet devices are employed. In addition, a low input current total harmonic distortion (THD) can be achieved with duty-cycle compensation. Finally, the steady-state analysis of duty-cycle loss, inductor current ripple, and THD are all compared and verified by the experimental results for “Type A” PWM and eight-segment PWM (“Type E”). [ABSTRACT FROM PUBLISHER]

The current imbalance among the two input capacitors is one of the important issues of the half-bridge three-level (HBTL) dc/dc converter, which would affect system performance and reliability. In this paper, a zero-voltage switching (ZVS) pulse-wide modulation (PWM) strategy including two operation modes is proposed. Based on the proposed ZVS PWM strategy, a capacitor current-balancing control is proposed for the HBTL dc/dc converter, where the currents on the two input capacitors can be kept balanced by alternating the two operation modes of the proposed ZVS PWM strategy. Therefore, the proposed control strategy can improve the performance and reliability of the converter in the aspect of balancing the thermal stresses and lifetimes among the two input capacitors. Finally, simulation and experimental studies are conducted and results verify the proposed control strategy. [ABSTRACT FROM PUBLISHER]

Z-source inverter provides a competitive single-stage dc–ac power conversion with the capability of both buck and boost voltage regulation. In order to maximize voltage gain and to increase efficiency, this paper proposes an improved pulse-width modulation (PWM) strategy. By adjusting the shoot-through duty ratio of one-phase leg, it regulates the average value of intermediate dc-link voltage, which is the same as the instantaneous maximum of three-phase line voltage in one switching time period (Ts) . And the other two-phase legs maintain the fixed switching states. Thus, the equivalent switching frequency of power devices in the inverter bridge is reduced to 1/ 3fs (fs is the frequency corresponding to Ts). The operating principles and closed-loop controller design are analyzed and verified by simulation and experiments. Compared with the existing PWM strategies, the improved PWM (IPWM) strategy demonstrates higher efficiency under full operation range of low voltage gain (1.27-2) application. However, with the IPWM strategy, the inductor current and capacitor voltage contain six-time-line-frequency ripples, which consequently require large size of the passive components when the output frequency is very low. Thus, it is also suitable for 400–800-Hz medium frequency aircraft and vessel power supply system due to a relatively high output line frequency. Furthermore, the idea of IPWM strategy can be extended to other kinds of three-phase impedance network-based inverters. [ABSTRACT FROM PUBLISHER]

DC–DC converters with voltage boost capability are widely used in a large number of power conversion applications, from fraction-of-volt to tens of thousands of volts at power levels from milliwatts to megawatts. The literature has reported on various voltage-boosting techniques, in which fundamental energy storing elements (inductors and capacitors) and/or transformers in conjunction with switch(es) and diode(s) are utilized in the circuit. These techniques include switched capacitor (charge pump), voltage multiplier, switched inductor/voltage lift, magnetic coupling, and multistage/-level, and each has its own merits and demerits depending on application, in terms of cost, complexity, power density, reliability, and efficiency. To meet the growing demand for such applications, new power converter topologies that use the above voltage-boosting techniques, as well as some active and passive components, are continuously being proposed. The permutations and combinations of the various voltage-boosting techniques with additional components in a circuit allow for numerous new topologies and configurations, which are often confusing and difficult to follow. Therefore, to present a clear picture on the general law and framework of the development of next-generation step-up dc–dc converters, this paper aims to comprehensively review and classify various step-up dc–dc converters based on their characteristics and voltage-boosting techniques. In addition, the advantages and disadvantages of these voltage-boosting techniques and associated converters are discussed in detail. Finally, broad applications of dc–dc converters are presented and summarized with comparative study of different voltage-boosting techniques. [ABSTRACT FROM AUTHOR]

The objective of this paper is to propose an efficiency model to evaluate the impact of the pulse width modulation (PWM) duty cycle jitter on the efficiency of switching-mode power converter. By taking the product of two perturbation terms into consideration, which is ignored in the conventional average small-signal model, the average efficiency model is proposed first. Due to the nonlinear characteristic of the PWM generator, the multifrequency efficiency model is also developed by considering the sideband frequency. Three different perturbation waves are induced to the control loop of the converter to generate the jitter to observe its impact on the efficiency. The mathematical expression of the efficiency drop based on the proposed multifrequency model is derived. The reason of control-to-output gain's magnitude spike on the Bode plot can be explained by the derived equations. Eventually, the methods to reduce the efficiency drop caused by the jitter are suggested. In spite of various perturbation frequencies, amplitudes, and waveforms, the mathematical calculation, the computer simulation, and the hardware measurement of the efficiency drop are consistent which validate the accuracy of the proposed multifrequency efficiency model. [ABSTRACT FROM AUTHOR]

Power systems for exploration rovers tend to be complex as three separate converters are necessary; in addition to a main dc–dc converter and cell equalizer for rechargeable energy storage cells, an equalizer for photovoltaic (PV) modules is desirably equipped in order to preclude negative impacts of partial shading. This paper proposes the pulse width modulation (PWM) converter integrating voltage equalizers for PV modules and energy storage cells. The proposed integrated converter comprises a switched capacitor converter, PWM buck converter, and series-resonant voltage multiplier that perform PV equalization, power conversion from the PV modules to the load, and cell equalization, respectively. Three converters can be integrated into a single unit with reducing the total switch counts, achieving not only system-level but also circuit-level simplifications. The derivation procedure of the integrated converter is explained, followed by the operation analysis. Experimental tests were performed using series-connected supercapacitor (SC) modules and solar array simulators to emulate a partial shading condition. With the integrated converter, the extractable maximum power from the PV modules significantly increased while voltage imbalance of SC modules was adequately eliminated, demonstrating the integrated performance of the proposed converter. [ABSTRACT FROM AUTHOR]

Dynamic voltage restorer (DVR) technology has become a mature power quality product. In high-power applications, DVR using a multilevel converter is commonly used. However, DVR using a multilevel direct pulse width modulation (PWM) ac–ac converter has not been well studied. This paper presents a new DVR topology using a cascaded multilevel direct PWM ac–ac converter. In the proposed scheme, the unit cell of the multilevel converter consists of a single-phase PWM ac-ac converter using switching cell structure with coupled inductors. Therefore, the multilevel converter can be short- and open-circuited without damaging the switching devices. Neither lossy RC snubber nor a dedicated soft commutation strategy is required in the proposed DVR. This improves the reliability of the DVR system. The output voltage levels of the multilevel converter increase with the number of cascaded unit cells, and a high ac output voltage is obtained by using low-voltage-rating switching devices. Furthermore, a phase-shifted PWM technique is applied to significantly reduce the size of the output filter inductor. A 1-kW prototype of single-phase DVR is developed, and its performance is experimentally verified. Finally, the simulation results are shown for a three-phase DVR system. [ABSTRACT FROM AUTHOR]

This paper proposes a current-fed isolated bidirectional dc–dc converter (CF-IBDC) that has the advantages of wide input voltage range, low input current ripple, low conduction losses, and soft switching over the full operating range. Compared with conventional CF-IBDCs, the voltage spikes of the low-voltage (LV) side switches in the proposed converter can be eliminated without additional clamp circuits. The converter adopts the pulse width modulation plus hybrid phase-shift control scheme such that the bus voltage can match the output voltage by means of the transformer. Thus, the current stresses and conduction losses of the converter become lower. In addition, the practical zero voltage switching (ZVS) of the secondary-side switches can be realized by adjusting the phase-shift angle within the secondary side when in light load or no load condition. The operating principles and characteristics including the power transfer, root-mean-square (RMS) current, and soft switching are investigated in detail. Then the design guidelines of inductors are also given. Finally an experimental prototype with 30–60 V input and 400 V/2.5 An output is built to verify the correctness of theoretical analyses. [ABSTRACT FROM PUBLISHER]

In signal injection sensorless drives, the injection voltage cannot be reduced under a certain value. The lower limit of the injection voltage is mainly enforced by the inverter nonlinearity that causes distortion of the injection voltage and degradation of the position estimation performance. After analyzing the inverter nonlinearity during the voltage injection, it is revealed that parasitic capacitances of insulated-gate bipolar transistors have positive effects on inverter output linearity and sensorless control. Based on this analysis, this paper proposes a method to reduce the injection voltage by connecting additional capacitors to the output terminals of the inverter. Simulation and experimental results are provided to verify the effectiveness of the proposed idea. In the experiments, using the capacitor-integrated inverter, it is shown that the injection voltage can be reduced by more than half without degrading the position estimation performance. [ABSTRACT FROM AUTHOR]

Loss reduction in converters is one of main targets in power electronics to obtain higher efficiency and lower thermal stress, which can enhance the lifetime of devices. This paper presents a variable switching frequency technique for switching loss reduction in a three-phase voltage source inverter, obtaining similar output current quality as that of a space vector pulse width modulation (SVPWM) algorithm. This type of optimization has not been applied for a three-phase system before. Simulation and experimental results are also shown. The output current ripple rms value of three-phase SVPWM is used as the optimization constraint. Results of the optimization of the switching losses with quality constraints in the switching frequency as the variable are presented for different load angles and compared with classical SVPWM. Experimental results show that this technique can save up to nearly $19\%$ in switching losses with similar total harmonic distortion of the output current, concluding that converter losses are reduced without reducing output current quality. [ABSTRACT FROM AUTHOR]

This paper presents a model predictive switching pattern control (MPSPC) for a current-source converter (CSC), which achieves superb low-order harmonics elimination performance in steady state and improved transient responses. Based on a proposed space-vector-based selective harmonic elimination (SHE) method and prediction of load current at the next sampling instant, MPSPC prefers to following a precalculated SHE-pulse width modulation (PWM) pattern in steady state, and governing the CSC through a model predictive control (MPC) approach during transients. In comparison with existing schemes, the advantages of MPSPC are threefold: First, quantization error, introduced by a constant sampling frequency in MPC and degrading steady-state low-order harmonic elimination, is mitigated in the proposed scheme. Second, there is no weighting factor in the cost function, as used in existing schemes. Finally, MPSPC is totally realized based on one-step prediction, which simplifies the structure of the scheme. Both simulation and experimental results verify the steady state and dynamic performance of MPSPC with different SHE-PWM patterns. [ABSTRACT FROM AUTHOR]

With the rapid development of modern electrified railway, negative-sequence current minimization is one of the most important considerations in the high-speed railway traction system. In the past, many multiple or multilevel topologies with high compensation capacity have been introduced for railway power conditioner (RPC). This paper presents a simplified quantitative comparison of five previous modular RPC topologies for negative sequence compensation in V/V and SCOTT traction systems, aiming for an optimal selection of the compensators. Performance criteria such as transformer requirement, voltage stress and current stress of a power switch, numbers of the power switches and capacitor are derived by analytical methods. Moreover, the numerical comparison of operating controllers is completed for modular RPCs. In addition, power losses of five modular RPCs are obtained by theoretical analysis, IPOSIM calculation as well as PSIM simulation. These calculations are validated via simulations results in PSIM. The main conclusion is that presented modular RPCs can be divided into general purpose RPC and special purpose RPC in terms of the behavior and efficiency. It is helpful to choose the appropriate topology for specific applications. [ABSTRACT FROM AUTHOR]

A new zero-sequence circulating current (ZSCC) reduction method for multimodule voltage source inverters (MVSIs) consisting of P three-phase inverters that are connected in parallel is proposed in this paper. Four-switch inverter modules are used instead of the conventional six-switch modules to reduce the cost. In this paper, the effectiveness of the proposed ZSCC reduction method is studied using selective harmonic elimination pulse width modulation. The proposed ZSCC reduction method can remove about P times the number of harmonics using the same switching frequency as compared to more conventional methods, as explained later in this paper. The concepts discussed in the paper are confirmed with results obtained from an MVSI experimental prototype. [ABSTRACT FROM AUTHOR]

A new soft-switching pulse-width-modulated (PWM) full-bridge converter is proposed in this paper. The proposed converter has zero voltage switching (ZVS) in all its switches with fewer conduction losses than other ZVS-PWM full-bridge converters, due to a novel auxiliary circuit scheme. In this paper, the operation of the new converter is explained and analyzed, a design procedure is presented and demonstrated with an example, and experimental results that confirm the feasibility of the converter are also presented. [ABSTRACT FROM AUTHOR]

Distributed energy resources (DERs) are expected to provide ancillary functions including reactive power generation and harmonics compensation. Meanwhile, multilevel inverters and two-level converters with optimal pulsewidth modulation (OPWM) will be commonly used for DERs at high power levels. The challenge is to realize harmonic compensation with limited switching angles. This paper presents an online solution to realize the selective harmonics compensation (SHC), and power generation with DERs. For harmonics compensation, the selective harmonic components in the load current are detected. Then, the harmonic voltages are provided with DERs to cancel out these detected components. Since the power converter is requested to realize both harmonics filtering and power generation, limitations on harmonics compensation at the given power are discussed. Power hardware-in-the-loop-based online verifications are shown at the end of the paper. [ABSTRACT FROM AUTHOR]

The imbalance in the currents of strings of LEDs will cause fast degradation or even failure in some LEDs. Such current imbalance should be avoided. To balance the common average current, a small duty cycle may necessitate a large LED turn-on current amplitude, which may cause temporal overheat and low luminous efficacy of the LEDs. This paper presents a current balancing method based on pulse-width modulation of a common bus voltage to each LED string to achieve the intended average current. An optimal feedback control scheme is proposed to maximize the duty cycles and minimize the bus voltage. As a result, at least one of the LED strings is operating at unity duty cycle. The analysis, implementation, and verification are detailed in this paper. [ABSTRACT FROM AUTHOR]

A comprehensive method of electromagnetic emission interference (EMI) reduction in dc/ac inverters through periodic dithering of the pulse-width modulated (PWM) switching frequency is presented in this paper. The periodic dithering is the process of changing the switching frequency of the PWM signal that drives the switches of the power electronics inverter. The effects of the various parameters involved in the PWM dithering process have been analyzed in this paper. The important parameters involved in the dithering process are the frequency range used for dithering, the periodic time of the dithering signal, and the phase of the dithering signal. The effect of each of these parameters has been studied to determine their values that minimize the EMI. Additionally, analytical expressions for theoretical prediction of the EMI levels at different frequencies have been derived for performance analysis during the design stage. The theoretical predictions for the dithering signals have been found to accurately correlate with both the simulation and experimental results. [ABSTRACT FROM AUTHOR]

The five-level active neutral-point-clamped (5L-ANPC) converter has been widely studied for its excellent performance in high-power medium-voltage applications. This paper analyzes the space vector pulse width modulation (SVPWM) strategy of the 5L-ANPC converter in the virtual coordinate, and presents an optimized control strategy which can balance the neutral point (NP) voltage and avoid the dead-time effects for the first time. In this strategy, on one hand, the 125 space vectors are combined by 96 triangles in the seven-segment vector synthesis method, then the triangles are divided into seven categories which have different characteristics of balancing the NP voltage, and every category has its own principles to choose the vector sequence and compute the vector durations. On the other hand, the dead-time effects of the 5L-ANPC converter are studied in detail and the transitions between different switching states are constrained in the optimized control strategy to avoid the dead-time effects that cannot be compensated by traditional pulse-based dead-time compensation methods. Finally, the optimized SVPWM strategy is experimentally verified in this paper. [ABSTRACT FROM AUTHOR]

PWM techniques for a full-bridge dc/dc converter are investigated and a new random PWM technique is proposed in this paper. Three PWM techniques with constant switching frequency are discussed and the related random PWM techniques which spread the harmonic clusters and give constant average inductor current to reduce the output voltage ripple are discussed. The pros and cons of three constant switching frequency PWM techniques and the related random counterparts are investigated. Experimental results show that there is a significant efficiency drop of the random PWM technique due to significant increase of switching counts. Therefore, this paper presents a new random PWM technique to significantly reduce the harmonic intensity while not causing relevant impact on the efficiency. An FPGA-based digital-controlled isolated full-bridge dc/dc converter prototype is built to verify the performance of conventional and proposed PWM techniques. The specifications of the converter include the following: input voltage = 400 V, output voltage = 12 V, output power = 528 W, and switching frequency = 100 kHz. Measured efficiency and harmonic spread factor will be used for the evaluation of these PWM techniques. [ABSTRACT FROM AUTHOR]

Multilevel inverters with hexagonal and dodecagonal voltage space vector structures have improved harmonic profile compared to two-level inverters. Further improvement in the quality of the waveform is possible using multilevel octadecagonal (18-sided polygon) voltage space vectors. This paper proposes an inverter circuit topology capable of generating multilevel octadecagonal voltage space vectors, by cascading two asymmetric three-level inverters. By the proper selection of dc-link voltages and the resultant switching states for the inverters, voltage space vectors, whose tips lie on three concentric octadecagons, are obtained. The advantages of octadecagonal voltage space vector-based pulsewidth modulation (PWM) techniques are the complete elimination of fifth, seventh, eleventh, and thirteenth harmonics in phase voltages and the extension of linear modulation range. In this paper, a simple PWM timing calculation method is also proposed. Experimental results have been presented in this paper to validate the proposed concept. [ABSTRACT FROM PUBLISHER]