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In this paper, a new structure of nonisolated boost dc–dc converters based on voltage-lift technique is proposed. In comparison with conventional nonisolated boost dc–dc converters, the proposed converter generates higher voltage gain. In this paper, the relations between voltage and current of all elements in continuous conduction mode and discontinuous conduction mode are calculated as well as voltage gain in each mode. Then, the critical inductance and stress of switch current are extracted. Finally, the validity of given theories is examined by using the experimental results. [ABSTRACT FROM PUBLISHER]

In order to increase the efficiency of modern microprocessors power supplies used in data centers, the 48-V dc distribution bus is gaining growing attention. For such applications, voltage regulation modules (VRMs) are currently obtained using two-stage conversion systems with an intermediate 12-V dc bus. This paper presents an innovative single-stage approach for the 48-V VRM based on a quasi-resonant constant on-time (COT) operation. The proposed topology inherently integrates the multiphase approach, providing fast phase shedding and flat high-efficiency curves even at light load conditions. This is a unique advantage, usually not available in the two-stage approach, that is very important in server architectures, where high efficiency is required even at light load conditions. The paper analyses the circuit topology, and proposes a control architecture for fast transient response, including the current sharing capabilities, and a solution for implementing the integrated magnetics. The digital controller has been implemented in 0.16-$\mu$ m lithography together with a digital pulse-width-modulation with a 195 ps resolution, and a 40 MS/s, 7-bit ADC. Experimental results show an efficiency of 93.1% for a 250 A, 1.8 V VRM, and of 93.2% for a 102 A, 1.2-V double data rate (DDR) power supply. [ABSTRACT FROM PUBLISHER]

This paper proposes a single-phase power factor correction (PFC) rectifier to achieve high power factor, wide output voltage range, and ripple power decoupling without using electrolytic capacitors. It consists of two parts: PFC circuit and output voltage regulation circuit. The load side is involved in both parts, which is different from the regular two-stage conversion structure. The proposed rectifier can be directly applied to low voltage cases due to the wide output voltage range. And the decoupling capacitor voltage can be smaller than the peak grid voltage, which reduces the voltage stress. Besides, the low-frequency ripple power buffer is implemented without a dedicated power-buffering controller. This paper first introduces the circuit structure, operation principles, and control method. Then, the system design consideration is given. Finally, the effectiveness of the proposed topology is verified by the simulations and experimental results. [ABSTRACT FROM AUTHOR]

This paper presents the tradeoff study of heat sink and output filter volume of a GaN HEMT based single-phase inverter. The selected topology is three-level active neutral point clamped (ANPC) inverter, and the main aim is to explore the benefits of the GaN HEMTs at 600 V blocking class on the system level efficiency, and power density under the wide range of operating conditions. The paper starts by introducing the inverter topology, selected pulse width modulation scheme and followed by the device features, static, and dynamic characterization and continues with presenting and discussing the results of extensive experimental and analytical characterization. After this, the impact of GaN HEMTs on inverter volume is discussed in terms of heat sink and output filter volume analysis under different switching frequency and heat sink temperature conditions. The calculation of heat sink volume and single stage LC output filter volume are presented with respect to experimental results of the single phase prototype. The findings from static, dynamic characterization, and single phase prototype results clearly show that GaN HEMT has excellent switching performance under wide load current and heat sink temperature conditions. The high performance of the inverter leads to reduction of the combined total volume, including output filter and heat sink volume. [ABSTRACT FROM AUTHOR]

A switched-capacitor-based dual-switch dc–dc converter with a high-boost voltage gain is proposed in this paper. The proposed converter can obtain a high-voltage gain with a small duty cycle, which decreases the voltage stress and the conduction loss on the power switches. This paper presents the key waveforms, the operating principles at the continuous conduction mode and the discontinuous conduction mode, and the parameter design. Moreover, a comparison between the proposed converter and other nonisolated converters has been completed. To verify the operating principle, a 200 W prototype is constructed with an input voltage of 25–50 V and an output voltage of 200 V. The simulation and experimental results are shown. [ABSTRACT FROM PUBLISHER]

This paper presents a novel six-pulse low-frequency (LF) fluctuating high-voltage dc-bus-based power system architecture for fuel cell vehicles (FCVs) application. A novel hybrid modulation scheme consisting of six-pulse modulation at LF scale and modified secondary modulation and 33% pulse width modulation at high-frequency (HF) scale is proposed. Three-phase ac waveforms for the propulsion system of FCVs are generated from LF fluctuating high-voltage dc bus. The proposed modulation technique significantly reduces the switching losses of the bidirectional dual-stage inverter: 1) soft-switching of both sides of the front-end current-fed full-bridge converter is realized; and 2) at any moment, only one leg of back-end three-phase inverter is switched at HF, while the other two legs are kept in on or off states. This tremendously reduces the bidirectional inverter's switching losses and improves the system efficiency. The LF fluctuating high-voltage dc bus allows the elimination of large electrolytic dc-link capacitor, which contributes to a more reliable and compact design. This paper presents the operation, analysis, and design of a bidirectional inverter implementing the proposed hybrid modulation technique. Simulation results obtained from power electronics simulation software PSIM and experimental results from the lab prototype clearly validate the effectiveness of the proposed modulation technique. [ABSTRACT FROM PUBLISHER]

The three phases of brushless dc motor (BLDCM) are involved in energy conversion during the commutation interval. A novel commutation analysis method of the BLDCM based on coordinate transformation theory is proposed in this paper, though this coordinate transformation theory is popular in the control of three-phase sinusoidal motors, such as induction motors and permanent magnet synchronous motors. The method is intuitive and easy to understand compared with the method based on circuit solving. Combined with the voltage vector diagram of the inverter, commutation control to reduce commutation torque ripple under low speed (LS_RCTR) and high speed (HS_RCTR) is deduced. However, under a heavy load and high-speed condition, long commutation time may result in commutation failure if these commutation controls to RCTR is adopted. To avoid that, commutation time must be controlled. Then, commutation control to reduce commutation time under low-speed (LS_RCT) and high-speed (two cases, named HS_RCT1 and HS_RCT2) are proposed. The improved control of BLDCM presented in this paper can coordinate commutation torque ripple and commutation time in full speed range. Finally, the feasibility and effectiveness of these methods are verified by experiment. [ABSTRACT FROM PUBLISHER]

This paper proposes a new bidirectional resonant dc–dc converter suitable for wide voltage gain range applications (e.g., energy storage systems). The proposed converter overcomes the narrow voltage gain range of conventional resonant dc–dc converters, and meanwhile achieves high efficiency throughout the wide range of operation voltage. It is achieved by configuring a full-bridge mode and a half-bridge mode operation during each switching cycle. A fixed-frequency phase-shift control scheme is proposed and the normalized voltage gain can be always from 0.5 to 1, regardless of the load. The transformer root-mean-square (rms) currents in both the forward and reverse power flow directions have a small variation with respect to the voltage gain, which is beneficial to the conduction losses reduction throughout a wide voltage range. Moreover, the power devices are soft-switched for minimum switching losses. The operation principles and characteristics of the proposed converter are firstly analyzed in this paper. Then the analytical solutions for the voltage gain, soft-switching, and rms currents are derived, which facilitates the parameters design and optimization. Finally, the proposed topology and analysis are verified with experimental results obtained from a 1-kW converter prototype. [ABSTRACT FROM PUBLISHER]

At 13.56 MHz, the circuit parasitic elements strongly affect the stability, performance, and efficiency of the inverter. In this paper, the effect of parasitic elements in the 13.56-MHz half-bridge inverter is analyzed in detail based on the point of view of the high-frequency ringing in the circuit. A proposed inverter design that aims to attenuate the influence of the parasitic elements is presented, including optimized printed circuit board (PCB) design and ringing damping design. The simulation and experiment results show that the proposed PCB design not only reduces the parasitic inductance in the ringing loop but also improves the stability of the inverter by avoiding the subresonant at low frequency and reducing the radiation electromagnetic interference noise. This paper also points out that the ringing current exists in the circuit even with the proposed optimized PCB design lead to the instability of the inverter at high voltage operating condition. The proposed damping circuit significantly suppresses the ringing in the circuit and improves the stability as well as the efficiency of the inverter. The experiment results confirm that by using the proposed design, the half-bridge inverter module using Silicon mosfet is stable at 13.56-MHz switching frequency and its efficiency obtains \text93.1\% at 1.2-kW output power. [ABSTRACT FROM PUBLISHER]

Common-mode voltage output is closely associated with switching states in three-phase three-wire neutral point clamped converter. Detailed analysis shows avoiding redundant states can effectively improve the common-mode voltage, so this paper proposes a pulse width modulation (PWM) technique with zero redundant state to reduce the common-mode voltage output, and evaluates their performance with the conventional PWM schemes. This paper also takes the compensation of neutral point potential deviation into consideration. Laboratory test results are presented to verify the effectiveness of the proposed scheme. [ABSTRACT FROM PUBLISHER]

This paper proposes an active switching harmonic current reduction method within the dc-link capacitor of two-level, three-phase, back-to-back converters. This method is based on the derived analytical solution for switching harmonic currents in the dc-link. It is shown that by controlling the pulse width modulation carrier waveform's phase angles, the harmonics in the second carrier band of the rectifier and the inverter can be synchronized such that cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. The feasibility of the proposed approach has been verified experimentally and results are presented in this paper. [ABSTRACT FROM PUBLISHER]

The modeling and control of a buck–boost and stacked dual half-bridge (DHB) integrated bidirectional dc–dc converter have been studied in this paper. This converter features high-voltage transfer ratio, high efficiency, and the minimum number of switches. In this paper, an extended, continuous, full-order, state-space averaging modeling method is proposed. Compared with existing methods, the proposed method exhibits higher coincidence with the switching circuit simulation, in steady and especially dynamic states. Due to its high dynamic accuracy and low complexity, the proposed modeling method provides a better theoretical analysis and a fast simulation tool for transient process and control design of converters with dual-active-bridge units, especially with DHB units. By using this method, the high-frequency transformer series inductance current is directly divided into a sampled dc component and a fluctuant component. Only the sampled dc one is included into state variables, but both components are considered into state equations. Besides, this method regards the entire converter as a linear superposition of its subsections, which provides a stepwise modeling based on linearization of subsections. Moreover, a decoupled proportional-integral control method is proposed to enhance the stability and dynamic response of the converter. This control method is analyzed by the proposed models, which can be regarded as an application of the proposed modeling method. Simulation and experiments have validated both the proposed modeling and the decoupled control strategy. [ABSTRACT FROM PUBLISHER]

This paper proposes a current sensorless control strategy for the dual active bridge (DAB) converter with nonlinear disturbance observer (NDO)-based load current feedforward. The proposed method can regulate both the dc-bus voltage and the current of the DAB converter without current sensors. Several performance indexes are established for the parameter design and a detailed design method is presented in this paper. When a single-phase H-bridge inverter is connected, the double-frequency oscillation from the feedback path is suppressed by proper parameter design, while the transient response of dc-bus voltage can be further improved by the NDO-based load current feedforward with a notch filter in the feedforward path. The performance of the proposed control method and the effectiveness of the parameter design are verified in a prototype by experimental results. [ABSTRACT FROM PUBLISHER]

This paper presents a hybrid nonisolated dc–dc commutation cell, which is generated by the integration between conventional commutation cell and ladder-type passive switched capacitor (SC) cell. From the resulted hybrid cell are derived three different dc–dc converters: a buck-type, a boost-type, and a buck–boost-type. The three structures are analyzed in this paper and are presented the topological stages, static gain characteristics in continuous conduction mode and discontinuous conduction mode, steady-state analysis. The analyses are generalized in relation to the number of switched-capacitor cells employed, which allows the increase of the rated gain of the converters by adding more SC cells. In addition, the proposed hybrid nonisolated dc–dc commutation divides naturally the voltage stress among the semiconductors and capacitors of the power stage. A 1-kW prototype was developed to verify the operation of the three proposed converters and their theoretical analysis. For the buck-type topology, designed with an input voltage of 600 V and output voltage of 450 V, a peak efficiency of 99.2% and efficiency at rated power of 99% were obtained. [ABSTRACT FROM PUBLISHER]

Sheppard–Taylor power factor correction (ST-PFC) rectifier could obtain a high power factor due to its capability of overcoming the control detuning issue. However, it needs a bulky electrolytic capacitor at the load side to buffer the double-frequency ripple power (DFRP), which reduces the reliability and power density significantly. This paper proposes a control method to divert the DFRP to the small energy transfer capacitor. Consequently, the bulky electrolytic capacitor is replaced with a small film capacitor. The proposed method is carried out by introducing the freewheel state (one switch is turned on and the other is turned off) into the control. So no extra hardware is added, which makes the proposed method cost-effective. A low electromagnetic interference emission is also achieved due to the continuous input–output currents. In addition, the proposed method can be extended to other topologies easily. This paper first gives the detailed analysis of the proposed control method, and then introduces the controller design. The selection of the passive components is also briefly discussed. Finally, the simulation and experimental results verify the effectiveness of the proposed control method. [ABSTRACT FROM AUTHOR]

These days, constant on-time current mode (COTCM) control scheme is widely used in the voltage regulator (VR) controllers because it has a higher light-load efficiency and a higher BW design capability while maintaining a simpler compensation requirement. One issue plaguing the COTCM control is its slow transient response which is caused by its fixed TON operation. During the heavy-load step-up transient, the duty cycle becomes saturated and the inductor current increment becomes limited by TON and the minimum off time (TOFF$\_$ MIN) ratio, which can create a large undershoot at load step up. On the other hand, in the load step-down case, if the load step down occurs at the beginning of TON, a large overshoot can be created at the output. To solve this issue, this paper presents a method designed to increase the TON at load step up and then very quickly, decrease at load step down in order to reduce the undershoot and overshoot at output or otherwise save the output capacitor. In this proposed method, the increase or decrease of T ON is proportional to the output change which eliminates the chance of any overcorrection or ring-back problem unlike the methods presented in prior forums. This feature enables the control to work seamlessly in a high-frequency load repetitive case in VR applications. Since this TON change occurs only in the transient period when duty cycle is saturated, it does not affect the small-signal property of the COT control. Moreover, the proposed methods are very much compatible with the state-of-the-art single and multiphase COT control structures. Simulation and test results in both single and multiphase operations are also presented in the paper to verify the proposed concept. [ABSTRACT FROM PUBLISHER]

SiC mosfet has low on-state resistance and can work on high switching frequency, high voltage, and some other tough conditions with less temperature drift, which could provide the significant improvement of power density in power converters. However, for the bridge circuit in an actual converter, high dv/dt during fast switching transient of one mosfet will amplify the negative influence of parasitic components and produce the significant negative voltage spikes on the complementary mosfet, which will threaten its safe operation. This paper proposes a new gate driver circuit for SiC mosfet to attenuate the negative voltage spikes in a bridge circuit. The proposed gate driver adopts a simple voltage dividing circuit to generate a negative gate-source voltage as traditional and a passive triggered transistor with a series-connected capacitor to suppress the negative voltage spikes, which could satisfy the stringent requirements of fast switching SiC mosfets under the high dc voltage condition with low cost and less complexity. An analysis is presented in this paper based on the simulation and experimental results with the performance comparison evaluated. [ABSTRACT FROM AUTHOR]

A novel soft-switching interleaved coupled-inductor boost converter is proposed in this paper. Only a single active soft-switching module is needed to simultaneously achieve the soft-switching property of the two switches in the interleaved coupled-inductor boost converter. The better efficiency is achieved with the less components and cost. The two main switches can achieve the ZVT turn-on and smaller-current turn-off simultaneously when the single active soft-switching module is active. Due to the coupling characteristic of the inductors, the voltages across the two inductors are changed at the same time; therefore, the equivalent circuit is equal to the parasitic capacitors of the two main switches in parallel to resonate with the auxiliary inductor. By coupling two input inductors, the volume and cost of the circuit can be reduced. The interleaved coupled-inductor topology can also reduce the input and output current ripples and share the input and output currents. The operating modes, analysis, and design of the proposed circuit have been discussed in this paper. Simulation and experiments are finally conducted to verify the validity of the proposed circuit. [ABSTRACT FROM PUBLISHER]

DC electric springs (DCES) are emerging technologies for the (i) regulation of mains voltage against the intermittent renewable generations and (ii) harmonic cancellation in dc microgrids. When conventional converter topologies (e.g., half-bridge or full-bridge converter) are adopted as DCES, the battery storage of the DCES has to process both the dc power and the ac harmonic power. The pulsating ac power can severely reduce the lifetime of the battery. To address this issue, a hybrid-DCES (H-DCES) is proposed in this paper to perform (i) and (ii) in a decoupled manner. With a modified topology and control method, the H-DCES can divert the ac current to the ground and retains the function of manipulating noncritical load for dc voltage regulation. The immediate benefits of this H-DCES are the reduction of storage capacity and a prolonged lifetime of the battery. Both the operating principle and the mathematical model of the proposed H-DCES are analyzed in this paper. A prototype of the H-DCES is practically tested in a 48-V dc grid. The experimental results show that the H-DCES can realize the decoupled operation of dc voltage regulation and harmonic cancellation. Simulation studies further demonstrate that the H-DCES requires less storage capacity than its counterparts. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) with nearest level modulation (NLM) is widely used in the high voltage applications for low switching frequency and easy implementation. Existing literature has not provided a complete submodule (SM) fault ride-through scheme for MMC with NLM. In this paper, a strategy including fault detection, localization, redundancy, and recovery is proposed to ensure continuous operation of MMC under IGBT open-circuit faults conditions. It only requires a few hardware and software resources. The features of MMC and SMs with three types of failures are studied, respectively. Based on these, the fault detection method is proposed by using a simple hardware circuit, thus high computation complexity is avoided. Since current fault localization schemes are limited to MMC with carrier phase shifted pulse width modulation, this paper further proposes a strategy for MMC with NLM to locate the faulty SM and identify the fault type. After this, the fault redundancy and the proposed fault recovery method are applied to eliminate the fault and then exit the failure state. Therefore, the ability of SM fault ride-through can be realized. Analysis of failure characteristics are verified in simulation. Experimental results based on a single-phase MMC prototype with 11 SMs per arm are presented to demonstrate the validity of the proposed fault ride-through strategy. [ABSTRACT FROM AUTHOR]

In this paper, direct torque control (DTC) of five-phase induction motor (FPIM) is implemented using three-level neutral point clamped (TL-NPC) inverter. One of the advantages of three-level inverter over two-level one for DTC operation is the low torque ripple. Also TL-NPC inverter through space vector modulation technique gives low $ dv/dt$ transition with better voltage waveform. By applying conventional lookup table for DTC, the TL-NPC inverter does not ensures lower $dv/dt$ transition. In this paper, a novel switching scheme for DTC of FPIM using TL-NPC inverter is proposed that ensures the low $ dv/dt$ transition and balancing of dc-link capacitor voltages of TL-NPC inverter. To form the lookup table for DTC operation, instead of using voltage vectors directly, virtual vectors (VVs) are utilized. Two switching states are used in one sample time to generate a VV in $\alpha \beta$ plane, which gives zero resultant voltage in $ xy$ plane. The switching strategy ensures low number of transitions to reduce the switching losses. The switching state redundancies are used in a novel way to balance the dc-link capacitor voltages without using any additional hardware. The proposed technique to balance the dc-link capacitor voltage gives lower switching frequency. The MATLAB/Simulink environment is used for the simulation and the results are validated through experiments. [ABSTRACT FROM AUTHOR]

This paper presents a new feed-forward strategy for suppressing low-order harmonic circulating currents in pulsewidth-modulated (PWM) based modular multilevel converters (MMCs). The approach is based on the new average model approach established in this paper, which identifies cross-coupling interactions between the system-level and submodule elements using decomposed dependent sources. As well as improving the damping of the system, the major advantage of this approach is that it maintains the natural DC bus balance property of a PWM modulated MMC by considering the upper and lower arms together (unlike existing feed-forward schemes which treat each MMC arm independently). Moreover, unlike existing direct control resonant strategies, which require careful gain tuning and are highly dependent on the ac system frequency, the proposed approach achieves wideband circulating current ripple suppression without requiring knowledge of the circulating current harmonic frequencies and needs only a simple proportional–integral (PI) controller to regulate the circulating current dc component for power balance. This makes it particularly suitable for use in multifrequency or variable-frequency ac systems. Extensive simulation and matching experimental results, including steady-state and transient responses compared against existing circulating current suppression approaches, validate the effectiveness and benefits of this new feed-forward compensation technique. [ABSTRACT FROM PUBLISHER]

The performance of modular multilevel converters (MMCs) in medium-voltage applications, where the number of required submodules is not high, can be improved utilizing low switching frequency modulations such as (2N+1) selective harmonic elimination-pulse width modulation (SHE-PWM), which provides tight control of lower order harmonics and low switching losses. This paper proposes a calculation method, which is based on a novel formulation, to solve the SHE-PWM problem. In particular, MMCs with (2N+1) phase output voltage levels are considered, obtaining a (2N+1) SHE-PWM waveform. This method utilizes a unique system of equations that is valid for any possible waveform. Therefore, it is able to calculate simultaneously, without predefined waveforms, both the switching patterns and the associated firing angles that solve the (2N+1) SHE-PWM problem. Consequently, the search process is simplified and optimized. Furthermore, this paper also proposes a circulating current control technique, which can be applied along with (2N+1) SHE-PWM without disturbing the phase output voltage. Simulation results and experimental tests obtained with a single-phase laboratory prototype prove the validity of the novel (2N+1) SHE-PWM implementation method and the proposed circulating current control technique. [ABSTRACT FROM PUBLISHER]

This paper presents a hybrid seven-level converter based on T-type converter and H-bridge cascaded suitable for low-voltage and high-power-density applications. The operation principles and conduction paths are analyzed comprehensively. Voltage balance control of the floating capacitors is the key point of this paper. Mathematical expressions of capacitor voltage balance conditions are deduced based on sinusoidal pulse width modulation (SPWM). The results show that floating capacitor voltages are only balanced when the modulation index is below 0.82 under SPWM. In order to enlarge the modulation index ensuring the capacitor voltage balance, space vector modulation (SVM) is also applied to regulate floating capacitor voltages taking advantage of redundant switching vectors. Meanwhile, in SVM, there are no additional control requirements for the capacitor voltage. Taken both SPWM and SVM into consideration, the limit to the range of operation for this seven-level converter is presented, which is a function of the modulation index and the power factor. The merit of dc voltage utilization improvement in this topology is also analyzed based on simulation results. Simulations and experimental results under different modulation index and RL load are presented to verify the modulation strategies illustrated in this paper. [ABSTRACT FROM PUBLISHER]

Switching harmonic attenuation has always been challenging for inverters used in high-power conversion applications, where ratio of switching to fundamental frequency is low. Addition of multiple LC-trap filters is no doubt a feasible cost-effective method, which has increasingly been used, but generally susceptible to filter parameter variations and harmonic resonances. This paper hence presents an alternative active trap filter (ATF), based on a series-LC-filtered inverter, for attenuating switching harmonics in a flexible, while yet not cost burdensome, approach. A direct impedance synthesis method has also been proposed for the ATF to better enforce its active switching harmonic bypassing ability. Compared with conventional schemes for controlling active power filters, the proposed method is more readily implemented, since it requires neither current reference generation nor high-bandwidth current control loop. Moreover, the use of a series LC filter at its ac side helps the ATF to reduce its inverter voltage and power ratings. Compensated frequency range of the ATF can hence be enlarged by using a comparably higher switching frequency and a proper step-by-step design procedure to be presented in this paper. Simulation and experimental results have confirmed the design procedures, and hence expected performance of the ATF. [ABSTRACT FROM PUBLISHER]

In this paper, a new zero voltage zero current transition (ZVZCT) boost DC–DC converter using a coupled inductor is proposed. This topology provides the main switch ZVZCT for the turn-on and zero voltage switching (ZVS) for the turn-off. Moreover, the auxiliary switch turns on at zero current switching (ZCS) and turns off at ZVS. The main diode turns on with ZVT and turns off with ZCS, and other diodes also operate under soft-switching conditions. Besides, due to the coupling effect, the proposed converter improves efficiency additionally since resonant energy in the resonance tank could be transferred to the output, and the circulating current can be limited as well. The soft-switching can be realized in almost all the load rang. In this design, there always exist energy releasing circuits to conduct magnetic flux leakage currents, such that the surge currents are eliminated and switch current stress can be accordingly reduced. All the devices resonate in a unique direction within less than half of a resonance period, so power losses with respect to the resonance can be decreased. In this paper, the converter design and operation principles of the converter are given. It also has been verified by a 1-kW experimental prototype with switching frequency of 100 kHz, and the related experimental results are presented. [ABSTRACT FROM PUBLISHER]

This paper targets the reduction of common-mode voltage in an indirect matrix converter (IMC) through an intelligent space-vector-based modulation technique. This mode of control results in lower dV/dt at the motor terminals, thereby, reducing voltage stress to windings; and reduced output voltage distortion resulting in lower machine losses. The conventional indirect space vector pulse-width modulation method of controlling matrix converters involves independent control of either the rectifying stage or the inverting stage of the converter. However, in this paper, by suitable selection of space vectors, the rectifying stage of the matrix converter generates different levels of virtual dc-link voltage. Therefore, the responsibility of formulating output voltages with a particular magnitude and frequency, which can be translated to different machine speeds, has been transferred solely to the rectifying stage of the IMC. Estimation of the degree of distortion in the three-phase output voltage is another facet discussed in this paper, which aids the sizing and designing of output passive filters. The analysis of output voltage distortion and the proposed modulation strategies have been substantiated by simulations in MATLAB/Simulink and experimentally verified on a scaled down laboratory prototype. [ABSTRACT FROM AUTHOR]

An extended-duty-ratio (EDR) boost converter is studied extensively in this paper for high voltage gain applications with a wide input (and/or output) voltage range. The EDR is a unique combination of an interleaved, multiphase boost converter and switched capacitor configuration that achieves high voltage gain with significantly lower switch voltage stress and switching losses compared to conventional high-gain solutions. Most of the switches in the multiphase EDR experience only a fixed fraction of the output voltage ($1/M, 2/M$ , etc., where $M$ is the number of phases). Through extensive analysis over a wide operating range, it is shown here that the EDR boost converter has inherent current sharing among the phases only in a limited range of duty ratio— $(M-1)/M \leq D \leq 1$. As the duty ratio reduces beyond this range as required in wide input voltage applications, inherent current sharing property is lost. In this paper, techniques to ensure current sharing under all operating zones without requiring current sensors are presented. Instead of having equal duty ratio for each phase, it is adjusted for each phase according to the operating region of the converter. Extensive analysis is presented to derive the required duty ratio changes for the different phases. The proposed concept is validated with experimental results from a 250 W, 3-phase EDR boost, and GaN-based hardware prototype. [ABSTRACT FROM AUTHOR]

In this paper, a single-phase single-stage isolated zero current switched (ZCS) current-fed full-bridge ac/dc converter is proposed for IGBT-based high-power power factor correction (PFC) applications. By adding an additional commutation path and few resonant components, ZCS operation is realized for all IGBTs. The conduction loss is also lowered by the additional path. Furthermore, the control strategy for the proposed converter is compatible with that developed for traditional PFC converter. In this paper, the topology derivation and circuit operational analysis are given. The control strategy is introduced. A 3-kw prototype is developed and tested to verify the circuit functionality. Finally, the efficiency performance is investigated and comparison is made to show the advantages of the topology. [ABSTRACT FROM PUBLISHER]

This paper presents an improved direct torque control (DTC) method for an asymmetrical six-phase induction motor using a two-level six-phase inverter. As is well known, a simple extension of three-phase DTC technique to an asymmetrical six-phase motor, using large vectors only, introduces significant current harmonics of the order 6 n±1 (n = 1, 3, 5,…), which are mapped into the nonflux/torque producing (xy) plane. These harmonics cause only losses in the motor winding as they do not take part in torque production. Hence, a number of different improved DTC techniques have been developed in the past for multiphase motor drives. The paper takes one such DTC method as the starting point and improves it further by using the concept of virtual voltage vectors. Developed vector selection algorithm, based on two virtual voltage vectors, requires the information on position of the flux in the auxiliary (xy) subspace and provides stator current quality commensurate with the currently available best DTC algorithm for six-phase drives. However, use of two virtual voltage vectors enables a substantial reduction of the torque ripple, which is achieved by means of a five-level torque comparator. Extensive experimentation is performed and it is shown that the reduction of the current harmonics is in essence almost the same as in another recently developed DTC scheme, based on the use of a single virtual voltage vector. However, the achieved torque ripple reduction, which is verified experimentally, makes the scheme superior when compared to the existing approaches. At the same time, developed scheme retains qualities of conventional DTC schemes, such as simple structure and fast response. Its additional beneficial feature is the easiness of implementation. [ABSTRACT FROM PUBLISHER]

Conventional single-phase power-factor-correction (PFC) rectifiers with active power decoupling capability typically require more than three active switches in their circuits. By exploring the concept of power-buffer cell, a new single-stage PFC rectifier with two active switches, one inductor and one small power-buffering capacitor is reported in this paper. The proposed converter can achieve high-power factor, wide output voltage range, and power decoupling function without using electrolytic capacitor. Additionally, an automatic power decoupling control scheme that is simple and easy to implement is proposed in this paper. The operating principle, control method, and design considerations of the proposed rectifier are also provided. A 100-W prototype with ac input voltage of 110 Vrms and a regulated dc output voltage ranging from 30 to 100 V has been successfully designed and practically tested. The experimental results show that with only a 15 μF power-buffering film capacitor, the proposed converter can achieve an input power factor of over 0.98, peak efficiency of 93.9%, and output voltage ripple of less than 3%, at 100-W output power. [ABSTRACT FROM PUBLISHER]

Wide bandgap semiconductor switches have been increasingly utilized to improve the power density and efficiency of power converters, as such devices are able to operate at very high frequencies, e.g., up to 100 MHz, with reduced power losses. However, such a high-frequency operation may impose a challenge to the digital control system, and the system clock frequency should be up to 100 GHz in high-precision applications, which is difficult to realize in low-cost microprocessors. Instead of using extremely high-frequency clocks, preprocessing-based solutions that utilize digital pulse-width-modulated (DPWM) dither techniques can also enhance the DPWM resolution with moderate frequency clocks. Unfortunately, this is usually achieved at the expense of introducing low-frequency harmonics, which may complicate system controller and output filter design. In this paper, an optimal dither technique is proposed to enhance the resolution of DPWM power converters. The concepts of positive dither and negative dither are first proposed in this paper. Furthermore, vector-diagram-based analysis indicates that with proper utilization of positive dithers and negative dithers and carefully selected dither sequences, the lowest order harmonic introduced by the conventional dither technique can be completely eliminated when the dither period is multiples of six switching periods. In other cases, the proposed optimal dither technique can produce minimized lowest order harmonic. Finally, experimental results obtained from a Gallium Nitride (GaN) devices-based synchronous buck converter validate the feasibility of the proposed dither technique. [ABSTRACT FROM PUBLISHER]

High gain bidirectional dc–dc converter with high efficiency and high power density is a much desired circuit in any converter/inverter system. It is well known that switched capacitor circuits that are variants of the Dickson converter are suitable candidates for such a system. Modular design, absence of external magnetic components, and high efficiency are some of the features that make them suitable candidates. But, the inability to provide fractional and variable voltage gains at high efficiency during normal operation severely limits their application. It also leads to higher voltage stress in the overall system. The aim of this paper is twofold. First, a generalized modular switched capacitor converter, the “(n/m)X converter,” which is a variant of the original Dickson converter is introduced. Using this generalized configuration, the converter can be designed for a required fractional gain. Next, two different methods to enable dynamic variation in gain with high efficiency using the (n/m)X converter are proposed. Detailed analysis, design steps, equivalent circuits, and experimental results for a 1 kW prototype of a variable (4/0.5)X boost converter validate the proposed theory. A peak measured efficiency of over 95% is achieved for the prototype. The design framework and analysis in this paper can be extended to a generic (n/m)X converter. [ABSTRACT FROM AUTHOR]

This paper introduces a novel five-level nested neutral point piloted (NNPP) converter and analyzes the operating principle of five-level NNPP converter. This paper presents a novel space vector pulse width modulation (SVPWM) algorithm based on gh coordinate for five-level NNPP converter. First, the common-mode voltage is reduced by choosing the appropriate redundant switching states. After that, the floating-capacitor voltage balance control strategy is presented. The appropriate switch combinations of each phase are determined by the control requirements of floating-capacitor voltages respectively and the hardware mapping method of the switching states is presented. Furthermore, the neutral-point voltage balance control strategy is presented. In order to balance the dc-link capacitor voltages, the seven-segment switching sequence is selected according to the control requirements of dc-link capacitor voltages and the neutral-point voltage regulatory factor is introduced to regulate the durations of the redundant switching states in a switching cycle. Finally, the validity of the novel SVPWM algorithm with decoupling control strategies of floating-capacitor voltages and dc-link capacitor voltages is verified by the experimental results of five-level NNPP converter under steady-state and dynamic conditions. [ABSTRACT FROM AUTHOR]

This paper analyzes three different carrier-based modulation patterns applied to a three-phase high-power-factor-corrected (PFC) five-level buck+boost-type converter acting as an interface between dc distribution systems and an ac grid. The modulation is analyzed employing the space vectors theory so that the achievable performance is demonstrated. The main advantage of the analyzed modulation strategy is its simplicity, which makes it suitable for digital signal controller (DSC) implementations. This seems straightforward for voltage source converters, but is a challenge for current-multilevel converters that typically employ field-programmable gate array devices to achieve better harmonic distortion performance. This is due to modern power electronics DSCs being typically designed for other converter topologies. The power converter is constructed with two phase-shift-modulated six-switch buck-type PFC converters, paralleled by interphase transformers, and an inverting circuit. The system features: bidirectional current carrying capability; relatively low parts count; high utilization of the semiconductors; and low current and voltage ripple at its terminals. The principle of operation, detailed description, analysis of the modulation strategy, and dimensioning equations for three different power circuit realizations are described in this paper assuming the analyzed modulation patterns. The feasibility of the presented converter is demonstrated by means of a constructed hardware prototype. [ABSTRACT FROM AUTHOR]

A new static synchronous compensator (STATCOM) based on the diode-clamped modular multilevel converter (DCM2 C) is proposed in this paper. In this converter topology, the capacitor voltage is clamped by using a low power rating diode in each submodule. The quantity of voltage sensors is significantly reduced and is free from the number of voltage levels. Furthermore, the voltage balancing control method becomes very simple and the capacitor voltage balance speed is fast. Based on the structure of modular multilevel converter, the DCM2C-STATCOM has the capability of Var compensation and negative-sequence current compensation. The topology characteristics and compensation control method of DCM2C-STATCOM are investigated in this paper. Experimental results obtained from a laboratory prototype validate that the capacitor voltage of the proposed DCM2C-STATCOM can be well balanced and the Var and negative-sequence current compensations are effective. [ABSTRACT FROM AUTHOR]

The objective of this paper is to propose a novel photovoltaic (PV) micro-inverter with PV current decoupling (PVCD) strategy to achieve maximum power point tracking (MPPT) performance without using large electrolytic capacitors. Conventionally, the grid-connected PV micro-inverter needs a large PV-side electrolytic capacitor to suppress the double-line frequency voltage ripple, which is caused by the injected ac grid power, to achieve the desired MPPT performance. However, the short lifetime electrolytic capacitor will reduce the PV micro-inverter's reliability dramatically. Therefore, different active power decoupling circuits (APDCs) have been proposed in published papers to reduce the required input capacitance so that the long lifetime film capacitor can be used to replace the electrolytic capacitor. Unlike the conventional APDC with charging and discharging modes operation, a novel PVCD strategy, which is based on the concept of current decoupling instead of power decoupling, is proposed to simplify the control mechanism of the PV micro-inverter. Furthermore, to accomplish the proposed current decoupling concept, a novel circuit topology for the PV micro-inverter is also proposed. With the proposed PVCD strategy, the current decoupling tank (CDT) inside the proposed PV micro-inverter can buffer the current difference between the constant current from the PV panel and the rectified sinusoidal current of the ac grid current. Therefore, the input capacitance on the PV-side can be reduced dramatically and the long lifetime film capacitor can be used to replace the electrolytic capacitor. The reliability of the PV micro-inverter with good MPPT performance can be increased. In this paper, the operation principle and the component design of the proposed PV micro-inverter with PVCD strategy will be presented. Simulation results and experimental results of a prototype 240 W PV micro-inverter is shown to verify the performance of the PV micro-inverter with PVCD strategy. [ABSTRACT FROM AUTHOR]

An efficient power converter system plays a significant role in the design of battery charging systems for electric vehicles (EVs). In this paper, a new zero-voltage and zero-current switching (ZVZCS) full-bridge dc–dc converter is proposed to reduce the power conversion losses. The proposed converter incorporates a new asymmetrical pulse width modulation (APWM) gating technique for the dc–dc conversion stage in the battery charging system. The proposed dc–dc converter topology achieves zero-voltage switching (ZVS) for all the active switches and near zero-current switching (ZCS) for low-side active switches throughout the charging range of the battery. The proposed APWM technique can reduce the switching and conduction losses compared to the conventional phase-shift modulation (PSM) gating technique. The auxiliary inductance required to ensure ZVS with APWM can also be reduced compared to PSM. Analysis, design, and implementation of the proposed APWM ZVZCS full-bridge dc-dc converter are discussed in this paper. A 100-kHz 1.2-kW laboratory prototype is developed and the experimental results are presented. The results validate the analysis and performance of the proposed converter. [ABSTRACT FROM AUTHOR]

This paper proposes a new methodology to control a three-phase boost power factor correction (PFC) using a single dc output voltage sensor. Typically, a PFC control technique requires measurement from five independent sensors, i.e., two input voltages, one output dc voltage, and two input phase currents. Elimination of four sensors in the control system of a PFC converter is theoretically feasible and implementable without compromising stability and power quality of the converter, as analyzed and presented in this paper. The proposed control technique uses the ripple information of the measured dc-link voltage, converter dynamics, and switching states at a preceding sample in order to estimate the present state of four other unknown state variables and, thus, establishes the control method. A 2.2-kW experimental prototype of a three-phase boost PFC is developed and tested to verify the accuracy and applicability of the proposed control logic at different line and load conditions. According to the experimental measurements, conversion efficiency more than 98%, total harmonic distortion as low as 4.3%, and an output voltage ripple of ±2% are achieved at 2.2-kW output power. [ABSTRACT FROM AUTHOR]

Water treatment is one of the most important issues for all walks of life around the world. Different from the conventional water treatment technology, the advanced power electronic pulse technology has unique features and advantages for the modern water treatment. Unfortunately, there is no literature reported to describe them in a comprehensive and systematic way. To fill this gap, an overview of modern power electronic pulse generators (PPGs) for water treatment is presented. This article, for the first time, classifies the different types of PPGs from the viewpoint of pulse formation. Each of them is discussed, and the advantages and disadvantages are compared and summarized. Aside from that, this article presents the development and trend of the pulse generators suitable for the specified water treatment processes such as electrolysis, sterilization, and discharge degradation. Finally, a list of more than 100 relevant technical papers is also appended for a quick reference. [ABSTRACT FROM AUTHOR]

This paper proposes a new approach for the capacitor balancing of a dual three-level T-type converter based on silicon carbide discrete semiconductors. This study is performed while the converter feeds an open-end induction motor. The model predictive control (MPC) scheme is developed to balance the dc-link capacitors and to control the machine torque simultaneously. The proposed technique for MPC reduces the number of redundant switching states that are used in computations without affecting the operating voltage vectors. This reduces the computational time substantially. In addition, the proposed control strategy mitigates the weighting factor tuning problem of capacitor balancing in addition to the conventional MPC cost function. MATLAB simulation results for the proposed drive system under different case studies are presented. Hardware experimental setup for the proposed converter is built, tested, and verified. A comparison between experimental and simulation results is presented. It is observed that the theoretical as well as the experimental results are in full agreement. [ABSTRACT FROM AUTHOR]

Renewable energy generations have been attracting sustained attentions in academic and industry. Current-fed-isolated-bidirectional dc/dc converters (CF-IBDCs) are widely adopted in low-voltage high-current applications such as solar photovoltaic fuel cell with energy storage. This paper gives an overview and a comprehensive comparative evaluation of CF-IBDCs. The active clamped, dual half-bridge, L-L type dual active bridge, resonant-type, naturally clamped, and other type topologies of CF-IBDCs are investigated, analyzed, and compared regarding their circuit topological structures, operation characteristics, modulation methods, and soft-switching technologies. In addition, component cost models and loss models of converters are deduced and presented. On this basis, quantitative and comprehensive performance comparison of seven typical CF-IBDC topologies selected from each type is conducted in terms of costs, losses, weight, volume, and power density for the given system specifications and design constraints. Finally, the application range of different CF-IBDCs and future trend are presented to encourage further development. [ABSTRACT FROM AUTHOR]

The three-phase buck rectifier (3ph-BR) is suitable for applications where a voltage step-down function is required. In this paper, an improved 3ph-BR topology is proposed to reduce the voltage stress on the transistors. The freewheeling diode in the conventional topology is split into two diodes in series and the input neutral point is connected to the common point of the two diodes. With the proposed topology and the corresponding modified modulation scheme, the transistors only need to withstand the input phase voltage instead of the line-to-line voltage, bringing about the significant reduction of voltage stress. The proposed topology enables a more cost-efficient and flexible selection of the transistors. Experimental results have verified the validity of the modified topology and associated modulation scheme. [ABSTRACT FROM AUTHOR]

In this paper, a novel topology combining reconfigurability and hybridization is presented. Reconfigurability allows the proposed converter to operate in three different operating modes, yielding a wide range of step-up conversion ratios. The combination of two charge-pump cells and an inductor allows to reduce the average inductor current if compared to a standard equivalent boost converter. A prototype with integrated MOS, drivers, and logic but external passives was built. Experimental results show that with $\mathbf {f_{s} }=\text{300}\,$ kHz, $\mathbf {V_{in} = \text{6}}\,$ V, and $\mathbf {I_o = \text{70}}\,$ mA, the converter can cover conversion ratios in the range from $\text {2.5}$ to $\text {10}$ , with a maximum output voltage equal to $\text {60}\,$ V. Peak efficiency is $\text {91}$ %. When the output current is increased to $\text {100}\,$ mA peak efficiency is $\text {92.8}$ %. [ABSTRACT FROM AUTHOR]

A high-stability flat-top pulsed magnetic field (FTPMF) is strongly needed for some scientific studies, such as nuclear magnetic resonance and specific heat measurement. This paper presents a new linear flat-top regulation bypass circuit to generate a high-stability FTPMF based on a battery bank power supply. The bypass circuit consists of insulated-gate bipolar transistors (IGBTs) in parallel that operate in the active region and are free of switch ripples. To achieve precise control of the IGBT current, the influence of the Miller effect and the nonlinearity of the IGBT's transfer characteristic are studied in detail. Then, a dual-feedback loop is designed and analyzed. A prototype consisting of a 1000 V/30 kA battery bank and a bypass circuit of 1700 V/3600 A IGBTs is developed. An FTPMF with a field/duration of 23.370 T/100 ms and a stability of 64.2 ppm has been achieved. [ABSTRACT FROM AUTHOR]

This paper investigates the influence of active zero vector pulsewidth modulation (AZPWM-1) and space vector pulsewidth modulation (SVPWM) on the design of passive common-mode (CM) attenuation methods to reduce CM current and shaft voltage in inverter-fed V/f-controlled induction motor drives. The passive CM attenuation methods examined here are the CM choke, the CM electromagnetic interference (EMI) filter, and the CM transformer. The attenuation requirement of AZPWM-1 and SVPWM is identified to design the passive CM choke and EMI filter. Based on the attenuation requirement, the design guidelines are revisited for SVPWM, and design rules are proposed for AZPWM-1. However, the CM transformer is designed based on the step change in magnitude of CM voltage of both the pulsewidth modulations (PWMs). The limitations in design, regarding switching frequency and component size for each case, are also established. It is shown that to have a similar attenuation in the considered two PWM cases, AZPWM-1 requires smaller passive components compared to SVPWM. The proposed design guidelines are substantiated with experimental results on a 1.1-kW induction motor drive. [ABSTRACT FROM AUTHOR]

Multilevel converters are widely applied in medium voltage (MV) drive systems due to the attractive features, such as the ability to use devices with lower voltage ratings, high equivalent switching frequency, etc. Recently, a multilevel topology, named seven-level hybrid clamped (7L-HC), is proposed for MV drives. It has a competitive number of devices, showing the potential to build low-cost 7L converters. However, to ensure the wide frequency range operation and power quality of MV drives, its dc-link capacitors and floating capacitors must be controlled properly with balanced voltages. In this paper, an active voltage balancing method is proposed for the 7L-HC converter. This method can effectively balance all the capacitor voltages under a wide frequency range. The method is embedded in the PWM procedure without modifying the control strategies. Simulation and experimental results are provided to validate the proposed method. [ABSTRACT FROM AUTHOR]

In this paper, a family of new step-up series–parallel dual resonant switched-capacitor converters (SP-DRSCs) is proposed to extend the conversion ratio for high step-up applications. The converters feature a wide gain range, continuously adjustable, and enhanced light-load voltage regulation. All flying capacitors operate in resonance, eliminating high transient current spikes and charge sharing losses. Thus, zero-current-switching (ZCS) turn-on for all transistors and ZCS turn-off for all diodes are achieved. A comprehensive analysis of the operation principle, voltage-gain curves, stable regulation range, and voltage and current stress is given. An analytical method to quantify the passive component volume for the group of step-up dual resonance switched-capacitor converters is presented. Further design considerations to optimize the passive component volume of the proposed SP-DRSC and the effect of bulky bypass capacitors on the volume are discussed. [ABSTRACT FROM AUTHOR]

This paper presents a voltage multiplier topology that is a hybrid between a Cockcroft–Walton multiplier and a Dickson charge pump. The Cockcroft–Walton structure exhibits significant output voltage drop under load as the number of multiplier stage increases. This is because all coupling capacitors are connected in series. Dickson charge pump mitigates this issue by connecting all capacitors in parallel. But this solution comes at the expense of large capacitor voltage stress at the last multiplier stage. The proposed hybrid structure arranges some capacitors in parallel and others in series, thereby achieving low output voltage drop and low capacitor voltage stress at the same time. We develop a model that predicts hybrid multiplier's performance and validates it experimentally. We also demonstrate a 60–2.25 kV dc–dc converter based on a 16-stage hybrid voltage multiplier which achieves a voltage gain of 12.8 while keeping the highest capacitor voltage stress to 660 V. [ABSTRACT FROM AUTHOR]

The power efficiency and weight of present point-of-load (POL) dc–dc converters for drone applications are often compromised because they suffer from large switching losses at continuous conduction mode for heavy loads and excessive hardware overheads at discontinuous conduction mode for light loads. This paper presents a boundary conduction mode (BCM) control scheme for POL converters embodying a single operation mode. This is achieved by means of a hysteresis voltage controller to turn on/off the output power stage when necessary. The proposed BCM control scheme achieves high power efficiency (≥91.2%) over a wide load range (5 mA–1 A) by means of fully soft switching. Specifically, a hysteretic current controller is proposed to realize ZCS, and an adaptive dead time controller is proposed to realize ZVS. Further, the proposed BCM control scheme requires a small output inductor (0.82 μH) by means of designing the customizable peak inductor current. To verify the proposed BCM control scheme, we realize a BCM-based POL converter that features an input voltage range of 5–16 V, output voltage range of 2.5–8 V, switching frequency of 1.5 MHz, peak power efficiency of 96.8%, and ≤35 mV output voltage undershoot/overshoot for 1-A load step. When being benchmarked against state-of-the-art counterparts, the proposed design features the lowest voltage undershoot/overshoot, the highest switching frequency, ∼5.7× smaller inductor, and ∼11% higher power efficiency at light loads. [ABSTRACT FROM AUTHOR]