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This paper presents a model predictive current control (MPCC) for three-phase four-switch converters (TPFSC) connected to surface permanent magnet synchronous generators (SPMSGs) in oscillating water column (OWC) wave energy plants, that brings some benefits over the existing control methods used in this type of plants. The proposed MPCC for TPFSC follows the current references with great accuracy, whereas the switching frequency of the insulated-gate bipolar transistor (IGBTs) is fixed and low. This method minimizes the current reference tracking error, and its fast response makes it suitable for the power take-off systems present in wave energy converters. Furthermore, the system features a fast capacitor voltage offset suppression control. The dynamic performance and the voltage offset control of the proposed strategy for TPFSC feeding a SPMSG is evaluated in the Simulink environment. Later, experimental studies are carried out on an 8.7 kW laboratory SPMSG prototype. Finally, the capability of the proposed method to harvest the maximum energy from irregular waves is assessed using an OWC power plant emulator. [ABSTRACT FROM AUTHOR]

In this paper, a new low-voltage ringing zero voltage transition (ZVT) cell is proposed for a family of non-isolated dc–dc converters. In the proposed converter, all semiconductor devices operate under soft-switching condition at both turning on and off. The proposed ZVT cell resolves the issues appeared in the previous works: no online calculation required to achieve ZVS turn-on of the main switch; no extra voltage stress imposed on the main or snubber components; no floating gate driver required for the main and snubber switches; low component count of the ZVT cell; operation principles and design guideline of the boost converter with the proposed ZVT cell are presented. Also, three different positions of a snubber diode considering its junction capacitor are analyzed to clarify the advantage of the proposed ZVT cell. A 2-kW laboratory prototype of the boost converter with the proposed ZVT cell operating at 100 kHz is built and tested to verify the theoretical analysis. Finally, a comparative analysis is given to demonstrate the superiority of the proposed converter. [ABSTRACT FROM AUTHOR]

This paper presents a new bridgeless buck–boost power factor corrector with the use of the active virtual ground technique, which is named as the Manitoba Rectifier. The proposed topology can convert the grid ac voltage into a wide range of voltage outputs within a single-stage circuit. It is in a bridgeless structure and simple in design. During the operation, an LC filter is generated at the system input, where continuous grid current is guaranteed in a buck–boost characteristic topology. In addition, the filter capacitor helps to clamp the voltage ripple between the grid and the output bus terminal. Both leakage current and common mode noise are kept in a relatively small value. Thus, a single-stage and low common-mode buck–boost converter system is built. The proposed topology is successfully implemented on an 800 W prototype, and the performance is experimentally verified, which shows good agreement with the theoretical findings. [ABSTRACT FROM AUTHOR]

This paper presents a comprehensive analysis of the generation mechanism and suppression methods of common-mode (CM) touch current when employing semiconductor-based galvanic isolation (SGI). SGI achieves galvanic isolation by utilizing semiconductor switches to deliver differential-mode (DM) power during their on states while sustaining CM isolation voltage during their off states. In SGI converters, the touch current (TC) is generated as the switch output capacitance is charged by the CM voltage during each turn-on transient. The TC rises as the switching frequency increases, which limits the system power density. This process is modeled by the proposed high-frequency pulse current model and the low-frequency equivalent resistance-based average model. Passive TC suppression approaches are reviewed, and an active TC compensation method has been proposed. A 2-kW EV battery charger with a GaN-based Totem-pole power factor correction stage and an SGI-based dc/dc stage has been built and tested. The touch current has been effectively reduced by 27 dB. It allows the converter to operate at a higher switching frequency to achieve higher power density while meeting the safety standards’ touch current requirement. [ABSTRACT FROM AUTHOR]

The three-level full-bridge (TLFB) dc−dc converter has been widely used in high-voltage, high-power applications. In the experimental test, the neutral-point voltage deviation appears; moreover, it has also been found out that if the flying capacitors are introduced, the input capacitor voltages could realize self-balance even if no active balancing solutions are adopted. In the previous publications, the role of flying capacitors is generally considered to extend the range of soft switching; however, the self-balance ability has not been mentioned or investigated in any publications thus far. In order to fill this gap, this paper provides the detailed mode operation analysis of the TLFB converter and reveals the cause of the imbalance. In addition, the mechanism of the self-balance ability provided by the flying capacitors is explained in detail, which gives a deep insight into the converter. At last, the influence factor of the voltage error in steady state has been analyzed, and the specific expression of the voltage error is also derived. The feasibility of the theoretical analysis is verified by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes the predictive control with the discrete space-vector modulation (DSVM) for Vienna rectifier connecting to the permanent magnet synchronous generator (PMSG) of the wind turbine system (WTS). Since Vienna rectifier has the special operation principle, Vienna rectifier generates only the feasible eight voltage vectors, which can be a candidate vector for the predictive control, depending on the sign of the input currents. In the proposed predictive control, the feasible voltage vectors are extended from 8 to 19 consisting the 8 original voltage vectors and 11 virtual voltage vectors by using the DSVM for improving the current quality related to the torque ripple, vibration, and noise, and the neutral-point voltage balance with low voltage ripple is guaranteed by using the offset value calculated based on the model of two dc-link capacitors in Vienna rectifier. The scheme for reducing calculation burden is applied in selecting the candidate vector. In addition, the limited operation range for the maximum torque per ampere control of PMSG connected to Vienna rectifier is analyzed. The performance of the proposed predictive control with DSVM for Vienna rectifier with PMSGs is verified in simulation and experiment. [ABSTRACT FROM AUTHOR]

Accurate and efficient simulation of power electronic systems is challenging due to their hybrid nature consisting of continuous states and discrete events. In this paper, a comprehensive discrete state event-driven (DSED) framework is proposed for offline simulation of such hybrid dynamic systems. Two key elements of the proposed comprehensive DSED simulation framework that contribute to the significant improvements in numerical accuracy and computational efficiency are a flexible adaptive algorithm for flexible integration of continuous states and an event-driven mechanism for efficient locating of discrete events. The proposed DSED simulation framework is applied to a 50-kVA solid-state transformer and a multileg full-bridge Class-D amplifier to verify its accuracy and efficiency by comparisons with experimental waveforms and simulated waveforms of Simulink and PLECS. Up to 100-fold and 10-fold improvements in simulation speed are achieved at the same level of numerical accuracy compared with Simulink and PLECS, respectively. [ABSTRACT FROM AUTHOR]

Without active control, the voltage fluctuations of the dc-link and flying capacitors in a 4-level hybrid-clamped converter (4L-HCC) become excessively large in low-frequency operation. This paper studies the switching state redundancy inherent in a 4L-HCC and proposes a new capacitor voltage balancing and stabilizing method to minimize the dc-link and flying capacitor voltage fluctuations. A straightforward algorithm is developed based on a logic table to select the suitable switching states. Verified by simulation and experimental testing results, the new method and algorithm virtually eliminate all the big voltage fluctuations of capacitors at low and zero frequencies, greatly enhancing the robustness and reliability of a 4L-HCC. The capacitor size can be reduced by more than 80% compared with the conventional method. [ABSTRACT FROM AUTHOR]

Conventional microinverter or module-integrated converter (MIC)-based photovoltaic (PV) systems are prone to be complex and costly because each MIC requires not only a boost converter to bridge a huge voltage gap between a PV panel and grid but also desirably a differential power processing (DPP) converter to preclude partial shading issues. This paper proposes a novel MIC based on cascaded quasi-Z-source inverters (qZSIs) with DPP capability. A traditional qZSI and voltage multiplier (VM)-based DPP converter are integrated into a single unit with sharing active switches and magnetic components, achieving system- and circuit-level simplifications. In addition, a novel control strategy utilizing two control freedoms of shoot-through duty cycle $d_{st}$ and modulation index M to simultaneously perform maximum power point tracking (MPPT) and DPP function, respectively, is also presented. A 150 W prototype for a standard PV panel consisting of three substrings is built, and experimental tests are performed emulating partial shading conditions. The results demonstrate that the proposed integrated qZSI could perform MPPT with satisfactory preventing partial shading issues while generating ac voltage at the inverter output. [ABSTRACT FROM AUTHOR]

Despite several studies and approaches, the design of current controllers for grid-connected converters via LCL filters is still a challenging task. This is mainly due to the parametric uncertainties and the grid background voltage distortions to which the system is submitted. In order to overcome these inherent system challenges, this paper proposes a multiloop control framework that simplifies the system dynamics of the overall circuit by splitting it in two equivalent sub-circuits. An inner loop is implemented as a fast sliding mode controller that controls the filter capacitor voltage in a fast and robust way. As a result, the plant, viewed by the outer loop, yields a voltage-controlled voltage source connected to the grid through an L filter. Thus, multiple resonant controllers are included in the state-space representation of this simplified system, allowing the design of a state-feedback controller in the outer loop for asymptotic tracking of the grid current with disturbance rejection of the grid background voltage. Here, a discrete linear quadratic regulator algorithm is used for designing the state-feedback gains. A simple design procedure is presented, as well as simulations and experimental results, to show the good performance of the proposed control scheme even under significant uncertainties and disturbances of the system. [ABSTRACT FROM AUTHOR]

Digital peak current mode (DPCM) control is widely used for dc–dc converters operating in continuous current mode. However, current tracking delay (CTD) in the system is normally neglected in the modeling stage, which leads to poor compensator design and degraded performance. This paper investigates CTD effect in boost converter with different DPCM controls. Based on dynamic relationship between the reference current and actual inductor current, the CTD transfer functions are derived, which improves the accuracy of small signal model. Since CTD degrades the phase margin of the system, equivalent migration of right half plane zero is proposed to model CTD effect. This method is very simple and straightforward, which facilitates the compensator design. Furthermore, two novel DPCM control strategies with minimized CTD are proposed, and they are based on duty cycle restriction and duty cycle extension, respectively. Both controls greatly reduce the CTD effect and improve the response speed. Besides, the duty cycle extension benefits from an extended pulsewidth modulation (ExPWM). This optimizes the calculation algorithm and speed, while improving the time margin for digital calculations. Combined with the proposed models and controls, the CTD effect is greatly reduced. The effectiveness is verified through detailed simulations and experiments. [ABSTRACT FROM AUTHOR]

A novel PWM full bridge (FB) dc–dc converter for large power industrial applications is proposed in this paper. The soft switching mode of the primary switches can be varied under different input and output conditions to achieve optimum system efficiency. In the zero-voltage and zero-current switching (ZVZCS) mode, the turn-on and turn-off switching loss can be optimized because the soft switching conditions of the turn-on and turn-off instants are well decoupled. In the zero-voltage switching (ZVS) mode, the turn-off switching loss can also be optimized because there is no requirement for light load operation in this mode. Four mosfets with ultra-low on-state resistance are used, thus, the added conduction loss is small. The auxiliary mosfets with high switching frequency are turned on with zero-current and off with zero-voltage, hence, the added switching loss can also be neglected. Furthermore, some drawbacks of the conventional ZVS and ZVZCS converters, e.g., narrow ZVS load range, high primary circulating current, incomplete reset of the primary current, and unreasonable VA rating of the added components, have been well solved. The operation principles and soft switching characteristics are discussed. Experimental results from an 18-kW prototype are provided to verify the proposed converter. [ABSTRACT FROM AUTHOR]

Numerous studies show that power semiconductors are significant contributors to the overall failure rate of pulsewidth modulation (PWM) voltage source rectifier (VSR) systems. Aimed at this problem, this paper presents an improved diagnosis system for open-circuit faults of a three-phase PWM VSR based on ac current distortion characteristics, which consists of a diagnosis module, a register module, and a decision module. The diagnostic module employs a hysteresis comparator to judge the change trend of the currents, and thereby diagnoses the single open-circuit (OC) faults. The register module is employed to achieve multi-switch OC fault diagnosis, and the decision module is used to output the final result. The proposed method extends the previous work to multi-switch OC fault conditions as well as improves the diagnosis accuracy. The experimental results show that the proposed method can correctly achieve fault diagnosis, including 6 kinds of single-switch faults and 15 kinds of different double-switch faults. Additionally, the proposed method also shows superior anti-interference performance and high robustness under abrupt load transient conditions, different power factor conditions, unbalanced and/or distorted grid voltage conditions, and different ac filter structure conditions. Furthermore, the average diagnostic time of this method is only 3.68 ms. [ABSTRACT FROM AUTHOR]

The inductance is an important parameter impacting current ripple calculation, usually with the assumption that the designed inductance performs ideally in most of voltage source inverters (VSIs) applications. However, the initial permeability of magnetic material usually descends when the winding current reaches or goes beyond the saturation limit. In such region of saturation, the implemented inductor does not perform as expected in design stages and its value varies with the bias current. In this paper, analysis and calculation of the current ripple are presented for a three-phase VSI with powder cores-based inductors, which reveals the calculation error of current ripple caused by the soft saturation nature of powder cores. Based on the equivalent single-phase model, the influence of inductance saturation on current ripple can be quantitatively evaluated. Then, a comparison of the current ripple calculation between considering and ignoring inductance saturation of implemented inductors is drawn in detail. Furthermore, under the condition of inductance saturation, the output current ripple peak-to-peak value of three phases is used as the constraint for variable switching frequency pulsewidth modulation (VSFPWM) design. A comprehensive method is developed to compensate the effect of inductance saturation in VSFPWM. At last, the effectiveness of the proposed strategy is verified by the detailed simulation and experiment. [ABSTRACT FROM AUTHOR]

In this paper, a comprehensive sliding mode control (SMC) loop design for a CLLC resonant converter is proposed. The major objectives of the proposed SMC are to improve the converter dynamics and to achieve a tight output voltage regulation with respect to any parameter variations and external disturbances. The sliding surface coefficients are selected to ensure both large- and small-signal stability for the robustness of the converter under different operating conditions. Furthermore, system dynamic performances considering the error dynamics and overshoots are investigated. To validate the proposed algorithm, a hardware prototype of a bi-directional CLLC resonant converter for plug-in electric vehicle applications is developed and tested up to 1 kW, and the effectiveness of the proposed control solution is verified by the load transients and start-up tests. At a 100% step-change in load power, the SMC achieves 1 ms settling time, which is approximately 0.9 ms faster than the conventional proportional integral control strategy. [ABSTRACT FROM AUTHOR]

This paper proposes a three-phase, five-level, non-regenerative pulsewidth modulated rectifier using only two active switches (minimum required) per phase, which drastically reduces gate driver requirement and hardware complexity. It draws sinusoidal input current at close to unity power factor. All the semiconductor devices are rated at only one fourth of the dc-link voltage, and none of them requires any transient voltage balancing snubber. A total of 8 out of the 14 diodes per phase undergo soft switching transition under all operating conditions, which increases its efficiency. No extra hardware circuitry for balancing the flying capacitors (FCs) or the dc-link mid-point voltage are required, which further reduces hardware complexity and increases the conversion efficiency. The proposed topology does not need any sophisticated startup procedure for charging the FCs either, which solves the problem of semiconductor overvoltage during starting. A 3-kW laboratory prototype is built to experimentally verify the proposed topology. The maximum efficiency obtained from the prototype is 98.7%, and it is always more than 96% for the load range from 15% to its rated. [ABSTRACT FROM AUTHOR]

This paper presents the topology and modulation technique of a three-phase three-level modified Z-source neutral-point-clamped (MZS-NPC) inverter, which combines a modified Z-source impedance network and a three-phase three-level NPC inverter. The boost factor of the proposed MZS-NPC inverter is twice as high as the three existing representative topologies combing an impedance network with a three-level NPC inverter. A modulation scheme for the proposed topology, based on a maximum boost control method, is designed to achieve the maximum voltage gain with simple implementation and to balance the dc-link neutral-point voltage. A closed-loop control of the ac load voltage in the fuel-cell or photovoltaic applications based on the proposed inverter is realized, in order to supply a desired voltage to the critical load in islanding mode of a microgrid. The boosting ability and operation validity of the proposed topology and modulation technique are demonstrated with simulation and experimental results. [ABSTRACT FROM AUTHOR]

A pulsewidth-modulation bidirectional ac–dc converter (i.e., active rectifier) with dc-fault-blocking and self-pre-charge capabilities is proposed in this paper for low voltage dc (LVdc) applications. The proposed converter, which is named as “H5 + converter,” consists of an H4 bridge, a bidirectional switch, and a transient-voltage-surge (TVS) diode. The bidirectional switch and the TVS diode enable the dc fault blocking and dc bus self-pre-charge, while preserving the low common-mode voltage noise and low leakage current of the converter. Additionally, the proposed H5+ converter has advanced features under a dc-side short-circuit fault, such as fault diagnosis and fault recovery. Operation principles of the proposed converter are presented and analyzed. A down-scaled prototype is built. Experiment results are shown and analyzed, including steady-state waveforms, common-mode performance, start-up dynamics, as well as dc fault blocking, fault diagnosis, and fault recovery. Moreover, the proposed converter is compared with other two dc-fault-blocking converters for LVdc applications, in terms of converter capabilities, required devices, and power switch losses. [ABSTRACT FROM AUTHOR]

This paper proposes an interleaved totem-pole bridgeless boost power factor correction (PFC) converter with soft-switching capability. In the proposed converter, an inductor is added compared with the conventional interleaved totem-pole bridgeless boost PFC converter. The added inductor is located between two PFC converter units, and by utilizing the energy of the added inductor, all switches can achieve the zero voltage switching (ZVS). In addition, by applying the phase-shifting control between two PFC converter units, the proposed converter can control the magnitude of the current flowing on the added inductor as an optimal value. Therefore, the proposed converter can achieve the ZVS operation, while minimizing the additional conduction loss and core loss of the added inductor. As a result, the proposed converter can achieve the high efficiency. The feasibility of the proposed converter is confirmed with 180–264 Vrms input and 1.6 kW (400 V/4 A) output prototype. [ABSTRACT FROM AUTHOR]

The pulse-width modulated (PWM) switching rectification that can achieve a high power factor (PF) for increasing the energy transfer efficiency between an LC resonator and a rectifier and voltage step-up and -down conversion is proposed for a wireless power transfer (WPT) receiver. The proposed method can emulate the switching rectifier as a resistive load by using an inductor and integrated phase synchronizers. Additionally, similar to a switched-inductor converter that controls the duty cycle ratio (D), the proposed PWM rectifier can control the output voltage VOUT when the input is a rectified, wirelessly coupled voltage instead of a constant voltage. Thus, unlike a conventional PWM switching rectifier for ac mains, an additional voltage conditioning circuit would not be needed after the proposed rectifier for WPT. The proposed PWM switching rectification is implemented in the AMS 0.18 μm 1.8 V/5 V CMOS process. PF = 1 is measured, indicating the most efficient energy transfer, compared to only 0.55–0.65 in a peak detection rectifier. Additionally, 88.2% of peak power conversion efficiency of the switching rectifier is achieved, and the maximum output power is 80.3 mW at 500 kHz of the WPT frequency. Moreover, the measured voltage conversion ratios ranging between 0.73× and 2× are demonstrated in this paper. [ABSTRACT FROM AUTHOR]

In this paper, the performance and reliability of a cost-effective novel integrated power converter (NIPC) are investigated in comparison to the asymmetric half-bridge power converter (AHBPC) for switched reluctance drive (SRD) system. First, with the soft chopping manner, the working modes and voltage equations of NIPC are illustrated to develop the conventional control strategies. Second, given that the power switches are the reliability-critical devices of converters, a novel control strategy is put forward to shorten the operation time and lower the electrical stress of power switches. Besides, the SRD system with NIPC can still operate with the faults of power switches, especially the output torque of faulty phase is not zero when the open-circuit fault happens. But in order to further enlarge the output torque of faulty phase and lower the torque ripple, the fault-tolerance strategy is proposed. Next, to effectively evaluate the topologies from the perspective of reliability, a unified Markov model is introduced to conduct the static and dynamic reliability analysis, illustrating that the reliability of NIPC is evidently higher than AHBPC. Finally, the simulation and experiments on a prototype SRD system are developed to verify the effectiveness of proposed NIPC and corresponding control strategies. [ABSTRACT FROM AUTHOR]

This paper proposes a high-step-down dc–dc converter with continuous output current which utilizes coupled-inductors. Another main feature of this converter is applying the same number of switches as the synchronous buck converter. The introduced converter is suitable for non-isolated low-voltage high-current applications, especially voltage regulator modules (VRMs) with 12-V-input. Owing to extension of the duty cycle, the main mosfet current stress and the synchronous rectifier switch voltage stress are significantly reduced. However, the discharge of the leakage inductance energy increases the main mosfet voltage stress. By employing a simple lossless clamp/snubber circuit the leakage inductance energy is recovered, the voltage spike across the main mosfet is clamped, and the turn-off switching losses are reduced. There is at least one inductor in all current paths which creates an intrinsic protection against current shoot-through and provides zero-current-switching (ZCS) turn-on for the main mosfet. High efficiency is attained by the proposed converter due to extended duty cycle, low number of switches, and soft switching operation while the converter driver is just like the conventional buck converter. Due to the single-phase structure of the proposed converter, this converter is a viable alternative to the buck VRM. Similar to the other converters using coupled-inductors, the complexity of coupled-inductors design and the space occupied by coupled-inductors can be considered as drawbacks. A prototype of the proposed converter is implemented to verify the converter operation and the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper describes a theory to synthesize nonisolated dc–dc converters. It uses the fundamental flux balance equation across the inductors of a converter as a starting point in this synthesis process. The flux balance equations are the linear equations of the input voltage, capacitor voltages, and duty cycle (D). The coefficients of these linear equations can be selected from a finite set of choices. These choices define the converter topologies that are subsequently used to synthesize a converter. The synthesis procedure applies to a converter of multiple order. All the possible converters are identified for a first-order topology. In the case of second-order converters, all the choices of the flux balance equation are defined. Based on these choices, three new quadratic topologies are derived and verified to demonstrate the effectiveness of the theory. The procedure to synthesize a converter from a given voltage conversion ratio is also outlined. [ABSTRACT FROM AUTHOR]

This paper presents a new five-level T-type nested neutral point clamped (T-NNPC) converter. The proposed five-level T-NNPC topology is very attractive for medium-voltage applications as it can work in a wide range of voltages without the need of devices in series, and fewer components compared to the other five-level topologies. A model predictive control (MPC) strategy is also developed for the proposed converter to control the output currents at different output frequencies, and control flying capacitor voltages. A discrete-time model of the converter is developed and the control objectives that are the output currents and flying capacitor voltages are defined regarding switching states. A cost function is defined to minimize the deviation of the predicted values of the control objectives from their desired values. During each sampling time, the best switching state is selected and applied to the converter. The performance of the proposed five-level T-NNPC and the developed MPC strategy is studied in the MATLAB/Simulink environment, and the feasibility of the converter is evaluated experimentally. [ABSTRACT FROM AUTHOR]

High step-up boost converters with coupled inductor have attracted much attention in the fuel cell or photovoltaic grid-connected generation system, however, there are few literatures elaborated on the construction ideas and derivation methods of them. Accordingly, in order to obtain a clear roadmap on the derivation and inner connection of these converters, a comprehensive review and analysis are presented in this paper. First, the basic boost converter with coupled inductor is regarded as the basic topology, and its merits and demerits are analyzed in detail. Then, in order to address these demerits, various step-up techniques are introduced, such as the rectifier circuit, the active-clamped circuit, the multi-winding coupled inductor, and the voltage doubler rectifier; and numerous new topologies are continuously proposed by combinations and equivalent simplifications. In addition to a detailed synthesis of each topology, a comparative and quantitative analysis among some important converters is presented, and the optimal one is chosen to build a 250 W prototype. Finally, based on comparisons and analysis, the main characteristics and inner connections of these high step-up boost converters with coupled inductor are identified and clarified. [ABSTRACT FROM AUTHOR]

Phase-shift full-bridge (PSFB) converter is a widely used topology for high-efficiency and high-power applications, thanks to low voltage/current stress of all components and zero-voltage-switching operation of primary mosfets. The critical drawback of the PSFB converter is hard-switching characteristics of primary mosfets at a very light load, which causes severe thermal explosion and extremely high input power consumption, especially with the latest super-junction mosfet. To minimize the switching loss of the PSFB converter at a very light load, a new optimal dead-time control scheme with burst-mode operation is proposed in this paper and its validity is verified experimentally with the implemented 2.2-kW server power supply unit. [ABSTRACT FROM AUTHOR]

This paper proposes a new family of multilevel inverter topology that is able to generate seven voltage levels by utilizing one or two floating capacitors and 10 power switches. This novel boost switched-capacitor seven-level inverter possesses voltage boosting capability with an achievable maximum voltage level 1.5 times the input direct current (dc) voltage. The generation of higher output voltage does not incur high-voltage stress on any power switch in this topology, as the peak inverse voltages of all power switches do not exceed the input source voltage. In addition, capacitor voltage balancing is not essential since the floating capacitors are effectively balanced during the charging and discharging processes. Furthermore, the proposed topology eliminates the need for multiple isolated dc sources, and a single dc source is sufficient in both its single-phase and three-phase topologies. The operating principle and steady-state analysis of the proposed topology are elaborated. Experimental results from a single-phase prototype are then presented to verify the validity of the proposed topology. [ABSTRACT FROM AUTHOR]

Active pulsating power buffering (PPB) is an effective technique to reduce the energy storage requirement of a single-phase power-factor-correction (PFC) rectifier. Existing single-phase solutions with active PPB, however, generally suffer from high voltage stresses, leading to increased power losses as well as the need for high-voltage-rating semiconductor switches. Previous works have been focusing on two-level switching converter configurations, and thus have failed to address the high-voltage-stress problem. In this paper, a single-phase three-level flying-capacitor PFC rectifier with PPB-embedded switching is proposed. The flying capacitor not only clamps the voltage stresses of all power devices but also functions as a PPB capacitor. The operating principles, control methods, and design guidelines are detailed and the feasibility of the proposed converter is verified through a 48-W (48-V/1-A) hardware prototype. The proposed rectifier is shown to achieve nearly 50% reduction of the voltage stresses, 72% reduction of the buffering capacitor's volume, and 23.8% reduction of the magnetic core size, as compared to a state-of-the-art two-level solution recently proposed. This new approach of formulating single-phase PFC rectifiers with active PPB could dramatically boost the system's efficiency and power density whilst reducing cost. [ABSTRACT FROM AUTHOR]

This paper presents a bridgeless dual-mode single power-conversion ac–dc converter that can achieve a high conversion efficiency. By adopting a bidirectional switch, we remove a full-bridge diode rectifier from the grid side of the proposed converter, and thereby, reduce the number of components and the primary-side conduction loss. To adapt the converter to 1-kW power applications with a bidirectional switch, we used a series-resonant circuit in the output voltage doubler on the secondary side. The series-resonant circuit also provides zero-current switching turn-off at the output diode, and thereby, reduces the reverse-recovery loss. To attain medium–high power capability with an appropriate transformer, the proposed converter operates in both discontinuous conduction mode and continuous conduction mode. The operation principle of the converter is presented and analyzed. By using the dual-mode control algorithm, the proposed converter achieves a high power factor of 0.994 and maximum efficiency of 97.3 $\%$. Experimental results for a prototype 1-kW ac–dc converter verify these characteristics. [ABSTRACT FROM AUTHOR]

In high-voltage bus-based photovoltaic systems, a power electronic interface is required to manage the power flow in between the photovoltaic (PV) panel, battery, and the high-voltage dc bus. In this paper, a novel three-port dc/dc topology is proposed for this application. Pulsewidth and phase-shift offer two degrees of freedom to effectively regulate the power flows. On the primary side, the input current ripple is reduced due to the interleaved structure. This avoids the usage of the bulky electrolytic capacitors on the PV terminal. On the secondary side, a voltage sixfolder rectifier is employed to boost the step-up ratio. This reduces the transformer's secondary-side turns number. Moreover, the voltage stresses of secondary-side mosfets and diodes are reduced to one-third of the output voltage. Zero-voltage switching and zero-current switching are realized among all power mosfets and diodes, respectively, and in an extended range. A 500-W converter prototype, linking a battery pack, a PV panel, and a 760 V dc bus, is designed and tested to verify the proof-of-concept. Both the circuit functionality and theoretical analysis are validated by the experimental results. [ABSTRACT FROM AUTHOR]

Traditionally, the communication between power converters connected in a microgrid is established using a wired method or a wireless droop method. The shortcomings of these methods have opened up the possibility of power-line-based communication between converters. However, the conventional power line communication systems have the disadvantages of using high-frequency data carrying signals that are prone to attenuation. These systems also make use of explicit couplers, transmitters, and amplifiers that adds to the overall cost and infrastructure. In this paper, a novel fractional harmonic $d\text{--}q$ domain based power line communication technique is proposed. A switched fractional harmonic current space vector is used to carry data. The primary control loop and the modulation algorithm of the converters are used for encoding and decoding of data. The proposed technique thus overcomes the disadvantages of the conventional power line communication systems and at the same time carries forward the advantages of it. The proposed technique is validated with sufficient experimental test results. [ABSTRACT FROM AUTHOR]

This paper proposes a novel pulsewidth modulation cell-level diffusion charge redistribution (DCR) converter based on a switched capacitor converter (SCC) utilizing diffusion capacitance of photovoltaic (PV) cells for PV modules under partial shading. Although a discrete inductor and capacitor are additionally necessary, Joule losses associated with switching operations can be reduced compared to the conventional capacitorless DCR converter. First, ac impedance measurement for a PV cell with 125 × 125 mm was performed, and the diffusion capacitance values were measured to be approximately 6.0 mF at its maximum power point voltage of 0.574 V. Second, the theoretical loss model was derived based on the detailed analysis, and it revealed that an optimal duty cycle achieving the lowest Joule loss was dependent on shading conditions. Third, a dual maximum power point tracking (MPPT) algorithm that controls duty cycles of not only the DCR converter, but a front-end boost converter is also proposed. With the dual MPPT control, the DPP converter operates at its optimal duty cycle to minimize the Joule loss while the boost converter seeks the MPP. The experimental results demonstrated that the maximum power significantly increased, thanks to the DCR converter, and that both the DCR and boost converters operated with respective optimal duty cycles. [ABSTRACT FROM AUTHOR]

In this paper, an integrated step-up inverter without transformer is investigated for photovoltaic (PV) power generation. The proposed topology can be derived by combining a traditional boost converter with a single-phase full bridge dc–ac converter. The main features of the integrated inverter are: First, the leakage current caused by the solar cell array-to-ground parasitic capacitance can be theoretically reduced to zero due to the characteristics of the converter configuration, which can improve the efficiency and the reliability of the PV generation system; second, the output ac voltage of the proposed inverter can be higher than the input dc voltage, which is capable of connecting low voltage PV panels to the grid; third, only five active switches are used in the presented inverter, and those switching devices can be synchronously driven by various sinusoidal pulsewidth modulation methods based on the carrier; therefore, the proposed inverter is compact and with curtailed cost. The working principle and analysis of the proposed integrated inverter are elaborated. Finally, simulation and experimental results are obtained in a lab prototype, which agree well with the theoretical analysis. [ABSTRACT FROM AUTHOR]

A novel high step-down dc–dc converter with voltage demultiplier cell is proposed in this paper, which is widely used in the high step-down applications such as electric vehicle and digital circuits. The combination of switched-capacitor and coupled-inductor is employed to build extended voltage demultiplier in the proposed converter, which makes a quite higher voltage conversion ratio than that of the existing counterparts. Thus, the proposed converter can achieve extremely low output voltage with an appropriate duty ratio, and the extreme duty cycle is avoided. Accordingly, voltage stress on power switches is greatly reduced. Then, mosfets with low conduction resistance could be utilized to reduce conduction loss. Importantly, zero-voltage switching could be achieved for the main switch, which promotes the conversion efficiency further. In addition, the coupled inductor operates not only as a filter inductor, but also as a transformer when the main switch is in the off state, which reduces the volume of the magnetic core and improves the power density of the converter. The operation principle, performance analysis, design considerations of the proposed converter and performance comparison with recent counterparts are discussed in detail, and finally, an experimental prototype is built to verify the theoretical analysis and performance of the proposed converter. [ABSTRACT FROM AUTHOR]

This paper presents a single-stage single-switch soft-switching (S6) power factor correction (PFC) converter to enhance the current shaping performance and reduce the total harmonic distortion. This improvement is achieved by the aid of an auxiliary winding which is used to lower the input current harmonics and also achieve soft-switching condition. As a result, the switching losses are reduced and harmonic content of the input current is improved noticeably in comparison to the conventional S6 PFC converter. Also, the total number of semiconductor elements is reduced in the proposed topology which results in lower cost and higher efficiency. The operating modes of the proposed converter are discussed in detail and the design procedure is presented. A 200-kHz prototype of the proposed converter is implemented and the obtained results are provided to verify the converter theoretical analysis and operation. [ABSTRACT FROM AUTHOR]

Present day LED drivers demand both high power efficiency and wide dimming range. However, these two parameters are often a tradeoff, where a wide dimming range requires a high switching frequency, hence the ensuing switching losses. In this paper, we present an LED driver that features both high power efficiency and wide dimming range by means of fully soft switching that substantially eliminates the switching losses, i.e., the switching losses are negligible. We achieve the said fully soft switching by our proposed hysteretic soft-switching controller (HSSC) and the proposed circuits—voltage detector, current sensor, and level shifter. The HSSC enables the fully soft switching, including zero-voltage switching and zero-current switching, by means of turning on/off power switches when their voltage/current is zero. The proposed voltage detector and current sensor, featuring low power, monitor the voltage and current of the power switches. The proposed level shifter, featuring ultra-fast speed, serves to quickly transmit the monitored signal from the said voltage detector and current sensor to the HSSC. The prototype LED driver, realized in a 130-nm BCDLite process, features 6–18 V input voltage range, output current of 0.5–1.3 A, drives 1–3 series-connected LEDs, 12-W maximum output power, 2.8-MHz maximum switching frequency, 96.1% peak power efficiency, 1.4-μs settling time, and 0.08–1 dimming range at 20-kHz dimming frequency. When benchmarked against state-of-the-art LED drivers, our design simultaneously features the widest dimming range, shortest settling time, and requires the smallest inductor. The measurements and benchmark depict the decoupling of the said tradeoff. [ABSTRACT FROM AUTHOR]

When providing ac output, modular multilevel converters (MMCs) experience power fluctuation in the phase arms. The power fluctuation causes voltage ripple on the module capacitors, which grows with the output power and inversely to the output frequency. Thus, low-frequency operations of MMCs, e.g., for motor drives, require injecting common-mode voltages and circulating currents, and strict dc voltage output relative to ground is impossible. To address this problem, this paper introduces a novel module topology that allows parallel module connectivity in addition to the series and bypass states. The parallel state directly transfers power across the modules and arms to cancel the power fluctuations and hence suppresses the capacitor voltage ripple. The proposed series/parallel converter can operate at a wide frequency range down to dc without common-mode voltages or circulating currents; it also allows sensorless operation and full utilization of the components at higher output frequencies. We present detailed simulation and experiment results to characterize the advantages and limitations of the proposed solution. [ABSTRACT FROM AUTHOR]

The reliability analysis and lifetime prediction for SiC-based power modules is crucial in order to fulfill the design specifications for next-generation power converters. This paper presents a fast mission-profile-based simulation strategy for a commercial 1.2-kV all-SiC power module used in a photovoltaic inverter topology. The approach relies on a fast condition-mapping simulation structure and the detailed electro-thermal modeling of the module topology and devices. Both parasitic electrical elements and thermal impedance network are extracted from the finite-element analysis of the module geometry. The use of operating conditions mapping and look-up tables enables the simulation of very long timescales in only a few minutes, preserving at the same time the accuracy of circuit-based simulations. The accumulated damage related to thermo-mechanical stress on the module is determined analytically, and a simple consumed lifetime calculation is performed for two different mission profiles and compared in different operating conditions. [ABSTRACT FROM AUTHOR]

This paper investigates an approach for achieving zero-voltage switching of an interleaved bi-directional buck–boost converter over a wide input–output voltage operating range by utilizing a coupled inductor with a variable coupling coefficient. The approach is based on regulating the value of the coupling coefficient by means of a direct current depending on the converter conversion ratio, thereby controlling the amplitude and duration of the resonant voltage transition. The impact of the controllable value of the coupling coefficient on the equivalent inductance, the zero-voltage transition period, and the resonant amplitude is analyzed in detail by applying analytical modeling. In comparison to the converter with a fixed coupled inductor operating over a wide input–output voltage span, the variable coupled inductor significantly improves the soft-switching range and reduces the circulating energy. Outside of the controllable resonant amplitude region, the converter with a variable coupled inductor still achieves reduction in the duration of the resonant transition period. To validate theoretical analysis, experimental results are recorded on the gallium nitride interleaved bi-directional buck–boost converter prototype. Improvements in efficiency at both full and half loads in comparison to the prototype with a fixed coupled inductor are achieved. [ABSTRACT FROM AUTHOR]

For high-voltage and high-power bidirectional dc–dc converters, soft switching of all active power devices is mandatory to ensure the high efficiency and reliability. This paper describes a control technique for wide-range zero-voltage switching (ZVS) implementation of dual-bridge series-resonant dc–dc converters. The proposed control technique integrates variable-frequency modulation (VFM) and phase-shift modulation (PSM), in which the former effectively achieves the ZVS for both step-down and step-up operation, while the latter is employed to further extend the power transmission capability. The proposed technique is built on the time-domain analysis of the ZVS condition. A closed-form solution is formulated that guarantees the sufficient ZVS commutation current at switching instants, accounting for the presence of switches parasitic and/or snubber capacitances, while maintains the rms tank current at near-to-minimum levels. Furthermore, a compensation strategy for the effect of conduction losses is presented achieving better switching behavior and higher efficiency. Compared with the minimum rms current trajectory modulation, lower switching losses, enhanced efficiency, and mitigated voltage ringings are obtained. Effectiveness of the proposed technique is verified by means of a 800 W experimental prototype. Closed-loop operation with the proposed VFM+PSM controller is also implemented and experimentally tested. [ABSTRACT FROM AUTHOR]

The dynamic on-resistance in gallium nitride (GaN) devices is problematic as it can impair the converter's efficiency due to the increased conduction loss. In this paper, the hard-switching transient's effect on the dynamic on-resistance is, for the first time, evaluated experimentally on a commercial high-voltage GaN high electron mobility transistor. A new ${R_{{\rm{dyn}} - {\rm{ds}},{\rm{on}}}}$ measurement circuit with fast sensing speed is designed, and an accurate measurement of ${R_{{\rm{dyn}} - {\rm{ds}},{\rm{on}}}}$ can be realized experimentally within 49.6 ns after the device's current reaches to the load current. A double-pulse-test setup is designed to comprehensively evaluate the switching transient's effect on ${R_{{\rm{dyn}} - {\rm{ds}},{\rm{on}}}}$ under different operating conditions. From the experimental results, it is found that the turn-on and turn-off gate resistance have a significant impact on the dynamic on-resistance whereas the cross-talk effect on ${R_{{\rm{dyn}} - {\rm{ds}},{\rm{on}}}}$ is negligible. Specifically, at 400 V/25 A, more than 27% (28.2%) increase in ${R_{{\rm{dyn}} - {\rm{ds}},{\rm{on}}}}$ is observed when the external turn-on (turn-off) gate resistance increases from 0 to 20 Ω. Detailed discussion and quantitative analysis are provided to explain the experimental results. In terms of the turn-on process, it is concluded that the ${R_{{\rm{dyn}} - {\rm{ds}},{\rm{on}}}}$ variation is mainly caused by the different numbers of generated hot electrons. For the turn-off transient, it is confirmed the variation of drain current at different dv/dt slew rate leads to the ${R_{{\rm{dyn}} - {\rm{ds}},{\rm{on}}}}$ difference. [ABSTRACT FROM AUTHOR]

This paper presents a method that overcomes the problem of the confusion during fast irradiance change in the classical maximum power point tracking (MPPT) as well as in model predictive control (MPC)-based MPPTs available in the literature. The previously introduced MPC-based MPPTs take into account the model of the converter only, which make them prone to the drift during fast environmental conditions. Therefore, the model of the photovoltaic (PV) array is also considered in the proposed algorithm, which allows it to be prompt during rapid environmental condition changes. It takes into account multiple previous samples of power, and based on that is able to take the correct tracking decision when the predicted and measured power differ (in case of drift issue). After the tracking decision is taken, it will be sent to a second part of the algorithm as a reference. The second part is used for following the reference provided by the first part, where the pulses are sent directly to the converter, without a modulator or a linear controller. The proposed technique is validated experimentally by using a buck converter, fed by a PV simulator. The tracking efficiency is evaluated according to EN50530 standard in static and dynamic conditions. The experimental results show that the proposed MPC-MPPT is a quick and accurate tracker under very fast changing irradiance, while maintaining high tracking efficiency even under very low irradiance. [ABSTRACT FROM AUTHOR]

This paper proposes a voltage-source parallel resonant Class E inverter. The proposed circuit has a shunt capacitor including parasitic capacitance of a switching device and achieves zero-voltage switching and zero-voltage derivative switching at turning-on like a classical Class E inverter. Therefore, high power conversion efficiency is achieved under high operating frequency. Unlike the other Class E inverters, the proposed circuit has no choke inductor or dc blocking capacitor. Moreover, it has a parallel resonant tank unlike the classical Class E inverter. Thus, a circuit protection is not required in a wireless power transfer system. Circuit analysis, circuit simulations, and circuit experiments were carried out. The experimental circuit performed the desired operation and the power conversion efficiency was 93.2% with the output power 4.76 W at the operating frequency 1 MHz. [ABSTRACT FROM AUTHOR]

In this paper, a new class of dc–dc converter topologies based on capacitive link dc–dc converters—Ćuk, SEPIC, and Zeta converters—that operate under the critical conduction mode has been proposed. The proposed converters are the extensions of quasi-square-wave zero-current-switching converters, which use an auxiliary circuit to provide zero-current and zero-voltage switching for all semiconductor switches at both turn on and turn off transitions and eliminate voltage ringing across the output switch. Using the proposed auxiliary circuit, the value of dv/dt has been diminished; hence, the EMI of the proposed topology is significantly reduced compared to the conventional quasi-square-wave zero-current-switching converters. To verify the operation of the proposed converter and confirm its advantages, an experimental prototype has been implemented, and the experimental results and the efficiency of the proposed converter have been compared with the conventional quasi-square-wave zero-current-switching converters. [ABSTRACT FROM AUTHOR]

In ac motor drives, the fixed-frequency harmonic components of output voltage and current from the inverter with fixed-frequency pulsewidth modulation usually lead to electromagnetic interference (EMI). The spread spectrum clock generation (SSCG) is a widely used solution for this problem. Adjusting the switching frequency to reduce EMI is one kind of practicable scheme among SSCG methods. How to design an optimal or suitable modulation profile is a research emphasis of scholars and has been discussed in depth in many literatures. However, apart from the modulation profile, the mode and quality of carrier are also important and can be improved. In most frequency modulation methods, due to the limitation of the conventional carrier generation mode, the implementation of the new frequency instruction has to wait for the termination of the last switching period. In order to eliminate the waiting state and design a simpler algorithm, this paper has proposed a wait-free phase-continuous carrier frequency modulation (WPCFM) strategy by combining the direct digital frequency synthesizer theory and proper temporal planning of control interruptions. Besides, a theoretical analysis of WPCFM, including quantization error, frequency jitter, phase delay, and voltage distortion, has been finished. Moreover, compared with conventional methods, a more convenient, feasible, and simpler field-programmable gate array based algorithm implementation method and the control structure of WPCFM are also introduced. The analysis shows that, although WPCFM causes a slight increase of the current ripple, it can solve the partial frequency nonuniform distribution problem of the conventional method, and it has a potential value of applications in the wide band gap motor drive systems. The effectiveness of the WPCFM is verified by several sets of EMI reduction experiments where classical periodic carrier frequency modulations are applied. [ABSTRACT FROM AUTHOR]

In order to provide high and extendable power levels for inductive power transfer (IPT) system, a parallel multi-inverter system based on modular inverter is presented. Various power requirements can be implemented by an adjustment of the number of paralleled inverters, which provides a high modularity. A master−slave scheme is employed for the switching-driver signals of parallel inverters, where one acts as a leader while others act as followers. Despite the master−slave scheme, the proposed circuit topology has natural robustness because of the equality in terms of the hardware configuration of each modular inverter. For proper parameters, the output phase (current lagging corresponding voltage) of an inverter is lower than the average of output phase of all inverters, when its output voltage lags behind others, and vice versa. Based on this approach, PI controllers are designed to implement phase synchronization for output voltages of all inverters. An IPT prototype supplied by the proposed parallel multi-inverter with three inverters was designed, built, and tested. Experiments show that the proposed parallel multi-inverter system has not only good circulating current suppression capacity but also excellent performance of phase synchronization. The maximum dc−dc efficiency was 94% at a 35.1 kW receiving power. This paper is accompanied by a Matlab/Simulink file demonstrating phase synchronization control. [ABSTRACT FROM AUTHOR]

In this paper, a robust adaptive sliding-mode observer (SMO) is designed based on the surface permanent-magnet synchronous machine (SPMSM) model in rotor reference frame ($\gamma \delta $ -axis), and an online inverter nonlinearity identification and compensation method is proposed. In order to reduce the chattering of the SMO, an adaptive law is presented to help estimate the back electromotive forces of an SPMSM; thus, smaller gains can be set for switching functions of the SMO. The small-signal model of the proposed sensorless scheme is derived for analyzing the steady-state and dynamic behavior of the sensorless scheme. Voltage distortion, caused by nonlinear characteristics of switching devices, not only causes (6k ± 1)th harmonics in phase currents but also leads to a rotor position estimation error. The equivalent amplitude of the voltage distortion can be identified based on the derived small-signal model of the proposed sensorless scheme. To improve the accuracy of the estimated voltage distortion, a recursive restricted total least squares is applied to obtain the estimated amplitude of the voltage distortion. Experimental results validate the proposed sensorless control scheme and its effectiveness. [ABSTRACT FROM AUTHOR]

This paper presents a multi-period frame transient switching control (MP-TSC) scheme for buck converter with a controlled coupled inductor, aiming at improving the load transient response. The proposed buck converter utilizes a controlled coupled inductor as the output inductor. During a load transient, the coupled inductor is controlled as a small equivalent inductance so as to achieve fast transient regulation. While in the steady state, the coupled inductor behaves as a large inductance to reduce the output current ripple. Furthermore, on the basis of the proposed variable inductance circuit, an MP-TSC control scheme is proposed and implemented in a digital form. With the proposed control scheme, the load transient event is divided into n + 1 sub-periods, and in each sub-period, the capacitor-charge balance principle is used to determine the switching time sequence. Moreover, the control principle design and transient response index analysis are provided. Furthermore, its feasibility is validated in simulation and experiment with a 12–3.3V low-voltage high-current synchronous buck converter. Experimental results demonstrate that the voltage deviation of the proposed MP-TSC scheme (coupled coefficient of the controlled coupled inductor is 0.52) has improved by more than 79% compared to that with the auxiliary circuit disabled. [ABSTRACT FROM AUTHOR]

As wide-bandgap (WBG) devices and applications move from niche to mainstream, a new generation of engineers trained in this area is critical to continue the development of the field. This paper introduces a new hands-on course in characterization of WBG devices, which is an emerging and fundamental topic in WBG-based techniques. First, the lecture–simulation–experiment format based course structure and design considerations, such as safety, are presented. Then, the necessary facilities to support this hands-on course are summarized, including classroom preparation, software tools, and laboratory equipment. Afterward, the detailed course implementation flow is presented to illustrate the approach of close interaction among lecture, simulation, and experiment to maximize students’ learning outcomes. Finally, grading for students and course evaluation by students are discussed, highlighting the findings and potential improvements. Detailed course materials are provided via potenntial.eecs.utk.edu/WBGLab for educational use. [ABSTRACT FROM AUTHOR]

This paper proposes a new 7-level inverter topology for induction motor drives. It is a hybrid topology formed by cascading a 5-level active neutral-point-clamped inverter with a 3-level T-type converter. It is obtained using low-voltage semiconductor devices with voltage blocking capability of Vdc/3 and Vdc/6. The topology uses three floating capacitors per phase, which are balanced within a pulsewidth modulation (PWM) switching duration using switching-state redundancies for each pole-voltage level. Topology forms two stacks at the front-end, which requires individual symmetrical dc source. The analysis of switching loss and conduction loss is performed and compared with some of the existing 7-level multi-level inverters reported in various literatures to show the advantages of the proposed topology. Furthermore, the single dc source operation with two stacked capacitors and closed-loop control of neutral-point voltage using symmetrical six-phase induction motor is proposed. The voltage-control algorithms for floating capacitors and dc-link stacked capacitors are proposed, which are independent of load power factor and modulation index. Open-loop V/f and closed-loop rotor field oriented control are performed, and various results at steady and transient states are presented to validate the aforementioned claims. [ABSTRACT FROM AUTHOR]