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In this article, an efficiency-oriented control strategy is proposed for LCC–LCC-compensated wireless power transfer (WPT) system to achieve zero-voltage-switching (ZVS) operation over a wide current regulation range, in which full-bridge (FB) and half-bridge (HB) modes are combined and switchable based on requirements from load. The harmonic-considered time-domain models for FB and HB modes are first built to calculate current through the switches at the turn-off moment accurately. Then, focused on the constant voltage charge stage with variable output current, the ZVS boundaries are identified in HB and FB modes as the preferable control trajectories, which determines the desired current output with joint considerations of frequency, phase-shift angle, and duty ratio. Next, a least squares optimization method is introduced to fit the theoretical control trajectories into a smooth curve that is practical for implementation on microcontrollers. Finally, a 4.4-kW WPT prototype is built to verify the feasibility and validity of the proposed control strategy. Results show that a high system efficiency can be achieved over a wide output current range, with an efficiency of 94.68% even at 20% rated power. [ABSTRACT FROM AUTHOR]

The drain to gate capacitance (Miller capacitance) of SiC MOSFETs leads to the Miller effect during switching transients. The Miller capacitance in a phase-leg configuration causes the crosstalk, the interaction between the two complementary switches, and the Miller plateau during the switching transient. The Miller effect reduces the switching speed, reduces reliability, and increases electromagnetic interference. In this article, by injecting a mirror cancellation current, the effects of Miller capacitance are canceled. The proposed technique includes a two-stage sensing and injection network to compensate for the nonlinearity of the Miller capacitance. The proposed technique can suppress both positive and negative gate voltage spikes induced by the crosstalk and reduce the switching power loss with the increased switching speed. Because no external control signals are required in the proposed technique, it can work with almost all commercial gate drivers. The detailed design for this proposed technique is presented in this article. The proposed technique was validated with both simulations and experiments. [ABSTRACT FROM AUTHOR]

A grid-tied cascaded H-bridge (CHB) converter with low frequency modulation techniques needs to meet power quality standards. At the same time, the effects of grid voltage harmonics on CHB converter's current harmonics must be considered in the modulation techniques. Furthermore, the dc link voltages of grid-tied converters need to be regulated. In this paper, an asymmetric selective harmonic current mitigation-pulse width modulation (PWM) (ASHCM-PWM) technique is used to meet the current harmonic limits of a power quality standard with the effects of grid voltage harmonics considered in the equation set of its optimization process. A voltage balancing technique based on the average power of each cell is derived to regulate the dc link voltages of the CHB converters without using dc voltage sensors. By using the proposed voltage balancing technique, the CHB converters do not need complicated dc link voltage controllers. As a result, the cost and complexity of the grid-tied converters can be significantly reduced. Simulations and experiments were conducted on a 7-level grid-tied CHB converter to validate the proposed voltage balancing technique with ASHCM-PWM modulation technique. [ABSTRACT FROM AUTHOR]

Applying the selective harmonic elimination (SHE) technique to grid-connected-cascaded modular multilevel inverters has been widely discussed in the literature. However, due to the difficulties of solving high-order nonlinear transcendental equations, the SHE technique cannot be implemented in real time so its applications are limited. This paper presents a technique to convert the nonlinear equations to a specific control system and use a look-up table, integral controllers and a decoupling controller to help the system converge to a zero-error steady state. An inner instantaneous observer is introduced to directly extract the harmonic spectrum of the output voltages without applying FFT algorithm to output step voltage waveforms. It can not only simplify software design but also eliminate the phase delay generated by conventional spectrum extracting algorithm. The proposed technique can achieve an accurate switching angle control and a fast response. Simulation and experimental results verified that the system can achieve zero-error steady state within one line period. [ABSTRACT FROM AUTHOR]

This paper first analyzes the current paths on a planar busbar based on insulated-gate bipolar transistor bridge switching states and dc-link capacitor configurations. The busbar's circuit models which include both self- and mutual inductances are developed based on the identified current paths. The inductance circuit models are analyzed and reduced for different switching states, transition states, and dc-link capacitor configurations. Inductance and current sharing is analyzed based on circuit theory. Both simulations and measurements are conducted to verify the developed technique. [ABSTRACT FROM AUTHOR]