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This paper presents a generalized power-decoupling control scheme using a multiport isolated bidirectional converter for a multilevel inverter, which has multiple dc links inside. In the proposed method, a single power-decoupling capacitor is needed for all the dc links in the multilevel inverter cell. First, a prototype of the power-decoupling concept of individual H-bridge cells in the multilevel inverter is proposed, using a separate power-decoupling circuit. Then, a more advanced one-step power-decoupling method is proposed. The lifetime and reliability of the multilevel inverter is improved as film capacitors replace the large capacitance electrolyte capacitors. A multi-input ports/single output voltage-fed dual half-bridge converter (MDHB) is used for the power-decoupling circuit. A steady-state analysis for the peak and root mean square of the MDHB current is carried out for the loss breakdown. The currents are functions of the switching frequency, phase shift, leakage inductance, turn ratio, and output voltage, which make the multiport transformer design complex. A design methodology is proposed, which takes into account the design of the copper and core losses as functions of the switching frequency and number of turns. Furthermore, a special winding method for the input port is illustrated to obtain identical leakage inductances for the uniform current distribution in the multiport transformer. The proposed MDHB employs a current-sensorless power-decoupling control that contributes to the spontaneous ripple rejection of all the dc links without individual link current information, as well as to the cost and size reduction. Hence, the ripple-rejection controller is independent of the control configuration of the multilevel inverter, and also available for universal applications of various inverter topologies. Since the primary-input ports of MDHB share a single magnetic core for interfacing the ripple power to the unified secondary ripple capacitor, the controller design becomes difficult in considering the dynamic interaction among the ports, along with the average-voltage control loop design. In this paper, the dynamic analysis and controller design procedure of the circuit is also presented. The power decoupling is achieved even when the ripple frequency is other than the double frequency of the inverter output, since the single-pole transfer function of the small-signal model of the MDHB allows sufficient phase margin, along with high bandwidth. The proposed power-decoupling method for the multilevel inverter is validated with the help of simulation and 1.2-kW hardware prototype experimental results. [ABSTRACT FROM AUTHOR]

The output voltage of power electronic converters is a very important quantity for dynamic control of power electronic systems. In electrical drives without electromechanical position or speed sensor, the terminal reference voltage is used to obtain the rotor position. Dead-time effects and semiconductor voltage drop lead to distortion in the actual output voltage and degrade the control performance when the back electromotive force magnitude is low. Thus, for stable low-speed operation, output voltage sensing becomes necessary. Due to the switching nature of power electronic systems, this is not a trivial task, especially when instantaneous measurement of the terminal voltage is required. In this paper, an instantaneous switching-period average voltage sensing technique is proposed that utilizes a combined approach of oversampling and filtering. Based on the theoretical analysis of the sampling- and filter-induced measurement distortion, a general solution for an optimal filter design is derived. The additional sensing circuit is integrated into the low-side gate driver of the converter outputs. This paper includes details about the hardware implementation and extensive verification measurements. [ABSTRACT FROM AUTHOR]

To support the development of high-frequency ac microgrids in terms of compact design, high-voltage gain and low total harmonic distortion (THD), a buck–boost dual-leg-integrated step-up inverter is proposed in this paper. The inverter is formed by integrating a buck–boost converter into a conventional single-phase full-bridge inverter by sharing the upper switch and the body diode of the lower switch in both bridge-legs. Consequently, the component count is significantly reduced over the step-up inverter counterparts. In addition, to address the drawbacks of hybrid modulation methods adopted by existing dual-leg-integrated inverters, such as double-variable control, and high THD of output voltage/current at high input voltage and heavy load conditions, unipolar frequency doubling sinusoidal pulse width modulation scheme is adopted in this inverter. As a result, the modulation ratio M becomes the only control variable to regulate the output voltage/current and the control is simplified. The THD of the proposed inverter output can remain low throughout the entire input voltage range and load power range. This paper presents the topology derivation procedure, operation principle, and steady-state characteristics of the proposed inverter. To validate the effectiveness of theory, experimental results of a 400 W hardware prototype, where the output voltage frequency is at 500 Hz, are reported. [ABSTRACT FROM PUBLISHER]

This paper presents a novel control method for multimodule photovoltaic microinverter (MI). The proposed MI employs a two-stage topology with active-clamped current-fed push–pull converter cascaded with a full-bridge inverter. This system can operate in grid-connected mode to feed power to the grid with a programmable power factor. This system can also operate in line-interactive mode, i.e., share load power without feeding power to the grid. In the event of grid power failure, the MI can operate in a standalone mode to supply uninterruptible power to the load. This paper presents a multiloop control scheme with power programmable capability for achieving the above multiple functions. In addition, the proposed control scheme embedded a multimodule parallel capability that multiple MI modules can be paralleled to enlarge the capacity with autonomous control in all operation modes. Finally, three 250-W MI modules are adopted to demonstrate the effectiveness of the proposed control method in simulations as well as experiments. [ABSTRACT FROM PUBLISHER]

This paper proposes an optimized mathematical model of the voltage-source inverter parallel-operation system (VSIPS) and proposes an improved droop control method based on this model, which can realize accurate power sharing in VSIPS. First, this paper analyzes VSIPS as a multi-input and multioutput system and proposes a precise definition of circulating current. The circulating-current model, the steady-state model, and the small-signal model are proposed subsequently based on the optimum design of wire impedance, which constitute the optimized mathematical model of VSIPS in s-domain. The circulating-current phasor model and the circulating-current power phasor model (CCPPM) are also proposed. Second, the mathematical model of traditional droop control is built and analyzed based on CCPPM, which elaborates the tradeoff of droop control between the steady-state voltage bias and the load-sharing accuracy, and proves that the $V- Q$ droop control cannot realize accurate reactive-power sharing. Third, an improved droop control method ( $\omega - P_{{\text{cir}}}$ and $V- Q_{{\text{cir}}}$ control) is proposed, which can realize the accurate active- and reactive-power sharing and eliminate the steady-state voltage bias simultaneously. Finally, simulation and experimental results are presented, which validate the proposed mathematical model of VSIPS, the analysis of droop control, and the performance of the proposed method. [ABSTRACT FROM AUTHOR]

This paper analyzes the benefits of the active damping applied to transformerless three-phase grid-connected photovoltaic (PV) inverters using modified LCL (MLCL) filter for leakage current reduction. In comparison with passive damping techniques, the active damping can reduce the MLCL filter resonance peaks, improving the dynamic performance of the control system without addition of power losses. Besides these classical advantages, this paper demonstrates that the active damping also contributes for PV leakage current reduction, preserving the high-frequency attenuation of the MLCL filter. Additionally, an active damping for the inverter common-mode circuit is also proposed, reducing the low-frequency leakage current caused by the common-mode signal used to extend the inverter modulation index. Experimental results are given to demonstrate the leakage current reduction and the grid current control for a 10 kW PV inverter. [ABSTRACT FROM PUBLISHER]

This paper proposes an active switching harmonic current reduction method within the dc-link capacitor of two-level, three-phase, back-to-back converters. This method is based on the derived analytical solution for switching harmonic currents in the dc-link. It is shown that by controlling the pulse width modulation carrier waveform's phase angles, the harmonics in the second carrier band of the rectifier and the inverter can be synchronized such that cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. The feasibility of the proposed approach has been verified experimentally and results are presented in this paper. [ABSTRACT FROM PUBLISHER]

It is mandatory to keep the total harmonic distortion in the output of most inverters below the limits prescribed by different international standards. The harmonic distortions caused due to nonlinear loads may not get corrected by typical magnitude controller, like PID controller. Repetitive controller is more effective in such situations. Often, repetitive controller is used as add-on block to the conventional magnitude controller. Design of repetitive controller can be easily implemented on digital platform. Rapid change in phase and magnitude of inverter-filter's transfer function near corner frequency causes instability problems in repetitive controller. Various techniques have been proposed by researchers to overcome this problem. Most of the reported techniques rely on digital compensation. However, it is hard to find a digital compensator, which simultaneously meets the phase and gain requirements at moderate computational effort. Here, a new output voltage feedback scheme has been proposed, which simplifies the requirement of digital compensation. The proposed scheme requires an extra hardware but at negligible added cost. In spite of this extra hardware, the proposed circuit turns out to be more energy efficient in comparison to few popular schemes, reported in literature, where some resistance is introduced in the inverter's filter for better stability of controller. In addition to the proposed modification the paper presents a simplified explanation of the various factors affecting stability of repetitive controller. The paper also discusses a novel experimental method for verifying the efficacy of repetitive controller in suppressing distortion of any particular harmonic order. [ABSTRACT FROM PUBLISHER]

In this paper, ground leakage current suppression in a 60-kW 5-level T-type (5LT2) transformerless SiC photovoltaic (PV) inverter has been presented. The common mode (CM) equivalent circuit is analyzed based on a high frequency (HF) CM loop and a low frequency (LF) CM loop, respectively. In the 5LT2 inverter, the derived HF CM voltage (CMV) is found to have 86% reduction compared to that of a 3-level T-type (3LT2) inverter. The simulation and experiment results are provided to demonstrate the advantages of 5LT2 inverter on HF leakage current suppression. In addition, LF CMV caused by neutral point (NP) voltage oscillation has been analyzed in this paper. It is shown that the LF CMV is nearly proportional to the NP voltage oscillation. Furthermore, an LF CMV compensation method is proposed to suppress the LF CMV by 64%, which is verified by simulation and experiment results. Finally, the leakage current shows 79% reduction in the 5LT2 inverter compared to the conventional 3LT2 inverter in the experiment. A further 52% leakage current reduction is achieved by the LF CMV compensation in the 5LT2 inverter. [ABSTRACT FROM AUTHOR]

In this paper, direct torque control (DTC) of five-phase induction motor (FPIM) is implemented using three-level neutral point clamped (TL-NPC) inverter. One of the advantages of three-level inverter over two-level one for DTC operation is the low torque ripple. Also TL-NPC inverter through space vector modulation technique gives low $ dv/dt$ transition with better voltage waveform. By applying conventional lookup table for DTC, the TL-NPC inverter does not ensures lower $dv/dt$ transition. In this paper, a novel switching scheme for DTC of FPIM using TL-NPC inverter is proposed that ensures the low $ dv/dt$ transition and balancing of dc-link capacitor voltages of TL-NPC inverter. To form the lookup table for DTC operation, instead of using voltage vectors directly, virtual vectors (VVs) are utilized. Two switching states are used in one sample time to generate a VV in $\alpha \beta$ plane, which gives zero resultant voltage in $ xy$ plane. The switching strategy ensures low number of transitions to reduce the switching losses. The switching state redundancies are used in a novel way to balance the dc-link capacitor voltages without using any additional hardware. The proposed technique to balance the dc-link capacitor voltage gives lower switching frequency. The MATLAB/Simulink environment is used for the simulation and the results are validated through experiments. [ABSTRACT FROM AUTHOR]

This paper presents an improved direct torque control (DTC) method for an asymmetrical six-phase induction motor using a two-level six-phase inverter. As is well known, a simple extension of three-phase DTC technique to an asymmetrical six-phase motor, using large vectors only, introduces significant current harmonics of the order 6 n±1 (n = 1, 3, 5,…), which are mapped into the nonflux/torque producing (xy) plane. These harmonics cause only losses in the motor winding as they do not take part in torque production. Hence, a number of different improved DTC techniques have been developed in the past for multiphase motor drives. The paper takes one such DTC method as the starting point and improves it further by using the concept of virtual voltage vectors. Developed vector selection algorithm, based on two virtual voltage vectors, requires the information on position of the flux in the auxiliary (xy) subspace and provides stator current quality commensurate with the currently available best DTC algorithm for six-phase drives. However, use of two virtual voltage vectors enables a substantial reduction of the torque ripple, which is achieved by means of a five-level torque comparator. Extensive experimentation is performed and it is shown that the reduction of the current harmonics is in essence almost the same as in another recently developed DTC scheme, based on the use of a single virtual voltage vector. However, the achieved torque ripple reduction, which is verified experimentally, makes the scheme superior when compared to the existing approaches. At the same time, developed scheme retains qualities of conventional DTC schemes, such as simple structure and fast response. Its additional beneficial feature is the easiness of implementation. [ABSTRACT FROM PUBLISHER]

This paper presents a fast and generalized space vector pulse width modulation (SVPWM) scheme for any multilevel inverter. The SVPWM scheme generates all the available switching states and switching sequences based on two simple and general mappings, and calculates the duty cycles simply as if for a two-level SVPWM, thus independent of the level number of the inverter. Because the switching states, duty cycles, and switching sequences are all obtained by simple calculation in the proposed SVPWM scheme, no lookup table is needed and the scheme is computationally fast. The generalized method of generating the switching states (first mapping), calculating the duty cycles, and determining the switching sequence (second mapping) is described in this paper. The scheme is suitable for any reference vector with any modulation index, and can be conveniently extended to meet specific requirements, such as symmetric switching sequences. Compared with prior methods, the SVPWM scheme proposed in this paper provides two more degrees of freedom, i.e., the adjustable switching sequences and duty cycles, thus offering significant flexibility for optimizing the performance of multilevel inverters. The influence of redundant switching sequences in the output phase voltage of inverters is demonstrated for a nine-level inverter. This paper also thoroughly compares the proposed SVPWM scheme with prior methods. Both simulation and experimental results are given. [ABSTRACT FROM AUTHOR]

This paper proposes a dc-link voltage shaping method for a cascaded H-bridge (CHB) static synchronous compensator (STATCOM). A recently proposed low capacitance-STATCOM system, which intentionally operates with large voltage ripples on the dc-link capacitors, offers the advantage of superior harmonic performance. However, the capacitor voltage ripples decrease when operating at below-rated reactive current, which removes the aforementioned harmonic performance benefit of this system. In addition, such harmonic performance benefit is only achieved in capacitive operation mode. In order to expand the operating region where advantageous voltage ripples are present, a new voltage shaping method is proposed. The proposed method uses a CHB multilevel converter coupled with simple dc–dc converters to shape voltage ripples on the dc-link capacitor regardless of its operating point. This is achieved by controlling the average current of the dc–dc converter using model predictive control. The concept is best applied to an enhanced STATCOM, or E-STATCOM, application in which the STATCOM is integrated with either a renewable energy source or energy storage system. The operational principle of the proposed approach is validated via simulation and experimental results on a five-level single-phase CHB STATCOM. [ABSTRACT FROM AUTHOR]

With the superiority in leakage current suppression, the active voltage clamping highly efficient and reliable inverter concept (AVC-HERIC) has become a promising candidate in low- and medium-power photovoltaic systems. In addition, the high power density and low system costs have been attained in the AVC-HERIC due to the removal of the isolation transformers. However, to maintain high efficiency and good power quality under reactive power injection, prior-art modulation methods for the AVC-HERIC should be modified. In this paper, a simple modulation scheme is proposed for the AVC-HERIC, which ensures bidirectional current flow at any time. An improved modulation scheme is implemented according to the reference voltage polarity, and it is integrated into the proposed scheme to enable flexible reactive power injection. Moreover, the improved modulation scheme can maintain the same high efficiency as adopting the unipolar pulsewidth modulation strategy. More importantly, the deadtime and minimum pulsewidth limitation distortions are compensated effectively by the proposed modulation, leading to a good power quality. Simulations and experimental tests are performed on a 3-kW AVC-HERIC, and the results verify the effectiveness of the proposed modulation. [ABSTRACT FROM AUTHOR]

This paper proposes a model predictive flux control (MPFC) strategy with cost function-based field weakening (FW) strategy for permanent magnet synchronous motor (PMSM). The stator flux vector is used as the control variable and the cost function of the proposed MPFC is configured in the form of flux increment, which can reflect the saturation degree of the inverter output. A novel space flux vector plane is introduced to explain the principle of optimal switching state selection in the proposed MPFC. The voltage and current limitations of the inverter in the high-speed region are analyzed in the flux plane to reveal the objective of FW compensation. The value of the cost function is controlled with a proportional integral controller in the proposed cost function-based FW strategy. Moreover, the reference flux vector is compensated with the output of the FW controller to enlarge the operation region of the stator flux vector. With the proposed FW strategy, the operation range of the PMSM is extended and the torque output in high-speed range is increased. Experimental studies are carried out to verify the validity and effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

In this paper, diagnosis and tolerant control schemes have been studied for common electrical faults in T-type three-level inverter fed dual-three phase permanent magnet synchronous motor (PMSM) drives for safety-critical applications. Based on vector space decomposition and double three-phase space vector modulation, diagnostic and tolerant control methods have been developed comprehensively for open-phase faults, open-switch faults, and short-switch faults in T-type three-level inverter fed dual-three-phase PMSM drives, in such way that misdiagnosis of different faults sharing similar faulty features can be avoided. In particular, a two-step diagnostic scheme is proposed in order to simplify the diagnostic process. The first step is to identify the faulty phase and fault category by analyzing current trajectories on harmonic subspace, and the second step is to determine the specific fault type in a small fault-searching area obtained from the first step. In the aspect of fault-tolerant control, a novel current compensation method is proposed for open-phase fault without changing the machine model, space vector diagram, and control framework. Open-switch faults and short-switch faults are tolerated by making full use of the remaining vectors after faults. The validity of the proposed fault diagnosis and tolerance schemes has been verified by experiments. [ABSTRACT FROM AUTHOR]

This paper presents a load commutated silicon controlled rectifier (SCR) based multilevel current source inverter (CSI) fed open-end winding induction motor (IM) drive with regeneration capability. Multilevel current waveform is realized using two isolated load commutated SCR-based CSIs connected in shunt configuration, but operated with a phase shift of 30 $^\circ$ thereby attaining significant reduction in harmonic distortion of the motor current. The multilevel CSI connected to one side of the stator windings supplies real power to the motor. The other end of the stator winding is directly interfaced with a capacitor-fed voltage source inverter (VSI). The control scheme of the VSI facilitates load commutation of the multilevel CSI under all conditions of operation, including regenerative braking. The proposed scheme is experimentally verified on an IM with open-end stator winding, with the help of a digital signal processor TMS320F28335. [ABSTRACT FROM AUTHOR]

This paper presents the circuit design and magnetic integration of push–pull class-E inverters for wireless power transfer (WPT) up to megahertz. The design criterion for achieving zero-voltage switching (ZVS) of a class-E inverter with coupled windings is derived mathematically. The approaches of magnetic integration for push–pull class-E inverters are analyzed and compared. Then, a new magnetic structure with hybrid magnetic materials is proposed to build the integrated inductors with either coupled windings or uncoupled windings. A 3-MHz WPT system is built to verify the analysis. The detailed comparison of the class-E inverters with magnetic integration is presented in terms of switch voltage, efficiency, harmonic currents, and thermal distribution. In the optimized design example, the switches keep ZVS over the entire load range without using any closed-loop control. The system efficiency reaches 87.1% at 350-W output power. [ABSTRACT FROM AUTHOR]

This paper presents a reduced component count five-level inverter topology based on the stacked cell approach to multilevel inverters. The proposed topology utilizes the fundamental properties of three-phase voltages to reduce the number of switches and flying capacitors to cut size, weight and costs while facilitating higher reliability, simpler wiring and lesser electromagnetic interference. The operational aspects of the topology such as circuit structure, modulation and capacitor balancing are explained, followed by an account of device stresses and reliability. A discussion of certain additional features such as fault tolerant operation, loss steering and common-mode elimination addresses the usefulness of the topology in practical situations. A comparison of the proposed topology with existing methods in terms of several parameters is then used to highlight its merits and features. Finally, experimental results obtained using an induction motor drive incorporating the topology are given, so as to validate the feasibility of the proposed approach. [ABSTRACT FROM AUTHOR]

In this paper, a novel filter structure to suppress circulating currents is proposed based on the sequence of pulsewidth modulation voltage harmonics for high-power interleaved motor-drive systems. The sideband harmonics can be divided into positive-, negative-, and zero-sequence components. Through 120° interleaving among three paralleled inverters, a majority of positive- and negative-sequence harmonics are phase shifted. By these phase shifts, the differential-mode circulating currents between the paralleled ac–dc converters can be suppressed with the proposed filters, which have an identical structure to the three-phase common-mode chokes. Such a structure highly benefits the design and manufacturability for high-power applications where a choice of magnetic-core shapes is limited. Compared to coupled inductors (CIs) with cyclic-cascade or monolithic configurations, the number of magnetic cores can be reduced by one-third. Peak flux-linkages of the proposed filters and the conventional CIs were compared to estimate the size reduction in case of flux-limited designs. Considering the whole modulation index range, which may be required in the motor-drive systems, the maximum flux-linkage can be reduced by 50%. Prototype filters are built and showed a 33% reduction in weight and size compared to the conventional CIs. The validity of the proposed filter is verified through the simulation and a small-scale experiment. [ABSTRACT FROM AUTHOR]

In the back electromotive force (EMF)-based sensorless control of interior permanent magnet synchronous motor (IPMSM), the inverter nonlinearity and flux linkage spatial harmonics will possibly give rise to (6k ± 1)th harmonics in the estimated back EMF, especially the fifth and seventh harmonics. Those harmonics will consequently introduce (6k)th harmonic ripples to the estimated rotor position, especially the sixth harmonic component. In order to solve this problem, a bilinear recursive least squares (BRLS) adaptive filter is proposed and integrated into a sliding-mode position observer to suppress the dominant harmonic components in the estimated back EMF and as a result, the accuracy of the estimated rotor position can be greatly improved. A unique feature of the BRLS adaptive filter is its ability to track and suppress the specified harmonic components in different steady state and dynamic operational conditions. The proposed method can compensate for harmonic ripples caused by the inverter nonlinearity and machine spatial harmonics at the same time; this method is also robust to machine parameter variation, and the BRLS algorithm itself is machine parameter independent. The implementation of the proposed BRLS filter in the sensorless control of IPMSM is explained in details in this paper. The enhanced drive performances using the BRLS filter have been thoroughly validated in different steady state and dynamic operational conditions on a 1.5-kW IPMSM sensorless drive. [ABSTRACT FROM AUTHOR]

This paper investigates a robust model reference adaptive control (MRAC) method for a three-phase constant-voltage constant-frequency (CVCF) inverter with an output LC filter. The proposed MRAC method is designed to stabilize the error dynamics of the system by a feedback control term in the steady state and attenuate the parameter uncertainties of the system by an updated MRAC term. Unlike the conventional proportional–derivative control (PDC) scheme, the proposed MRAC scheme ensures the fast convergence of the output errors to the exponential trajectories predefined by the reference models. Furthermore, the adaptive state-feedback mechanism can guarantee the fast dynamic response in the transient state without using load current sensors or observers. The asymptotic stability is mathematically proven by a Lyapunov theory. The feasibility of the proposed controller is confirmed through extensive experimental studies on a prototype three-phase CVCF inverter with a TI TMS320LF28335 DSP. Finally, comparative experimental results of three control methods (i.e., conventional PDC, feedback linearization control, and proposed MRAC) are provided to validate the superior performance of the proposed method such as fast transient response, low total harmonic distortion, and robustness to parameter uncertainties under critical load conditions (i.e., abrupt load changes, unbalanced loads, and distorted nonlinear loads). [ABSTRACT FROM AUTHOR]

This paper presents a novel adaptive predictive current controller (PCC) with improved flux estimator for a sensorless direct field oriented control (DFOC) induction motor (IM) drive. Classical PCC performance depends on the stator resistance of the motor which varies with temperature. In the proposed method, a discrete stator resistance estimator is developed to increase the robustness of the system toward stator resistance variations. An improved nonlinear discrete stator flux estimator is also developed to replace the pure integrator which reduces the initial value and dc offset problems. Sensorless operation of IM drive has advantages of reduced overall cost and increased reliability of motor operation. Dynamic and steady-state performances of the IM under different operating conditions are analyzed in MATLAB/Simulink as well as experimentally using dSPACE1104 controller and have been compared with conventional PCC. The simulation results of the classical and proposed methods are also validated experimentally. Smooth starting, reduced oscillations in speed and flux at low speed operation, fast speed and torque dynamics, robust operation of drive against load and variation in stator resistance, fast and smooth speed reversal are the main advantages of the proposed method over classical PCC-based DFOC IM drive. [ABSTRACT FROM AUTHOR]

This paper presents an enhanced current controller for improving the performance of a class of single-phase grid-connected inverters operating in weak and distorted grid conditions. An inverter designed to operate at normal (strong or stiff and clean) grid conditions may not perform satisfactorily during weak and distorted grid conditions. One major reason is the interfering dynamics of the synchronization or phase-locked loop (PLL). This paper proposes an enhanced control structure for a popular class of single-phase inverters to address this problem. The proposed idea is to include the PLL state variables into the main inverter controller thereby minimizing the undesirable interactions of the PLL with the other components. A method for optimally designing the controller gains is also proposed. Compared to the conventional one, the proposed controller is shown to have a more robust performance over a substantially wider range of weak and distorted grid conditions. Extensive simulation and experimental results are presented to validate the proposed controls. [ABSTRACT FROM AUTHOR]

Recent works have addressed the ancillary services provided by multifunctional photovoltaic inverters. This concept is based on the addition of extra functions to the conventional photovoltaic systems, such as harmonic current compensation of nonlinear loads and reactive power support. However, it is important to ensure that photovoltaic inverters work below the rated current peak. Therefore, this paper proposes two current dynamic saturation techniques to limit the current peak of multifunctional photovoltaic inverters during harmonic current compensation of nonlinear loads. One technique is based on a closed loop and other on an open loop. With this approach, the photovoltaic inverters are able to perform partial harmonic current compensation, i.e., it will only be allowed to compensate harmonic currents within their maximum current capacity. Mathematical models are developed to determine the parameters of the techniques. Comparisons in simulation and experimental environments show that both techniques provide improvements in the grid power quality at the same time as the inverter rated current capacity is respected. [ABSTRACT FROM AUTHOR]

In self-commissioning, motor parameters are estimated by analyzing the measured currents and voltages. At standstill, the obtained voltages are low because the motor back EMF is zero. Therefore, the inverter nonlinearities are comparable with the estimated voltages and it is necessary to compensate for the nonlinearities. In order to model the inverters nonlinear characteristics, dc current test is conventionally used. However, this test results in a nonlinear equation that contains nonlinearities of two phases. Hence, a numerical solution must be carried out to achieve each inverter phase nonlinearity. Moreover, three-phase symmetry of the inverter is necessary in conventional methods, making them inappropriate to characterize the nonlinearities of multilevel inverters with bypassed cells. This paper proposes a novel characterization algorithm with no numerical solutions applied for motor self-commissioning of VSI-fed drives. Not only the proposed method improves the fundamental and the THD of the calculated phase voltage by 42% and 6% at low currents, respectively, but also it is suitable for characterizing the nonlinearities of multilevel inverters with bypassed cells. A prototype of a five-level cascaded H-bridge inverter and a two-level inverter feeding a 2.2-kW three-phase induction motor is provided to verify the superiority of the proposed method specifically at very low currents. [ABSTRACT FROM AUTHOR]

The pole-phase modulated induction motor (PPMIM) drives facilitate the extended range of speed-torque characteristics, which is an essential requirement for traction and electric vehicle applications. For getting the wider speed-torque variations, $15-\Phi $ PPMIM drive is analyzed, which is capable to operate at 2-pole 15-phase, 6-pole 5-phase, and 10-pole 3-phase modes. In these pole-phase operations, in high-phase and low-pole mode of operation, the increment in the linear modulation range with space vector pulsewidth modulation (SVPWM) is not significant. In the low-phase and high-pole mode of operation, there will be higher torque ripples due to the higher magnitude of space harmonics. In this paper, these issues are addressed by using carrier phase-shifted SVPWM (CPS-SVPWM) and phase grouping concepts. In low-pole operation, the linear modulation is enriched by using conventional $3-\Phi $ SVPWM to drive 15-phase machine by appropriately reorganizing the phase winding connections. Similarly, in 6-pole 5-phase mode of operation, the linear modulation range of PPMIM drive is enriched by using $5-\Phi $ SVPWM. It is known that in high-pole mode of PPMIM drive operation, each effective phase is formed by the multiple number of equal voltage potential coils (EVPCs), which are electrically in phase. The carriers of these EVPCs per phase are phase shifted by an appropriate angle to minimize the harmonics in the effective phase voltage, which results in better torque ripple profile. In addition, the detailed comparison of three possible different CPS-SVPWMs is presented, with their pros and cons for selecting the proper carrier phase shift angle. The performance of the proposed scheme has been validated by ANSYS Maxwell two-dimensional as well as laboratory prototype on 5-hp, $15-\Phi $ PPMIM drive. [ABSTRACT FROM AUTHOR]

This paper presents a new method for the accelerated aging tests of power semiconductor devices in photovoltaic (PV) inverters. Mission profiles are analyzed; output current and ambient temperature are extracted over several years from multiple PV plants located in France. It is then proposed to create a particular aging profile that takes into account not only the different constraints of the application of the PV inverters (high-frequency switching and sinusoidal-shaped current) but also reproduces a typical profile of the output current of PV inverters. Similarly, the ambient temperature varies as in the real application. By applying current injections with relatively long durations, the direct bonded copper (DBC) substrates and the coolers are subjected to high temperature swings. This method should shows better representation of the thermal behavior of dc/ac inverters used in PV applications, and is expected to show more representative results than traditional power cycling, thus reducing the favoring of certain failure modes to the detriment of others. [ABSTRACT FROM AUTHOR]

Renewable energy sources are typically interfaced to the grid using power electronics, which can cause their fault current characteristics to display significant low-frequency harmonics and unbalanced sequence impedances. Such current characteristics can lead to the operation failure of fault-component-based directional relays. To demonstrate the influence of inverter-interfaced renewable energy generators (IIREGs) on directional relays in detail, analytical expressions for the IIREG equivalent positive- and negative-sequence superimposed impedances are derived in this paper. Considering various factors, the angular characteristics of the sequence superimposed impedances are investigated. Based on these attributes, it can be concluded that fault-component-based directional relays may be unable to operate in some circumstances. A novel high-frequency impedance-based protection scheme is proposed to manage the adaptability problem by determining the fault direction due to a stable impedance angle. The theoretical analysis and the proposed scheme are tested and verified through real time digital simulation and field testing data. [ABSTRACT FROM AUTHOR]

The inductance is an important parameter impacting current ripple calculation, usually with the assumption that the designed inductance performs ideally in most of voltage source inverters (VSIs) applications. However, the initial permeability of magnetic material usually descends when the winding current reaches or goes beyond the saturation limit. In such region of saturation, the implemented inductor does not perform as expected in design stages and its value varies with the bias current. In this paper, analysis and calculation of the current ripple are presented for a three-phase VSI with powder cores-based inductors, which reveals the calculation error of current ripple caused by the soft saturation nature of powder cores. Based on the equivalent single-phase model, the influence of inductance saturation on current ripple can be quantitatively evaluated. Then, a comparison of the current ripple calculation between considering and ignoring inductance saturation of implemented inductors is drawn in detail. Furthermore, under the condition of inductance saturation, the output current ripple peak-to-peak value of three phases is used as the constraint for variable switching frequency pulsewidth modulation (VSFPWM) design. A comprehensive method is developed to compensate the effect of inductance saturation in VSFPWM. At last, the effectiveness of the proposed strategy is verified by the detailed simulation and experiment. [ABSTRACT FROM AUTHOR]

Wide bandgap semiconductor devices allow higher switching frequency and switching speed for their superior characteristics. However, the ultra-fast switching speed causes severe high dv/dt noise in power conversion systems. High dv/dt induced common mode noise deteriorates the operation of gate drivers and control circuits by capacitive coupling. Since some new-developed gate driver integrated circuits (ICs) have improved the common mode transient immunity capability, control circuits become the limit in achieving higher switching speed. This paper investigates the impact of the high dv/dt noise on the control systems of GaN inverters. An improved propagation model is derived based on a full bridge inverter, and the main paths are analyzed. According to the proposed propagation model, different high dv/dt noise reduction methods, such as the sensing methods, common mode chokes, and isolation barrier capacitance, are compared quantitatively. Sensing methods with high impedance show better performance and small isolation barrier capacitance of the power supply of gate driver ICs are significant for high dv/dt noise reduction. Simulation results are presented based on the Q3D extraction results of the investigated inverter system and a 500-W GaN-based full bridge inverter is built for experimental verification. [ABSTRACT FROM AUTHOR]

Voltage wave reflection phenomena along power cables are particularly threatening on ac motor drives equipped with silicon carbide power mosfets due to very short switching times and high switching frequency. Overvoltage suppression resistance inductance capacitance (RLC) networks are usually added but leading to extra cost and a lower efficiency. A completely different overvoltage mitigation approach is presented in this paper exploiting an open-end winding motor configuration. Overvoltage occurring on the terminals of motor phase windings are, in fact, mitigated by simply coordinating the operations of the two inverters; thus, no passive RLC networks are required. The proposed approach is intended as a mean to provide a further valuable feature to open-winding systems at no extra cost, but it can be also valued as an alternative to conventional bridge inverters equipped with overvoltage mitigation devices. [ABSTRACT FROM AUTHOR]

In this paper, instantaneous pulse power compensator (IPPC) method is proposed to achieve power pulsation decoupling function for single-phase inverter applications. A smaller capacitor is placed in series with the traditional dc-link capacitor, and this smaller capacitor voltage is controlled using pulse currents to cancel out the dc-link voltage ripple. Unlike twice-line-frequency power decoupling method, the proposed IPPC method can compensate the pulsating power with all the orders harmonics on the dc-link line, not only the second-order component. Both modeling and simulation results show that IPPC method can achieve nearly zero voltage ripple for the dc-link capacitor since the pulse current is fully compensated. Whereas twice-line-frequency power decoupling method has limit in voltage ripple reduction, especially in small dc-link capacitance conditions. The experimental results based on a full-bridge topology decoupling circuit and a single-phase inverter application show consistent results with simulation results. A 16% reduction of the prototype size, i.e., 16% higher power density with only ∼1% efficiency penalty can be achieved by the proposed IPPC method when compared to the second-order power decoupling method. [ABSTRACT FROM AUTHOR]

When many distributed parallel inverters are integrated into grid without switching sequence coordinated control capability, the high-frequency harmonics will accumulate randomly at the point of common coupling. Global synchronous pulsewidth modulation (GSPWM) method can significantly attenuate the accumulated switching ripples by intentionally assuming an intelligent optimization algorithm and a communication system. To avoid the dependence on low-latency communication system, this paper proposes a novel phase-locked loop based PWM carrier synchronization (PLL-CS) method for GSPWM system, where the switching sequences can be effectively synchronized as expected without using low-latency synchronization signals. By doing so, the operational reliability of the whole GSPWM system can be significantly improved, while the additional hardware cost of GSPWM can be dramatically reduced, which can enhance the implementation adaptability of GSPWM method. Experimental results have verified the performance of the proposed PLL-CS GSPWM method. [ABSTRACT FROM AUTHOR]

This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

It is well known that spatial field harmonics will cause high eddy current losses in surface-mounted permanent magnets (PMs) especially for the fractional-slot PM motors. However, the influence of temporal current harmonics, especially of the high-order temporal harmonics caused by pulsewidth modulation voltages from an inverter, lacks attentions. This paper studies the eddy current losses of the PMs caused by high-order current harmonics. In order to simplify the calculation and save computation time, analytical methods are used to predict the current harmonics caused by the PWM inverter, and the armature reaction field, the eddy current density, and losses in the PMs generated by the current harmonics. Finite element analysis, coupling simulation, and experimental studies are used to verify the analytical results. The study results show that the high-order current harmonics cause much higher eddy current losses than those caused by slotting and fundamental current even though the amplitudes of the high-order current harmonics are much lower. [ABSTRACT FROM AUTHOR]

The large-scale spread of hybrid electric vehicles (HEVs) in the automotive industry is dominated today by continuous variable transmission parallel powertrain as far as medium size car are concerned. As a matter of fact, the tendency in this sector is to design parallel architectures in that they have provided until now a higher overall powertrain efficiency. However, technological improvements in many electric components and their increased efficiency can reshape this vision and give new outlines on HEV structure design. This paper aims to show the potentials of the series architecture, thanks to the latest electrical improvements especially in storage systems and power electronics. In particular, simulation models and fuel consumption data over different road missions are presented for the series architecture proposed in this study. In addition, a comparison between these results and data available in the scientific literature for state-of-the-art HEVs is reported. [ABSTRACT FROM AUTHOR]

A novel pulsewidth modulation (PWM) scheme for the decoupled and coordinated control of two parallel connected split-phase induction machines is discussed in this paper for the first time. Both the motors are operated from a single six-phase voltage source inverter which acts as a power source, and two switched capacitor-fed auxiliary inverters to limit the flow of nontorque producing currents in each motor. Both the motors can be operated at its full rated power with low switching frequency, and decoupled control for full power range can be achieved with the proposed topology. This is possible because the individual machines do not carry the load/harmonic currents of other machine (unlike the conventional series or parallel connected systems). The converters can be modulated using sine-triangle PWM or space vector pulsewidth modulation (SVPWM). Furthermore, two different schemes of SVPWM techniques are proposed and compared in this paper. Exhaustive experimental results for all the modulation schemes are provided for steady state and transient operating conditions including start-up to validate the proposed topology and modulation schemes. [ABSTRACT FROM AUTHOR]

An inductive power transfer (IPT) converter usually has an optimum efficiency only at a matched load. Because of wide load range variation during battery charging, it is challenging for an IPT converter to achieve the required output and maintain high efficiency throughout the charging process. In this paper, a series–series compensated IPT converter with an active rectifier is analyzed and implemented for battery charging. Appropriate operations are employed for constant-current charging and constant-voltage (CV) charging. A novel operation approach is proposed to achieve constant output voltage and to ensure load impedance matching during CV charging without the help of an extra dc–dc converter, which incurs loss. Both a frequency modulated primary inverter and a phase-angle modulated secondary active rectifier can achieve soft switching. High efficiency can be maintained during the whole battery-charging profile. [ABSTRACT FROM AUTHOR]

This paper presents a transistor open-circuit fault diagnosis method based on an average model and post-fault reconfiguration algorithms for a grid-tied single-phase inverter that transfers power bi-directionally. The transistor open-circuit fault occurrence is detected by comparing the average bridge arm pole-to-pole voltage deviation and threshold first. Then, the exact faulty transistor is identified by developed algorithms based on post-fault reconfiguration of control (PFRC) and of utilizing redundant leg (PFRUR). These two fault identification algorithms are suitable for different situations. Compared with the PFRUR, the PFRC can identify the faulty transistor without the help of redundant leg, but the identification time is longer. For inverters equipped with redundant leg already, the PFRUR can achieve faster identification speed so that inverters in reliability-oriented applications can return to normal operation after fault with short interruption. With average model, this method only requires existing signals sampled for control, thus it can be embedded in system easily without adding extra sensors and diagnosis circuits. The sampling frequency can be as low as switching frequency. Furthermore, this method is suitable for both inverters with L or LCL filters. Finally, experiments are carried out on a 550-W/10-kHz grid-tied single-phase inverter to verify the effectiveness. [ABSTRACT FROM AUTHOR]

In this paper, a robust adaptive sliding-mode observer (SMO) is designed based on the surface permanent-magnet synchronous machine (SPMSM) model in rotor reference frame ($\gamma \delta $ -axis), and an online inverter nonlinearity identification and compensation method is proposed. In order to reduce the chattering of the SMO, an adaptive law is presented to help estimate the back electromotive forces of an SPMSM; thus, smaller gains can be set for switching functions of the SMO. The small-signal model of the proposed sensorless scheme is derived for analyzing the steady-state and dynamic behavior of the sensorless scheme. Voltage distortion, caused by nonlinear characteristics of switching devices, not only causes (6k ± 1)th harmonics in phase currents but also leads to a rotor position estimation error. The equivalent amplitude of the voltage distortion can be identified based on the derived small-signal model of the proposed sensorless scheme. To improve the accuracy of the estimated voltage distortion, a recursive restricted total least squares is applied to obtain the estimated amplitude of the voltage distortion. Experimental results validate the proposed sensorless control scheme and its effectiveness. [ABSTRACT FROM AUTHOR]

This paper contains a comparison between three topologies of a three-phase two-level inverter: A quasi-Z-source inverter (qZSI), a voltage-source inverter with a boost converter and a voltage-source inverter with an interleaved boost converter. experimental results obtained from laboratory tests of equivalent 6-kW 100-kHz inverters based on SiC mosfets and Schottky diodes are provided. The following parameters are compared: Quality of input inductor current and output phase voltage as well as total power losses in the inverters. The results for these parameters are obtained for input voltage ranging from 325 V to almost 600 V (where feasible), for two sets of equivalent modulation methods (two regular methods and two reduced-loss methods), for a couple of characteristic values of deadtime and for the operation both at the maximum value of modulation index and at equal values of voltage across the inverter bridge. Results of the experiments show that the qZSI topology may, at certain conditions, surpass the traditional two-stage inverter topologies in the areas of input inductor current quality, output voltage quality and also power losses (at high values of input voltage). What is needed to obtain that is a careful examination of operating conditions, applied modulation method and deadtime value. [ABSTRACT FROM AUTHOR]

Multilevel inverters (MLIs) are being used in wide range of power electronic applications. These converters have attracted a lot of attention during recent years and exist in different topologies with similar basic concepts. This paper presents five main submodules (SMs) to be used as the basic structures of MLIs. The paper reviews the common MLI topologies from the structural point of view. The topologies are divided into the different SMs to show conventional MLI configurations and future topologies that can be created from the main SMs. A comparative study between different topologies is performed in detail. The MLIs are categorized and investigated with from different perspectives such as the number of components, the ability to create inherent negative voltage, working in regeneration mode and using single dc source. [ABSTRACT FROM AUTHOR]

In medium-voltage drives, multistep model predictive control (MPC) can lower the total harmonic distortion of the stator currents and thereby reduce losses and improve efficiency. However, from the point of view of implementation, there is still uncertainty as to whether transients have a major adverse effect on achieving this improved steady-state performance. The time-varying nature of machine drives, initialization of the optimization process, and limited computational resources are identified as key factors. This paper analyzes the link between these key factors in detail, thus a suitable reformulation and selective initialization approach is designed to enable the deterministic use of multistep finite-control-set MPC irrespective of the drive system conditions. Guidelines to select the prediction horizon, weighting factor, and minimum switching frequency considering the control platform limitations are presented. The significant impacts of transients on the design and experimental validation, covering several drive conditions, are evaluated in a scaled-down three-level induction machine drive switching at 350 Hz. This paper is accompanied by a video demonstrating the real-time implementation of multistep MPC. [ABSTRACT FROM AUTHOR]

Interharmonics are emerging power quality challenges in grid-connected photovoltaic (PV) systems. Previous studies and field measurements have confirmed the evidence of interharmonic emission from PV inverters, where the maximum power point tracking (MPPT) is one of the main causes for interharmonics. In that regard, the MPPT parameters such as their sampling rate has a strong impact on the interharmonic characteristic of the PV system. In general, there is a trade-off between the interharmonic emission and the MPPT performance when selecting the sampling rate of the MPPT algorithm. More specifically, employing a faster MPPT sampling rate will improve the MPPT efficiency, but it will also increase the interharmonic emission level. To solve this issue, a new mitigating solution for interharmonics in PV systems is proposed in this paper. The proposed method modifies the MPPT algorithm in a way to randomly select the sampling rate between the fast and the slow value. By doing so, the interharmonics in the output current can be effectively reduced due to the distribution of the frequency spectrum. On the other hand, the MPPT performance of the proposed method can be maintained similar to the case when employing a fast MPPT sampling rate. The effectiveness of the proposed interharmonic mitigation has been validated experimentally on a single-phase grid-connected PV system. [ABSTRACT FROM AUTHOR]

In the six-step mode control of the interior permanent-magnet machine (IPMSM), inequality of the positive half-cycle length and the negative half-cycle length will bring about dc offset in the three-phase input current. This paper proposes a six-step mode control scheme of IPMSM for railway vehicle traction to eliminate the dc offset in input current. An approximately continuous rotor position signal is reconstructed in the field-programmable gate array chip. This position signal is used to generate the square drive signal for IPMSM in the flux-weaken region. Rotor position signal error of the resolver will also cause dc offset in the three-phase input current. A novel scheme using phase-locked loop to decrease the rotor position signal error is proposed. And using this scheme, the dc offset is eliminated from the three-phase input current. A seamless transition scheme from six-step mode control to space vector pulse width modulation (SVPWM) mode is proposed. The effectiveness of this six-step mode control scheme is proved by the experimental results. [ABSTRACT FROM AUTHOR]

In order to reduce switching loss of neutral point clamped three-level inverter (NPC TLI), generally discontinuous pulsewidth modulation (DPWM) is used. But it can result in dc offset and ac ripple on neutral point (NP) voltage. So a novel pulse sequence DPWM (NPSDPWM) is proposed to reduce switching loss and control NP voltage simultaneously in this paper. NP voltage is controlled by choosing proper clamping modes. To avoid unexpected switching action during changing clamping mode, an improved pulse sequence is also presented. The switching loss and NP voltage ripple of NPSDPWM, traditional and proposed DPWM in previous literature are compared, respectively. The experimental results show that NPSDPWM has well NP voltage control ability and the switching losses are reduced effectively. [ABSTRACT FROM AUTHOR]

This paper proposes an analytical time and frequency domains evaluation of torque harmonics produced by high-power load-commutated-inverters (LCIs) and pulsewidth-modulated (PWM) voltage-source inverters for adjustable speed applications. These drive systems are used in petrochemical and mining industries, where driven loads have multi-inertia or long shafts that are potentially subject to torsional mode excitation. Such excitation may lead to accelerated fatigue, system failure, and loss of production, and in turbine-generator sets, to system blackout. The investigated power conversion topologies are multi-pulse LCIs (6/6 and 12/12-pulse systems), parallel connected three-level neutral-clamped-converters with non-interleaved and interleaved PWM signals, as well as series-connected H-bridge multi-level inverters, single thread and four threads supplying a 12-phase machine and parallel connection of four threads converter systems with interleaved PWM commands. They are the most used variable frequency drives in the megawatt range, both with synchronous and induction machines, in the petrochemical industry. The time and frequency domains of the machine's air-gap torque is calculated from the motor's voltage and stator's current waveforms, this proven method is independent from the type of ac machine. More than 50 simulated operating points are discussed and experimental results for NPC and cascaded inverters are also presented. [ABSTRACT FROM AUTHOR]

The solid-state transformer (SST) has the ability to operate with only two input phases, which can be called single-phase open-circuit (SPO) operation. With this ability, the SST can maintain operation under permanent single-phase-to-ground faults, where the fault phase must be isolated, providing a better power supply sustainability than that of the conventional low-frequency transformer. In the absence of research on the SPO operation of an SST, this paper presents a study of it. The influence of SPO operation on the grid and the SST itself is analyzed. Under the SPO state, the SST will inject the negative-sequence current to the grid; meanwhile, the maximum load power will decline; thus, the optimized power factor under the SPO state is unity. The maximum power of △-SST is higher than that of the Y-SST under the SPO state owing to the △ connection. A control strategy for the SST medium-voltage cascaded H-bridge stage is proposed. SPO current control can be achieved by controlling the positive-sequence current. A proper negative-sequence voltage can be injected to synchronize the cluster voltages to obtain a lower current total harmonic distortion and smaller dc voltage ripple. In the △-SST, a proper zero-sequence current can be injected to fully use the power rating of the double-cluster branch. [ABSTRACT FROM AUTHOR]

This paper proposes a novel unified nonlinear optimization-based speed and position estimation algorithm for interior permanent magnet synchronous motor drives at wide speed range operations. A cost function based on the voltage equations in the stationary reference frame is employed for speed and position estimation. The speed and position can be estimated by minimizing the cost function. At low speed, including the standstill condition, the cost function is modified and high-frequency sinusoidal voltage signals are injected in the estimated magnetic axis. A phase locked loop is combined with the proposed position estimator for reducing the noise of estimation results. Compared with existing sensorless methods, a unified estimator is used at low- and high-speed operations and a better performance is obtained in transient and steady-state conditions. The convexity of the cost functions with respect to the speed and position estimation errors is analyzed in the paper. The feasibility of the proposed estimation algorithm is validated with an experimental test bench. [ABSTRACT FROM AUTHOR]