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For high-power PWM current-source motor drive systems, due to the low converter switching frequency and the relative small dc choke for reduced cost/weight, the converters’ switching harmonics may interact through dc link and produce interharmonics in the entire system. Such harmonics interaction phenomenon may give rise to the system resonance at certain motor speeds, which degrades the grid-side power quality and generates excessive torque ripples on the motor side. The resonance caused by the harmonics interaction in high-power PWM current-source motor drives is investigated in previous study. In addition, to actively suppress such resonance, the basic idea of a dc-link virtual impedance-based suppression method has also been proposed. This paper extends the previous study to thoroughly analyze the mechanism and realization of resonance suppression by the dc-link virtual impedance-based method. The in-depth analysis shows that the dc-link virtual impedance-based method successfully enables the active interharmonics compensation capability of high-power PWM current-source drives, which is not addressed in previous researches. Moreover, simulations and experiments demonstrate that, by following the selection of coefficient in the suppression method discussed in this paper, the dc-link virtual impedance-based method can effectively enhance the attenuation effect of dc link in high-power PWM current-source drive systems so as to suppress the resonance due to the harmonics interaction under all resonance conditions. [ABSTRACT FROM AUTHOR]

In this paper, a hybrid switch with the combination of large-current silicon (Si) insulated gate bipolar transistor (IGBT) and small-current silicon carbide (SiC) metal-oxide semiconductor field-effect transistor (mosfet) is utilized in a three-phase T-type three-level grid inverter. The hybrid switch can optimize the cost of the system while achieving high efficiency. The relationship between efficiency improvement and cost of the hybrid switch is investigated. Several switching patterns, which can decrease the loss of the small-current SiC mosfet for the hybrid switch, are studied. Different switching patterns for the hybrid switch of the grid inverter are compared based on the inverter efficiency. Finally, a 20 kW three-phase T-type three-level grid inverter prototype with the hybrid switch of large-current Si IGBT and small-current SiC mosfet (1:2.4 SiC/Si current ratio) is built to verify the main results. [ABSTRACT FROM AUTHOR]

In this paper, a novel discontinuous pulsewidth modulation (DPWM) modulation strategy for a neutral-point-clamped (NPC) three-level converter (TLC) is proposed to reduce the switching loss, reduce common-mode voltage (CMV), and remove dc offset from the neutral-point (NP) voltage simultaneously, which is named as RCMV_DPWM. Based on the space vector diagram with reduced CMV, all clamping modes under RCMV_DPWM are revealed. Then, the NP voltage is controlled by selecting proper clamping mode. The realization of RCMV_DPWM is also discussed. Moreover, the performances of RCMV_DPWM are analyzed and compared with other PWM strategies in term of the NP voltage ripple, switching loss, and waveform quality. Finally, the feasibility and superiority of RCMV_DPWM are verified by experiments. [ABSTRACT FROM AUTHOR]

This paper proposes a new pulse amplitude width modulation (PAWM) procedure for cascaded H-bridge multilevel inverters fed by dc voltage sources with unequal amplitudes. With proposed procedure, the generated output voltage is obtained modulating a sinusoidal reference signal at the desired fundamental frequency with equally spaced switching angles. It has been analytically demonstrated that, under these assumptions, all harmonics except those of order $n=2kl\pm 1$ , $k=1,2,\ldots$ are deleted from the output voltage waveform. After a detailed description of the method and a comparative analysis with others existing in the literature, its harmonics elimination capability has been experimentally verified with 5-, 7-, 9-, and 11-level cascaded H-bridge inverters, moreover, it has been mathematically demonstrated that it reduces total harmonic distortion below 5% with a 17-level inverter and it is capable of eliminating the first 49 harmonics considered by standards with a 27-level inverter. [ABSTRACT FROM AUTHOR]

The VIENNA rectifier is increasingly being considered as the active front-end converter in many applications that do not require regeneration or controllable input reactive power. In such applications, this rectifier is normally operated at unity source displacement factor, which derates its nominal voltampere (VA) rating. Moreover, in the “source voltage oriented” reference frame that is normally used for control, this rectifier has complex operating limits on the rectifier terminal voltage (imposed by the operating conditions), which needs to be computed online to avoid the line currents from going through zero-crossing distortions. Also, the source voltage has to be either measured or estimated, which further increases the cost and/or computational burden. This paper proposes a control method that eliminates the requirement of the input voltage sensors (or estimators) and makes the limits on the rectifier terminal voltage far simpler to compute. The control method is implemented in the input line current oriented reference frame, considering unity displacement factor at the rectifier input terminals, which minimizes the VA rating of the rectifier (for a given rated load power). The proposed sensorless current-oriented control approach is compared with the conventional voltage-oriented control strategy through experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a new method for generating variable-frequency sinusoidal current is proposed. This method is based on the series resonant inverter and can be used in adjustable frequency drives. In the proposed method, each half-cycle of the fundamental frequency consists of a number of half-sine waves with different amplitudes and widths, which are arranged side-by-side. In this method, switching losses and output harmonic content can be significantly reduced. The circuit needed to generate this waveform can be implemented by a modified series resonant inverter with a number of capacitors. A performance comparison of the proposed method and the conventional sinusoidal pulsewidth modulation technique is presented to evaluate improvements in the method. [ABSTRACT FROM AUTHOR]

This paper presents a novel closed-loop digital control scheme to maintain proper interleaving operation of a multi-channel boundary-conduction-mode boost converter used in power-factor-correction applications. The proposed control scheme is suitable for implementation on a low-cost microcontroller. This is made possible by executing the control scheme at a constant sampling rate that is much slower than the maximum switching frequency of the converter. The performance of the control scheme is further improved by using an adaptive gain that scales with the on-time of the converter, which provides optimal phase-shift control and stability under all operating conditions. The digital closed-loop control scheme is validated experimentally on a three-channel 1-kW prototype ac–dc converter. The converter has an output voltage of 400 V and a universal input voltage range of 85–265 V. The prototype converter uses a low-cost microcontroller while demonstrating correct interleaving operation. [ABSTRACT FROM AUTHOR]

The three-level dual-inverter connected to five-phase open-end winding induction motor (FPOEWIM) drive with a single dc source results in the flow of common mode current (CMC). The CMC flows through the common dc bus connected to dual-inverter and the motor phase windings. The CMC can be eliminated by using the switching states that can generate zero common mode voltage (CMV). In case of FPOEWIM, these switching states may result in higher current ripple. This paper proposes a decoupled pulsewidth modulation (PWM) technique to reduce the motor phase current ripple by using nearest possible space vector locations (SVLs) with zero as well as non-zero CMV. The use of non-zero CMV states results in CMC. So, the CMC is averaged to zero using sample-averaged common-mode current elimination (SACE) PWM technique in conjunction with decoupled PWM, which is named as DSACE PWM technique. Furthermore, the application of the proposed PWM is also supported using simulation for the closed-loop control scheme, such as DTC. Also, the proposed decoupled and DSACE PWM techniques are verified experimentally and the results are compared with the conventional 144° decoupled PWM technique. [ABSTRACT FROM AUTHOR]

Two measurement schemes, namely, the modulation signal perturbation scheme and the pulse perturbation scheme, have been used for evaluating the loop gain of dc–dc converters. However, the two measured loop gains do not give consistent results due to the use of different forms of the injected small perturbation signal, and the difference in the two schemes cannot be distinguished by the usual averaged model. In this paper, the two loop gain measurement schemes are analyzed based on an extended-frequency-range small-signal model. Expressions of the loop gain are derived and their use in stability assessment and derivation of closed loop transfer functions is demonstrated. A sample-and-hold scheme is proposed as a simple alternative implementation of the pulse perturbation scheme. Finally, experimental prototypes of buck, boost, and buck–boost converters are tested for verification of the analytical results and the effectiveness of the sample-and-hold scheme. [ABSTRACT FROM AUTHOR]

This paper proposed a novel hybrid random pulsewidth modulation (HRPWM) technique based on the modified space vector PWM for three-phase voltage source inverters to eliminate the PWM acoustic noise. Due to PWM technique and switching losses considerations, ear-piercing high-frequency noise from motor is common. The proposed HRPWM technique is able to remove the high-frequency unpleasant acoustic noise more effectively than the conventional RPWM with lower switching losses and shorter random frequency range. In addition, the PWM harmonics in phase voltage and phase current are reduced significantly. The HRPWM method is simple to implement and does not employ additional circuits in drive system. Finally, the effectiveness of the proposed approach has been confirmed by detailed experimental results. [ABSTRACT FROM AUTHOR]

In the renewable energy generation systems, the grid-connected inverter with LCL filter (GCI-LCL) is an important device to realize dc–ac power conversion and connect the distributed power generation system and power grid. However, the resonance problems of the LCL filter may bring instability to GCI-LCL. Besides, the grid impedance and the time delay in digital controllers also have a harmful influence on the stability of GCI-LCL. To solve these problems, a dual-current active damping control strategy based on the inverter-side current and grid-connected current feedback for GCI-LCL is proposed in this paper, and the systematic parameters design process is investigated. Compared with the conventional damping strategies, a resonance suppression for the LCL filter, a larger stability margin, and a better anti-interference capability in a weak grid can be achieved under the proposed strategy. In addition, by analyzing the active damping effect of the proposed strategy, a simplified model in a low-frequency band for GCI-LCL is proposed to enhance the anti-interference capability in the weak grid and simplify the parameters design process. Finally, a GCI-LCL prototype is constructed and the experiment results verify the correctness and feasibility of the analysis and proposed strategy. [ABSTRACT FROM AUTHOR]

Active pulsating power buffering (PPB) function can effectively reduce the twice-line frequency energy storage requirement in a single-phase rectifier. Existing single-phase solutions with active PPB must utilize more than two active switches in their circuits. Compared with conventional single-active-switch solutions without active PPB (e.g., a boost power-factor-correction (PFC) rectifier), the cost of additional semiconductor switches and gate drive circuitry in an active PPB-based rectifier may not be justified for low-power applications. This paper presents a family of single-switch single-phase rectifier with active PPB. Taking advantage of the on-time and off-time of a single switch, the proposed rectifiers are formulated by merging two converters that are duty and frequency controlled. The steady-state characteristics of these converters are analyzed. A step-by-step design procedure is provided, and an active control method for limiting the maximum switching frequency for wide-load-range operation is presented. A 100-W prototype is built for the demonstration of the proposed single-switch rectifier concept. It is envisaged that this concept, when combined with other circuit formulation techniques, e.g., partial power processing, dc-voltage feedback, may lead to new derivatives of single-switch rectifiers with more advanced features. [ABSTRACT FROM AUTHOR]

It is generally known that averaged models are inadequate in describing the effects of leading-edge and trailing-edge pulsewidth modulation (PWM) on the stability of dc–dc converters. In this paper, using discrete-time models of the buck, boost, and buck–boost converters and considering the effects of leading-edge and trailing-edge PWM, the general expressions of the duty-cycle-to-output-voltage transfer function, Gvd(z), in the discrete-time domain are derived. Based on the low-pass characteristics of the dc-dc converters and related properties of the matrix functions, approximate expressions of Gvd in the frequency domain are derived, which are simple and accurate up to half the switching frequency. Using the approximate Gvd, the stability of the three basic dc–dc converters under leading-edge and trailing-edge PWM is analyzed. It is shown that the stability of the buck converter is unaffected by the type of PWM, while the leading-edge modulated boost and buck–boost converters have better stability than the trailing-edge modulated ones. Since the trailing-edge modulation is commonly available in PWM controller integrated circuits, the modulation signal zero-order holding (ZOH) method and the inductor current feedback control method are proposed for use in the trailing-edge modulated boost and buck–boost converters to achieve the same effect of leading-edge modulated converters. Experimental buck and boost converters were constructed for verification of the accuracy of the proposed model and the validity of the proposed control schemes. [ABSTRACT FROM AUTHOR]

This paper proposes a novel space vector pulsewidth modulation (SVPWM) strategy to reduce the switching-frequency-order inverter input current harmonics for a two-level three-phase voltage-source inverter operating over a wide range of the load power factor. The fluctuation of the inverter input current around its average value is minimized by optimization of the utilized voltage space vectors to reduce the inverter input current harmonics, which extends the lifetime of the dc-link electrolytic capacitors. Furthermore, the proposed strategy can be adapted to a motor drive system, where a wide variation of the load power factor is desired, by changing the optimized combinations of the voltage space vectors according to the polarities of the output phase currents. Experiments with the application of the novel SVPWM confirm that the inverter input current harmonics is reduced by up to 29.5% compared to that with the conventional SVPWM strategy. Moreover, the analytical and experimental results confirm that the proposed SVPWM reduces the inverter input current harmonics in both driving mode and regenerative braking mode, as well as with any load power factor. [ABSTRACT FROM AUTHOR]

The highly efficient and reliable inverter concept (HERIC) inverter is a cost-effective topology, which has low leakage currents and a relatively high efficiency. Thus, it is very suitable for transformerless photovoltaic systems. However, with the reported modulation methods, it is difficult to simultaneously maintain the high efficiency, good power quality, and reactive power injection of the HERIC inverter. In this paper, a hybrid unipolar pulsewidth modulation (UP-PWM) scheme is thus proposed to achieve those performances. The hybrid scheme adopts the conventional UP-PWM in the case of generating the positive power. When generating the negative power, a modulation scheme, which only requires the operation of freewheeling switches, is specifically proposed. Additionally, in the region of the output voltage and current zero-crossing points, a UP-PWM with modified deadtime is introduced. In order to validate the effectiveness of the proposed scheme, simulations and experiments are performed on a 4-kW HERIC inverter system with a 20-kHz switching frequency. The results demonstrate that the proposed hybrid UP-PWM method achieves a better performance in terms of reactive power injection than the conventional UP-PWM scheme, and a higher efficiency than the UP-PWM with deadtime. In addition, the proposed UP-PWM scheme also enables a better power quality. [ABSTRACT FROM AUTHOR]

This paper proposes an enhanced system-delay-tolerant signal processing method for high-frequency (HF) signal injection based position sensorless interior permanent magnet synchronous machine (IPMSM) drives. To reduce the acoustic noises induced by the HF response current using the conventional fixed-frequency sinusoidal injection based method, the pseudorandom-frequency sinusoidal injection strategy is proposed and comparatively evaluated in terms of the power spectral density of the phase current. Furthermore, the position estimation degradation caused by the system delay effects due to the pulsewidth modulation (PWM) update delay and the hardware delay using the common signal processing method, especially with the injection frequency increasing, is analyzed. On this basis, an enhanced system-delay-tolerant signal processing strategy is proposed. Through the normalization process for the HF response current and coordinate transform, the terms related to plant parameters and system delays can be cancelled. Therefore, the reliable saliency based method with a higher injection frequency can be achieved. The comparative evaluation on a 2.2-kW position sensorless IPMSM drive is carried out, which verifies the effectiveness of the proposed scheme. [ABSTRACT FROM AUTHOR]

In this paper, a fast-processing implementation method of the current-ripple-loss-optimized common-mode voltage reduction pulsewidth modulation (CRLO-CMVRPWM) is studied. With the novel sector definitions and the simplified method to solve the constraint nonlinear programming model, the compute burden of the proposed method is reduced by 82.8% and 50.5% for the case where the modulation index is below and above $4\sqrt 3 /9$ , respectively. In addition, the effects of the optimized zero-sequence voltage errors caused by the adopted linear fitting strategy are proven to be negligible by studying the harmonic characteristics difference between the fast-processing and original CRLO-CMVRPWM. Simulated and experimental results are given to validate the effectiveness. [ABSTRACT FROM AUTHOR]

A fast modularized multiwinding transformer balancing topology (MMTBT) for series-connected supercapacitors is proposed in this paper. With the proposed MMTBT, the voltage balancing inside modules and between modules are completely decoupled and the degree of modularization is high. This is different from the existing MMTBT, with the existing MMTBT, different modules share the same PWM drive. While with the proposed MMTBT, different modules can be driven by different PWM, then the variable frequency control strategy can be used to realize a fast balancing speed. With the proposed variable frequency control strategy, the average balancing current will be large and the balancing speed inside modules will be fast. With the proposed MMTBT, the balancing between modules is realized by discharging the higher voltage modules. The MMTBT of the higher voltage modules will act as a fly-back converter and the excitation current is in continuous current mode (CCM) to realize a great discharging power. First, the extra energy from the higher voltage module is transferred to the filter capacitor of the half-bridge converter. Then, the outputs of the half-bridge converters are connected in series to form a multilevel converter to act as the input of a boost converter. At last, the energy is transferred back to the supercapacitor energy storage system by the boost converter. The higher voltage module will be discharged with a great discharging power, then the balancing speed between modules will be fast. The fast balancing speed is realized inside modules and between modules, then the balancing speed of the whole system will be fast. The variable frequency control strategy and the control strategy of boost converter are analyzed in detail and the fast balancing speed of the proposed balancing topology is proved by experimental results. [ABSTRACT FROM AUTHOR]

The dead-time elimination pulsewidth modulation (PWM) enables the drive pulses of the upper and the lower switching devices to alternate according to the current polarity, thus abandoning the dead time and essentially avoiding the dead-time effect in power converters. However, the current zero crossing will be distorted by the current jump generated by the drive-pulse alternation, and the current zero-crossing distortion will be further intensified if errors exist in the detected current polarity. Thanks to the noise-attenuation and frequency-adaptability characteristics of the double second-order generalized integrator frequency-locked loop (DSOGI-FLL), it can obtain accurate current polarities even in harmonic and unbalanced conditions. A DSOGI-FLL-based dead-time elimination PWM is, therefore, proposed in this paper, and several improvements are made to minimize the current zero-crossing distortion. An underlap period is added when alternating the upper and lower drive pulses to smooth the current jump at zero crossing, and a delay compensation term is inserted in the DSOGI-FLL to compensate both the current measurement delay and the control delay. The effectiveness of the proposed DSOGI-FLL-based dead-time elimination PWM has been validated by experiments, respectively, in the unbalanced-current, power-change, and frequency-variation conditions with an RL load, as well as in a grid-connected converter. [ABSTRACT FROM AUTHOR]

This paper presents a novel single-stage, isolated, and single-phase dc–ac converter topology, suitable for low-medium power-scale solar photovoltaic and fuel-cell applications. The circuit employs two full-bridge cells with floating dc bus capacitors placed on either side of a high-frequency transformer and works on the dual-active-bridge principle. It has advantages of a single-stage power processing structure, low device count (uses eight switches), and the possibility of achieving zero-voltage-switching operation over the full ac line cycle. Moreover, by dynamic variation of phase-shift between the high-frequency primary and secondary voltages, twice-line-frequency energy buffering can be affected via the high-voltage side dc bus capacitor, which reduces decoupling capacitance requirement, enabling a film capacitor-based implementation. Basic operating principle, control strategy, and detailed design optimization guidelines of the circuit are described followed by simulation results to validate the approach. Practical evaluation of converter performance is done on a 250 W, 20–35 V input, and 110 V rms output prototype. [ABSTRACT FROM AUTHOR]

This paper proposed a novel family of pulsewidth modulation (PWM) strategies for single-phase quasi-switched boost inverter (qSBI). By combining shoot-through (ST) mode in the inverter's switches and the turning-on state of an additional switch, the qSBI produced a high voltage gain without adding any passive components. Compared to the conventional PWM strategy for the same input and output voltage gain, the introduced PWM strategies for qSBI could reduce voltage stress across semiconductors and capacitor with the following additional merits: having smaller high-frequency inductor current and capacitor voltage ripples, using high modulation index with low ST duty cycle, and having higher efficiency. Circuit analysis, operating theories, and simulation results of the single-phase qSBI with the introduced PWM5 strategy are shown. A 500-W laboratory prototype was constructed and the effectiveness of the introduced PWM strategy was validated. The qSBI with the proposed PWM strategies is suitable for applications where the required voltage gain lies between 2 and 3. [ABSTRACT FROM AUTHOR]

Common-mode voltage (CMV) problem brings severe negative effects in three-phase voltage source inverters (VSIs), particularly for high-frequency silicon (Si) carbide (SiC) VSIs. However, most traditional CMV reduction strategies, which are studied based on Si VSIs, are hard to be implemented and sacrifice the other performance of the VSIs. To overcome such drawbacks, this paper proposes a novel generalized tri-state pulsewidth modulation (GTSPWM) for high-frequency SiC VSIs over power factor of 0–1 and whole linear modulation index range. The working principle of conventional space vector based reduced CMV PWM (RCMV-PWM) methods are reviewed, and their switching signals and CMV patterns are illustrated. The proposed GTSPWM method is described in a generalized scalar PWM approach for simple application and compared with other RCMV-PWM methods. Mathematical analysis, simulations, and experimental results have been used to verify that GTSPWM based high-frequency SiC VSIs can achieve minimum switching losses, improved output waveform quality, smaller dc-link current ripples, and RCMV characteristics. Moreover, with the usage of GTSPWM method, the switching frequency of SiC VSIs can be further increased, and the performance of high-frequency SiC VSIs could be improved appreciably. [ABSTRACT FROM AUTHOR]

Photovoltaic (PV) systems containing a rechargeable battery as an energy buffer require multiple dc–dc converters for PV panel control and battery regulation, and hence, they are prone to be complex and costly. To simplify the system by reducing the number of converters, this paper proposes the nonisolated switched capacitor converter (SCC)-based multiport converter (SC-MPC) for standalone PV systems. The proposed SC-MPC can be derived by integrating a bidirectional pulsewidth modulation (PWM) converter, series-resonant converter (SRC), and an SCC with sharing switches. PWM and pulse frequency modulation (PFM) controls are employed for the PWM converter and SRC, respectively, to regulate either a battery voltage, output voltage, or input power from a PV panel, depending on power balance among the input, battery, and load. The 150-W prototype was built for an experimental verification, and the results demonstrated the output voltage could be regulated independently on the battery voltage or input port of PV panels. [ABSTRACT FROM AUTHOR]

In this paper, a novel space-vector pulsewidth modulation technique for a five-level active neutral-point clamped (5L-ANPC) inverter is proposed to eliminate the common-mode voltage (CMV). For the 5L-ANPC inverter, which produces a good output voltage performance and lowdv/dt, the total 125 voltage vectors can be generated, among which the proposed scheme employs only 19 voltage vectors producing a zero CMV. Due to the limitation of voltage vectors selected, the dc-link capacitor voltages of the 5L-ANPC inverter cannot be balanced by themselves. Therefore, the capacitor voltages of the inverter should be controlled by choosing the redundant switching states appropriately. The validity of the proposed modulation scheme has been verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

High step-down voltage conversion is necessary to bridge the voltage gap between main power converters and low-voltage auxiliary electronics in power conversion systems. Switched capacitor converters (SCCs) are an attractive candidate as a high step-down converter, but their poor voltage regulation capability may limit their applications. Pulsewidth modulation (PWM) SCCs with adjustable high step-down voltage conversion are proposed in this paper. The proposed PWM SCCs can be derived from traditional SCCs by replacing an energy transfer capacitor with a switched-capacitor-inductor (SCL) cell that comprises inductors, capacitors, and diodes to realize PWM-controllable voltage conversion. The voltage step-down ratio of the proposed PWM SCCs is not only PWM controllable but also adjustable with structures of SCCs and SCL cells. Two representative PWM SCCs were taken as examples to perform the operational analysis. The prototypes of both representative PWM SCCs were built and tested to demonstrate the proposed concept. [ABSTRACT FROM AUTHOR]

In voltage-source inverters (VSIs), dead time is used to prevent shoot-through over switching devices. However, the existence of the dead time will distort the output phase current, which degrades the performance of the inverter as well as influences the common-mode voltage (CMV), particularly in CMV elimination relevant modulation schemes, such as zero-common-mode (CM) pulsewidth modulation (PWM)-based paralleled inverters. In the light of the situation that the normal sampling-based dead-time compensation (DTC) methods are often disturbed by the current ripple, this paper introduces a novel DTC method for the VSI, which can mitigate the impact of the current ripple and improve the accuracy of DTC. The proposed method deduces the real-time current ripple, which can reconstruct the actual trajectory of phase-leg currents, and the peak values corresponding to rising and falling edges for PWM signals can be predicted. In this way, DTC can be implemented based on the direction of relevant instantaneous switching currents and finally improves the accuracy. Especially, the current-ripple-prediction-based DTC can help to improve the CMV distortion caused by the dead time for paralleled inverters with zero-CM PWM. Simulation and experimental results are provided to validate that the proposed method can be applied to different topologies and modulation schemes with good performance. [ABSTRACT FROM AUTHOR]

Common-mode voltage (CMV) is known as a major cause of premature motor failures. The form and amplitude of the CMV generated by any converter depends on both the circuit topology and modulation technique. Among single stage ac–ac converters employed in drive applications, the Z-source ultra sparse matrix converter (ZSUSMC) is a desirable choice due to reduced number of switches in its structure and voltage boosting capability. Based on these considerations, this paper aims to: 1) theoretically determine and compare the CMV of the ZSUSMC with four well-known impedance networks, namely, cascaded, switched-inductor, quasi, and series, in its structure and 2) propose modulation techniques for CMV reduction in the ZSUSMCs. To this end, first, it is shown that the ZSUSMC, depending on the impedance network used in its structure, provides more freedom to choose from redundant switching states compared to the ultra sparse matrix converter. Then, by taking advantage of this feature, novel modulation strategies that attenuate the CMV without affecting the boosting capability are developed. The proposed modulation schemes are based on avoiding the switching states most contributing to the CMV during a switching period. Through hardware-in-the-loop studies, the effectiveness of the proposed modulation strategies in reducing the CMV of the ZSUSMCs is verified. [ABSTRACT FROM AUTHOR]

A cascaded H-bridge (CHB) converter-based medium or high-voltage motor drive system, that consists of three single-phase CHB chains, may suffer a severe second-harmonic ripple power issue. Oversizing dc capacitors and using active power decoupling control with additional active or passive components are the two possible ways to address this issue, but this is achieved at the expense of increased system cost and complexity. This paper proposes a power decoupling control to tackle this issue without using any extra components for regenerative CHB-based converters. By introducing a set of negative-sequence decoupling currents to the front-end pulsewidth-modulated rectifier of each submodule, the second-harmonic ripple power can be removed from the submodule dc capacitors, and all the ripple power in the transformer core legs can be counteracted without affecting the magnetic flux and the grid current. The decoupling current is derived from the input and output measurements of the CHB converter. It gives the minimal increase of the modulation index and has no impacts on the input and output power quality. The effectiveness of the proposed control is verified in simulations and a 72-kW experimental prototype. [ABSTRACT FROM AUTHOR]

At present, virtual flux voltage oriented control strategy is one of the widely used control strategies without grid voltage sensor. To solve the dc bias resulting from voltage vector integration in vector calculation of virtual flux and further avoid the steady-state error, a virtual flux observer with negative feedback resonant filter is presented in this paper based on virtual flux principle and a delay compensation algorithm is also proposed to solve the delay of virtual flux. In addition, the control system diagram of the pulsewidth modulated rectifier without grid voltage sensor is brought forth. Then, simulation system and experimental platform are both established to simulate and test the rectifier. Eventually, the correctness and feasibility of the proposed algorithm are verified through the analysis of simulation and experimental results. [ABSTRACT FROM AUTHOR]

With the development of insulated gate bipolar transistor (IGBT) and pulsewidth modulation control strategy, the voltage source converter (VSC) is getting more and more popular, which can be used in high-voltage frequency converter, VSC-HVDC, FACTS, and custom power. In high voltage and high power applications, serial connection of IGBTs is a good solution to overcome the voltage limitation of the single IGBT. However, for using IGBTs in this way, a comprehensive range of issues need to be addressed, especially the static and dynamic voltage-sharing of each IGBT module. This paper presents the theoretical and practical study on how to use serial-connected IGBTs in a VSC, including adaptive dynamic voltage-balance strategy, voltage-balance circuit, power supply system, and valve vase electronics. A three-phase two-level VSC consisted of 6 arms multiplied by 12 serial-connected 3300 V IGBT modules is also developed. To test the performance of the VSC, pulse test of the one arm and inverter operation test of the whole VSC are carried out. The experimental results show that the maximum voltage imbalance is about 10%, the voltage shoots are less than 12%; and the VSC works stably, which indicates a solid foundation for industrial application. [ABSTRACT FROM AUTHOR]

This paper introduces a low complexity implementation of the voltage balancing algorithm aiming to reduce the switching frequency of the power devices in modular multilevel converters (MMCs). The proposed algorithm features a relatively simple implementation without any conditional execution requirements and is easily expandable regardless of the number of submodules (SMs). Twomodulation techniques are evaluated, namely the staircase modulation and the phase-disposition pulse width modulation (PD-PWM) under the conventional and the proposed algorithm. Using a circulating current controller in an MMC with 12 SMs per arm, PD-PWM yields better results compared to the staircase modulation technique. The test condition for this comparison is such that the power devices operate at a similar switching frequency and produce similar amplitudes to the capacitor voltage ripples in both modulation techniques. The results are verified through extensive simulations and experiments on a low power phase-leg MMC laboratory prototype. [ABSTRACT FROM AUTHOR]

Parallel voltage-source converters (VSCs) require an inductive filter to suppress the circulating current. The size of this filter can be minimized by reducing either the maximum value of the flux linkage or the core losses. This paper presents a modified discontinuous pulsewidth modulation (DPWM) scheme to reduce the maximum value of the flux linkage and the core losses in the circulating current filter. In the proposed PWM scheme, the dwell time of an active vector is divided within a half-carrier cycle to ensure simultaneous occurrence of the same zero vectors in both VSCs. A function to decide the ratio of the dwell time of the divided active vector is also presented. The effect of the proposed PWM scheme on the maximum value of the flux linkage and the core losses is analyzed and compared with that of the space vector modulation and 60° clamped DPWM schemes. The analytical expressions for the maximum value of the flux linkage are derived for each of these PWM schemes. In addition, the effect of the proposed PWM scheme on the line current ripple and the switching losses is also analyzed and compared. To verify the analysis, experimental results are presented, which prove the effectiveness of the proposed PWM scheme. [ABSTRACT FROM AUTHOR]

State-of-the-art low-power-level metal-oxide-semiconductor field-effect transistor (MOSFET)-based transformerless photovoltaic (PV) inverters can achieve high efficiency by using latest super junction MOSFETs. However, these MOSFET-based inverter topologies suffer from one or more of these drawbacks: MOSFET failure risk from body diode reverse recovery, increased conduction losses due to more devices, or low magnetics utilization. By splitting the conventional MOSFET-based phase leg with an optimized inductor, this paper proposes a novel MOSFET-based phase leg configuration to minimize these drawbacks. Based on the proposed phase leg configuration, a high efficiency single-phase MOSFET transformerless inverter is presented for the PV microinverter applications. The pulsewidth modulation (PWM) modulation and circuit operation principle are then described. The common-mode and differential-mode voltage model is then presented and analyzed for circuit design. Experimental results of a 250 W hardware prototype are shown to demonstrate the merits of the proposed transformerless inverter on nonisolated two-stage PV microinverter application. [ABSTRACT FROM AUTHOR]

In this paper, various types of discontinuous space vector pulse-width modulation techniques for a three-leg voltage source inverter supplying balanced two-phase loads are proposed. The main objectives of the paper are to analyze switching loss characteristics associated with semiconductor devices and to reduce output current ripple by dealing with various types of zero space vector time in each switching sequence. Capabilities of reductions in switching losses and current ripple for both balanced and unbalanced output phase voltages at high modulation index and load power factor angle of 30° lagging are focused. The validity of the proposed techniques is verified by simulation and experimental results in terms of voltage spectrum, current waveforms, reductions in switching losses, and output current ripple at high modulation index when compared to a continuous space vector pulse-width modulation technique. [ABSTRACT FROM AUTHOR]

This paper presents novel single-phase pulse width modulation (PWM) ac-ac converters that can solve the commutation problem in single-phase direct PWM ac-ac converters without sensing the input voltage polarity. By using a basic switching cell structure and coupled inductors, the proposed ac-ac converters can be short- and open-circuited without damaging the switching devices. Neither lossy RC snubber nor dedicated soft commutation strategy is required in the proposed converter. By replacing the conventional phase-leg of the PWM ac-ac converters with the switching cell structure and the coupled inductor, three novel buck, boost, and buck-boost type PWM ac-ac converters are developed. Although two coupled inductors are required for the proposed converter, the input inductor of the proposed converter can be much smaller than that of the conventional PWM ac-ac converters. The volume of the magnetic components can be further reduced by increasing switching frequency of the converter because very fast recovery diodes can be selected externally. In order to verify performance and robustness of the proposed converter, a 200-W boost type prototype converter was built and tested with both mismatched gate signals and highly distorted input voltage. [ABSTRACT FROM AUTHOR]

This paper proposes a voltage balancing method for flying capacitor multilevel converters based on phase-disposition pulse width modulation (PD-PWM) using optimal transitions between converter switching states. The optimal transitions between converter switching states are possible due to the converter states' redundancy and are decided with the continuous evaluation and minimization of a cost function. Simulation and experimental results verify the robustness of the proposed voltage balancing method against different load conditions. A significant reduction of the average switching frequency is achieved, when compared to the use of the optimal state voltage balancing method, where the optimal states are decided independently for each voltage level ignoring how transitions impact on the converter switching frequency. Moreover, the line-to-line output voltages are compared with the ones obtained with other modulation techniques in terms of total harmonic distortion values, and PD-PWM with the proposed voltage balancing method produces the best results. [ABSTRACT FROM AUTHOR]

Full-bridge (FB)-boost converter is suitable for applications with wide input voltage range and galvanic isolation requirement, and a two-mode phase-shift (PS)-two-edge modulation (TEM) control scheme based on two modulation signals and one carrier can be used to achieve automatic mode shifting and high efficiency. In order to reduce the influence of the input voltage disturbance on the output voltage, the small-signal model of FB-boost converter is built and the input voltage feed-forward (IVFF) functions under different operating modes are derived in this paper. In view of the small-signal and large-signal control laws of the derived IVFF functions, the two-mode PS-TEM control schemes with small-signal and large-signal IVFF compensations are proposed, respectively. Both of them can realize automatic selection of operating modes and the corresponding IVFF compensations, and thus high efficiency and improved input transient response can be guaranteed. Besides, the IVFF function in boost mode is simplified for easy implementation, and the comparisons among the two-mode PS-TEM control schemes with small-signal, large-signal, and without IVFF compensations are presented in this paper. Finally, a 250-500-V input, 360-V output, and 6-kW-rated power prototype demonstrates the effectiveness of the proposed control schemes. [ABSTRACT FROM AUTHOR]

Based on the Z-source inverter, this paper proposed a novel approach to zero-crossing point (ZCP) detections during the shoot-through vectors for sensorless brushless dc motor (BLDCM). The proposed approach separates the ZCP detections from speed adjustment, and makes the shoot-through vector not influence the motor speed-adjustment directly, while the zero-vectors and active-vectors are used exclusively to adjust the speed of BLDCM. With the proposed approach, the sensorless BLDCM can operate in a wide speed range without switching the detection points and the reference levels, and it is unnecessary to change the reference levels according to the PWM technique. The terminal voltages limited by diode can be directly compared with the reference zero level during the shoot-through vectors, so as to reduce the detection error caused by attenuation. Moreover, Z-source inverter not only provides boost voltage for sensorless BLDCM drive system, but also improves the utilization rate of dc source voltage and the safety of the drive system. In addition, this paper analyzed the terminal voltages of the floating phase during each vector. The experimental results verified the correctness of above theories and proved the effectiveness of the proposed approach. [ABSTRACT FROM AUTHOR]

Pulse width modulation (PWM) converters generate switching common-mode voltages (CMVs) across the load terminals. These voltages cause common-mode currents, leading to bearing failure in motor loads and electromagnetic interference problems. This paper presents a generalized carrier-based PWM technique for open-end winding motor drives that completely eliminates switching CMV. The proposed method is applicable to both dual two-level voltage source inverter and dual matrix converter-based open-end winding drives. Detailed analysis shows that the carrier-based method requires significantly less computation compared to the corresponding space vector implementation. This paper also outlines the relationship between the two implementations. The carrier-based method is shown to achieve superior performance in terms of resource requirements and execution time when implemented on a field-programmable gate array-based real-time control platform. Simulation and experimental results have been presented to validate the proposed method. [ABSTRACT FROM AUTHOR]

The analysis and assessment of the pulsewidth modulation (PWM) techniques is commonly based on the comparison of the total harmonic distortion (THD) results. THD is usually calculated by application of the Fourier transformation and by taking a limited number of harmonics into the consideration. In this paper, derivation of analytical formulas for the phase voltage THD is presented. The considered system is a symmetrical multiphase star-connected load, supplied from a multilevel pulsewidth-modulated voltage-source inverter (VSI, three-phase case is also covered). The solution is based on the Parseval's theorem, which links frequency spectrum and time domain through the average power (i.e., root-mean-square (rms) squared value) of the signal. The assumption throughout the derivations is that the ratio of the switching to fundamental frequency is high. Derivations are based on the integration of the power of the PWM signal in a single switching period over the fundamental period of the signal. Only ideal sinusoidal reference voltages are analyzed, and no injection of any type is considered. Formulas for phase voltage THD for any number of phases are derived for two- and three-level cases, for the most commonly used carrier-based methods. Comparison of the analytically obtained curves with simulation and experimental results shows a high level of agreement and validates the analysis and derivations. [ABSTRACT FROM AUTHOR]

The sinusoidal-wave and square-wave driving modes have been commonly used in permanent-magnet synchronous motor (PMSM) drives for household refrigerator compressors. In general, the sinusoidal-wave drive performs better in some aspects such as torque ripples, a starting performance, and a flux-weakening capability than the square-wave drive. The square-wave drive, however, has the advantage of higher efficiency at low-output-power conditions because of its relatively lower switching loss than the sinusoidal-wave drive. To selectively utilize the benefits of both driving modes, a seamless transition control between the two driving modes is proposed in this paper. Considering that the overall control structure of the sensorless PMSM drive is quite different according to the driving mode, initialization strategies, necessary for a smooth transition, for the pulse-width modulator of the inverter, speed and current controller, and sensorless position/speed estimator are presented. With the proposed method, a dual-mode operation of the sensorless PMSM drive can be achieved without stopping the compressor. The dynamic performance of the proposed transition scheme is tested using simulations and verified by experiments. Experimental result shows that the efficiency of a refrigerator increases up to 2 [%] using the dual-mode operation in comparison with the sinusoidal-wave only drive. [ABSTRACT FROM AUTHOR]

Many publications have been presented on the modulation and control of the modular multilevel converter, some of which are based on phase-shifted carrier modulation. This paper presents an analysis of how the switching frequency affects the capacitor voltages, circulating currents, and alternating voltages using phase-shifted carrier modulation. It is found that switching frequencies that are integer multiples of the fundamental frequency should be avoided as they can cause the capacitor voltages to diverge. Suitable switching frequencies are derived for which the arm and line quantities will be periodic with symmetric operating conditions in the upper and lower arms. Thus, the practical outcome of this paper is a detailed description of how the switching frequency should be chosen in order to achieve advantageous operating conditions. The theoretical results from the analysis are validated by both simulations and experimental results. [ABSTRACT FROM AUTHOR]

This paper evaluates two different concepts for the control of the modular multilevel converter (MMC). Generally aiming at medium voltage applications, the considered MMC topology has a low number of submodules, and a pulse-width modulation (PWM) scheme is applied. A model predictive control (MPC) algorithm is developed and experimentally compared to a cascaded control scheme based on conventional PI controllers, which has been proposed by Hagiwara and Akagi. Steady-state and dynamic system performance as well as computational power requirements are discussed. The basis for the comparison is a scaled converter test bench operating from 560-V dc voltage. [ABSTRACT FROM AUTHOR]

Modular multilevel converter (MMC) has become one of the most promising converter topologies for future high-power applications. A challenging issue of the MMC is the voltage balancing among arm capacitors. A good overall control system is also vital for the MMC, which should be based on sound mathematical model, readily adaptable for different applications, and capable of high performance. This paper presents a general control structure for MMC inverters, which is suitable for both voltage-based and energy-based control methods, and includes voltage balancing between the upper and lower arms. A new method for voltage balancing among arm capacitors, which is based on an improved pulse-width modulation, is also presented. The proposed method avoids some major disadvantages found in present voltage balancing methods, such as dependence on computation-intensive voltage sorting algorithms, extra switching actions, interference with output voltage, etc. Furthermore, all switching actions are evenly distributed among power devices. The proposed control system as a whole can serve as a promising solution for practical applications, especially when the number of submodules is fairly high. Simulation and experimental results verify the effectiveness of the proposed methods. [ABSTRACT FROM AUTHOR]

This paper presents a novel modulation and capacitor voltage control method for the modular multilevel converter (MMC) allowing the fixed switching frequency of 50 Hz. In the proposed modulation method, the switching angles are calculated through a new approach with reference to the nearest voltage level control. And then, every four pulse patterns are grouped together for averaging the dc and fundamental ac components in the output voltage of individual submodules. Accordingly, the absorbed power of each submodule could be self-balanced during few line periods simply by periodically swapping the pulse patterns. Moreover, the different power losses or different initial energy states of the submodules may also cause the dc capacitor voltage deviation although the absorbed power is equally distributed. Therefore, a closed-loop-based method of exchanging the leading or falling edges of pulse patterns is developed for dc capacitor voltage control. Simulation results show that the MMC circuit together with the proposed method functions very well in both rectifier and inverter modes. Experimental results on a single-phase MMC-based inverter with four submodules in one arm show the validity of the proposed method. [ABSTRACT FROM AUTHOR]

This paper investigates the sampled-data output feedback control problem for dc-dc buck power converters taking consideration of components uncertainties. A reduced-order observer and a robust output feedback controller, both in the sampled-data form, have been explicitly constructed with strong robustness in the presence of uncertain parameters. A delicate stability analysis process is presented to show that, by carefully selecting the design gains and the tunable sampling period, the output voltage of the hybrid closed-loop dc-dc buck converter system will globally asymptotically tend to the desired value even though the separation principle is out of reach and the controller is only switched at the sampling points. The proposed controller consists of a set of linear difference equations which will lead to direct and easier digital implementation. Numerical simulations and experimental results are shown to illustrate the performance of the proposed control scheme. [ABSTRACT FROM AUTHOR]

In this paper, a novel direct ac–ac converter based on the coupled inductor Z-source networks is proposed that offers a wide range of buck–boost operation. A total of two Z-source networks, called the coupled switched inductor and the modified switched coupled inductor, are employed that enable the ac–ac converter to deliver a wide voltage range. The proposed converter with both networks provides free-wheeling current paths for the inductors currents during the state transitions, which results in solving the commutation problems and the need for snubber circuits. A simple switching strategy is then proposed that helps to share a common magnetic core between the coupled inductors. For any particular voltage gain, the proposed structures require a smaller duty cycle compared to the conventional ones; therefore, a smaller inductance is required. Simulation and experimental results are provided to confirm the theoretical achievements. [ABSTRACT FROM AUTHOR]

This paper proposes the new clamping angle control (CAC) pulse width modulation (PWM) method to restore its maximum linear modulation range of voltage source inverters (VSIs) reduced by the duty ratio limitation in hardware implementation, which makes the VSIs to operate nonlinearly in the high modulation range. The deadtime and the bootstrap gate driver circuit mainly cause this duty ratio limitation in practice. In particular, the bootstrap gate driver circuit is used in many industrial applications by avoiding the additional power supply to apply the gate-source voltage of power switches, and therefore making the VSIs to be small size with the low cost. First, the proposed CACPWM method is theoretically analyzed. Then, it is applied in the high modulation range to overcome the limitation of the duty ratio due to the use of the bootstrap gate driver circuit. Thereafter, its practical effectiveness is verified by both simulation and experimental tests. Also, the resulting harmonic distortions are compared with those by the conventional PWM methods. [ABSTRACT FROM AUTHOR]

This paper analyzes the accuracy of the zero-order hold (ZOH) model for the digital pulse width modulator (DPWM) in the s-domain. The s-domain model and the exact z-domain model for the current control of a single-phase inverter with an L-type filter are elaborated for quantifying the deviation of the ZOH model for the DPWM. The influences of the different computational delay and duty-cycle update modes on this deviation is analyzed in detail. The compensation method for this deviation of the ZOH model is proposed for accurately predicting the stability region of the control system in the s-domain. Simulations and experimental tests are executed to verify the effectiveness and correctness of the theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, a novel buck–boost ac–ac converter is proposed. The basic switching unit of the proposed converter is a unidirectional buck circuit; therefore, it has no shoot-through worries. It can achieve safe commutation without using RC snubbers or soft commutation strategies. It can be implemented with power MOSFETs without their body diodes conducting and, for current freewheeling external diodes, can be used to minimize the reverse recovery issues and related loss. It has a bipolar voltage gain with both inverting and non-inverting operations. The non-inverting operation can be used to compensate voltage sag, and inverting operation can be used to compensate voltage swell. Therefore, the proposed converter as a dynamic voltage restorer is capable of compensating for both voltage sag and swell in a wide range. The detailed theoretical analysis followed by detailed experimental results of a 300-W prototype converter is provided. [ABSTRACT FROM AUTHOR]