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This paper presents a unified framework for the modeling, analysis, and design of load-independent Class E and Class EF inverters and rectifiers. These circuits are able to maintain zero-voltage switching and, hence, high efficiency for a wide load range without requiring tuning or use of a feedback loop, and to simultaneously achieve a constant amplitude ac voltage or current in inversion and a constant dc output voltage or current in rectification. As switching frequencies are gradually stepping into the megahertz (MHz) region with the use of wide-bandgap (WBG) devices such as GaN and SiC, switching loss, implementing fast control loops, and current sensing become a challenge, which load-independent operation is able to address, thus allowing exploitation of the high-frequency capability of WBG devices. The traditional Class E and EF topologies are first presented, and the conditions for load-independent operation are derived mathematically; then, a thorough analytical characterization of the circuit performance is carried out in terms of voltage and current stresses and the power-output capability. From this, design contours and tables are presented to enable the rapid implementation of these converters given particular power and load requirements. Three different design examples are used to showcase the capability of these converters in typical MHz power conversion applications using the design equations and methods presented in this paper. The design examples are chosen toward enabling efficient and high-power-density MHz converters for wireless power transfer (WPT) applications and dc/dc conversion. Specifically, a 150-W 13.56-MHz Class EF inverter for WPT, a 150-W 10-MHz miniature Class E boost converter, and a lightweight wirelessly powered drone using a 20-W 13.56-MHz Class E synchronous rectifier have been designed and are presented here. [ABSTRACT FROM AUTHOR]

Inductive power transfer (IPT) for battery charging applications has significant advantages over the traditional plug-in system. Since misalignment between the primary and secondary windings is inevitable, it is of significance to improve the misalignment tolerance of IPT systems with constant-current (CC) and constant-voltage (CV) outputs for battery charging. In this paper, the load-independent output characteristic of the hybrid topology and the function switching between CC and CV of the reconfigurable topology are analyzed. Besides, a hybrid and reconfigurable IPT system with 3-D misalignment tolerance for CC and CV outputs is proposed, simplifying or even canceling control schemes. Moreover, a novel parametric design method is given for the IPT system, which can suppress the fluctuation of the output voltage/current within a certain range of misalignment. In order to validate the performance of the proposed topology, a 1-kW prototype is built, and the corresponding experiments are carried out. In the CC/CV mode, the system can operate with the longitudinal misalignment to 50% when the load varies from 36 to 480 Ω, and the fluctuation of the output current/voltage is within 5%. Similarly, the misalignment in Y- and Z-axis is 12.5% and 33.3%, respectively. [ABSTRACT FROM AUTHOR]

This paper presents a three-dimensional (3-D) wire bondless power module using silicon carbide (SiC) power devices. Commercially available SiC power devices are designed for wire bonding. Wire bonds have an inherent parasitic inductance that limits high-frequency switching. This results in an underutilization of the full potential of SiC power devices, which have very low switching losses at high frequencies. Wire-bonded power modules run into a performance ceiling when it comes to ultrafast switching. This paper strives to provide a solution to this issue, which involves reconfiguring a commercially available bare die SiC power device into a flip-chip-capable device. A wire bondless SiC Schottky diode package was demonstrated and its performance was contrasted with a conventional wire-bonded package. A 24% reduction in the ON-state resistance was observed in the wire bondless package. As a next step, wire bondless SiC MOSFET packages were developed and tested in a half-bridge configuration in a highly integrated 3-D arrangement. This approach departs from the conventional concept of a power module—demonstrating a direct-bonded-copper-less and baseplate-less half-bridge switching cell. Double-pulse tests conducted on the cell showed >3× reduction in the parasitic inductance of the 3-D cell as compared with a conventional wire-bonded module. [ABSTRACT FROM AUTHOR]

This paper presents a novel three-phase DC-link multilevel inverter topology with reduced number of input DC power supplies. The proposed inverter consists of series-connected half-bridge modules to generate the multilevel waveform and a simple H-bridge module, acting as a polarity generator. The inverter output voltage is transferred to the load through a three-phase transformer, which facilitates a galvanic isolation between the inverter and the load. The proposed topology features many advantages when compared with the conventional multilevel inverters proposed in the literatures. These features include scalability, simple control, reduced number of DC voltage sources, and less devices count. A simple sinusoidal pulse-width modulation technique is employed to control the proposed inverter. The performance of the inverter is evaluated under different loading conditions and a comparison with some existing topologies is also presented. The feasibility and effectiveness of the proposed inverter are confirmed through simulation and experimental studies using a scaled down low-voltage laboratory prototype. [ABSTRACT FROM AUTHOR]

High-frequency (HF) switching and ac-side unbalanced loads challenge smart transformer (ST)-fed hybrid grids (both ac and dc), causing common-mode (CM) voltage variations and dc-link oscillation. The HF switching introduces an HF CM voltage and the ac grid unbalanced loads introduce a fundamental frequency CM voltage in hybrid grids. The CM voltage in ST-fed distributed grids degrades the power quality, threatens the safety of the connected devices, and potentially constitutes a health risk for the operators of such devices. Therefore, this paper systematically analyzes the root causes of the ST CM voltage variations and the impacts on hybrid grids. Based on the two typical configurations (three- and four-leg converters), the performance and requirements of CM inductor filter and bypass CM filter on HF CM voltage suppression are studied in detail. By considering the CM voltage suppression and dc capacitor lifetime, a four-leg converter with improved modulation strategy and small dc bypass film capacitor is proposed. The simulation and experimental results clearly verify the feasibility and correctness of the proposed strategies. [ABSTRACT FROM AUTHOR]

Switched-capacitor (SC) converters have drawn more and more attention in recent years due to their unique advantages. The accurate analysis methods will fully determine an SC converter's steady-state and dynamical performance. Proper design of SC converters requires full understanding of all impacts on circuit operation including steady-state and dynamical performance. Some previous modeling methods for SC converters have established a popular static model for SC converters which is composed of an ideal transformer and equivalent output resistance. This paper presents a dynamic capacitor ampere-second balance transient calculation modeling method. The instantaneous state of input voltage, instantaneous state of output voltage, instantaneous state of voltage of flying capacitor, “on time” and “off time,” as well as switching period are all included in the proposed model. The proposed modeling method was applied in both the dual-phase SC converters and the two-switch boosting SC converters. This modeling method was validated by the simulation and experimental results. The proposed model can be used to accurately predict and optimize the performance in the design phase for the low and high power SC converters. Based on the proposed modeling method, the SC converters could be controlled by a variable frequency control method. [ABSTRACT FROM AUTHOR]

This paper investigates the open-circuit faults of switching devices in the three-level T-Type inverter and proposes a new tolerant control method. The three-phase current and variation of the neutral-point voltage are detected to determine the fault switch. A carrier-based pulse width modulation is developed to tolerate switch fault by transiting from three-level to two-level switching. This makes the modulation scheme easier to be implemented compared to space vector modulation. For the neutral-point fault, the fault phase is operated by two-level modulation to produce the same rating voltage. On the other hand, the inverter is able to produce balanced voltage with reduced rating by keeping the phase of half-bridge fault to the neutral-point voltage. The neutral-point voltage is also able to be balanced by using two-level modulation since it does not contribute the neutral-point current. The performance and effectiveness of the proposed tolerant control are verified by a laboratory build. [ABSTRACT FROM AUTHOR]

In order to incorporate the advantage of the $V^{2}$ control scheme and the benefits of digital implementation, this paper proposes a digital $V^{2}$ control with hybrid capacitor current ramp compensation, which includes the estimated output capacitor current ramp and the external ramp. Since capacitor current responds to the load change immediately, the proposed method has faster transient response than either digital inductor current compensation or external ramp compensation. The proposed estimator does not require high sampling rate and avoids the current ramp distortion due to the parasitic resistance and inductance. The small-signal model is derived by describing function to understand the dynamic characteristics of the proposed control scheme. The model provides design criteria of the current feedback gain and the external ramp slope. The effectiveness of the proposed control architecture and the current ramp estimator is verified by simulation and experimental results. Compared with the benchmark, the proposed control has 70% reduction on settling time and 20% reduction on undershoot deviation. [ABSTRACT FROM AUTHOR]

Application of pulse width modulation (PWM) is known to produce sideband effects. The accuracy of the models of dc–dc converters can be improved if essential information of the sideband effects of PWM can be incorporated. In this paper, the aliasing effect of the sideband components on the closed-loop control is analyzed, and an effective representation of the transfer function of the pulse-width modulator is derived. Applying this transfer function to the dc–dc converter, an extended-frequency-range small-signal model is obtained, which can be conveniently used for deriving the loop gain of a PWM-controlled dc–dc converter. Furthermore, for wideband control applications, the large switching ripple in the modulation signal necessitates adjustment of the representation of the gain of the pulse-width modulator, which is dependent on the controller. Despite being highly accurate for stability assessment, the extended-frequency-range model is relatively complex after incorporating the effects of the sideband components and the large switching ripple. An approximate approach is introduced to simplify the loop gain expression and to provide physical insights into the effects of the sideband components and large modulation ripple amplitude. Experimental verification of the extended-frequency-range model is provided for a buck converter and a boost converter. [ABSTRACT FROM AUTHOR]

Direct current (dc) microgrids are highly compatible with photovoltaic (PV) sources due to their dc nature. However, as PV penetration increases, conventional current-source control configurations tracking the maximum power point may encounter the overvoltage problem, among others. This paper presents a $V$ – ${d}p/{d}v$ droop control strategy, which enables the PV sources to work in the maximum power point tracking (MPPT) mode, as well as behave as voltage sources to participate in dc-bus voltage regulating. The $V$ – ${d}p/{d}v$ droop method unifies MPPT and dc-bus voltage regulating in the sense of using the same control configuration, which avoids the controller reconfiguration during the PV mode switching. Further, the coordinated operation of multiple PV sources in the dc microgrid, including autonomous mode switching and primarily power sharing, is achieved by the proposed control strategy without any communication. Hardware-in-loop tests are presented to demonstrate the effectiveness of the proposed control scheme. [ABSTRACT FROM AUTHOR]

In high-power applications, parallel-operated T-type three-level pulse width modulation (PWM) rectifiers (T3LPRs) are widely employed to improve the power capacity and system reliability. For parallel-operated T3LPRs, there are two important issues need to be properly addressed: 1) the neutral-point potential (NPP) balancing, and 2) the zero sequence circulating current (ZSCC) between the common ac and dc bus. In this paper, the fluctuation of NPP in a T3LPR and the generative mechanism of ZSCC in parallel-operated T3LPRs are first investigated. The zero sequence voltage (ZSV) difference between the parallel-operated T3LPRs is identified as the main excitation source of the ZSCC problem. Meanwhile, the disconnection of the neutral point and the control effect difference of NPP balancing in each T3LPR also affect the ZSCCs within the parallel-operated T3LPRs. To adjust the ZSV of T3LPRs, the dwell time of the positive small voltage vector in each switching period of the converter, which is usually adjusted to balance the NPP, is also required to be controlled to suppress ZSCC. Therefore, in this paper, to avoid the possible conflict, an improved modulation mechanism is designed to guarantee simultaneous ZSCC suppression and NPP balancing. The neutral points of each T3LPR are connected. Then, by adjusting the dwell time of the positive small voltage vector, the charging time of two dc capacitors is adjusted to balance the NPP, and the ZSV differences between different T3LPRs are adjusted to suppress ZSCCs. To avoid the control effect difference of independent NPP balancing in different T3LPRs, all T3LPRs share the same value marking the difference between two dc capacitor voltages. Thus, a communication with a greatly reduced baud rate requirement is needed for NPP balancing to transfer the difference between the two dc capacitor voltages. Moreover, no extra circuit is needed for ZSCC suppression. These approaches make the proposed improved space vector PWM strategy much more practical and easy to employ. The proposed method is verified with experiments on two 3-kW T3LPR prototypes. [ABSTRACT FROM AUTHOR]

Traditional seven-level active neutral-point-clamped (ANPC-7L) converters suffer from the problems of dynamic voltage balancing in series switches and multilevel voltage jumping of phase output voltage during switching states transition. This paper presents a novel ANPC-7L topology with auxiliary commutating branches and elaborates on its commutating strategies. The presented topology and its commutating strategies completely resolve the two problems mentioned above. The validity of the presented topology and its commutating strategies are verified by experimental results from a 380 V/5 kW ANPC-7L converter. [ABSTRACT FROM AUTHOR]

A grid-tied cascaded H-bridge (CHB) converter with low frequency modulation techniques needs to meet power quality standards. At the same time, the effects of grid voltage harmonics on CHB converter's current harmonics must be considered in the modulation techniques. Furthermore, the dc link voltages of grid-tied converters need to be regulated. In this paper, an asymmetric selective harmonic current mitigation-pulse width modulation (PWM) (ASHCM-PWM) technique is used to meet the current harmonic limits of a power quality standard with the effects of grid voltage harmonics considered in the equation set of its optimization process. A voltage balancing technique based on the average power of each cell is derived to regulate the dc link voltages of the CHB converters without using dc voltage sensors. By using the proposed voltage balancing technique, the CHB converters do not need complicated dc link voltage controllers. As a result, the cost and complexity of the grid-tied converters can be significantly reduced. Simulations and experiments were conducted on a 7-level grid-tied CHB converter to validate the proposed voltage balancing technique with ASHCM-PWM modulation technique. [ABSTRACT FROM AUTHOR]

This paper is introducing a new method of operation for a series resonant converter, with intended application in megawatt high-voltage dc wind turbines. Compared to a frequency controlled series resonant converter operated in subresonant mode, the method (entitled pulse removal technique) allows the design of the medium frequency transformer for highest switching frequency, while being operated at lower frequency without saturation. The main focus of this paper is to identify and analyze the operating modes of the converter with pulse removal technique. With the use of variable frequency and variable phase displacement in subresonant mode, the new method of operation promises transformer size reduction and facilitates soft-switching transition of the insulated gate bipolar transistors (IGBTs) and line frequency diodes on rectifier side. Four modes of operation are identified, while equations for output power, voltage, and current stress are identified. Experimental results are concluded on a 1 kW, 250 V/500 V prototype. [ABSTRACT FROM AUTHOR]

High-step-up dc/dc converters are widely required in grid-connected applications with renewable energy sources. An extremely high-ratio step-up nonisolated dc/dc converter, in the form of a harmonics-boosted resonant converter, is proposed in this paper. This proposed converter consists of a high-frequency dc/ac inverter stage that is followed by a passive ac/dc rectifier stage connected in cascade. Conventionally, such a dc/ac inverter is designed to output a pure sinusoidal ac voltage with an amplitude several times the amplitude of the input voltage. However, for the proposed converter, the harmonics-boosted inverter stage is designed to contain selected voltage harmonics that significantly boost the amplitude of its output voltage. This greatly increases the overall gain of the converter. The adopted ac/dc stage is a diode-capacitor rectifier, which is of high efficiency and easily extendable to increase the voltage gain. Importantly, the proposed converter involves only one active switch. With only one active switch, the driver's loss is minimized and the converter's control is simplified. Zero-voltage switching is applied to reduce the switching loss, which also allows the converter to operate efficiently at high frequency, and thus can be designed for high power density. The optimal design of the two converter stages and their combined voltage gain is investigated and reported. Besides, a design guideline of the proposed converter is provided. A prototype of a 57-time harmonics-boosted resonant converter with 3.3 V input voltage, 500 kHz switching frequency, and 21 W output power, is built. The experimental result shows that the achieved converter's efficiency is as high as 88.6%. [ABSTRACT FROM AUTHOR]

A coupled-inductor dc–dc converter has several modes of operation in continuous-conduction mode (CCM) and discontinuous-conduction mode (DCM), and is quite complex. This paper presents the derivation of the complete small-signal model of a two-phase interleaved dc–dc boost converter utilizing a single-core coupled-inductor operating in both CCM and DCM. Several small-signal models are required to fully model the converter due to the complexity of the converter operating in DCM. The transfer functions are then derived from these small-signal models. The theoretical analysis is validated experimentally using frequency sweeps from a 1-kW prototype. [ABSTRACT FROM AUTHOR]

This paper proposes generation of a 15-level (14 concentric) dodecagonal voltage space vector structure (DVSVS) for a star connected induction motor drive. The proposed multilevel DVSVS is obtained by cascading two inverters, namely a primary and secondary inverter. The primary inverter is a five-level (5L) structure formed by stacking two three-level flying capacitors with individual reduced dc sources and the secondary inverter is also a 5L structure formed by cascading two capacitor-fed cascaded H-bridges (CHB). The active power is supplied by the primary inverter, while the secondary inverter acts as switched capacitor harmonics filter, and capacitors in the secondary inverter are balanced naturally irrespective of load power factor for entire modulation index. The high-voltage dc supply fed primary inverter is operated in quasi-square wave mode, while the high frequency switching is applied to low voltage CHBs, thus, reducing the overall switching loss. The proposed scheme gives the advantages of both DVSVS and multilevel structure, thus, making it one of the solutions for battery or stacked dc-fed applications. The paper also presents the experimental results as well as comparison study with the existing topologies to support the advantages of proposed scheme. [ABSTRACT FROM AUTHOR]

This paper provides theoretical and experimental discussions on an optimal carrier frequency for a phase-shifted pulsewidth modulation modular multilevel cascade converter for grid connections. The theoretical discussion concludes that a ratio of the optimal carrier frequency with respect to the supply (ac) frequency is 5/2. A three-phase downscaled front-to-front system is designed, constructed, and tested to confirm validity of the theoretical discussion. It consists of a pair of three-phase modular multilevel cascade converters rated at 400 Vdc and 10 kW, where the carrier frequency is set to 450 Hz and the ac frequency to 180 Hz, that is, their ratio is equal to 5/2. Moreover, simulated waveforms are compared to experimental ones under the same operating conditions. Both experimental and simulated waveforms agree well with each other not only in steady states but also in transient states. [ABSTRACT FROM AUTHOR]

The five-level active neutral-point-clamped (5L-ANPC) converter is becoming an attractive topology of multilevel converter family. A novel SVPWM algorithm based on line voltage coordinate was studied in this paper to overcome shortcomings of the traditional algorithm. Through coordinate transformation, steps of determining the basic vectors and the solution about the basic vector corresponding action time are simplified. Combining with the characteristics of 5L-ANPC converter and the new control algorithm, a method of controlling the voltage balancing of dc-link capacitors and floating-capacitors is proposed. According to the voltage of dc-link capacitors, the suitable switching sequence which can balance the voltage of dc-link capacitors is chosen. The high common-mode voltage will affect the service life of motor and reduce the reliability of the system especially in high-voltage converter. The common-mode voltage is also reduced by choosing the right switching state in this paper. The validity of the proposed method was proved by the experimental results. [ABSTRACT FROM AUTHOR]

In this paper, angular modulation index (AMI) implemented through a modified space vector modulation for the dual voltage source inverters (VSI) is proposed with the primarily aiming to reduce switching losses. The desired voltage across the load is synthesized by applying appropriate phase-angle displacement between space vector references. The proposed approach avoids the use of a dc/dc boost converter (which imposes loss and weight/price penalty to duplicate the dc-link voltage) and results to be particularly suitable for electrical/hybrid vehicle applications. Namely, the application of saving energy to keep driving has been identified as major concern. Hence, this work focuses on the strategy to enhance efficiency. The principles of the proposed controlling method and switching loss, which is reduced at least by 50%, are theoretically evaluated. This paper proposes a pioneering mathematical approach to correctly determine total harmonic distortion (THD) value of the voltage/current for the dual-VSI structure. Furthermore, simulation and experimental results prove that the proposed method insures benefits in terms of common-mode voltage, THD of the voltage, and switching loss reduction. The dual-VSI prototype supplying 1.5-kW induction motor is assembled in the laboratory to experimentally evaluate performance of the proposed method. Also, the simulation results carried out through MATLAB/Simulink environment are given to confirm performance of this easy-to-implement and high-efficient method. [ABSTRACT FROM PUBLISHER]

This paper presents a new application of power and voltage balance control schemes for the cascaded H-bridge multilevel inverter (CHMI)-based solid-state transformer (SST) topology. To reduce load on the controller and simplify modulation algorithm, a master–slave control (MSC) strategy is designed for the dual active bridge (DAB) stage. The master controller executes all control and modulation calculations, and the slave controllers manage only device switching and protection. Due to the inherent power and dc-link voltage unbalance in cascaded H-bridge-based SST, this paper presents a compensation strategy based on three-phase dq decoupled current controller. An optimum zero-sequence component is injected in the modulation scheme so that the three-phase grid currents are balanced. Furthermore, to tightly regulate the output voltage of all the DAB modules to target value, a dynamic reference voltage method is also implemented. With this proposed control method, the three-phase grid currents and dc-link voltage in each module can be simultaneously balanced. Finally, simulation and experimental results are presented to validate the performance of the controller and its application to microgrid SST. [ABSTRACT FROM PUBLISHER]

Modular multilevel converters (MMCs) are widely used in different applications. Due to low-loss operation, compactness, and high modularity, MMC is extremely attractive for high-voltage direct-current (HVDC) transmission systems. The HVDC station loss is highly related to the converter switching pulse pattern, which is generated by modulation algorithm and cell selection methods. This paper formulates the switching pulse pattern generation, as a versatile optimization problem. The problem constraints and objectives are formulated for HVDC applications and compared with similar problems in the field of computer science. To overcome the computational complexity in solving the introduced optimization problem, a heuristic method is proposed for cell selection algorithm. The method utilizes the current level in order to obtain lossless switching at zero-current crossings. The study of the proposed method, in a time-domain simulation platform, shows that the method can reduce the switching converter losses by 60% compared to carrier-based modulation, maintaining the same capacitor voltage ripple. Eventually, the practical functionality of the proposed method is verified in a real-time digital simulator, RTDS, for a 512-level converter in a point to point HVDC link. Although this paper focuses on HVDC, the mathematical model is applicable for any MMC application. [ABSTRACT FROM PUBLISHER]

This paper proposes a line current distortion compensation method, which is a fusion of the conventional variable on-time (VOT) control and the average current mode (ACM) control, for DCM/CRM boost PFC converter with zero current switching (ZCS)/zero voltage switching (ZVS)/valley switching (VS)/switching frequency limitation (SFL) functions. In this paper, the mathematical analyses of the line current distortion for the DCM/CRM boost PFC converter with ZCS/ZVS/VS/SFL functions are also derived to explain the causes of the line current distortion. In order to increase efficiency, the ZVS/VS/SFL functions are needed but the line current will be further distorted. To compensate the distorted line current, the ACM-based VOT (ABVOT) control for the DCM/CRM boost PFC converter is proposed. In addition, the constant-on-time-based noise-immunity S/H method is proposed to replace the multiplier, which is always needed for the conventional ACM-based control. The performance of the proposed ABVOT control with S/H method will be demonstrated by simulation and experiment results. [ABSTRACT FROM PUBLISHER]

In order to balance the light-emitting-diode (LED) current in each channel, many active and passive methods have been investigated. Among the various methods, the passive method using the LLC converter with a blocking capacitor or flyback converter with a current-sharing transformer (CST) in the secondary side is one of the simplest methods because it does not use any active component. However, the LLC driver requires two main switches and external resonant inductor to obtain a wide output voltage range. Also, flyback with a CST requires an additional magnetic component for CST and high-voltage rated diodes, resulting in the limitation of the cost and system volume. In this paper, a single-switch forward-flyback driver for a two-channel LED is proposed. The most powerful advantage of the proposed driver is the cost effectiveness, since it eliminates additional magnetic component. Furthermore, due to the reduced-voltage stress on rectifier diodes compared to the flyback driver, the proposed driver achieves a higher efficiency. The prototype of the 150–100-V/0.3-A two-channel LED verifies the effectiveness of this paper. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel circulating-current control strategy applied in back-to-back parallel three-phase converters with individual dc links for permanent magnet synchronous motor (PMSM) drives. First, the zero-sequence circulating current and the cross current paths in the whole parallel system are analyzed. Then, the models of an n-paralleled subsystem with individual dc links in both the three-phase stationary coordinates and the synchronous rotating coordinates are built up, which explores the fundamental mechanism of circulating current. Based on the analysis, a novel control strategy can suppress the circulating current at the motor side. The control system consists of two main loops in the d-axis, q-axis, and zero-axis, which are defined in this paper as sum control and difference control. The proposed control strategy effectively suppresses the circulating current in both steady-state and transient operations. The zero-sequence circulating current is greatly reduced by the difference control on the zero-axis. In addition, the bandwidth of the controllers is greatly improved, especially when the current-sharing inductance is much smaller than the stator inductance. Finally, with a PMSM load, the simulation and experiment results are presented to verify the theoretical analysis and proposed control strategy. [ABSTRACT FROM PUBLISHER]

General closed-form subharmonic oscillation conditions are obtained for V^2 -controlled buck converters. Both constant switching period and constant on-time operations are analyzed with the outer voltage loop closed or open. Once an arbitrary linear feedback is given, the associated closed-form stability condition of the converter is readily obtained. Past research results based on the describing function technique and the Floquet theory become special cases. This paper provides an alternative and easier method to analyze subharmonic instability. [ABSTRACT FROM PUBLISHER]

A hybrid boosting converter (HBC) with collective advantages of regulation capability from its boost structure and gain enhancement from its voltage multiplier structure is proposed in this paper. The new converter incorporates a bipolar voltage multiplier, featuring symmetrical configuration, single inductor and single switch, high gain capability with wide regulation range, low component stress, small output ripple and flexible extension, which make it suitable for front-end PV system and some other renewable energy applications. The operation principal, component stress, and voltage ripple are analyzed in this paper. Performance comparison and evaluation with a number of previous single-switch single-inductor converters are provided. A 200-W 35 to 380 V second-order HBC prototype was built with peak efficiency at 95.44%. The experimental results confirms the feasibility of the proposed converter. [ABSTRACT FROM PUBLISHER]

In this paper, a modulation and control method for the new transformerless unified power flow controller (UPFC) is presented. As is well known, the conventional UPFC that consists of two back-to-back inverters requires bulky and often complicated zigzag transformers for isolation and reaching high power rating with desired voltage waveforms. To overcome this problem, a completely transformerless UPFC based on an innovative configuration of two cascade multilevel inverters has been proposed. The new UPFC offers several advantages over the traditional technology, such as transformerless, light weight, high efficiency, low cost and fast dynamic response. This paper focuses on the modulation and control for this new transformerless UPFC, including optimized fundamental frequency modulation for low total harmonic distortion and high efficiency, independent active and reactive power control over the transmission line, dc-link voltage balance control, etc. The new UPFC with proposed control method is verified by experiments based on 4160-V test setup. Both the steady-state and dynamic-response results will be shown in this paper. [ABSTRACT FROM PUBLISHER]

This paper describes a hybrid modulation scheme for a high-frequency ac-link (HFACL) multistage inverter comprising a front-end dc/ac converter, followed by isolation transformers, an ac/pulsating-dc converter, and a pulsating-dc/ac converter. The hybrid modulation scheme enables 1) removal of the dc-link filter evident in conventional fixed dc-link (FDCL) inverters placed after the ac/pulsating-dc converter stage and before an end stage voltage source inverter and 2) significant reduction in switching loss of the inverter by reducing the high-frequency switching requirement of the pulsating-dc/ac converter by two-third yielding higher efficiency, improved voltage utilization, and reduced current stress. Unlike the FDCL approach, in the HFACL approach, hybrid modulation enables the retention of the sine-wave-modulated switching information at the output of the ac/pulsating-dc converter rather than filtering it to yield a fixed dc thereby reducing the high-frequency switching requirement for the pulsating-dc/ac converter. Overall, the following is outlined: 1) hybrid modulation scheme and its uniqueness, 2) operation of the HFACL inverter using the hybrid modulation scheme, 3) comparison of the efficiency and losses, current stress, and harmonic distortion between the hybrid-modulation-based HFACL inverter and the FDCL inverter, and 4) scaled experimental validation. It is noted that the term hybrid modulation has no similarity with the modulation scheme for a hybrid converter (which are conjugation of two types of converters based on a slow and fast device) reported in the literature. The term hybrid modulation scheme is simply chosen because at any given time only one leg of the inverter output stage (i.e., pulsating-dc/ac converter) switch under high frequency, while the other two legs do not switch. The outlined hybrid modulation scheme is unlike all reported discontinuous modulation schemes where the input is a dc and not a pulsating modulated dc, and at most only one leg stays on or off permanently in a 60° or 120° cycle. [ABSTRACT FROM AUTHOR]

In order to obtain a high step-up voltage gain, high-efficiency converter, this paper proposed a dual switches dc/dc converter with three-winding-coupled inductor and charge pump. The proposed converter composed of dual switches structure, three-winding-coupled inductor, and charge pump. This combination facilitates realization of high step-up voltage gain with a low voltage/current stress on the power switches. Meanwhile, the voltage across the diodes is low and the diode reverse-recovery problem is alleviated by the leakage inductance of the three-winding-coupled inductor. Taking all these into consideration, the efficiency can be high. This paper illustrated the operation principle of the proposed converter; discussed the effect of leakage inductance on voltage gain; the conditions of zero current shutting off of the diodes are illustrated; the voltage and current stress of the power devices are shown; a comparison between the performance of the proposed converter and previous high step-up converters was conducted. Finally, a prototype rated at 500 W has been established, and the experimental results verify the correctness of the analysis. [ABSTRACT FROM AUTHOR]

A virtual space vector modulation technique reducing both magnitude and third-order harmonic component of the common-mode voltage (CMV) in a two-level voltage-source inverter (VSI) is proposed in this paper. The presented method employs a set of virtual space vectors constructed from original stationary space vectors to conduct modulation. Since the created virtual vectors have the lowest instantaneous and zero average CMVs, both the magnitude and third-order harmonic component of the generated CMV are reduced, contributing to better overall CMV performance and common-mode filter design in VSI applications. Three variants of the proposed modulation method using different virtual space vector combinations are presented. The concept of the virtual space vector modulation technique demonstrated with two-level inverter in this paper can also be extended to multilevel inverters. Simulation and experimental results, as well as comparisons with existing methods are provided to verify the proposed technique. [ABSTRACT FROM AUTHOR]

With ever-growing energy crisis in wireless communication, effective envelope tracking solutions are in high demand for efficient operation of power amplifiers. Conventionally, a linear regulator is utilized to assist a switching converter to achieve fast tracking performance, but is highly inefficient. To overcome such an efficiency limitation, a dual-phase switching-converter-only topology is proposed in this paper. Synchronized adaptive voltage tracking control is introduced, which enables both clock synchronization and fast response for high-speed envelope tracking. To mitigate the inductor current slew rate limit of the switching converter, a push–pull slew rate enhancer (SRE) is designed. The SRE only operates when the switching converter reaches its inductor current slew rate limit, thereby maximizing the efficiency. The proposed envelope modulator is fabricated with a 0.18-μm CMOS process, achieving 85.8% peak efficiency at 1.5 W, tracking a 10-MHz LTE envelope. [ABSTRACT FROM AUTHOR]

This paper presents an improved variable hysteresis-band current-control in natural frame for a three-phase unity power rectifier. The proposed control algorithm is based on three decoupled sliding-mode controllers combined with three independent Kalman filters. The use of Kalman filters instead of a nonadaptive state observer improves the quality of the estimated signals in presence of noise, increasing the immunity of the control loop in noisy environments. To reduce drastically the computational load in the Kalman algorithm, a reduced bilinear model is derived which allows to use a Kalman filter algorithm instead of an extended Kalman filter. A fast output-voltage control is also presented which avoids output-voltage variations when a sudden change in the load or a voltage sag appears. Moreover, a fixed switching frequency algorithm is proposed which uses a variable hysteresis-band in combination with a switching decision algorithm, ensuring a switching spectrum concentrated around the desired switching frequency. The overall control proposal has been fully integrated into a digital signal processor. Selected experimental results are introduced to validate the theoretical contributions of this paper. [ABSTRACT FROM AUTHOR]

This paper first analyzes the current paths on a planar busbar based on insulated-gate bipolar transistor bridge switching states and dc-link capacitor configurations. The busbar's circuit models which include both self- and mutual inductances are developed based on the identified current paths. The inductance circuit models are analyzed and reduced for different switching states, transition states, and dc-link capacitor configurations. Inductance and current sharing is analyzed based on circuit theory. Both simulations and measurements are conducted to verify the developed technique. [ABSTRACT FROM AUTHOR]

In order to solve the neutral-point voltage unbalancing problem for three-level inverters, this paper proposes a method to balance the neutral-point voltage for three-level inverters with variable modulation wave offset sinusoidal pulse-width modulation (SPWM) control. Based on the mathematical expressions of neutral-point voltage unbalancing, the factors are studied, which affect the fluctuation of neutral-point voltage. Theoretically the mathematical expressions of the neutral-point voltage with the proposed method are derived, and the mathematical relationship between the fluctuation of neutral-point voltage and the adjusting offset of modulation wave is studied. This proposed method realizes controlling the neutral-point voltage balance by dynamically calculating the offset superimposed to the modulation wave based on SPWM (DCOSPWM). This DCOSPWM method is very simple, which has good steady-state performance and is easy for digital implementation. The simulation results verify the correctness of the theoretical analysis in this paper, and the feasibility and effectiveness of this method is verified by the experiments in the experimental platform of neutral point clamped three-level inverters based on digital signal processor (DSP)-complex programmable logic device (CPLD). [ABSTRACT FROM AUTHOR]

According to the number of segments, the space vector modulation (SVM) can divide into conventional SVM sequence (CSVMS) and special SVM sequence (SSVMS). It is well known that SVM can be equivalently realized by carrier-based pulse width modulation (CBPWM) with a zero component injection in both two-level and three-level inverters. For eight segment CSVMS in three-level inverters, many papers have ever got the injected zero component equation. But similar approach does not work for SSVMS, which has more than eight segments, e.g., 10, 12, or 14. What more, the accurate injected zero component has never been achieved so far. To solve above problems, therefore, a generated decomposition method of modulation wave has been proposed in this paper. By strict theoretical derivation, the same correlation can be extended to SSVMS and the corresponding zero component expression can be acquired. Based on this method, this paper puts a lot attention on the essential feature explanation, mathematical proof, and gives a detailed process to get the zero component equation, using it can realize SSVMS by CBPWM. The simulation and experimental results illustrate that the generated decomposition method of modulation wave is correct, and the unified theory of CBPWM and SVM is verified. [ABSTRACT FROM AUTHOR]

This paper proposes a new multilevel converter based on the cascade connection of double flying capacitor multicell (DFCM) converters, as multilevel modules, to decrease the voltage diversity of the flying capacitors. Furthermore, a new switching pattern based on the phase-shifted pulse-width modulation technique is proposed to reduce the voltage ripple across the flying capacitors. Moreover, the proposed modulation technique reduces the rms value of the current flowing through flying capacitors. This results in an increase in the life time of flying capacitors and a decrease in the capacitance of the flying capacitors, to keep the same amount of the ripple, meaning a reduction in the physical size of the converter. In addition, this paper presents an analytical approach to calculate the average and rms currents of the insulated gate bipolar transistors (IGBTs)/diodes in the DFCM converter in a closed-form expression. The derived closed-form equations to calculate the average and rms currents of the IGBTs/diodes are utilized to investigate the conduction power losses in a DFCM converter and the proposed multilevel converter. Numerical results of the derived closed-form equations match the simulation results well, which validates the derived equations. Furthermore, simulation results and experimental measurements of the proposed multilevel power converter, configured by cascading two two-cell five-level DFCM converters, are presented to validate the performance of the proposed converter as well as the suggested modulation technique. [ABSTRACT FROM AUTHOR]

This paper presents an integrated solution for a photovoltaic (PV)-fed water-pump drive system, which uses an open-end winding induction motor (OEWIM). The dual-inverter-fed OEWIM drive achieves the functionality of a three-level inverter and requires low value dc-bus voltage. This helps in an optimal arrangement of PV modules, which could avoid large strings and helps in improving the PV performance with wide bandwidth of operating voltage. It also reduces the voltage rating of the dc-link capacitors and switching devices used in the system. The proposed control strategy achieves an integration of both maximum power point tracking and V/f control for the efficient utilization of the PV panels and the motor. The proposed control scheme requires the sensing of PV voltage and current only. Thus, the system requires less number of sensors. All the analytical, simulation, and experimental results of this work under different environmental conditions are presented in this paper. [ABSTRACT FROM AUTHOR]

One limitation of many battery charge equalizers is their slow equalization speed, especially when there are a large number of batteries in the series-string in high-voltage and high-power applications. This paper presents a new architecture for battery charge equalization. In this architecture, independent equalizers are placed in different layers and all the layers can equalize the corresponding batteries simultaneously, thus reducing equalization time by 50%. We explore the operation, performance characteristics, and the design of the architecture. Both simulation and experimental results are presented to validate the analysis in this paper. [ABSTRACT FROM AUTHOR]

This paper introduces a versatile control scheme for unidirectional ac–dc boost converters for the purpose of mitigating grid power quality. Since most power factor correction circuits available in the commercial market utilize unidirectional ac–dc boost converter topologies, this is an almost no-cost solution for compensating harmonic current and reactive power in residential applications. Harmonic current and reactive power compensation methods in the unidirectional ac–dc boost converter are investigated. The additional focus of this paper is to quantify the input current distortions by the unidirectional ac–dc boost converter used for supplying not only active power to the load but also reactive power. Due to input current distortions, the amount of reactive power injected from an individual converter to the grid should be restricted. Experimental results are presented to validate the effectiveness of the proposed control method. [ABSTRACT FROM AUTHOR]

Pulse width modulation schemes are aimed at adjusting the fundamental component while reducing the harmonic content of an inverter output voltage or current. This paper addresses the topic of optimal inverter operation in reference to a given objective function. The objective function could embody either a single performance criterion, such as voltage or current total harmonic distortion (THD), or a weighted sum of multiple criteria. The proposed method ensures primacy of the chosen solution while imposing no restriction over its modulation index. In particular, operating the inverter by the chosen solution would result in performances superior to any other modulation scheme commutating in an equal number of switching angles per fundamental cycle. The proposed method allows for the consideration of practical inverter constraints and prevents the possibility of impractical switching sequence. A detailed investigation of the method is given, accompanied by two practical cases minimizing, respectively, phase-voltage THD and line-current THD of a three-level inverter. Selected simulation and experimental results are presented to validate the theoretical part. [ABSTRACT FROM AUTHOR]

Isolated, zero-voltage-switching dc–dc converter topologies represent attractive solutions in the continuous run toward higher switching frequencies, allowing more compact power supplies. Among them, the asymmetrical half-bridge flyback converter represents an interesting option, featuring simple duty-cycle control at constant switching frequency, as opposed to the popular LLC converter. The majority of papers dealing with this topology consider an approximated voltage gain similar to that of an isolated buck converter operating in continuous conduction mode, i.e., proportional to the duty cycle and, practically, load independent. On the contrary, the true voltage gain is nonmonotonic at high duty-cycle values. Anytime the converter is designed for a resonant operation, as is advisable to eliminate any reverse recovery problem of the rectifier diode, the voltage gain not only increases, but also becomes a function of the switching frequency. This article investigates the converter's voltage gain in detail, deriving a theoretical framework capable of capturing its real behavior and dependencies. The proposed analytical model has been verified through simulations as well as experimental measurements taken on a 160-W prototype working at 400 kHz. [ABSTRACT FROM AUTHOR]

High step-up voltage gain dc/dc converters are widely used in renewable energy power generation, uninterruptible power system, etc. In order to avoid the influence of leakage inductor in coupled inductors based converters, switched-inductor boost converter (SL-boost), switched-capacitor boost converter (SC-boost) and active-network converter (ANC) have been developed. With the transition in series and parallel connection of the inductors and capacitors, high step-up voltage conversion ratio can be achieved. This paper discusses the characteristics of the switched inductor and switched-capacitor cell; makes some comparisons between the ANC and boost converter. Based on the aforementioned analysis, this paper proposed the multicell switched-inductor/ switched-capacitor combined active network converters (MSL/SC-ANC). The proposed converters combine the advantages of SL/SC unit and active-network structure. Compared with previous high step-up converters, the novel converter provides a higher voltage conversion ratio with a lower voltage/current stress on the power devices, moreover, the structure of proposed SL/SC-ANC is very flexible, which means the quantity of SL and SC cells can be adjusted according to required voltage gain. A 20 times gain prototype is designed as an example to show the design procedure. Theoretical analysis and experimental results are presented to demonstrate the feature of the proposed converter. [ABSTRACT FROM AUTHOR]

A solid-state transformer is a three-phase ac/ac converter with a high-frequency transformer. Due to advanced features like high power density, on demand var support and frequency regulation, solid-state transformer is an enabling technology for the modern power distribution system. It can also find application in high-power-density motor drives. The single-stage solid-state transformer considered in this paper is capable of bidirectional power flow and open loop power factor correction. This topology uses a minimum amount of copper and has relatively few semiconductor switches. One major problem in this converter is the commutation of leakage energy which results in power loss, reduction in switching frequency, loss of output voltage, and additional common-mode voltage switching. This paper presents a source-based commutation strategy along with a novel modulation technique resulting in elimination of additional snubber circuits, minimization of the frequency of leakage inductance commutation, recovery of the leakage energy, and soft switching of the output converter. The topology and its proposed control have been analyzed. Simulation and experimental results confirm the operation. [ABSTRACT FROM AUTHOR]

This paper presents the analysis and design of a novel technique that allows the conventional series resonant dc/dc converter (SRC) to work as a step-up and step-down converter. This is useful in bidirectional dc/dc converters where one port is attached to a fixed voltage dc line, e.g., a 360-V dc line, and the other port is attached to an energy storage device such as a bank of supercapacitors or batteries. Every converter that works in this scenario requires step-up and step-down modes to transfer energy from one port to the other. The paper presents the SRC as an alternative to the well-known dual active bridge (DAB). The dc analysis is detailed to demonstrate the step-up capability. In addition, the ac analysis is presented. Experimental results from a 6-kW prototype validate the theoretical analysis. The results indicate that this technique achieves better efficiency compared to the phase-shift DAB in a wide power range, from heavy to light loads. The main reason for this is that the converter works with smaller currents than the DAB at light loads. [ABSTRACT FROM AUTHOR]

The objective of this paper is to propose the primary-side peak current measurement strategy (PCMS) for the high-precision constant output current converter. The primary-side regulator (PSR) is widely used for low-cost and low-power light-emitted diode (LED) lighting application with universal input voltage range. However, the conventional PSR suffers from the drawback of current inaccuracy so that the LED may be damaged easily. Therefore, the PCMS method for PSR to achieve high-precision constant output current control is proposed. In this paper, the real causes of the output current inaccuracy by using PSR are discussed. The mathematical expression of the output current measurement error is derived. Then, the operation principle of the proposed PCMS is presented. Hardware experimental measurements are presented to verify the performance of the proposed PCMS. The measured data show that by using the PSR with the proposed PCMS, the LED output current error can be limited within ±2% under different operation conditions. [ABSTRACT FROM AUTHOR]

Switch fault diagnosis and remedial actions are an important design aspect for isolated full-bridge dc-dc converters, and they can highly improve reliability of the whole system. In this paper, a fast switch short-circuit fault (SCF) diagnostic method is proposed for the phase-shifted full-bridge (PSFB) converter. The dc-link current and transformer primary voltage are treated as diagnosis criteria. Based on the combination of real-time criteria and switch gate-driver signals, the switch SCF can be identified rapidly, and thus further damage can be avoided. Besides, a remedial action for the faulty PSFB converter is introduced to keep the continuity of the system. The converter under fault can be reconfigured into an asymmetrical half-bridge converter. Moreover, a boost unit, including a switch and a diode, is inserted into between the output rectifier and filter capacitor to compensate the output voltage. The operational principle, design considerations, and implementation are discussed in this paper. Experimental results are shown to verify the validity of theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper presents a new multilevel selective harmonic elimination pulse-width modulation (MSHE-PWM) technique for transformerless static synchronous compensator (STATCOM) system employing cascaded H-bridge inverter (CHI) configuration. The proposed MSHE-PWM method optimizes both the dc-voltage levels and the switching angles, enabling more harmonics to be eliminated without affecting the structure of the inverter circuit. The method provides constant switching angles and linear pattern of dc-voltage levels over the modulation index range. This in turns eliminates the tedious steps required for manipulating the offline calculated switching angles and therefore, easing the implementation of the MSHE-PWM for dynamic systems. Although the method relies on the availability of the variable dc-voltage levels which can be obtained by various topologies, however, the rapid growth and development in the field of power semiconductor devices led to produce high-efficiency dc-dc converters with a relatively high-voltage capacity and for simplicity, a buck dc-dc converter is considered in this paper. Current and voltage closed loop controllers are implemented for both the STATCOM and the buck converter to meet the reactive power demand at different loading conditions. The technique is further compared with an equivalent conventional carrier-based pulse-width modulation to illustrate its enhanced characteristics. The effectiveness and the theoretical analysis of the proposed approach are verified through both simulation and experimental studies. [ABSTRACT FROM AUTHOR]

This paper presents a high-frequency, digitally controlled high-brightness LED driver for automotive applications with fast dimming capabilities. The power converter is based on the magnetically coupled Ćuk topology and employs a single, off-the-shelf SMT mutual inductor. The proposed digital control technique exploits the inherent stabilizing effect of magnetic coupling, and combines it with a dedicated duty cycle feedforward technique for step-reference response enhancement during the dimming operation. No direct sensing of the LED string current is performed, bypassing the disadvantage of the Ćuk topology of having an inverted output polarity. Furthermore, the magnetically coupled Ćuk topology is a single-switch solution and it provides inherent filtering of the input and output currents without introducing the additional magnetic elements, strongly reducing the total required capacitance and maintaining the small form-factor required in the automotive environment. This paper discusses the theoretical and practical development of the proposed controller. Experimental tests on a 40-W, 1-A, 500-kHz prototype indicate a 0- to 1-A current rise time in the tens of microseconds time frame with excellent damping characteristics and regulation accuracy. [ABSTRACT FROM AUTHOR]

In the applications for high-power dc/dc conversion, the power devices usually suffer high voltage and current stress in traditional single-phase dc/dc topologies such as forward, half-bridge, and full-bridge converters, which limits the power level of converter to reach higher. As a superior alternative solution, a three-phase three-level (TPTL) dc/dc converter was investigated in this paper, which has the advantages of lower voltage and current stress on switches, as well as fewer power devices. Adopting a symmetrical control strategy, the input current and output current frequency can be increased by a factor of six compared to the switching frequency, resulting in a reduced filter requirement. However, all the switches are hard-switching, leading to a considerable switching loss. In this paper, an asymmetrical duty cycle control strategy was proposed to the TPTL dc/dc converter. The modified converter remains all the advantages of original control strategy; meanwhile, soft-switching can be achieved using the energy stored in output filter inductance and leakage inductances of transformers (or resonant inductances). The theoretical analysis was presented in details, along with the characteristics and soft-switching condition of the converter. Experimental results from 540 to 600 V input and 48 V/20 A output were presented to verify the theoretical analysis and the performance of the modified converter. [ABSTRACT FROM AUTHOR]