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The dual-active bridge (DAB) topology is commonly preferred in bidirectional applications due to several attractive features, including auto-adjust of power flow, galvanic insulation, wide voltage gain, and zero voltage switching (ZVS) capability over some power ranges. However, the efficiency of the converter drops at light loads because the ZVS range is directly dependent on the circulating current. Assuming that the processed power is variable, the DAB converter's design must find a compromise between extending ZVS ranges and reducing the reactive power processing to ensure higher efficiency. Aiming this compromise, many papers propose hybrid approaches in which the modulation strategy is selected according to the processed power. However, this is not a simple solution because it demands multivariable control and offline optimizations. This paper proposes a modulation strategy to ensure ZVS and reduce the circulating current for the DAB converters. While the usual phase-shift modulation provides ZVS operation in a range of 40% to 100% of rated power, the proposed asymmetrical pulse-width modulation can obtain ZVS operation in a range of 2% to 100% of rated power. Experimental results demonstrated that the proposed strategy improves the converter efficiency for all power ranges, especially at light loads. [ABSTRACT FROM AUTHOR]

Parallel dc–dc converters are commonplace in applications such as computing power supplies, point of load systems, and dc microgrids. The presence of multiple converters in such systems allows for switch interleaving and ripple cancellation. One class of existing ripple reduction methods depends on central controllers that require communication among the converters. These approaches compromise system scalability and reliability. When it comes to decentralized methods, the state-of-the-art is limited to uniform conditions and cannot handle mismatches in physical parameters and operating points among converters. In this article, we address these shortcomings with fully decentralized controller that robustly drives the pulsewidth modulation carriers of a collection of heterogeneous converters to the phase-shifts that give minimized ripple. More precisely, the proposed controller eliminates the dominant fundamental switching harmonic from the output current and voltage using only local voltage feedback. After outlining a comprehensive analytical model, we experimentally validate our approach on a system of five parallel-connected buck converters under a variety of parametric and operational mismatches. Measurements show ripple reduction of more than $4\times$ in the output voltage and the fundamental switching frequency harmonic is attenuated by more than 30 dB compared to conventional symmetric interleaving. [ABSTRACT FROM AUTHOR]

This article proposes a control and modulation strategy for medium-voltage (MV) drives that exhibits excellent steady-state and transient behavior. Specifically, optimized pulse patterns (OPPs) and direct model predictive control are employed so that the associated advantages of both, such as minimum stator current total demand distortion (TDD) and fast transients, respectively, are fully exploited. To do so, the current reference trajectory tracking and modulation problems are addressed in a coordinated manner in the form of a constrained optimization problem that utilizes the knowledge of the stator current evolution—as described by its gradient—within the prediction horizon. Solving this problem yields the optimal real-time modification of the offline-computed OPP, which guarantees that very low—and close to its theoretical minimum value—stator current TDD is produced at steady state, and very short settling times during transients. To highlight the effectiveness of the proposed strategy, a variable speed drive system consisting of a three-level neutral point clamped inverter and an MV induction machine serves as a case study. [ABSTRACT FROM AUTHOR]

A novel modulation scheme for a bidirectional isolated pulsewidth modulation active-clamp (PAC)-Ćuk converter is presented in this article. In the PAC-Ćuk converter, the clamping circuit consisting of a capacitor, a series inductor, and an active device enables zero-voltage-switching (ZVS) turn-on capability of all the active devices. This additional circuit equips the converter with three independent control parameters. This article discusses power transfer, ZVS region, and circulating current dependency on the control parameters across the converter gain. Minimal circulating current is generally desired to decrease the conduction losses. With the help of the proposed modulation technique, the optimization of the control parameters to achieve lower circulating current while ensuring ZVS operation is also discussed. A 2-kW experimental converter is also designed and fabricated to validate the analysis. [ABSTRACT FROM AUTHOR]

Power grids are evolving toward a highly distributed architecture with power-electronics circuits interfacing a majority of generation, storage, and loads. To ensure stability as synchronous machines are retired, grid-forming (GFM) inverters will be needed across the board. In this article, we investigate whether systems built with interconnected single-phase droop-controlled GFM inverters are capable of self organizing into balanced three-phase systems. We model, analyze, and build a system comprised of three delta-connected droop-controlled single-phase inverters connected across loads. After deriving a model of the angle dynamics for this system, we show that its stable equilibria coincide with balanced conditions, where each phase is offset by $1/3$ of an ac cycle. Furthermore, we observe that the desirable equilibrium with balanced phase offsets is robust against voltage and load imbalances. This demonstrates the feasibility of assembling three-phase systems using fleets of decentralized single-phase GFM inverters. The analytical developments are substantiated experimentally on a system of three delta-connected single-phase inverters. Spontaneous emergence of phase balancing from startup with nonidentical initial conditions are validated in the experimental setup. Empirical observations further illustrate robust operation during unbalanced conditions. [ABSTRACT FROM AUTHOR]

This article compares different strategies used to enhance the stability properties of grid-following voltage-source converters (VSCs). Because of digital delays, VSC admittance exhibits a nonpassive zone, which introduces negative damping and may destabilize the grid-connected operation. It is shown that typically used active damping (AD) strategies only bring positive impact up to a certain frequency, while deteriorating admittance properties around and above the Nyquist frequency. Multi-sampled pulsewidth modulation (MS-PWM) greatly extends the passive admittance region, using only a single-loop current controller. Experimental admittance measurements are performed on a single-phase VSC, up to twice the switching frequency. Subsequently, different grid-connected scenarios are tested to show that MS-PWM retains stable operation, where AD methods cause instability. This article also offers analytic modeling and experimental measurements of noise propagation for compared strategies. It is shown that derivative-based AD is not highly sensitive; however, MS-PWM offers additional noise suppression. [ABSTRACT FROM AUTHOR]

The existing simultaneous wireless power (SWP) and information transfer can only achieve serial signal transmission and it is hard to decouple the power and signal transmission without the additional circuits. To solve these problems, a SWP and multibit signals transfer technology is proposed in this article. Based on the working principle of the hybrid modulation waves pulsewidth modulation control technology, the power and multibit signals are modulated into the system through the modulation waves with different frequencies. Therefore, the signal transmission no longer depends on the power transmission, and the signal transmission rate is multiplied through the realization of parallel signals transmission. Subsequently, the parameter selection criterion of the signal channel is given by analyzing the signal transmission rate and the interference between the power and signal transmission. Finally, the proposed technology is verified with experimental results. The experimental results demonstrate that the power and two-bit signals can be transmitted stably. Compared to the serial transmission, the band signal transmission rate is increased by two times. [ABSTRACT FROM AUTHOR]

In an era where high-frequency flying capacitor (FC) multilevel inverters (MLIs) are increasingly gaining attention in energy conversion systems that push the boundaries of power density, the need for a compact, fast, and accurate FC voltage monitoring system is also increasing. In this article, we designed and developed a new FC measurement system, based on precise sampling of the inverter switching node voltage, through a bidirectional clamping circuit. The deviation of FC voltages from their nominal values is extracted by solving a set of linear equations. With a single sensor per phase and no isolation requirements, as opposed to dozens of sensors in traditional FC monitoring, our approach results in significantly lower cost, complexity, and circuit size. Detailed device-level simulations in LTspice and system-scale simulations in MATLAB validate the accuracy and speed of the proposed measurement system and the balancing strategy in steady-state, abrupt load change, and imbalance conditions. Experiments carried out in a three-phase gallium nitride five-level inverter prototype reveal a gain in precision and bandwidth that is more than 30 times that of conventional methods, at a fraction of their cost and footprint. The recorded performance renders the developed sensor an ideal solution for fast MLIs based on wide-bandgap technology. [ABSTRACT FROM AUTHOR]

Due to the successive switching actions in a power electronic system, considerable conducted electromagnetic interference (EMI) is generated. This has been a major concern in designing power converters, which requires additional EMI filtering efforts. Passive EMI filters are the most common solutions to EMI reduction but usually consume a large portion of the volume as well as weight in power converters. Active EMI filters (AEFs) or hybrid EMI filters (HEFs) are considered best candidates over traditional passive EMI filters to achieve higher power density in power converters. The utilization of current transformer to sense or to compensate the EMI noise can increase the volume of an AEF. In this article, a transformer-less AEF, sprung from the concept of virtual impedance enhancement, is proposed. The proposed design features feedforward control with current-sensing-voltage-compensating. The operation principle of the proposed AEF is thoroughly introduced, and its performance is evaluated through simulations and experiments. Experimental results with an ac–dc power converter and a dc–ac inverter show that the proposed AEF can be generally applied to reduce conducted EMI on either ac or dc power lines. [ABSTRACT FROM AUTHOR]

This article addresses high-frequency admittance modeling of current-controlled voltage source converters (VSCs). Recent studies have shown that harmonic instability may also occur at frequencies above the Nyquist frequency. To form an accurate multiple-frequency model in this frequency range, sidebands that originate from modulation and sampling must be examined. In this article, an accurate small-signal model is developed taking into account an adequate digital pulsewidth modulator (DPWM) representation, which allows to predict dependence of the frequency response on the steady-state dc (SS-dc) operating point. It is shown that when center-pulse sampling is implemented, pulsewidth modulation sidebands do not create additional loops leaving only sampling sidebands to be considered. Using the same approach as for SS-dc operation, a model that accurately represents admittance measurements during sinusoidal ac (S-ac) operation is developed. Its basis is a novel DPWM model suitable for S-ac regime, which allows to predict dependence of the VSC’s input admittance on the grid voltage magnitude. Experimental and simulated admittance measurements, performed on a single-phase two-level VSC during various SS-dc and S-ac regimes, match with the proposed models up to twice the sampling frequency. [ABSTRACT FROM AUTHOR]

Due to the increasing performance and decreasing price of microcontrollers in recent years, applying a high sampling frequency has become more feasible in modern control that is known as multisampling technology. The first motivation to use multisampling is emulating the analog control, thereby reducing the control delay and improving the stability of power electronics controllers. On the other hand, more information can be acquired from the multisampled current/voltage, which helps to save the cost and improve the reliability. In this article, a review of the multisampling application in power electronics converters is provided. Starting from the control delay analysis in single/double-sampling control, the modeling, implementation, and related control strategies are given when using multisampling pulsewidth modulation. Then, based on the multisampled data, the applications in condition monitoring and parameter estimation are discussed. Finally, perspectives on challenges and future trends are discussed. [ABSTRACT FROM AUTHOR]

Partial discharge (PD) is a phenomenon often occurring in insulation system defects (cavities), which can significantly affect life and reliability. While broad knowledge on PD phenomenology of high-frequency transformers (HFT) has been achieved under ac sinusoidal voltage, much less work has been done to infer PD behavior under emerging high frequency pulsewidth modulation (PWM) operation conditions. An impediment has been the limited appropriate test equipment. A recently developed novel ±5 kV GaN-based high-frequency PWM supply with controllable dV/dt, voltage level and frequency has been developed. This article explores the application of these measurements to the testing of materials in this electrical environment. Two commonly used windings for HFT were tested under different applied voltage magnitudes, frequencies, and slew rates. According to the test results, at high frequency (up to 50 kHz) the electric field generated by space charge deposited by PD occurring during previous PWM pulses plays an important role in PD behavior. The frequency dependent permittivity of the insulation material can also affect PD measurement results. [ABSTRACT FROM AUTHOR]

A model predictive controller based on optimized pulse patterns is proposed that is suitable for higher-order linear systems, such as converters with $LC$ filters. The controller manipulates the switching times of an optimized pulse pattern. The switching time modifications are approximated by the strengths of impulses, which are based on a small-signal linearization around the nominal switching instants. With these, the evolution of the state variables over the prediction horizon can be described by a set of linear differential equations. An objective function penalizes the predicted tracking error of the controlled variables, such as the converter currents, filter capacitor voltages, and grid currents, over a prediction horizon. Thanks to the use of impulse strengths, the underlying optimization problem is a convex quadratic program, which can be solved in real time to determine the switching time modifications of the pulse pattern to be applied by the controller. [ABSTRACT FROM AUTHOR]

This article proposes a new carrier selection strategy of generalized discontinuous pulsewidth modulation (GDPWM) method for the two-level three-phase voltage source inverter to reduce the dc-link capacitor current under all operating conditions while keeping the minimum switching losses. First, the root-mean-square value of dc-link capacitor current is effectively reduced by selectively using both single and double carrier signals and modifying the switching patterns of existing GDPWM method. Although the proposed carrier selection strategy depends on the power factor (PF), the PF calculation is avoided because the multicarrier signals are properly chosen based on the information of three-phase modulation signals and measured three-phase currents. Also, the switching losses can be kept to a minimum as the modulation signals of conventional GDPWM method, which are optimal in terms of the switching losses, remain the same and the proposed carrier selection strategy has little effect on the total number of switching events. The operating principle of proposed GDPWM method is theoretically analyzed. Then, its practical effectiveness is verified by experimental tests on a motor drive system. [ABSTRACT FROM AUTHOR]

This article puts forward a hybrid model predictive control (H-MPC) for an inner-interleaved hybrid multilevel converter (IHMC). The sign patterns of the original and shifted reference vectors in the original and virtual space vector diagrams (VSVDs) are used, respectively, to realize the phase-disposition pulsewidth modulation (PWM) and determine the low-frequency switching states. Then, the three adjacent vectors are selected in the second-layer VSVD and the optimal current tracking is safeguarded by the duty cycle optimization of the three adjacent vectors. Finally, through applying the phase-shifted PWM to the two interleaved legs, a constant and doubled equivalent switching frequency can be achieved, which further paves the way for dc-link and floating capacitor voltages balancing and circulating current mitigation with the use of the straightforward duty cycle adjustments. The proposed H-MPC enables the decoupling of the low- and high-frequency stages in the IHMC and also reduces both output current ripples and computational burden while achieving a constant switching frequency simultaneously. Comprehensive simulation and experimental studies on an all silicon carbide prototype verify the effectiveness of the proposed control strategy. [ABSTRACT FROM AUTHOR]

Unbalanced dc-link voltages occur when five-level flying capacitor (5L-FC) rectifier has dual dc loads of different rated voltages. Compared with traditional continuous pulsewidth modulation (CPWM) strategies, discontinuous PWM (DPWM) methods have more advantages in high-frequency and high-power applications for less commutation and higher efficiency. Therefore, this article proposes a carrier-based DPWM method for 5L-FC rectifiers with unbalanced dc-link voltages. The proposed method is first analyzed in the revised space vector diagram considering unbalanced dc voltages to divide subsectors and find available clamping modes, then it is implemented by applying carrier-based PWM with injecting clamping compensation component, which greatly reduces the implementation complexity. There is a pair of redundant clamping modes with opposite effects on the neutral-point (NP) in each subsector. Thus, the NP voltage can be actively controlled by selecting suitable clamping mode in each subsector. In addition, the allowable ranges of unbalanced voltage degree and unbalanced power degree are investigated in detail. Simulations and experiments verified the effectiveness and performance of the proposed method. [ABSTRACT FROM AUTHOR]

Parallel inverters can be connected using cross-coupled inductors (CIs) to produce high-quality line voltages in three-phase ac systems. Since no fundamental flux is present in the inductor cores, their size can be made considerably smaller than alternative inductor configurations. Interleaved switching and phase-shifted carriers (PS-PWM) can be used to produce multilevel three-phase line voltages. A modified approach (MPS-PWM) improves the quality of the line voltages by changing the phase of the carriers, carrier swapping, based upon the magnitude of the modulating signals. Since carrier swapping in MPS-PWM can cause the inductor circulating currents and flux patterns to jump and have dc offsets, two carrier transition techniques are presented to eliminate these jumps: carrier manipulation and pulse injection. These techniques represent open-loop PWM control, dependent only on the carrier phase change being used, and can easily be applied to an arbitrary number of parallel-connected inverters. The circulating currents and inductor flux patterns follow predictable patterns, allowing the CIs to be designed more precisely. The relative merits of using MPS-PWM over PS-PWM are assessed using measurements of the load current total harmonic distortion and the line voltage harmonic volt–seconds. The feasibility of the parallel inverter system described is verified using simulations and results from an experimental laboratory prototype. [ABSTRACT FROM AUTHOR]

This article presents a generalized simplified virtual vector pulsewidth modulation (SVVPWM) to attain the capacitor voltage balancing of multilevel diode-clamped converter (DCC) for all operational conditions, which is not possible by using conventional space vector pulsewidth modulation (PWM) and carrier-based PWM methods. Virtual vector PWM is a solution presented in the literature to sort out this issue but it becomes more complex for higher level converters. The proposed SVVPWM method is simple and easy to implement for any level converter because it converts the space vector (SV) diagram of any level converter to three-level SV diagram. The SVVPWM assures the natural voltage balancing under steady states and ideal operations. Under dynamic operations, a generalized equation that describes the influence of neutral point currents on dc-link capacitor's voltage has been derived and a general decoupled voltage balancing control for n-level DCC is presented. The proposed modulation method is implemented on five-level and seven-level DCCs to authenticate the effectiveness of decoupled voltage balancing control. Simulation and experimental results demonstrate that the proposed modulation strategy is easy to implement and effectively controls the balance of the capacitor voltages for the whole range of modulation index and load power factor. [ABSTRACT FROM AUTHOR]

This article presents a high-efficiency buck converter with electromagnetic interference (EMI) reduction. The proposed buck converter employs a simple method of piecewise linear (PWL) modulation to mitigate EMI significantly. Since EMI reduction tradesoff with efficiency and ripple content, this work also integrates the design of process, voltage, and temperature (PVT) insensitive crystal-less oscillator. This technique limits the modulated switching frequency to remain within range across all process corners, supply voltage. and operating temperatures, thereby limiting the range of efficiencies and ripple content that the buck converter will incur throughout its operation. As a result, the tradeoff between efficiency and ripple content is optimized while maintaining lower output voltage spurious noise tone. The chip was implemented using the 0.18 μm 1p6m CMOS process. The measured results show that the power spectrum's peak noise is at −60.37 dBm, and the minimum efficiency is 93% with a ripple content of less than 43.7 mV for worst-case considering PVT variations at 2.2 V input, 1.7 V output with 100 mA load current. [ABSTRACT FROM AUTHOR]

Variable switching frequency PWM (VSFPWM) modulation can be advantageously implemented in industrial applications, such as renewable energy, motor drives, and uninterrupted power supply (UPS) systems, to reduce the injected current harmonic amplitudes, to suppress audible noise, and to improve semiconductor power efficiency. In this article, the usage of periodic VSFPWM methods in a voltage source converter (VSC) is proposed, analyzed, and benchmarked in terms of harmonic spectrum spreading, following the IEEE-519 current harmonic standard for the connection to the distribution grid. Particular attention is paid to the influence of VSFPWM on the ac filter design. First, the analytical model of the voltage harmonic spectrum generated by a three-phase three-wire two-level VSC implementing several periodic VSFPWM methods is derived. Subsequently, a design guideline for the commonly used LCL filter in the grid-tied VSC application is proposed, which minimizes the size requirement of the necessary components. The voltage spectrum models of the proposed VSFPWM method and the optimal switching profiles are verified by MATLAB/Simulink simulations and a 5-kW three-phase two-level VSC hardware demonstrator. The study shows that the ac filter power density for the studied VSFPWM methods can be greatly increased when compared with the conventional and widely employed constant switching frequency continuous PWM strategies. [ABSTRACT FROM AUTHOR]

Common-mode voltage (CMV) is one of the major concerns in modern motor drive systems using pulsewidth modulation (PWM) controls. To alleviate the CMV issue, a series of different PWM methods have been proposed. However, due to the physical limits of the three-phase structure, none of those reduced-CMV PWMs (RCMV-PWMs) can fully eliminate the CMV. As the motor phases have been extended to even numbers, such as six phases, opportunities to eliminate the CMV by a proper modulation scheme emerge. This article proposes a new modulation method to fully eliminate or reduce the CMV for the full modulation span of a dual-three-phase motor drive system, thereby helping to shrink the CM filter. Mathematical models are built indicating its effectiveness of eliminating the CMV in the linearity range of the modulation index and reducing the CMV in the overmodulation range. Simulation results along with experiments implemented on field-programmable gate array controlled dual inverters validated the effectiveness of the proposed control algorithm. [ABSTRACT FROM AUTHOR]

This part is the second part of this article and mainly presents the sampled-data modeling method for the dc–dc converters with the constant on-time (COT) and constant off-time (COFT) controls. Compared with the constant frequency control in the first part, the duty cycle perturbation signal in the COT/COFT control is found to have two sets of narrow pulse signals in each switching period. Then, by establishing the relationship between the two sets of signals and using Shannon's sampling theorem, the transfer functions of the modulator and the loop gain are derived. Based on the theoretical results, the phenomenon that a current-mode constant on/off time controlled buck converter is stable at any duty cycle, and the instability of a voltage-mode constant on/off-time controlled buck converter with the smaller time constant of the output capacitor could be predicted. Moreover, the sampled-data modeling method is further extended to the digital control by taking a digitally current-mode controlled buck converter as an example. Simulation results are provided to confirm the validity of the proposed modeling method. [ABSTRACT FROM AUTHOR]

Envelope tracking is a well-known RF technique that alleviates the efficiency problem of linear power amplifiers used in wireless communication transmitters. It consists in varying the supply voltage of the amplifier, which is commonly constant, according to the envelope of the communication signal. Therefore, a switching-mode power converter with a bandwidth of several megahertz is required to perform the fast voltage changes needed for tracking the envelope properly. Another important requirement is that the converter needs to be able to achieve high efficiency not only at peak output power, but also at low output power because it operates in that power range most of the time due to the characteristics of modern communication signals. Taking into account these requirements, the design of the converter is very challenging, especially in the case of base stations, where higher power levels are reached by means of higher voltage levels. As a result, transistors with low breakdown voltages (20–30 V), which offer the highest speed, cannot be used in the converter. In this article, a novel multilevel converter able to use transistors with low breakdown voltages is proposed to alleviate that problem. Moreover, it shows a better switching behavior than the previously proposed multilevel converters, thus reducing the switching losses and, consequently, increasing the efficiency. In order to experimentally validate the proposed topology, a 73-W prototype with a switching frequency of 8 MHz was built. The efficiency is 94% and 81.7% at peak output power and at one-tenth of peak output power, respectively. [ABSTRACT FROM AUTHOR]

Digital control has been widely adopted in grid-connected inverters, thanks to easy implementation of complicated control algorithms. However, the digital control delay deteriorates the performance of the inverter and tends to cause system instability. In this article, the generating mechanism of the digital control delay, including computation delay and pulsewidth modulation delay, is analyzed. Then, a generalized real-time computation method with a dual-sampling mode is derived to directly eliminate the computation delay, based on two- and multilevel phase-legs. On this basis, the operation principle of the method for three- and single-phase inverters with two- and multilevel topologies is elaborated. Finally, the experimental and simulation results from three- and single-phase LCL-type grid-connected inverters are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

We present a hybrid analog/digital computing circuit to solve a selective harmonic minimization problem. The approach leverages favorable attributes of digital and analog controllers to yield a fast and scalable optimization solver. A digital microcontroller programs the cost function and other user-defined inputs to the optimization problem. Voltages in the circuit represent switching angles. In steady state, the voltages converge to Karush–Kuhn–Tucker (KKT) points of the problem. We present a specific realization of the computing circuit that solves for eight independent switching angles for a quarter-wave symmetric pulsewidth modulation (PWM) driven two-level single-phase inverter. Seven undesired harmonics are minimized while retaining control over the modulation index. The proposed computing circuit is verified with simulations and a hardware implementation. The experimental results demonstrate that the proposed circuit can converge to the optimal solution in less than 5.0 ms, which is substantially faster than the existing methods and facilitates real-time implementation. Moreover, the steady-state power consumption of the hardware implementation is approximately 750 mW, which is also significantly lower than the published methods for comparable applications. The computing circuit is utilized to generate the PWM for a 2-kW single-phase inverter, which validates its feasibility in practical applications. [ABSTRACT FROM AUTHOR]

Variable switching frequency sinusoidal pulsewidth modulation (VSFSPWM) method does well in many aspects such as lower harmonic peak and losses compared with constant switching frequency sinusoidal pulsewidth modulation (CSFSPWM) for DCAC converters. This article presents a passive VSFSPWM (PVSFSPWM) method for spectrum improvement, filter inductor reduction, and losses reduction, obtaining similar output current quality as that of the CSFSPWM method. Because the PVSFSPWM method does not need any feedback information compared with the model-predictive-based method, it is an open-loop method and is called the passive method. In order to obtain the law of harmonic distribution, the mathematical expression of harmonic spectrum distribution is derived. The required filter inductor under the same current ripple and the losses between CSFSPWM and PVSFSPWM methods have been compared. Simulation and experimental results show that the PVSFSPWM method achieves excellent performance in EMI suppression, inductance, and losses reduction without impairing the output quality. [ABSTRACT FROM AUTHOR]

This article from a discrete-time model and stability analysis is developed using a Lyapunov approach, taking into account the one sample implementation delay present in digital control applications. Experimental results are provided to demonstrate the effectiveness of the proposed approach, where a conventional hysteresis controller is used as a benchmark. Results show that the proposal is able to deliver adequate reference tracking while using significantly lower sampling frequencies. Moreover, when compared to the hysteresis controller, superior tracking is observed at low speeds, while maintaining a similar level of computational complexity. [ABSTRACT FROM AUTHOR]

Multi-sampled pulsewidth modulator (MS-PWM) digital control is important for reduction of control and modulator delays as well as for noise suppression. To reduce aliasing and modulator nonlinearities, the MS-PWM is often implemented with switching ripple filtering, which limits the obtained dynamic improvements. This article analyzes the multi-sampled modulator nonlinearities in order to provide means for the optimal implementation of MS-PWM without ripple filtering. Depending on the types of intersections between the modulating waveform and the carrier, the nonlinearities are manifested as reduced-gain, zero-gain, and infinite-gain zones in the modulator transcharacteristic. For dc-type converters, the modulator nonlinearities can impair the transient response and give rise to limit cycle oscillations. For ac-type converters, it is shown that the modulator nonlinearities result in a stronger harmonic distortion compared to the aliasing effect. The nonlinear behavior is caused by the modulating waveform steps, whose pattern depends on switching ripple, controller gains, multi-sampling factor, and time delay of the control system. Particularly, the time delay is found to be a crucial factor that determines which nonlinearity is exhibited and to what extent. Discontinuity and nonlinearity graphs are proposed and exploited to adjust the time delay, so as to avoid specific nonlinearity zones and to, partially or completely, linearize the system behavior. The theory is experimentally verified on a dc–dc buck converter and a dc–ac single-phase inverter. This article is accompanied by videos of experimental validations. [ABSTRACT FROM AUTHOR]

Electric machine emulation (EME) is becoming a popular solution in advanced testing and validation of power-electronics-based machine drive systems. In terms of a typical EME, the stator current references are first calculated in response to the sampled terminal voltage, and then, are electrically generated by power electronics converters. In this type of structure, closed-loop current control and low-pass sampling for the voltage are inevitably introduced, resulting in distortion in frequency-domain behaviors of EME. Consequently, the steady-state performance under a high fundamental frequency, and the dynamic performance under load transients, may deviate from those of the target machine system. In this article, the bandwidth limitations of the typical EME are identified and analyzed in detail, and a novel structure that realizes full-bandwidth mission profile emulation is proposed. Theoretical analyses are given to prove that the frequency-domain characteristics of the proposed structure would be identical to the actual machine systems, which allows for the extended operating range of mission profile emulation. Simulation and experimental results are provided to validate the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

This article presents an improved full-bridge converter with a five-diode rectifier. The primary side circuit is composed of a full bridge with two transformers and two split capacitors. On the secondary side, five diodes are employed in the rectifier stage. By using the asymmetrical pulse width modulation (PWM) signals, this converter can realize the zero-voltage switching (ZVS) of all switches and reduce the circulating current. The two transformers share the load power equally in whole load range. Compared with the other dual transformer isolated full-bridge converters, the transformers in the proposed converter are easy to optimize because of the load power equal sharing. Furthermore, the output filter inductance is reduced, which reduces the loss and volume. According to the loss analysis, the proposed converter has higher efficiency compared with some other dc-dc converters. The experimental results of a prototype with 300–400 V input voltage and 250 V/4 A output verify the performance of the proposed converter. [ABSTRACT FROM AUTHOR]

For current-controlled grid-connected inverters with LCL filter, the essence of grid voltage full feedback is to improve the output impedance of grid-connected inverters to infinity, which can eliminate the influences of grid voltage distortion and the non-negligible grid impedance. However, existing full feedforward strategies are complex and control delay cannot be compensated precisely, which leads to the instability of system when the full feedforward of the voltage at the point of common coupling under the weak grid is adopted. This article first proposes a simplified full feedforward strategy based on grid-side inductor volt-age differential feedback active damping (GIVD-AD). Second, repetitive prediction (RP) is used to compensate for the control delay. Then, a virtual impedance branch is added and an adaptive algorithm for modifying virtual impedance based on the difference between predicted grid voltages by Newton interpolation prediction (NIP) and RP is proposed. With the proposed method, grid-connected inverters can work stably when grid impedance changes suddenly and exhibit strong rejection ability against grid-voltage harmonics. Finally, simulative and experimental results from a 3-kW single-phase grid-connected inverter are provided to prove the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

Modular multilevel converters have become the prominent topology for medium- and high-voltage applications. The performance of these converters highly depends on the accuracy of the used modulation approach, for which the capacitor voltage of submodules (SM) are usually assumed to be equal. This article exhibits that ignoring the capacitor voltage differences among SMs adversely affects the system performance. This becomes more obvious the larger the capacitor voltage differences are. Hence, this article proposes a more accurate feedforward modulation approach that takes into account either the instantaneous capacitor voltage value and the real output voltage in the modulation stage. As a result, in applications where larger SM voltage differences are expected, the current distortion and control performance are improved. Particularly, switching–saving approaches benefit from this method as it enables their operation with reduced switching losses without the downsides of increased distortion due to capacitor voltage differences. The proposed approach is analyzed and compared with the nearest-level modulation and with the level-shift PWM. Simulations and experimental validation are presented to confirm the effectiveness of the proposed technique. [ABSTRACT FROM AUTHOR]

An LLC dual active bridge (DAB) bidirectional converter with reduced switch count as a dc–dc transformer (DCX) is proposed in this article. It can achieve voltage regulation, full load range zero voltage switching (ZVS) for eight main switches and wide load range ZVS for four auxiliary switches, with consideration of the switch junction capacitors under different power direction. A part portion of total power is transferred through an auxiliary DAB circuit to achieve voltage regulation and bidirectional power conversion. The main power is transferred through LLC circuit with an easy PWM scheme achieving high conversion efficiency. Different from the existing LLC-DAB DCX structure, the two secondary side transformer outputs are in parallel, and connected to the same full-bridge circuit. In this way, the auxiliary DAB circuit can not only adjust the output voltage, but also can inject current into the secondary side to help achieving ZVS of switches without synchronous rectifier circuit. The converter operation principle is analyzed under different power directions, and ZVS is analyzed with the consideration of all the switch junction capacitors. Based on the analysis, the design consideration is introduced. Finally, a 2-kW prototype with 750 V input and 400 V output is built up to verify the effectiveness of the proposed solution. [ABSTRACT FROM AUTHOR]

A generic red, green, and blue (RGB) LED system encompasses complex interactions of power, heat, light, and color, which pose a major challenge for achieving precise control over luminance and color-mixing in high-quality lighting applications. In this article, new nonlinear empirical models of a practical RGB LED system with closed-loop control are formulated. They enable precise prediction of luminous flux and color coordinates by using the three distinct reference voltages as the control variables for independent current regulation across the RGB LED strings. The proposed empirical models are experimentally verified by using a hardware prototype of a dc–dc single-inductor three-output LED driver with proportional–integral compensators and time-interleaving control scheme. The measured values of luminous flux and color coordinates agree closely with the predicted values from the models. [ABSTRACT FROM AUTHOR]

Passive electromagnetic interference filters (PEFs) are the most common way to solve electromagnetic interference (EMI) problems in power converters. However, PEFs bring additional volume, weight, and cost for power converters, especially common-mode (CM) inductors in PEFs, and it is a tricky issue for the high-power-density converters that must meet the electromagnetic compatibility specification. In order to design compact PEFs for power converters with pulsewidth modulation (PWM), a volume reduction method of CM inductors with chaotic PWM (CPWM) is proposed in this article. First, the mechanism that CPWM reduces the CM inductance by increasing the corner frequency is analyzed. Second, the relationship between the reduction of EMI spectrum magnitude by CPWM and the decrease of the CM inductance is quantitatively calculated. Third, utilization rate of the magnetic core η is defined to reasonably compare the size of the different inductors under traditional PWM and CPWM. Finally, the proposed design method of CM EMI filters is applied into a dc–dc converter and a dc–ac inverter, respectively, to verify its effectiveness and feasibility. In a dc–dc converter with the switching frequency 100 kHz, 275 W, the volume of the CM inductor and the volume of CM EMI filters are reduced by 63.5% and 48.3%, respectively, by using the proposed compact EMI filter. [ABSTRACT FROM AUTHOR]

Parallel pulsewidth modulation rectifiers are a good solution for high-power ac–dc applications, which enhance quality and reliability. However, the main and inevitable shortcoming of parallel structures is a generation of circulating current. Various methods are proposed to reduce or eliminate circulating current, most of which tend to change or limit the switching pattern of parallel converters. This article presents an interfacing circuit with low rating elements, which eliminates the circulating current without any limitation for the switching pattern of parallel converters. Therefore, voltage and current waveforms are in high quality. Moreover, unlike previous methods that had complex control and high mathematical computations, the presented method has simple control. Therefore, multiple modules can be implemented in a modular fashion with a fast dynamic response. Simulation and Laboratory results are presented to validate the analysis. [ABSTRACT FROM AUTHOR]

Cascaded multilevel inverter (CMI) produces a step-up output voltage by series-connection of several submodules (SMs) supplied by isolated dc sources, which can be implemented by photovoltaic (PV) sources. The unbalanced power provided by different PV sources may however distort the output voltage. To use a single dc source while retaining the voltage boosting, this article proposes a novel CMI based on a four-switch SM. It is conditioned by an input inductor, which discharges with boosted voltages across the SMs. Furthermore, a continuous input current is achieved by the inductor. The proposed inverter can be extended to higher voltage-level operations using capacitors to supply its extended SMs. To avoid switched-capacitive charging, a two-phase configuration where capacitors are directly charged by the inductive input current is presented. The voltages of capacitors are well balanced at the same average value and feature a similar ripple. The operating principles and pulsewidth modulation scheme of the two-phase inverter are described. Theoretical analysis, calculations, and comparisons with the prior-art CMIs illustrate the superiorities of the proposed inverter. Simulation and experimental results agree well with each other and verify the feasibility of the proposed inverter for PV power applications. [ABSTRACT FROM AUTHOR]

This article analyzes the propagation of feedback noise in multisampled dc–dc power converters. The analytical calculations for noise attenuation, strictly valid for linear time-invariant systems, are found to offer good predictions for power converters, after suppressing the decimation effects of the digital pulsewidth modulator (DPWM). For control systems that employ a proportional-integral controller, without any digital low-pass filters, the nonlinearity caused by the DPWM decimation is found to saturate the noise attenuation properties, as the multisampling factor $N$ is increased. Strong noise attenuation is enabled using antialiasing digital filters, with a small impact on the dynamic response. For control systems that employ a proportional-integral-derivative controller, increase of the multisampling factor, without any digital filters, causes the amplification of the noise power. Therefore, a greater attenuation of high-frequency components is required to provide a significant noise reduction in the control bandwidth. Even with these antialiasing digital filters, the dynamic response of multisampled control systems is improved compared to double-update. This is proven by the analytical and experimental comparison of various multisampled control strategies in terms of dynamic response and noise attenuation capabilities. The experimental results, from a buck-type converter, match well with simulations and analytical calculations. [ABSTRACT FROM AUTHOR]

This article proposes a condition monitoring scheme for the dc-link capacitors used in ac/dc/ac pulsewidth-modulation converters based on the signal injection, which can estimate capacitance in real time when both the rectifier and the inverter are in normal operation. First, a low-frequency signal is injected into the dc-link voltage, and its effects on the total harmonic distortion (THD) of the input current are analyzed. Accordingly, a suitable injection frequency is selected to keep the THD of input current within limits prescribed by the IEEE standard. Then, a novel calculation method of capacitor current without any dc-link current sensor is given, where the converter system is still in normal operation and different inverter operations are both taken into consideration. Finally, capacitance estimation based on the slide discrete Fourier transform is introduced. At the end of this article, experiments have been done to validate the correctness of the conclusion and effectiveness of the proposed scheme. [ABSTRACT FROM AUTHOR]

The space vector modulation (SVM) scheme is popularly implemented in multilevel converters. However, in flying capacitor-based (FC-based) multilevel converters, it becomes extremely challenging to implement due to the redundancy in phase voltage levels. The intrinsic property of line voltage redundancy of SVM in addition to the phase voltage redundancy of FC-based converters results in considerably increased computational complexity and storage requirements. In fact, one of the most important concerns about FC-based converters is the voltage control of the FCs. This article proposes a generalized decoupled SVM scheme for the FC-based multilevel converters, including the classic flying capacitor multicell (FCM) converters, which is less computationally complex. For balancing the FC voltages, an overall priority index is employed to determine the switching state with the best balancing characteristics. The proposed decoupled SVM scheme along with the capacitor voltage balancing scheme can be implemented intuitively and simply for all FC-based multilevel converters. The simulation results of a five-level FCM converter show the effectiveness of the proposed method in the regulation of FC voltages. Moreover, the proposed voltage balancing method is robust to static load and transient conditions. Also, experimental results demonstrate the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

Three-phase, four-wire, split-capacitor inverters, thanks to their capability to deal with unbalanced systems, are currently employed in photovoltaic installations, electric vehicles battery chargers, active power filters, and many other grid-tied applications. The minimization of ac output current ripple and switching losses positively impacts the inverter's efficiency, volume, weight, and cost optimization. For this reason, a novel variable switching frequency driving strategy independently tunable on each phase is proposed in this article. Taking advantage of phase current ripple prediction, a proper variable switching frequency strategy is applied for obtaining a flat current ripple profile. Having tuned the driving strategy parameters, it is possible to optimize and compare individual metrics such as the maximum peak-to-peak value of the current ripple, current ripple rms, average switching frequency, and switching losses. By applying the proposed modulation method, a significant inverter performance enhancement has been obtained. Converter efficiency is improved without introducing detrimental effects on the current harmonic quality. Analytical derivations are expressed as a modulating index function and the power factor for balanced and unbalanced systems. All the theoretical developments are verified throughout numerical simulations and experimental tests. [ABSTRACT FROM AUTHOR]

In this article, a new three-level cascaded noninverting buck–boost converter (TL-CNIBB) is proposed, which has a superior adaptation for a wide-range voltage input of renewable energy access. Firstly, the operation principle is analyzed for TL-CNIBB and it is mainly divided into four modes, namely buck mode with the voltage ratio below or above 0.5, boost mode with the voltage ratio below or above 2. Due to multilevel and multimode features, several fundamental issues are required to be settled, such as a dead zone between buck mode and boost mode, capacitor voltage unbalance on both sides, and subharmonics at the edge of modes. For dead zone and capacitor voltage balance problems, a systematic control strategy is proposed, and four kinds of smooth transition technologies are proposed to deal with different cases. Furthermore, to avoid the chattering and subharmonics at the edge of modes, a modified hysteretic transition method is proposed. Finally, a prototype of TL-CNIBB system is constructed, and the experiments are carried out to verify the performance of the proposed system with high viability and flexibility. [ABSTRACT FROM AUTHOR]

Overmodulation (OVM) strategy is widely utilized to enhance the dc-link voltage utilization. For five-phase and six-phase drives, various OVM strategies have been developed to reduce the reference voltage vector in one harmonic subspace (HS) and improve the output current total harmonic distortion (THD) performance. However, the performance of generic OVM strategies can be further improved to deal with the optimization problem of multiple HSs. This article presents a universal sequential optimization scheme and takes a seven-phase induction motor as study example. First, the OVM region is predivided by the principle of fully utilizing available degrees of freedom and the concept of virtual voltage vectors. Then, optimizations are carried out according to the voltage distribution in different HSs, and design guidelines are provided for multiphase drives with more than one HS. Without complex computations, the proposed OVM strategy can easily determine the desired voltage vectors and the corresponding duty ratio, which not only achieves overall good THD performance but also favors for more intuitive implementation. Finally, simulation and experimental results implemented on a seven-phase drive platform validate the feasibility of the proposed OVM strategy. [ABSTRACT FROM AUTHOR]

This article presents a dynamic averaged model of active neutral point clamped inverter (ANPCI). The proposed model helps in significant reduction of computational resources required for system-level studies in various applications which employ ANPCI as main power conversion stage. The average model derived in this article can consider the effect of various nonidealities in ANPCI, and also its capacitor voltage-balancing issues. The model is also modular in nature, i.e., it can be extended for an N-level ANPCI. PSCAD/EMTDC simulations and experiments are performed for steady-state and transient conditions to show that the averaged model developed in this article accurately predicts the steady-state and dynamic waveforms of ANPCI in both open-loop and closed-loop operations, even for large simulation time-steps. For the closed-loop operation, synchronous reference frame $dq$ -based controller is developed and implemented in a digital signal processor. In addition, the strength of the model is demonstrated by comparing the simulation waveforms and computational times required for simulating an ANPCI-based solar PV system using switching circuit model and the proposed averaged model. [ABSTRACT FROM AUTHOR]

This article presents a pulsewidth modulation (PWM) controlled series resonant converter (SRC) for a universal EV charger. This article focuses on the boost mode of a SRC. By adapting two PWM boost switches with a full bridge rectifier, it is possible for a SRC to cover a very wide range of gain with a high and flat efficiency curve. As the output voltage increases, the secondary side rectifier of the proposed converter gradually converts from a full bridge rectifier to a voltage doubler rectifier. Since the switching frequency is fixed to the resonant frequency in boost mode, the proposed converter naturally achieves “two peak efficiency points” with full bridge and voltage doubler rectifiers. Two peak efficiency points limit the efficiency drop over a wide range of gain, and that is the reason the proposed converter achieves a high and flat efficiency curve. The effectiveness of the proposed converter and control has been verified on an 800 V input and 200–950 V/3.3 kW output prototype. [ABSTRACT FROM AUTHOR]

In a maritime dc power system, the rectified dc-bus voltage of a permanent magnet synchronous generator is generally regulated by the pulsewidth modulation (PWM) operation of an active ac/dc converter. This article proposes a dc bus voltage regulation strategy exploiting the six-step operation. Under the six-step operation, the switching loss of the converter can be significantly reduced, compared to the PWM operation. Moreover, due to the higher modulation index and the less flux-weakening current of the six-step operation, the conduction loss can also be reduced. By employing diode rectification mode at light load, the conduction loss induced by the non-negligible ripple current of the six-step operation could be minimized. This article implements a controller for the proposed dc bus voltage regulation strategy and verifies its validity with simulation and experimental setup. According to the simulation and the experimental test, the converter efficiency at the rated load is enhanced by 0.6% and 0.4%, and the converter loss is reduced by up to 70% and 19%, respectively. [ABSTRACT FROM AUTHOR]

In this article, a time-invariant polynomial model of fixed-frequency pulsewidth modulation dc–dc converter is proposed. Through normalized coordinate transformation, the time-varying model of the converter is transferred into a time-invariant model, whose state matrix and input matrix are obtained by the addition and multiplication of matrices simply and expressed by the polynomial of duty cycle concisely. The proposed model has the following advantages. Compared with the state-space average (SSA) model, the ripple of the state vector and the switching period are considered, thereby improving the accuracy. Contrary to other time-invariant models, the state matrix and input matrix instead of the state vector are expanded into series. Therefore, neither the number of state vectors nor the order of the matrices increases, and the proposed model has a simple structure similar to the SSA model. In addition, as a time-invariant polynomial model, the calculation and analysis of the proposed model are much simpler than the time-variant exact model. In order to prove the above advantages of the proposed model, the general expression of the proposed model is derived and the proposed model is compared with other models. These analyses and comparisons are verified through the simulation and experimental results. [ABSTRACT FROM AUTHOR]

In medium/high power applications, including smart transformers, active power filters, and wind turbines, three-level neutral-point-clamped (NPC) inverters proved to be a reliable solution, providing high efficiency and low harmonic distortion. In practice, several NPCs are parallel connected and operated in interleaved manner to further increase the power handling and reduce the line filters size. However, if such configuration has a common dc-link, high-frequency zero-sequence circulating current (HF-ZSCC) arises among the inverters, increasing power losses of the switching devices and propagating the stress on the dc-capacitors. Moreover, the amplitude of the HF-ZSCC is inversely proportional to the filter inductance size, therefore in real applications, it can reach hundreds of amperes even with relatively low output currents. The research on the HF-ZSCC is mostly concentrated on two-level inverters for low voltage grids and traction applications, where the inductance size is relatively big and the HF-ZSCC does not affect the system efficiency. Differently, NPCs provide higher switching degree of freedom and more sophisticated methods can be applied to reduce the HF-ZSCC. This article investigates a double-reference pulsewidth modulation (DRPWM) as solution for diminishing the HF-ZSCC in paralleled NPCs. The performance of DRPWM method is confirmed by both simulation and experiments, performed on a 1.6-MVA system. [ABSTRACT FROM AUTHOR]

This article proposes a novel and generalized single-carrier (SC) pulsewidth modulation (PWM) scheme suitable for multilevel converters. Compared with the existing SC-PWM schemes, the proposed one presents a simpler approach to replicate the behavior of the phase disposition PWM method at any operating point. Besides having an easier digital implementation, the proposed SC-PWM scheme results in great control flexibility to optimize the operation of multilevel converters. Based on the rationales of the proposed SC-PWM scheme, an optimized switching strategy for a cascaded H-bridge (CHB) multilevel inverter architecture is developed. The proposed optimized switching strategy imposes appropriate switching sequences with a minimum number of power device commutations per cycle, leading to both half-wave and quarter-wave symmetries at the individual H-bridge cell level, which subsequently improves the converter harmonic performances and reduces the overall switching losses. The validity and effectiveness of both proposed modulation and switching strategies are demonstrated through the intensive simulation and experimental test results provided both in time and frequency domains. The experimental results are obtained on a three-phase seven-level CHB inverter for an 18-kW laboratory prototype. [ABSTRACT FROM AUTHOR]

Pulsewidth-modulated (PWM) current-source converters (CSCs) have the features of simple configuration, reliable short-circuit protection, and sinusoidal ac output voltages. The conventional space-vector modulation (SVM) scheme usually generates high-magnitude low-order harmonics in CSCs with low switching frequency. In this article, two modified SVM schemes, namely MSVM1 and MSVM2, are proposed to improve the harmonic performance for PWM CSCs in the high-power applications with low switching frequencies. The MSVM1 scheme focuses on eliminating the average dwell-time error of current vectors within each sampling period, while the MSVM2 scheme is targeted to achieve the accurate dwell time of current vectors as that of the natural sampling-based SVM scheme. The theoretical analysis and the calculation equations of dwell time are derived for both MSVM1 and MSVM2. The experiments are given to verify the effectiveness of the two modified SVM schemes in improving the harmonic performance of high-power CSCs with low switching frequencies. [ABSTRACT FROM AUTHOR]