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A dual-buck inverter (DBI) possesses no shoot-through worries and can boost efficiency by using power mosfet s. The main drawback of a DBI is the use of more inductors than in a traditional full-bridge inverter. This greater number of inductors decreases the power density and increases system cost. In this paper, a modified cascaded full-bridge DBI is proposed. It retains all the advantages of the conventional cascaded full-bridge DBI, possesses no shoot-through issues, and can be operated with no pulse-width-modulation dead-times. It can be implemented with power mosfet without reverse recovery issues of a body diode to boost efficiency. The cascaded modules in the proposed inverter share current limiting inductors. Therefore, the number of inductors and inductor footprints, the complexity of the circuit layout, required inductance, and magnetic volume can all be decreased. To show the advantages of the proposed inverter, detailed theoretical analysis and experimental results are provided. [ABSTRACT FROM PUBLISHER]

This paper proposes a proportional-integral (inertial) multiresonant (PIMR) type repetitive control (PIMR-type RC) scheme for a grid-tied inverter. The proposed control scheme is composed of a repetitive controller in parallel with a proportional gain for the purpose of replacing lots of parameters of the conventional proportional multiresonant controller, and therefore, only a few parameters need to be designed. The proportional gain not only improves the dynamic response, but also enables repetitive controller (RC) to accommodate a larger RC gain, and hence a faster convergence rate. Theoretical analysis and stability analysis of PIMR-type RC are given, and then a practical step-by-step design tutorial is also provided. The experimental results validate the feasibility and outstanding performance of the proposed control scheme. [ABSTRACT FROM PUBLISHER]

Flying capacitor photovoltaic (PV) inverters have been widely discussed in the literature. However, the relevant leakage current issues have not received much attention. In this paper, the modulation techniques for a transformerless three-phase flying capacitor PV inverter are investigated for the leakage current suppression. First, the theoretical analysis of the system common mode model and leakage current is presented. Second, three kinds of conventional carrier-based modulation techniques are evaluated, and results indicate that they fail to effectively suppress the leakage current. Third, a new carrier modulation and logic function is presented. It is able to maintain the constant common mode voltage, and consequently, the leakage current can be significantly reduced. Finally, the experimental tests are conducted on a transformerless three-phase flying capacitor PV inverter to verify the effectiveness of the proposed method. [ABSTRACT FROM PUBLISHER]

A main design constraint of the digitally controlled power electronics converters is the time delay of control systems, which may lead to the reduced control loop bandwidth and even unstable dynamics. Numerous time-delay compensation methods have been developed, of which the model-free schemes are independent to model accuracy whereas the model-based alternatives are sensitive to system modeling. This paper first presents a graphical illustration of four model-free delay compensation techniques, where their principles and performances are intuitively elaborated and compared by means of the impulse area equivalence method. An improved time-delay compensation approach is then proposed based on additional area insertion, which provides a wider frequency of phase compensation. Finally, the dynamic response of an LCL-filtered grid-connected inverter was tested with the studied delay compensation methods. Simulations and experimental test results validate the effectiveness of the graphical comparisons and the proposed approach. [ABSTRACT FROM PUBLISHER]

Multiple transmitters powering a single receiver simultaneously is a good alternative to upgrade the power capacity of the wireless power transfer (WPT) system by using multiple modular inverters manufactured in a larger quantities, since the demand for high power applications is on the rise. A multiple overlapped transmitters based WPT system is presented in this paper. In order to alleviate the effects of the cross couplings between the transmitters, additional capacitors are adopted in the transmitters and the configuration of additional capacitors is provided. Virtual active and reactive powers are defined to decompose the transmitter current into active and reactive components. A transmitter current control scheme based on the proposed current decomposition method consisting of one reactive current control loop and one active current control loop is also presented in this paper. Finally, a low-scale experimental setup using two overlapped transmitters WPT system is provided to verify the proposed approach. The experimental results indicate that the proposed method could improve the stability of output voltage control and achieve minimal current difference amongst transmitters. Besides, the overall system efficiency is improved to 90.34% with the proposed control method at 1.45 kW output power, which demonstrates that the proposed method is a potential solution for high power applications. [ABSTRACT FROM AUTHOR]

The injected grid current of the voltage-controlled grid-connected inverter has serious distortion due to the low frequency harmonic components in the output voltage, which is resulted by the dead time of the drive signals of the power switches, and the distortion cannot be eliminated even when an output voltage closed loop is incorporated. This paper introduces a virtual series impedance to increase the output impedance of the grid-connected inverter only at the dominated lower harmonic frequencies; thus, the injected grid current quality can be improved and the dynamic performance of the grid-connected inverter is not deteriorated. Experimental results from a 6-kW single-phase grid-connected inverter confirm the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

Lifetime of Photovoltaic (PV) inverters is affected by the installation sites related to different solar irradiance and ambient temperature profiles (also referred to as mission profiles). In fact, the installation site also affects the degradation rate of the PV panels and, thus, long-term energy production and reliability. Prior-art lifetime analysis in PV inverters has not yet investigated the impact of PV panel degradations. This paper, thus, evaluates the lifetime of PV inverters considering panel degradation rates and mission profiles. Evaluations have been carried out on PV systems installed in Denmark and Arizona. The results reveal that the PV panel degradation rate has a considerable impact on the PV inverter lifetime, especially in the hot climate (e.g., Arizona), where the panel degrades at a faster rate. In that case, the PV inverter lifetime prediction can be deviated by 54%, if the impact of PV panel degradations is not taken into account. [ABSTRACT FROM AUTHOR]

This paper analyzes synchronization strategy for cascaded H-bridge multilevel inverter (CHBMLI) topologies with a carrier-based sinusoidal phase-shifted pulse width modulation (PSPWM) technique. In the PSPWM technique, a separate carrier is used for each H-bridge (HB). The carriers are generally phase shifted from each other by π /x rad (x = No. of HBs) for unipolar PWM. With the carrier frequency being an integer (odd/even) multiple of the fundamental frequency, it is observed that the positions of zero crossings of the carriers with respect to the zero crossings of voltage references play an important role for maintaining quarter-wave symmetry among multilevel inverter pole voltage waveforms. This paper analytically shows the conditions for half-wave symmetry and quarter-wave symmetry and experimentally verifies those conditions for the PSPWM technique with a five-level CHBMLI laboratory prototype. [ABSTRACT FROM PUBLISHER]

The performance of modular multilevel converters (MMCs) in medium-voltage applications, where the number of required submodules is not high, can be improved utilizing low switching frequency modulations such as (2N+1) selective harmonic elimination-pulse width modulation (SHE-PWM), which provides tight control of lower order harmonics and low switching losses. This paper proposes a calculation method, which is based on a novel formulation, to solve the SHE-PWM problem. In particular, MMCs with (2N+1) phase output voltage levels are considered, obtaining a (2N+1) SHE-PWM waveform. This method utilizes a unique system of equations that is valid for any possible waveform. Therefore, it is able to calculate simultaneously, without predefined waveforms, both the switching patterns and the associated firing angles that solve the (2N+1) SHE-PWM problem. Consequently, the search process is simplified and optimized. Furthermore, this paper also proposes a circulating current control technique, which can be applied along with (2N+1) SHE-PWM without disturbing the phase output voltage. Simulation results and experimental tests obtained with a single-phase laboratory prototype prove the validity of the novel (2N+1) SHE-PWM implementation method and the proposed circulating current control technique. [ABSTRACT FROM PUBLISHER]

A novel control strategy for single-phase current-source inverters connected to an ac grid is proposed in this paper. The control strategy aims to inject maximum power to the grid under transient and steady-state conditions by the tracking of sinusoidal references. This paper presents the modeling and the design of the control strategy based on the exact linearization of the inverter model. Results are obtained by computational simulation and validated experimentally. By using error performance indexes in the analysis of the results, it is demonstrated that the proposed controllers achieve correct tracking of the sinusoidal reference while keeping a low switching frequency, which helps to minimize the commutation losses. [ABSTRACT FROM PUBLISHER]

Switching harmonic attenuation has always been challenging for inverters used in high-power conversion applications, where ratio of switching to fundamental frequency is low. Addition of multiple LC-trap filters is no doubt a feasible cost-effective method, which has increasingly been used, but generally susceptible to filter parameter variations and harmonic resonances. This paper hence presents an alternative active trap filter (ATF), based on a series-LC-filtered inverter, for attenuating switching harmonics in a flexible, while yet not cost burdensome, approach. A direct impedance synthesis method has also been proposed for the ATF to better enforce its active switching harmonic bypassing ability. Compared with conventional schemes for controlling active power filters, the proposed method is more readily implemented, since it requires neither current reference generation nor high-bandwidth current control loop. Moreover, the use of a series LC filter at its ac side helps the ATF to reduce its inverter voltage and power ratings. Compensated frequency range of the ATF can hence be enlarged by using a comparably higher switching frequency and a proper step-by-step design procedure to be presented in this paper. Simulation and experimental results have confirmed the design procedures, and hence expected performance of the ATF. [ABSTRACT FROM PUBLISHER]

This paper analyzes the use of the voltage distortions in pulse width modulation voltage-source inverters caused by the inverter switching for islanding detection purposes. The nonideal characteristics of the inverters, mainly due to the dead time needed to have safe commutations, produce fundamental frequency-dependent harmonics (−5th, 7th, …) in the output voltage. These harmonic order are, in principle, an unwanted effect, as they reduce the power quality. However, they can potentially be used for islanding detection purposes. The physical principles of the method would be the same as for high-frequency signal injection methods that have already been proposed, but without the need of injecting a high-frequency signal, behaving, therefore, as a passive islanding detection technique. [ABSTRACT FROM AUTHOR]

When employed as a modulator in power inverters, model predictive control has an equivalence to a recently proposed modulation technique known as feedback quantizer modulation (FBQM). Both schemes produce a random-like switching pattern that can facilitate explicit control over the shape of frequency spectra associated with inverter output voltages and currents. This is useful to satisfy electromagnetic interference and acoustic noise requirements, and to avoid excitation of external system resonances. However, it will be shown in this paper that inverter deadtime introduces a disturbance into FBQM that significantly degrades the ability to shape the frequency spectra. Several compensation techniques, designed to model the effect of deadtime inside the formulation of FBQM, are proposed and experimentally verified on a two-level three-phase inverter. [ABSTRACT FROM PUBLISHER]

This paper presents a steady-state model of MMC for the second-order phase voltage ripple prediction under unbalanced conditions, taking the impact of negative-sequence current control into account. From the steady-state model, a circular relationship is found among current and voltage quantities, which can be used to evaluate the magnitudes and initial phase angles of different circulating current components. Moreover, in order to calculate the circulating current in a point-to-point MMC-based HVdc system under unbalanced grid conditions, the derivation of equivalent dc impedance of an MMC is discussed as well. According to the dc impedance model, an MMC inverter can be represented as a series connected R–L–C branch, with its equivalent resistance and capacitance directly related to the circulating current control parameters. Experimental results from a scaled-down three-phase MMC system under an emulated single-line-to-ground fault are provided to support the theoretical analysis and derived model. This new models provides an insight into the impact of different control schemes on the fault characteristics and improves the understanding of the operation of MMC under unbalanced conditions. [ABSTRACT FROM PUBLISHER]

In this paper, a comprehensive and practical method of implementing speed range extended maximum torque per ampere (MTPA) control for permanent magnet synchronous machine (PMSM) is presented. The inverter-based method of measuring PMSM parameters, including winding resistance and d- and q-axis flux linkages, is introduced. The nonlinearities of the inverter, including voltage amplitude error and voltage phase shift, are identified and compensated, which improves the accuracy of the characterized flux linkage. The extended MTPA current references are obtained by employing nonlinear optimization algorithm, and the results are verified analytically on the current plane. MTPA control is applied on the PMSM experimentally in the entire speed range. Current transition, torque control accuracy, and efficiency performance are measured in the entire torque–speed range. [ABSTRACT FROM PUBLISHER]

Due to their remarkable merits, the soft-switching ac-link universal power converters have received noticeable attention during the last few years. These converters, which can be configured as dc-dc, dc-ac, ac-dc, or ac-ac, are compact, reliable, and offer longer life time compared to the other types of converters. However, they require more switches, which make the control process more complicated. This paper proposes a modified configuration for the dc-ac power conversion, which reduces the number of switches without changing the principles of operation. This converter, which is named sparse ac-link buck-boost inverter, reduces the number of switches from 20 to 18. Despite reducing the number of switches, the partial resonant time, during which no power is transferred, is as short as the original configuration. An important feature of this inverter is that it can be fabricated by IGBT modules, which are more compact and more cost-effective compared to the discrete devices. This paper presents the principles of the operation of this configuration, and compares the efficiency, the failure rate, and the current rating of the switches in the proposed and original inverters. It is shown that the failure rates of the sparse configuration are lower than the original configuration. Therefore, they have longer lifetime. The efficiency of the sparse configuration is slightly lower than that of the original configuration. However, by using reverse blocking IGBTs in the sparse configuration, the efficiency of the proposed inverter will be improved significantly. This paper evaluates the performance of the proposed inverter through simulation and experiment. [ABSTRACT FROM AUTHOR]

A new zero-sequence circulating current (ZSCC) reduction method for multimodule voltage source inverters (MVSIs) consisting of P three-phase inverters that are connected in parallel is proposed in this paper. Four-switch inverter modules are used instead of the conventional six-switch modules to reduce the cost. In this paper, the effectiveness of the proposed ZSCC reduction method is studied using selective harmonic elimination pulse width modulation. The proposed ZSCC reduction method can remove about P times the number of harmonics using the same switching frequency as compared to more conventional methods, as explained later in this paper. The concepts discussed in the paper are confirmed with results obtained from an MVSI experimental prototype. [ABSTRACT FROM AUTHOR]

The purpose of this paper is to investigate the model, control, and implementation of a multifunction grid-interfaced inverter with output LCL filter, which can provide high performance active power current and compensate the existent harmonics simultaneously in a distributed network. Equipped with LCL filter, the proposed multifunction inverter offers reduced switching harmonics and superior output current shapes. However, the multifunction inverter with output LCL filter brings some challenges, including LCL resonance, phase lag, and complexity in system design. To address these issues, this paper analyzes and develops general Thevenin/Norton models for the multifunction grid inverters with LCL filter. Based on the general models of system, this paper presents guidelines of the control and the procedure of filter design for this application. In particular, a proportional-resonant (PR) plus odd-harmonic repetitive control (OHRC) scheme is designed for the outer current loop. The phase compensation method and detailed design criteria for the proposed control scheme are presented. Furthermore, the proposed OHRC scheme is compared with the previous multiple resonant control (MRC) based on their internal relationship. Simulation and experimental results are provided to validate the effectiveness and advantages of the proposed control strategy. [ABSTRACT FROM AUTHOR]

In order to minimize the effect of the grid harmonic voltages, harmonic compensation is usually adopted for a grid-tied inverter. However, a large variation of the grid inductance challenges the system stability in case a high-order passive filter is used to connect an inverter to the grid. Although in theory, an adaptive controller can solve this problem, but in such a case the grid inductance may need to be detected online, which will complicate the control system. This paper investigates the relationship between the maximum gain of the controller that still keeps the system stable and the Q-factor for a grid-tied inverter with an RL series or an RC parallel damped high-order power filter. Then, a robust passive damping method for LLCL-filter-based grid-tied inverters is proposed, which effectively can suppress the possible resonances even if the grid inductance varies in a wide range. Simulation and experimental results are in good agreement with the theoretical analysis. [ABSTRACT FROM AUTHOR]

Silicon carbide (SiC) based power semiconductors are expected to contribute to an increase in inverter efficiency, switching frequencies, maximum permissible junction temperature, and system power density. This paper presents a comparison of silicon (Si) and SiC device technologies for the use in hybrid electric vehicle traction inverters. SiC-JFETs and SiC-MOSFETs are characterized and a scalable loss and scalable thermal modeling approach is used to find the optimum chip area for each Si or SiC traction inverter. This procedure also provides a proper technical comparison of the semiconductor technologies. The progressed simulations using standardized drive cycles and thermal-electrical coupled semiconductor models permit an inverter performance evaluation close to real load situations, leading to an improved estimation of the benefit which can be expected from systems utilizing SiC technology. This paper concludes that the SiC devices can lead to a reduction in chip area and semiconductor losses by more than 50% at the same time in hard switching applications with partial load dominated mission profiles. [ABSTRACT FROM AUTHOR]

This paper presents a unified control strategy that enables both islanded and grid-tied operations of three-phase inverter in distributed generation, with no need for switching between two corresponding controllers or critical islanding detection. The proposed control strategy composes of an inner inductor current loop, and a novel voltage loop in the synchronous reference frame. The inverter is regulated as a current source just by the inner inductor current loop in grid-tied operation, and the voltage controller is automatically activated to regulate the load voltage upon the occurrence of islanding. Furthermore, the waveforms of the grid current in the grid-tied mode and the load voltage in the islanding mode are distorted under nonlinear local load with the conventional strategy. And this issue is addressed by proposing a unified load current feedforward in this paper. Additionally, this paper presents the detailed analysis and the parameter design of the control strategy. Finally, the effectiveness of the proposed control strategy is validated by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

Aiming at overcoming the problem that the auxiliary commutation circuit (ACC) of auxiliary resonant commutated pole (ARCP) inverters has a high loss in commutation processes, this paper presents a novel modulation strategy based on an improved ARCP inverter. In comparison with the original modulation strategy, this modulation strategy can not only realize soft-switching for all switches, but also avoid the superposition of resonance current and load current at commutation moments in ACCs and make the maximum current through ACCs approximately equal to load current in commutation processes. So the circulating current loss in ACCs and the current peak stress of auxiliary switches can be effectively reduced. According to the equivalent circuit in different operation modes under this modulation strategy, this paper analyses the operation principle, soft-switching implementation condition, and optimal parameter design procedure of the improved ARCP inverter. Finally, the novel modulation strategy is applied to a 10 kW 16 kHz improved ARCP inverter prototype with insulated gate bipolar transistor-based switches. Experimental results are given to demonstrate the validity and features of the inverter under the novel modulation strategy. [ABSTRACT FROM AUTHOR]

This paper describes phase current reconstruction methods from dc-link currents in three-phase three-level PWM inverters. Since the three-level inverters have three paths between dc-link and power switches, the reconstructions differ from that in two-level inverters which have two paths there. Considering these paths in three-level inverter, this paper proposes the methods for phase current reconstruction. While the reconstruction method is executed by the currents sampled on the dc-links, the system encounters current-unmeasurable areas where the dc currents cannot be sampled due to the lack of measurement time according to the PWM status. This paper analyzes the areas and proposes a minimum voltage injection method for minimizing them to guarantee accurate current reconstruction. The method provides the expanded operating areas especially in low-output voltage operation and the minimized distortions in output voltages. The feasibility of the proposed method has been assessed in experiments. [ABSTRACT FROM AUTHOR]

Grid interfacing of photovoltaic generators using three-phase inverters offers the advantage of constant power flow allowing smaller capacitance values to be used in the dc-link compared to single-phase inverters. Electrolytic capacitors, used in the dc-link, are often considered to decrease reliability. Reliability could be improved by using film capacitors, but their usage is limited by high cost and low capacitance. Much research has been done to minimize the dc-link capacitance value, particularly, in the field of drives and wind turbines. It has been shown that motor drive in regenerative mode contains a right-half-plane (RHP) pole in its control dynamics having a significant effect on the required dc-link capacitance. The RHP pole can cause instability as has been observed in wind turbine applications. Photovoltaic inverters have been reported to suffer from instability of the dc-link-voltage control, but the origin of the observed problems is poorly understood. This paper shows explicitly that an RHP pole is present in the control dynamics also in photovoltaic inverters affecting the minimum required dc-link capacitance. The paper proposes a minimum value for the dc-link capacitance that is required for stable operation. Design rules are given for single- and two-stage inverters. Moreover, it is shown that a source having constant power output effectively removes the RHP pole from the dc-link-voltage control dynamics. [ABSTRACT FROM AUTHOR]

The digital implementations of Sinusoidal Pulse Width Modulation (SPWM) generators have dominated over their counterparts based on analog circuits. In this paper, an FPGA-based SPWM generator is presented, which is capable to operate at switching frequencies up to 1 MHz (requiring FPGA operation at 100-160 MHz), thus it is capable to support the high switching frequency requirements of modern single-phase dc/ac power converters. The proposed design occupies a small fraction of a medium-sized FPGA and, thus, can be incorporated in larger designs. Additionally, it has a flexible architecture that can be tuned to a variety of single-phase dc/ac inverter applications. The post-layout simulation and experimental results confirm that compared to the past-proposed SPWM generation designs, the SPWM generator presented in this paper exhibits much faster switching frequency, lower power consumption, and higher accuracy of generating the desired SPWM waveform. [ABSTRACT FROM AUTHOR]

Recent uninterruptible power supply (UPS) systems, in the medium power range (a few 100 kW), are based on a three-power stage topology including a rectifier, an inverter, and a dc-dc converter. The dc-dc converter ensures the charger/discharger function necessary for battery management. The monolithic intercell transformer (ICT) described in this paper is dedicated to such a charger/discharger, of which the nominal power is 137 kW. This dc-dc converter is comprised of eight interleaved cells that are interconnected by the ICT. The first part of this paper briefly presents the full UPS system and the topology of the eight-cell charger/discharger arranged around the eight-phase monolithic ICT. The second part suggests a model and emphasizes the design specificities of the monolithic ICT. The final design is provided by an optimization routine, checked in the end by different 2-D and 3-D finite-element simulations, both electromagnetic and thermal. The third part describes the construction of the ICT prototype. It is then placed in a test bench that reproduces the conditions of future operations and provides current balance conditions. Finally, the experimental results obtained for the 137-kW nominal power validate design parameters and confirm the interest of the ICT solution. [ABSTRACT FROM AUTHOR]

This paper presents a hybrid modulation technique consisting of singe-reference six-pulse-modulation (SRSPM) for front-end dc/dc converter and 33% modulation for three-phase inverter. Employing proposed novel SRSPM to control front-end dc/dc converter, high frequency (HF) pulsating dc voltage waveform is produced, which is equivalent to six-pulse output at 6× line frequency (rectified 6-pulse output of balanced three-phase ac waveforms) once averaged. It reduces the control complexity owing to single-reference three-phase modulation as compared to conventional three-reference three-phase SPWM. In addition, it relives the need of dc-link capacitor reducing the cost and volume. Eliminating dc link capacitor helps in retaining the modulated information at the input of the three-phase inverter. It needs only 33% (one third) modulation of the inverter devices to generate balanced three-phase voltage waveforms resulting in significant saving in (at least 66%) switching losses of inverter semiconductor devices. At any instant of line cycle, only two switches are required to switch at HF and remaining switches retain their unique state of either ON or OFF. Besides, inverter devices are not commutated when the current through them is at its peak value. Drop in switching loss accounts to be around 86.6% in comparison with a standard voltage source inverter (VSI) employing standard three-phase sine pulse width modulation. This paper explains operation and analysis of the HF two-stage inverter modulated by the proposed novel modulation scheme. Analysis has been verified by simulation results using PSIM9.0.4. Experimental results demonstrate effectiveness of the proposed modulation. [ABSTRACT FROM AUTHOR]

Owing to the consistent increase in energy efficiency issues, studies for improving the charging efficiency and energy density of batteries have been receiving attention in the electric vehicle transportation sector. This paper deals with an online electric vehicle (OLEV) system which utilizes the dc power system for reducing loss as well as reducing the size of the required battery capacity. Intensive research on grid integration with OLEV has not been performed until recently and it is necessary to calculate the power flow analysis considering the unique characteristics of OLEV for the commercialization of this new transport system (for the application of this new system in the transport sector). In this paper, the dc OLEV power system is being investigated for reducing line losses and peak power thereby reducing the electric cost levied on the substation. Verification processes are performed through simulation for various scenarios to examine the effectiveness of the proposed system in terms of power consumption, battery state of charge, peak power, and loss reduction. [ABSTRACT FROM AUTHOR]

In this paper, a simple single-phase grid-connected photovoltaic (PV) inverter topology consisting of a boost section, a low-voltage single-phase inverter with an inductive filter, and a step-up transformer interfacing the grid is considered. Ideally, this topology will not inject any lower order harmonics into the grid due to high-frequency pulse width modulation operation. However, the nonideal factors in the system such as core saturation-induced distorted magnetizing current of the transformer and the dead time of the inverter, etc., contribute to a significant amount of lower order harmonics in the grid current. A novel design of inverter current control that mitigates lower order harmonics is presented in this paper. An adaptive harmonic compensation technique and its design are proposed for the lower order harmonic compensation. In addition, a proportional-resonant-integral (PRI) controller and its design are also proposed. This controller eliminates the dc component in the control system, which introduces even harmonics in the grid current in the topology considered. The dynamics of the system due to the interaction between the PRI controller and the adaptive compensation scheme is also analyzed. The complete design has been validated with experimental results and good agreement with theoretical analysis of the overall system is observed. [ABSTRACT FROM AUTHOR]

In signal injection sensorless drives, the injection voltage cannot be reduced under a certain value. The lower limit of the injection voltage is mainly enforced by the inverter nonlinearity that causes distortion of the injection voltage and degradation of the position estimation performance. After analyzing the inverter nonlinearity during the voltage injection, it is revealed that parasitic capacitances of insulated-gate bipolar transistors have positive effects on inverter output linearity and sensorless control. Based on this analysis, this paper proposes a method to reduce the injection voltage by connecting additional capacitors to the output terminals of the inverter. Simulation and experimental results are provided to verify the effectiveness of the proposed idea. In the experiments, using the capacitor-integrated inverter, it is shown that the injection voltage can be reduced by more than half without degrading the position estimation performance. [ABSTRACT FROM AUTHOR]

The objective of this paper is to propose a novel photovoltaic (PV) micro-inverter with PV current decoupling (PVCD) strategy to achieve maximum power point tracking (MPPT) performance without using large electrolytic capacitors. Conventionally, the grid-connected PV micro-inverter needs a large PV-side electrolytic capacitor to suppress the double-line frequency voltage ripple, which is caused by the injected ac grid power, to achieve the desired MPPT performance. However, the short lifetime electrolytic capacitor will reduce the PV micro-inverter's reliability dramatically. Therefore, different active power decoupling circuits (APDCs) have been proposed in published papers to reduce the required input capacitance so that the long lifetime film capacitor can be used to replace the electrolytic capacitor. Unlike the conventional APDC with charging and discharging modes operation, a novel PVCD strategy, which is based on the concept of current decoupling instead of power decoupling, is proposed to simplify the control mechanism of the PV micro-inverter. Furthermore, to accomplish the proposed current decoupling concept, a novel circuit topology for the PV micro-inverter is also proposed. With the proposed PVCD strategy, the current decoupling tank (CDT) inside the proposed PV micro-inverter can buffer the current difference between the constant current from the PV panel and the rectified sinusoidal current of the ac grid current. Therefore, the input capacitance on the PV-side can be reduced dramatically and the long lifetime film capacitor can be used to replace the electrolytic capacitor. The reliability of the PV micro-inverter with good MPPT performance can be increased. In this paper, the operation principle and the component design of the proposed PV micro-inverter with PVCD strategy will be presented. Simulation results and experimental results of a prototype 240 W PV micro-inverter is shown to verify the performance of the PV micro-inverter with PVCD strategy. [ABSTRACT FROM AUTHOR]

The high-power grid-connected inverters with LCL filters have been widely used. Current control plays a key role in the grid-connected inverter control system. To cope with the inherent resonance of the LCL filter, active damping (AD) methods are usually employed. However, the AD performance is impaired by control delays which are introduced in the digital control implementation process. Besides, the lag phase due to control delays limits the system bandwidth and stability margin. The effects of control delays are more noteworthy in the high-power grid-connected inverter due to its low switching frequency. This paper investigates the current control strategy based on multisampling for the high-power grid-connected inverter with the LCL filter. First, the multisampled AD scheme is studied, which can reduce control delays effectively and improve AD performance. Besides, the multisampled control without additional damping whether passive or active is researched. Through the inverter-side current feedback, the system can realize single-current-loop control based on multisampling. Thus, the control system is simplified and it can be stable, and achieve better dynamic performance. Finally, experimental results show that the proposed control schemes are effective. [ABSTRACT FROM AUTHOR]

This paper presents a new single-phase switched-coupled-inductor dc–ac inverter featuring higher voltage gain than the existing single-phase qZ-source and semi-Z-source inverters. Similar to the single-phase qZ-source and semi-Z-source inverters, the proposed inverter also has common grounds between the dc input and ac output voltages, which is beneficial especially for photovoltaic inverter systems. The inverter volume and maximum current flowing can be reduced significantly through the coupling of all inductors. A theoretical analysis of the proposed inverter is described and a 280-W experimental prototype is built to verify the performance of the inverter. [ABSTRACT FROM AUTHOR]

This paper analyzes the possibility of controlling the output voltage of a standalone single-phase inverter by directly controlling the output filter capacitor current without using a dedicated output voltage sensor. The plant modeling and controller design are presented. The proposed method depends on having the value of the output filter capacitance. A method to estimate the output filter capacitance is also presented. Rigorous analysis is done to show that the proposed sensorless scheme is largely insensitive to parameter variations and ensure that the output voltage is within specified regulations at utility level. It is also demonstrated in this paper that compared to the conventional voltage control scheme the proposed control scheme ensures an improved total harmonic distortion of the output voltage waveform. Experimental results presented validate the proposed scheme. [ABSTRACT FROM AUTHOR]

This paper addresses the inverter nonlinearity of a three-level T-type inverter. The main causes of the nonlinearity are pulse shaping, pulse skipping due to narrow pulses for the dead time, and voltage drop of the switching devices. Although the same causes have existed in two-level inverters, the pulse skipping phenomenon and results are quite different in the case of the three-level T-type inverter. The effects of pulse shaping and skipping have been investigated and discussed. In addition, the voltage drop of the switching devices has been considered in conjunction with the conduction path of the T-type inverter. Compensation methods based on the pulse width modulation (PWM) of T-type inverter to alleviate the inverter nonlinearity have been proposed from research results. The proposed methods could be easily implemented by adding appropriate offset voltages to the voltage references of the inverter in PWM. Furthermore, a neutral voltage balancing method of a three-level T-type inverter has been proposed in conjunction with the proposed PWM methods using offset voltage. Through extensive experimental tests, the fifth- and seventh-harmonic components of the current are conspicuously reduced along with the even harmonics. The neutral voltage of the inverter can be balanced effectively with the proposed offset voltage adjustments as well. [ABSTRACT FROM AUTHOR]

The common-mode leakage current should be carefully considered when designing a transformer-less photovoltaic (PV) inverter since the leakage current can cause the output current distortion and increase the operational risk. The unipolar sinusoidal pulse width modulation of the traditional H-bridge inverter can produce the superior output performance but will cause a high-frequency fluctuated common-mode voltage and consequently the nonnegligible leakage current. To attenuate the fluctuation phenomena of common-mode voltage, few neutral-point-clamped (NPC) circuits have been designed to clamp the neutral-point voltage and maintain the common-mode voltage constant. This paper analyzes the equivalent common-mode circuit of single-phase inverters and proposes a generalized design principle of multiterminal NPC circuits, whose unidirectional and bidirectional variations are fully analyzed. Subsequently, two types of single-phase PV inverters with the NPC circuits are proposed. Also, the operational losses and component counts are compared between the proposed topologies and the traditional NPC inverters. The experimental results verified the theoretical findings. [ABSTRACT FROM AUTHOR]

In this paper, a fast electro-thermal model of traction inverters for electrified vehicles is proposed. First, a thermal model considering the thermal coupling is presented and experimentally verified. The impact of the thermal spreading effect, heat convection, and temperature-dependent material thermal properties on the accuracy of the linear assumption is investigated by ANSYS-Fluent simulation. In order to reduce the influence of the temperature-dependent thermal conductivity on the accuracy of the thermal model, the average temperature is applied to determine the thermal conductivity of the power module package. Second, an accurate temperature-dependent switching power loss model is represented as the lookup table through experimental measurements. In order to simplify the lookup table, the switching power loss is considered proportional to the dc-link voltage and, therefore, the inputs of the lookup table are current and temperature. Finally, a scheme to speed up the online junction temperature estimation is proposed by considering both the thermal network properties and the required accuracy. With the proposed calculation rate determination method, the total computational time for the junction temperature estimation is reduced significantly. [ABSTRACT FROM AUTHOR]

It is well known that multilevel converters can offer significant benefits in terms of harmonic performance and reduced switching losses compared to their two-level counterparts. However, for lower voltage applications the neutral-point-clamped inverter suffers from relatively large semiconductor conduction losses because the output current always flows through two switching devices. In contrast, the T-type multilevel inverter has less conduction losses because only a single outer loop switching device is required to connect the converter output to the upper and lower dc buses, albeit at the expense of increased switching losses since these outer switches must now block the full dc link voltage. Silicon carbide (SiC) mosfet devices potentially offer substantial advantage in this context with their lower switching losses, but the benefit of replacing all switching devices in a T-type inverter with SiC mosfets is not so clear-cut. This paper now explores this issue by presenting a detailed comparison of the use of Si and SiC devices for a three-level T-type inverter operating in grid-tie applications. The study uses datasheet values, switching loss measurements, and calibrated heat sink thermal measurements to precisely compare semiconductor losses for these two alternatives for a T-type inverter operating at or near unity power factor. The results show that replacing only the dc bus connection switches with SiC devices significantly reduces the semiconductor losses, allowing either the converter power level or the switching frequency to be significantly increased for the same device losses. Hence, the use of SiC mosfets for T-type inverters can be seen to be an attractive and potentially cost-effective alternative, since only two switching devices per phase leg need to be upgraded. [ABSTRACT FROM AUTHOR]

The quasi-Z-source inverter (qZSI) has attracted much attention for motor drives and renewable energy applications due to its capability to boost or buck in a single converter stage. However, this capability is associated with different challenges related to the closed-loop control of currents, control the dc capacitor voltage, produce three-phase ac output current with high dynamic performance, and obtain continuous and low ripple input current. This paper presents a predictive control strategy for a three-phase qZSI that fulfills these requirements without adding any additional layers of control loops. The proposed controller implements a discrete-time model of the qZSI to predict the future behavior of the circuit variables for each switching state, along with a set of multiobjective control variables all in one cost function. The quasi-impedance network and the ac load are considered together when designing the controller in order to obtain stability of the impedance network with a step change in the output reference. A detailed comparative investigation between the proposed controller and the conventional proportional-integral (PI) controller is presented to prove the superiority of the proposed method over the conventional control method. Simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

This paper proposes a new output current measuring method using tiny printed-circuit-board (PCB) current sensors. The method will make it possible to install the PCB current sensors in an insulated-gate bipolar transistor (IGBT) module. The PCB sensor picks up a switching current flowing through an IGBT chip, and then a combination of a digital circuit based on field-programmable gate array and an integrator circuit reproduces the output current of an inverter from the switching current. A proof-of-concept experimental verification is carried out using a buck converter, which verifies that the proposed method detects a dc component of the output current as well as a ripple component although the PCB sensor is based on the so-called Rogowski coil. [ABSTRACT FROM PUBLISHER]

The modulation strategy LMZVM (large, middle, and zero vector modulation) can be widely adopted in the three-level 7 photovoltaic (PV) inverter, because it reduces the ground current and produces little neutral-point (NP) voltage in normal operation. However, in low-voltage ride-through (LVRT) operation, the NP voltage fluctuation becomes large and has not been researched nowadays. In this paper, according to this problem, four critical weighing factors about the NP voltage based on symmetrical component method are proposed. We can see that the maximum peak-to-peak value among all dip types happens when the single-phase grid voltage dips to 0. Then, an original balancing strategy, which replaces the zero vector with two opposite P-type or N-type small vectors of equal duty cycle, is put forward. Experimental results are provided to validate that the proposed strategy can reduce the NP voltage fluctuation in LVRT operation. [ABSTRACT FROM AUTHOR]

This paper proposes a novel drive method for interior permanent magnet machines (IPMMs). In the proposed system, a two-phase IPMM is fed from a single-phase H-bridge inverter for low-cost applications. Its main winding in d -axis is connected to the inverter and the auxiliary winding in q-axis is inherently short circuited. This configuration enables the motor to operate in a wider speed range with higher energy efficiency than most other single-phase drive systems. Also, its torque capability in the high-speed range is as high as that of the three-phase IPMM drive despite the reduced power devices, drivers, and current sensors. Accordingly, the proposed system has benefits such as simple structure, low cost, high-power density, and improved efficiency. In this paper, the system is modeled with an equivalent three-phase machine. Based on the model, its torque characteristics and operating areas are analyzed and compared to those of the conventional IPMM drives. A speed control algorithm is also developed. It includes a maximum torque per ampere control to improve drive efficiency and a flux-weakening control to maximize the feasible inverter output voltage. The proposed system and control algorithm are verified by experimental results. [ABSTRACT FROM PUBLISHER]

Induction heating (IH) has become the technology of choice in many industrial, domestic, and medical applications due to its high efficiency and performance. This paper proposes an interleaved resonant boost inverter featuring SiC three-phase module to achieve high efficiency and performance IH power supply. The proposed converter achieves high efficiency by reducing the current through the devices, while the use of an interleaved full-bridge configuration reduces input current ripple and provides additional control degrees. The proposed converter has been designed, implemented, and tested experimentally, proving the feasibility of this proposal. [ABSTRACT FROM PUBLISHER]

In a zero-voltage switching (ZVS) inverter, high conversion efficiency and miniaturization are expected since switching loss can be dramatically reduced with proper design. In order to realize ZVS condition, auxiliary components such as inductors, capacitors, and switches are embedded in the inverter to implement the function. Since the design of auxiliary components is critical to the ZVS inverter, it is impossible to realize maximum efficiency or minimum size by following the conventional design procedure. This paper introduces an optimized design methodology for a three-phase ZVS inverter with objectives of both high efficiency and miniaturization. Based on the loss models of different commercial IGBT modules under different ZVS conditions, as well as the loss models of auxiliary components and filter inductors, the issue of pursuing highest efficiency and power density is transformed into solving a constrained nonlinear multivariable problem. According to the proposed design methodology, all parameters that influence the efficiency and physical dimensions are considered simultaneously. Thus, the optimized selection of the IGBT module, the parameters of the auxiliary components and the filter inductors would be obtained. A 30-kW three-phase ZVS inverter prototype is built to verify the proposed design method. With proposed design method, the improved prototype has achieved both smaller passive components volume and higher efficiency compared to the former prototype. [ABSTRACT FROM AUTHOR]

In this paper, a global study in terms of control architecture is applied to parallel voltage-source inverters. Parallelism of inverters represents very interesting advantages for the industrial applications to meet the high-power requirements, and it is possible to apply maintenance during the operation without interruptible operation. The main objective of this paper is to guarantee a reliable operation of the parallel inverters system during healthy and faulty conditions due to full disconnection of any inverter. Special precautions are recommended to avoid the negative effects of the circulating currents, which are caused essentially by the asynchronous pulse width modulation or existence of dispersion of the system component characteristics. To deal with this crucial problem, one-loop flatness-based control is proposed to the control of N parallel inverters and allows obtaining low total harmonic distortion. The proposed control uses the advantages of the flatness to ensure high power quality at the point of common coupling and equal currents distribution between the parallel inverters and minimize the impact of a full disconnection of any inverter on the performance. The proposed algorithm is theoretically analyzed and validated experimentally. [ABSTRACT FROM AUTHOR]

This paper proposes a dual-space vector control scheme for the open-end winding permanent magnet synchronous motor (OEW-PMSM) drive fed by the dual inverter with a single dc supply. Potential zero-sequence current in the open-end winding drive system has to be considered since it causes circulating current in the winding and leads to high current stress of power semiconductor devices and high losses. Zero-sequence current in open-end winding ac motor drives is usually caused by the zero-sequence voltage, and therefore switching combinations which do not produce zero-sequence voltage are used to synthesize the reference voltage in existing methods. But even so, the zero-sequence voltage can also be produced by the dead time of the inverter. In order to suppress zero-sequence current in the OEW-PMSM drive, a dual-space vector control scheme is proposed and a novel dual-inverter space vector pulse width modulation (PWM) with the zero-sequence voltage reference is employed to regulate system zero-sequence voltage in this paper. Compared with existing dual inverter PWM strategies, the novel algorithm build a regulation mechanism for the zero-sequence voltage. The proposed method is compared with the conventional vector control by simulations and experiments, and the results shown that the proposed scheme can suppress zero-sequence current effectively. [ABSTRACT FROM AUTHOR]

Typical algorithms of multidimensional space-vector pulsewidth modulation (SVPWM) divide (n –1) dimensional space into (n–1)/2 subplanes with decoupling matrix or symmetrical component approach. However, the determination of effective sectors and appropriate space voltage vectors takes a heavy computing burden. Taking the five-phase inverter as example, the relationship between the operation time of branch switches and the dwell times of active space vectors in the SVPWM method is analyzed in this paper. Then, the branch space voltage vector (BSVV) corresponding to the individual active branch voltage is defined and the synthesis of other active space voltage vectors using BSVVs is given. Furthermore, only the BSVVs are chosen as the base vectors to synthesize the reference voltage vector, and a novel SVPWM algorithm is present. The operation time of branch switch is deduced, and the equivalence of the normalized load-phase voltages and operation times of branch switches is emphasized and used to analyze the simulation results. The zero-sequence voltage vector is also included in the algorithm as a parameter and its effects on the dwell time of the BSVVs, the modulation index and the common-mode voltage are explicated. Finally, the extension to an n-phase system is discussed. The algorithm eliminates the selection of sectors and proper active space vectors, and can effectively control the dwell time of switches of multiphase inverter. Experimental results proved the feasibility and effectiveness of the algorithm. [ABSTRACT FROM AUTHOR]

The arrangement of the full-bridge, current-source inverter as a power supply for ozone generators providing high power factor (PF) and high electrical efficiency in a single stage is the main contribution of this paper. The corresponding design, simulation, and experimental results are presented. Also, the use of the current-fed, full-bridge resonant inverter for PF correction in ozone generation applications is discussed. The proposed power supply consists of an ac supply, a single rectifier bridge, an input inductor to the inverter, four switches, an LC parallel resonant tank, a resonant transformer, and a set of ozone generating cells. Experimental results with the proposed topology provided 96% for PF, 91% for electrical efficiency, and ozone production of 614 mgO3/min, satisfying the requirements of the standard 61000-3-2, class A. [ABSTRACT FROM AUTHOR]

The occurrence of leakage current that can occur in photovoltaic (PV) system depends strongly on the value of parasitic capacitance between PV panel and the ground. However, traditional method to acquire that value is by experience estimation. This paper presents a novel 2-D parasitic edge capacitance model and a straightforward approach to accurately calculate the involved panel parasitic capacitance. The parasitic capacitances are divided into cell-to-frame capacitance $C_{{\rm cf}}$, cell-to-rack capacitance $C_{{\rm cr}}$, and cell-to-ground capacitance $C_{{\rm cg}}$. Based upon that, a pi-shape circuit model is derived to predict the leakage current in the PV array. Theoretical calculation, MATLAB simulations, and experimental measurements finally verify the accuracy of the proposed methods. The approaches are very useful for the evaluation of leakage current in the PV system. It is demonstrated that the proposed approach combines the ease of applications and satisfying accurateness. [ABSTRACT FROM AUTHOR]

Impedance-source networks are an increasingly popular solution in power converter applications, especially in single-stage buck–boost power conversion to avoid additional front-end dc–dc power converters. In the survey papers published, no analytical comparisons of different topologies have been described, which makes it difficult to choose the best option. Thus, the aim of this paper is to present a comprehensive analytical comparison of the impedance-source-based buck–boost inverters in terms of passive component count and semiconductor stress. Based on the waveform of the input current, i.e., with or without a transformer, and with or without inductor coupling, the impedance-source converters are classified. The main criterion in our comprehensive comparison is the energy stored in the passive elements, which is considered both under constant and predefined high frequency current ripple in the inductors and the voltage ripple across the capacitors. Two-level and multilevel solutions are described. The conclusions provide a “one-stop” information source and a selection guide of impedance-source-based buck–boost inverters for different applications. [ABSTRACT FROM PUBLISHER]