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This paper describes a flow control of the dye in the paper mill with the quasi-Z-source indirect matrix converter (QZSIMC) fed induction motor drive. More than a decade the voltage-source inverter (VSI) and current-source inverter (CSI) have been used to control the speed of the induction motor, which in turns controls the flow of dye. Recently, the matrix converter (MC) has been an excellent competitor for the VSI or CSI for its compactness. The voltage transfer ratio of the VSI, CSI, and MC has been limited to 0.866. Thus, the efficiency of these converters is less. To improve the voltage transfer ratio the quasi-Z-source network (QZSN) is to be used between voltage source and indirect MC (IMC). The modification in the shoot-through duty ratio of the QZSN varies the voltage transfer ratio greater than 0.866. Different voltage transfer ratios are needed for different voltage sag conditions. For a variation of the duty ratio of the QZSN, the fuzzy logic controller has been presented. To control the IMC vector control with space vector modulation has been presented. This paper proposes the implementation of QZSIMC adjustable speed drive for the flow control of dye in paper mill during different voltage sag conditions. A 4-kW prototype has been built and the effectiveness of the proposed system is verified with simulation results and experimental setup. Simulation is done in MATLAB, Simulink platform. Experimental setup is done with the aid of a TMS320F2812 (Texas Instrument) processor. The experimental results validate the maintenance of the speed of an induction motor at the set condition, thus controlling the perfect flow of dye in paper manufacturing technology. [ABSTRACT FROM AUTHOR]

Provides instructions and guidelines to prospective authors who wish to submit manuscripts. [ABSTRACT FROM AUTHOR]

The series bridge converter (SBC) is a modular multilevel converter (MMC) recently developed to enhance power density in high-voltage high-power applications. The MMC is a well-established solution, widely researched, and exploited in practical HVdc connections, thanks to its high power quality and high efficiency. However, the main limitation of the MMC is the relatively large energy storage, also due to the fact that power ripples in the submodule capacitors include a component at the fundamental ac frequency. As a result, volume becomes critical in applications such as offshore or city center in-feeds, where space is restricted and expensive. The SBC offers a more compact footprint by exploiting a series connection on the dc side and by operating the submodules with rectified waveforms, thus moving the minimum component of the instantaneous power to twice the ac fundamental and reducing capacitors size. The drawback of the converter is a more complex energy control compared to the MMC. This paper proposes the first experimental validation of the SBC, using a 2-kW laboratory-scale prototype. Since the basic converter design has been discussed in previous papers, the focus of this paper is on converter control design and experimental validation. [ABSTRACT FROM AUTHOR]

Four-level hybrid-clamped inverter is a newly proposed topology that can operate under a wide voltage range without switches connected in series. However, when it is applied in medium voltage high power conversions, the flying capacitors in each phase will occupy a huge volume and a high switching frequency is required to restrain the voltage ripples. In order to overcome this drawback, a four-level active neutral-point clamped inverter is discussed in this paper, which consists of only six switches and no diodes or flying capacitors are required. In order to balance the neutral-point voltages under the full power factor and modulation index range, a capacitor voltage balance method based on carrier-overlapped pulsewidth modulation is proposed in this paper. The upper and lower dc-link capacitor voltages are balanced by zero-sequence voltage injection and the central dc-link capacitor voltage is balanced by adjusting the duty cycles of switching signals slightly. Simulation and experimental results are presented to confirm the validity of this method. [ABSTRACT FROM AUTHOR]

A new single stage three-phase ac–dc converter with four switches and galvanic isolation is proposed in this paper. The new converter is simple and uses fewer switches than previously proposed ac–dc converters of the same type. It is a bridgeless converter that can operate with continuous input current and with any pulsewidth modulated method suitable for a standard three-phase six-switch voltage source rectifier. In this paper, the operation, control, analysis, and design of the proposed converter are explained and its features are discussed. Experimental results obtained from a prototype that confirm the feasibility of the converter are presented as well. [ABSTRACT FROM AUTHOR]

In this paper, an overload and short-circuit protection method is proposed for voltage source inverter-based uninterruptible power supply (UPS) system. In order to achieve high reliability and availability of the UPS, short circuit and overload protection scheme are necessary. When overload or short circuit happens, using the proposed control method, the amplitude of the output current can be limited to a constant value, which can be set by the customer to avoid the destruction of the power converter, and to obtain a faster recovery performance as well. The detailed principle of the proposed protection method is discussed in this paper. It mainly contains three parts in the control diagram for current limit, first is the anti-windup in the voltage and current controllers, then the feedforward of the capacitor voltage to the current control loop, the last is the fast reset of the resonant part of the current controller when overcurrent happens. The procedure of developing the control method is also presented in the paper. Experimental results on a commercial UPS system are presented to verify the effectiveness of the control method. [ABSTRACT FROM AUTHOR]

This paper presents a balancing algorithm for the so-called Director Switch, a controlled, reverse conducting, self-powered, high-voltage switch, using series-connected insulated gate bipolar transistors (IGBTs). This is a key component on two new voltage-source, high-voltage direct current (HVDC) converter topologies. These, which promise efficiency, cost, and size reductions, are an alternate arm converter and a series bridge converter. One of the main design challenges of the director switch is how to supply the IGBT gate drivers, and other auxiliary electronics while overcoming the high-voltage insulation barrier to ground level. In this paper, this is achieved by using the energy stored in a capacitive clamp snubber circuit, which also helps with the overvoltage mitigation during rare hard-switching events. However, the clamp capacitor and by proxy the IGBT voltages become highly unbalanced during operation, compromising the integrity of the switch. This paper presents a balancing strategy that consists in applying a controlled delay in the switching of the IGBT levels, in a way that forces a voltage balance on all the switch levels. The paper explains the unbalance. Then, the balancing strategy is explained and validated on simulation and on a high-voltage experimental rig, on switches comprising two and three series-connected IGBTs, respectively. [ABSTRACT FROM AUTHOR]

Energy harvesting has attracted increased attention recently. Energy sources are present all around us, such as, mechanical vibrations, stress, strain, waste heat, sunlight or room light, electromagnetic rays, and chemical or biological sources. Vibration generators based on piezoelectric elements have been highlighted as low-power sources; however, their output power is very low, around the milliwatt or microwatt level, and thus, improving their performance is necessary to make the generated power usable. This paper investigates the use of passive devices to improve output characteristics of the vibration generators. The proposed circuits are a resonator and a passive rectifier. The proposed resonator consists of a parallel inductor and capacitor for $LC$ resonance. The $LC$ resonance equivalently reduces the internal capacitor of the piezoelectric elements. As a result, the output voltage and power are increased compared with that of conventional circuits. In addition, a boost-type current-improving passive rectifier is applied as the passive rectifier. The validity of the proposed circuit is numerically and experimentally verified. [ABSTRACT FROM AUTHOR]

This paper proposes a novel polygonal voltage space vector structure (SVS) having 30 sides, for a star-connected induction motor drive. The SVS eliminates the presence of harmonics up to 25th order from motor phase voltage throughout the entire modulation range, providing a torque profile devoid of lower order pulsations. Linear modulation is extended till 99.63% of base speed without exceeding the motor phase voltage rating. Topology consists of a dc-link fed primary inverter and two equal low voltage modular capacitor fed secondary inverters. Here the harmonics generated by the primary inverter is canceled by the secondary inverter which acts as a switched capacitive filter. Detailed description of the SVS generation and timing calculations are provided in this paper. Effectiveness of the proposed scheme is validated using experimental results, inverter loss calculations, and harmonic analysis. [ABSTRACT FROM AUTHOR]

Modular multilevel converters (MMCs) can be configured to perform ac/ac conversion, which makes them suitable as railway power supplies. In this paper, a hierarchical control scheme for ac/ac MMCs for railway power supplies is devised and evaluated, considering the requirements and the operating conditions specific to this application. Furthermore, admittance models of the ac/ac MMC are developed, showing how the suggested hierarchical control scheme affects the three-phase and the single-phase side admittances of the converter. These models allow for analyzing the stability of the interconnected system using the impedance-based stability criterion and the passivity-based stability assessment. Finally, the findings presented in this paper are validated experimentally, using a down-scaled MMC. [ABSTRACT FROM AUTHOR]

This paper proposes a pulsewidth modulation (PWM) control strategy for the efficient operation of the three-phase three-level neutral-point-clamped (NPC) inverters based on a bootstrap gate drive circuit. The bootstrap circuit used in the three-level NPC inverter has advantages in terms of the cost reduction and the compact circuit design. However, the bootstrap circuit has a drawback due to the low gate-emitter voltage during the low-frequency and variable load condition of the inverter system. This problem leads to lower efficiency and reliability of the inverter. Therefore, this paper analyzes the causes of the voltage decrease in bootstrap capacitors and proposes PWM control strategy to increase the voltage level of bootstrap capacitors for the efficient operation of the inverter. The proposed PWM control strategy provides efficient and stable operation of the inverter system by selecting the unipolar, dipolar, or partial-dipolar modulation methods according to the fundamental output frequency and load current of the inverter system. Furthermore, this paper proposes a design method of the size of bootstrap capacitors for the optimal circuit design. The effectiveness of the proposed PWM control strategy is verified using the experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a dynamic model based on the sampled-data method is presented for a wireless power transfer (WPT) system. The orders of the derived model are equal to the orders of a system. The modeling is different from the existing dynamic modeling for WPT systems, which almost double the model's order. Furthermore, the systematic analysis process is suitable for any WPT topologies and without the higher harmonics neglected and low-frequency approximation. Meanwhile, the state variables are allowed to vary up to twice the switching frequency, since the half-period symmetry property is exploited. In this paper, the series–series (SS) compensated WPT system is chosen as an example and the large-signal model and the steady-state operation point are determined. The small-signal responses perturbed by the phase-shift angle, switching frequency, and input voltage are obtained. The derived model is more adequate with simulation and experimental validation. [ABSTRACT FROM AUTHOR]

Active damping is a common way to stabilize the current control of LCL-filtered converters. In this paper, the stable region of −180° phase crossing is first identified within a predefined range of grid impedance and LCL parameter variations. Once the phase of the current control loop is in the identified region, a stabilization control can be attained. Subsequently, digital filters can be adopted to achieve active damping by reshaping the open-loop phase. Various digital filters are selected and benchmarked in this paper. It is confirmed that the all-pass filter has a unity gain and adjustable lagging phase before the Nyquist frequency, thereby being a promising solution to the phase reshaping. Therefore, the all-pass filter is employed to move the phase of the open-loop control (i.e., −180° phase crossing) into the targeted region for active damping. Notably, the current controller and the all-pass filter-based active damping can be separately designed, indicating the easy implementation of the active damping. Experimental tests demonstrate that the proposed method can ensure the system stability over a wide range of parameter variations (e.g., grid impedance changes and LCL-filter parameter drifts) while maintaining fast dynamics with the grid-side current control. [ABSTRACT FROM AUTHOR]

In this paper, the modeling of storage elements and a unified theory liberated of the I–V characteristics of a specific technology is developed. First, the definition of an ideal storage element with limited energy capacity is presented, then the semiideal storage properties are discussed. The addition of power conservative two-port network denoted POPI (Pout = Pin) is added in order to define a flexible storage element in terms of characteristics. The paper demonstrates the theory by examples of storage elements integrated in power electronics systems. The ideas and methodology presented in this work can be applied to power electronics applications as well as power systems, smart grids, and microgrids, where storage is an important factor. [ABSTRACT FROM AUTHOR]

The main technical challenge of the medium-voltage motor drives with modular multilevel converter (MMC) is the serious low-frequency fluctuation on the capacitor voltages, and the existing suppression methods inevitably inject high-frequency circulating currents in MMC. However, the output currents are evidently distorted by the large injected components, while little research has been done to study and solve this problem. This paper analyzes and proves the essential interactions between the output current distortion and the injected components, and the specific dominant output harmonic groups are derived and summarized, revealing the nature of the problem, and it can be taken as a favorable reference for the controller designing. Based on the derivations, this paper proposes a novel suppression method for the greatly improved harmonic characteristics of the output currents during the low-frequency operation. The output harmonics can be accurately measured by the proposed control and effectively suppressed for much lower current total harmonic distortion, benefiting for the superior output control performances with improved efficiency. The simulation results on PSCAD/EMTDC and experimental verifications on a 2.2 kW MMC-based motor drive prototype prove the validity of the presented harmonic analysis and suppression method. [ABSTRACT FROM AUTHOR]

In order to increase the efficiency of modern microprocessor power supplies used in data centers, 380-V dc power distribution systems have been attracting attention due to their high efficiency and high reliability. This paper presents an innovative single-stage approach for 380-V voltage regulator modules (VRMs) based on a quasi-resonant multilevel topology constant on-time operation. The proposed topology inherently integrates the multiphase approach, providing fast phase shedding and flat high-efficiency curves even at light-load conditions. This is a unique advantage, which is not possible to establish in the two-stage approach, which is very important in server architectures, and where high efficiency is required even at light-load conditions. This paper analyzes the circuit topology and proposes a control architecture for fast transient response, including current-sharing capabilities. The digital controller has been implemented in 0.16- $\mu$ m lithography together with a digital pulsewidth modulation with a 195-ps resolution and a 40-MS/s 7-bit analog-to-digital converter. Experimental results show an efficiency of 93% for a 120-A 380–1.8-V VRM power supply. [ABSTRACT FROM AUTHOR]

Various methods have been presented in the past to emulate the electrical behavior of modular multilevel converters (MMCs). To meet the demands for the reliability aspect study of MMCs, this paper proposes a viable setup to emulate the thermal behavior and to investigate its feasibility for reliability testing and thermal model validation of the power modules in the MMC. The proposed mission profile emulator has three distinctive features: 1) capable of emulating and measuring the thermal stresses of power modules; 2) capable of implementing practical switching profile as a full-scale MMC; and 3) having significantly reduced requirement for dc power supply compared to existing setups used for electrical studies. Theoretical discussions, and simulations as well as the experimental results are presented to demonstrate the capability of the mission profile emulator both electrically and thermally. Moreover, this paper is accompanied by a video demonstrating how to measure the junction temperature of the power devices using the optical fiber and the thermal camera. [ABSTRACT FROM AUTHOR]

This paper proposes an improved design methodology of the double-sided LC-compensated capacitive power transfer (CPT) system considering the inductance detuning. Compared to the perfect-resonant scenario, this paper shows that the inductance detuning has the benefit to achieve the soft-switching condition for the CPT system, and the output current and internal voltage stresses can also be maintained within the desired range. The contributions of this paper are summarized in three parts. First, it analyzes the impacts of the inductance variations on the system frequency property, including the input current, output current, and internal capacitor voltage stresses. Second, it proposes three principles to detune the inductances as the methodology to design a CPT system. Third, a prototype is implemented, which achieves 368.5 W power transfer across a 400 mm × 400 mm × 4 mm glass layer with 91.8% dc–dc efficiency. Experimental results validate that the proposed design principles are satisfied, showing that the output current is within the desired range, the input soft-switching condition is achieved, and the internal voltage stresses are within the safety limit. Moreover, the efficiency and frequency properties are also validated by the experimental results, showing a wide power range of the high-efficiency operation (higher than 90%) and a wide frequency bandwidth of the soft-switching operation (from 0.96 to 1.12 MHz). [ABSTRACT FROM AUTHOR]

This paper presents bidirectional grid-connected modular multilevel converters (MMC) with direct digital control and division-summation processes to achieve power-injection and rectification functions. A direct digital control is developed to track current references, regulate dc-bus voltage and cell voltage, and balance the upper and lower dc-bus voltages. It can accommodate wide filter-inductance variation and take care of source voltage harmonics to achieve tight current tracking and low distortion output current. Based on the power-balance principle, the commands of arm currents can be determined directly. In this paper, the MMC configuration is introduced first, and then the control laws for current tracking and voltage regulation are derived in detail. Experimental and simulated results obtained from two 50 kW MMCs operated in power-injection and rectification modes have verified the analysis and discussion. [ABSTRACT FROM AUTHOR]

A single-stage TRIAC (TRIode for alternating current switch) dimmable LED (light emitting diode) driver using a buck converter fed through a capacitor input rectifier provides many advantages such as small-scale implementation, low output current ripple, and stable dimming operation. This circuit topology, however, has a serious issue: A large inrush current to the smoothing capacitor. To solve this issue, this paper focuses on a bleeder circuit in the TRIAC dimmable LED driver. This paper presents the mechanism of the large inrush current issue and its relationship to a conventional bleeder circuit. Moreover, this paper proposes a turn-off delay controlled bleeder circuit. The proposed bleeder circuit is analyzed by using its discrete-time state-space model in order to set proper circuit parameters for inrush current reduction. Experimental results demonstrate the inrush current reduction by the proposed method, which leads to a 37% reduction of maximum input current, as well as proper dimming operation and low output current ripple. The proposed method achieves further small-scale implementation, which enhances the advantages of the intended main circuit topology. [ABSTRACT FROM AUTHOR]

This paper presents an interleaved boost converter with a bifold Dickson voltage multiplier suitable for interfacing low-voltage renewable energy sources to high-voltage distribution buses and other applications that require a high-voltage-gain conversion ratio. The proposed converter was constructed from two stages: an interleaved boost stage, which contains two inductors operated by two low-side active switches, and a voltage multiplier cell (VMC) stage, which mainly consists of diodes and capacitors to increase the overall voltage gain. The proposed converter offers a high-voltage-gain ratio with low voltage stress on the semiconductor switches as well as the passive components. This allows the selection of efficient and compact components. Moreover, the required inductance that ensures operation in the continuous conduction mode (CCM) is lower than the one in the conventional interleaved boost converter. The distinction of the proposed converter is that the inductors’ currents are equal, regardless of the number of VMCs. Equal sharing of interleaved boost-stage currents reduces the conduction loss in the active switches as well as the inductors and thus improves the overall efficiency, as the conduction power loss is a quadratic function. In this paper, the theory of operation and steady-state analysis of the proposed converter are illustrated and verified by simulation results. A $\text{200-W}$ hardware prototype was implemented to convert a $\text{20-V}$ input source to a $\text{400-V}$ dc load and validate both the theory and the simulation. [ABSTRACT FROM AUTHOR]

This paper investigates the dependence of the supercapacitor Peukert constant on its terminal voltage, aging condition, and operating temperature. Recent studies show that the charge delivered by a supercapacitor during a constant current discharge process increases when the discharge current decreases if the discharge current is above a certain threshold, i.e., Peukert's law applies. By conducting extensive experiments using three supercapacitor samples with different rated capacitances from different manufacturers, this paper reveals that the Peukert constant increases when the initial voltage of the constant current discharge process is lower, the supercapacitor is more heavily aged, or the operating temperature is lower. The physical mechanisms accounting for the Peukert constant dependence are illustrated by analyzing an $RC$ ladder circuit model. When the supercapacitor terminal voltage is higher, the aging condition is lighter, or the operating temperature is higher, more charge is stored in the supercapacitor. Consequently, when the same discharge current is applied, the discharge time is longer and the branch capacitors are more deeply discharged. Therefore, the relaxation effects of the slow branches are reduced and the supercapacitor behaves more like a single capacitor rather than a distributed capacitor network, which ultimately leads to a lower Peukert constant. [ABSTRACT FROM AUTHOR]

The capacitance of sub-module capacitor has a great impact on the cost, size, and operation of the modular multi-level converter (MMC). However, the capacitance selected by the existing methods does not always meet the requirement in practice. To find out the reasons for this improper selection, the existing selection methods are analyzed in this paper. Based on the analysis, a new capacitance-selection method is proposed. In the new method, the problems of the existing methods are solved, and the calculation of capacitor voltage is based on a proposed capacitor-voltage model whose calculation error can be smaller than 0.1%. Furthermore, the Secant Method is used in the capacitance selection to quickly calculate the required capacitance. The new capacitance-selection method can be applicable to the MMC not having a circular operating region. In addition, this paper found that the capacitor voltage and the capacitor-voltage ripple reach their maximum values when the power-factor angles of the MMC are –π/2 and π/2, respectively, and the dc component in the capacitor voltage changes according to the operating condition of the MMC. Finally, the proposed selection method and theoretical analyses are verified by both simulation and experiment. [ABSTRACT FROM AUTHOR]

In low-power applications of photovoltaic (PV) systems, the transformerless grid-connected inverters have been preferred to increase the efficiency and reduce the cost, size, and power losses when they are compared to the ones with the transformer. A transformerless single-phase inverter topology with a single dc-link capacitor for the grid-connected PV systems is proposed in this paper. The proposed inverter has been simulated by using a cooperation process of the MATLAB and SPICE package programs and it has been implemented for experimental verification. The proposed inverter reduces the high-frequency common-mode leakage current caused by parasitic capacitances of PV panels, whereas it is controlled with the unipolar sinusoidal pulsewidth modulation. Also, the results show that the common-mode voltage remains constant. The efficiency of the proposed inverter has been compared to that of the most common topologies having the dc-link decoupling during the zero voltage states. This paper is accompanied by a video file demonstrating the power loss distribution in the inverter. [ABSTRACT FROM AUTHOR]

The continuous increasing share of power-converter-based renewable energies weakens the power system inertia. The lack of inertia becomes a main challenge to small-scale modern power systems in terms of control and stability. To alleviate adverse effects from inertia reductions, e.g., undesirable load shedding and cascading failures, three-phase grid-connected power converters should provide virtual inertia upon system demands. This can be achieved by directly linking the grid frequency and voltage references of dc-link capacitors/ultracapacitors. This paper reveals that the virtual inertia control may possibly induce instabilities to the power converters under weak grid conditions, which is caused by the coupling between the d- and q-axes as well as the inherent differential operator introduced by the virtual inertia control. To tackle this instability issue, this paper proposes a modified virtual inertia control to mitigate the differential effect, and thus, alleviating the coupling effect to a great extent. Experimental verifications are provided, which demonstrate the effectiveness of the proposed control in stabilizing three-phase grid-connected power converters for inertia emulation even when connected to the weak grid. [ABSTRACT FROM AUTHOR]

This paper presents a fast and robust dc-bus voltage control method for single-phase grid-connected dc/ac converters. The proposed technique precisely estimates the double-frequency (2-f) ripple of a dc-bus voltage and removes it from the voltage-control loop without adding any additional dynamics or oscillations. Conventionally, the 2-f ripple is managed by using large capacitors, which increase the cost and bulkiness of a converter. As a state-of-the-art approach, a notch filter (NF) or a dc-voltage estimator is used to effectively block the 2-f ripple from the voltage-control loop, which can significantly reduce the capacitor size. However, such an approach introduces new dynamics in the control loop, causes additional oscillations on the bus voltage, and increases the settling time of its response. This limits the degrees of freedom of the design to improve the overall system damping. The proposed method in this paper has no adverse impact on the original bus-voltage dynamic response. As a result, the bus-voltage control can be designed with higher speed and robustness and the whole system can operate with a reduced transient at both the bus voltage and the output ac current. The proposed approach is thoroughly analyzed and its effectiveness is validated through simulations and experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a procedure for evaluating self-capacitances and parasitic capacitors between physically adjacent turns in multiconductor systems—with a special focus on single-layer air-core inductors. To this end, the paper proposes the use of standard cells, which correspond to a minimal and basic turn, layer, or macrolevel arrangement of a winding in reference to its patterns of stored electrostatic energy. A standard cell embraces mathematical rules derived by means of a curve fitting approach through a set of finite element analysis (FEA) simulations. Besides, it is applied in a matching routine wherein self- and stray capacitances are evaluated according to the relative position of each turn, layer, or macrolevel arrangement along the length of the winding. Finally, the analytical technique is validated by comparing frequency-domain results obtained from an implemented SPICE model and laboratory measurements. [ABSTRACT FROM PUBLISHER]

This paper provides an experimental and theoretical discussion on dynamic braking for a medium-voltage induction motor fed by a modular multilevel double-star chopper-cell (DSCC) inverter. It is intended to apply the motor drive to large-capacity fans and compressors with a large moment of inertia. Each chopper cell consists of a bidirectional chopper and a braking chopper connecting a single small-rated braking resistor in series with a single IGBT. This configuration results in a “distributed” dynamic brake that provides a distinctive welcomed side effect of protecting all the bidirectional-chopper cells against sudden overvoltage. An experimental system rated at 400 V and 15 kW is designed, constructed, and tested to verify operating performance of the distributed dynamic brake. Experimental waveforms, along with simulated waveforms, confirm firmly that the distributed dynamic brake is feasible and effective in an induction motor fed by a medium-voltage high-power DSCC inverter for fans and compressors. Finally, this paper gives a design example of a distributed dynamic-braking resistor for the 11-kV, 12-MW induction motor driving a large-capacity fan equipped with a large moment of inertia. [ABSTRACT FROM AUTHOR]

This paper discusses the impact of small dc capacitance in a motor drive using a floating capacitor H-bridge topology. The proposed topology is intended for applications where variable frequency control is not required. Special attention is paid on investigating the second-order dc capacitor voltage ripples, whose influence on the induction motor as well as on the motor drive itself is of importance. This issue is addressed in this paper through rigorous mathematical formulations. It is found that by inverting the second-order dc ripple voltage using the conventional SVPWM, no harmful harmonics will be generated in the motor line voltage. This demonstrates the possibility of drastically reducing the dc capacitance of the proposed system. Induction motor as well as H-bridge performance with respect to different dc capacitance values is demonstrated by experiments, which lays the foundation for cost reduction and reliability enhancement of the proposed system. [ABSTRACT FROM PUBLISHER]

The modular multilevel converter (MMC) with nearest level modulation (NLM) is widely used in the high voltage applications for low switching frequency and easy implementation. Existing literature has not provided a complete submodule (SM) fault ride-through scheme for MMC with NLM. In this paper, a strategy including fault detection, localization, redundancy, and recovery is proposed to ensure continuous operation of MMC under IGBT open-circuit faults conditions. It only requires a few hardware and software resources. The features of MMC and SMs with three types of failures are studied, respectively. Based on these, the fault detection method is proposed by using a simple hardware circuit, thus high computation complexity is avoided. Since current fault localization schemes are limited to MMC with carrier phase shifted pulse width modulation, this paper further proposes a strategy for MMC with NLM to locate the faulty SM and identify the fault type. After this, the fault redundancy and the proposed fault recovery method are applied to eliminate the fault and then exit the failure state. Therefore, the ability of SM fault ride-through can be realized. Analysis of failure characteristics are verified in simulation. Experimental results based on a single-phase MMC prototype with 11 SMs per arm are presented to demonstrate the validity of the proposed fault ride-through strategy. [ABSTRACT FROM AUTHOR]

This paper presents an intensive discussion on a high-voltage direct-current (HVDC) long-distance transmission system combining two modular multilevel double-star chopper-cells (DSCC) converters with dc power cables. Hereinafter, each converter is referred to simply as a DSCC converter, or just as a DSCC for more simplicity. Such an HVDC transmission system is required to provide low-voltage-ride-through (LVRT) capability to enhance system availability. This paper proposes a practical LVRT control characterized by the use of power-line communications between the two DSCC converters. The validity and effectiveness of the LVRT control is verified not only by simulated waveforms obtained from the software package “PSCAD/EMTDC” but also by experimental waveforms from a three-phase 200-V, 400-Vdc, 10-kW, 50-Hz downscaled system with 300-m-long dc power cables. [ABSTRACT FROM AUTHOR]

In modern power systems, the increasing penetration of renewables and power electronics, particularly inverter-based wind and solar power generation, is altering power system dynamics and bringing new stability concerns. One challenging issue that is attracting considerable attention is the wide range of power oscillations associated with multiple parallel grid-connected inverters. In such systems, the characteristics in terms of resonance and oscillation are significantly different from single-inverter systems. This paper investigates the mutual interaction and stability issues of multiple grid-interfacing inverters with LCL-filters in power-electronics-based power systems under various grid conditions. The investigation reveals that such interactions between power inverters and the grid may excite multiple resonances at various frequencies under certain grid conditions. The nodal admittance matrix concept, which was originally from power systems engineering, is adopted here. Moreover, this paper further develops an Interaction-Admittance model that can effectively describe these mutual interactions in terms of a physical network admittance. We apply our model to various scenarios such as stiff grid conditions and inductive grids with/without power factor correction capacitors. The results with the proposed framework demonstrate an intuitive interpretation of multi-inverter system resonance and instabilities. Finally, simulations and experiments on a lab-scale system are provided to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper describes a dc-link voltage control method of a single-phase back-to-back cascaded H-bridge inverter (SBCI) for a medium-voltage motor drive system. The main advantage of the SBCI topology over the conventional regenerative cascaded H-bridge topology with a three-phase active front-end (AFE) is a simple system structure, which is composed of an input transformer, a power cell, a current sensor, etc. However, the challenging points of the SBCI are larger voltage ripple in the dc-link capacitor and imbalance of dc-link voltages of each phase. The asymmetric dc-link voltage of each power cells could cause unstable operation such as over-modulation due to the lack of the dc-link voltage of a particular phase and result in over-voltage or under-voltage faults. In this paper, the control strategy of the dc-link voltage for the SBCI that uses the negative-sequence voltage of the converter is described. The proposed control method is verified with a computer simulation whose target is a 6.6-kV–1.25-MW medium-voltage drive system. Also, through the experimental setup with the prototype SBCI whose power rating is 16.2 kVA, the dc-link voltage of each AFE has been controlled within a 0.5% error of its reference value at the full load. [ABSTRACT FROM AUTHOR]

This paper studies the high power density bidirectional dc–dc converter with interleaving, soft-switching, and near critical conduction mode (near-CRM) operation. Systematic design and control methods are proposed to enhance the effectiveness of passive currents balancing between multiple interleaved phases without using individual phase current feedbacks. This paper first analyzes the zero voltage turn-on operation, including the turn-off energy diversion by the added snubber capacitor and the turn-off resonance models. Second, the intrinsic inverse co-relation between the phase current deviation and the resulting effective duty cycles variation is quantitatively formulated and modeled as a closed-loop mechanism that balances the currents passively. Then, the design constraints of the system parameters including the snubber capacitance, dead time, and valley currents of the near-CRM mode are formulated to guarantee the effectiveness of counteracting the current unbalance. Finally, a variable switching frequency control is proposed to actively control the valley current and maintain the current balancing effectiveness throughout the operating range. An IGBT-based 20-kW three-phase interleaved prototype with the maximum efficiency of 99.1% is constructed to verify the proposed design and control methods. [ABSTRACT FROM AUTHOR]

This paper proposes a novel active-clamp forward converter (ACFC) with a lossless-snubber on the secondary-side, which combines a resonant capacitor and a clamping diode with an output inductor in parallel. The conventional ACFC achieves zero-voltage-switching on switches of the primary-side during dead time for reducing the switching loss and voltage spike. Unfortunately, on the secondary-side of transformer, the voltage spike damages the free-wheeling diode and rectifier diode due to the reverse recovery current and junction-capacitor of the diode and leakage inductance of the transformer. This paper proposes a lossless-snubber on the secondary-side operation for reducing the voltage spike on the free-wheeling diode and forward-rectifier diode. Therefore, the converter proposed in this paper is suitable for high-output-current applications. Experimental results are shown to verify the analysis and design procedure of the proposed forward converter. [ABSTRACT FROM AUTHOR]

This paper proposes a coordinated control strategy for the rotor-side converter (RSC) and the grid-side converter (GSC) of an LC-filtered doubly fed induction generator (DFIG) under distorted grid voltage condition, to eliminate the distortion of the total output current (including the stator current, the GSC current, and the filter capacitor current). For an LC-filtered DFIG connected to a distorted grid, the low-order current harmonics can freely flow into the filter capacitor thereby polluting the total output current, even when the stator current and the GSC current are both controlled as sinusoidal. Although this problem can be addressed by measuring the output current or the capacitor current, the extra current sensors are undesired in industrial applications. In this paper, a novel hybrid virtual impedance method is implemented in both the RSC and the GSC, to reshape the parallel impedance of the stator, the GSC and the filter capacitor to nearly infinite for low-order harmonics, thus, the freely flowing output current harmonics can be mitigated. Meanwhile, the low-order current harmonics required by the output current compensation can be flexibly distributed between the stator and the GSC according to their operating conditions, to disperse the side-effects on the drive train and the GSC, thereby better protecting the whole system. The effectiveness of the proposed strategy is theoretically analyzed and verified with both simulation and experiment. [ABSTRACT FROM AUTHOR]

The instantaneous output power of the two-stage single-phase grid-connected photovoltaic (PV) inverter pulsates at twice the line frequency ($2f_{{\text{o}}}$), generating second harmonic current (SHC) in the front-end dc–dc converter and PV panel, which will affect the maximum power point tracking operation and deteriorate the overall conversion efficiency. The generating mechanism of the SHC is analyzed in this paper and it is pointed that in order to eliminate the SHC in the front-end dc–dc converter and PV panel, the voltage loop gain of the front-end dc–dc converter should be high enough at $2f_{{\text{o}}}$. Since there is a −180° phase abrupt at the resonant frequency of the input side filter capacitor and the inductor, the system may be unstable. To cope with this problem, the inductor current feedback active-damping scheme (ADS) is adopted. For further improving the loop gain at $2f_{{\text{o}}}$ , proportional–integral–resonant regulator with ADS (PIR + ADS) is proposed in this paper. Besides, a step-by-step closed-loop parameters design method is presented. Finally, a 3-kW two-stage single-phase grid-connected PV inverter has been fabricated and tested, and the experimental results verify the feasibility of the proposed control schemes. [ABSTRACT FROM AUTHOR]

This paper presents a method to enhance the dc-bus voltage-control loop of a single-phase grid-connected dc/ac converter, which improves its responses in terms of oscillation on its dc-bus voltage as well as its output ac current. Conventionally, the double-frequency (2-f) ripple is reduced by using a large electrolyte capacitor, which increases the cost and size of the system. A state-of-the-art approach is to use a notch filter (NF) to block the 2-f ripple in the voltage-control loop. This can significantly reduce the capacitor size. The existing presentations of this method, however, do not integrate the internal dynamics of the NF into consideration. This paper proposes a new way of implementing the NF, which allows integration of its internal variables into the control loop. The resulted system exhibits enhanced transient responses at both the dc-bus voltage and the output ac current. The proposed method is analyzed in detail and its effectiveness is verified through simulations and experimental results. [ABSTRACT FROM AUTHOR]

Light-emitting diodes (LEDs) are solid-state devices with specific $v$ – $i$ characteristics. In this paper, we study the basic requirement of the driving circuits and discuss the proper approach to drive LEDs in view of their characteristics. We compare voltage source driving and current source driving, and discuss their relative advantages and constraints. We specifically introduce the use of circuit duality principle for developing new current-source-mode (CSM) drivers that are less known but are theoretically more versatile compared to their conventional voltage-source-mode counterparts. The study highlights the effects of the choice of driving circuits in terms of the number and size of circuit components used, duty cycle variation, sensitivity of control, nonlinearity and control complexity of LED drivers. We propose a CSM single-inductor multiple-output (SIMO) converter, which demonstrates the advantage of having inductorless and easily controlled current-source drivers, and present a comparison of the CSM SIMO converter with the existing SIMO converters. We further illustrate that a high-voltage-step-down ratio can be naturally achieved by the CSM high-voltage-step-down converter without the use of transformers. This paper presents a systematic and comparative exposition of the circuit theory of driving LEDs, with experimental evidence supporting the major conclusions. [ABSTRACT FROM AUTHOR]

The use of LCL filters is a well-accepted solution to attenuate the harmonics created by the pulsewidth modulation. However, inherently LCL filters have a resonance region where the unwanted harmonics are amplified, which can compromise stability. Several techniques have been developed in order to tackle this issue. At first the use of passive damping, by intentionally increasing the resistance of the LCL filter components, is a simple, robust, and straightforward solution; however, it decreases the overall efficiency of the system, and hence in general is unwanted. Alternatively, active damping strategies, where the resonance damping is provided by the current controller, are of major interest. This paper analyzes the robustness of the closed-loop dynamics when different active damping techniques are implemented. The analyzed active damping techniques, which have been selected because of their readiness and simplicity, are: 1) filtered capacitor voltage feedforward and 2) second-order filters in cascade with the main current controller. The impedance/admittance stability formulation is used to model the system, which has been proven to be very convenient for the assessment of robustness. Experimental tests are provided in order to show the accuracy of the analysis and verify the findings. This paper proves that filtered capacitor voltage feedforward is a more robust and reliable solution than implementations based on cascade notch filters. [ABSTRACT FROM AUTHOR]

A modular multilevel converter (MMC) is regarded as a promising topology in high-voltage direct current systems. However, the MMC consists of numerous submodules (SMs) and switching devices, which lead to a considerable switching loss, and increased cost and size of the heat sink. To mitigate these issues, this paper presents a novel modulation method composed of fundamental frequency modulation (FFM) and multicarrier-based sinusoidal pulsewidth modulation schemes. The main purpose of this modulation method is the reduction of switching loss while maintaining good harmonic performance. However, the FFM scheme leads to the unbalanced capacitor voltage of each SM in the MMC. Accordingly, this paper additionally proposes the rotation method and selective voltage balancing control for SMs to ensure effective performance of the method. Simulation and experimental results verify the effectiveness and performance of the proposed modulation scheme through switching loss and spectral analyses. [ABSTRACT FROM AUTHOR]

This paper presents a practical strategy for utilizing the submodule (SM) redundancy of a modular multilevel converter (MMC) for its fault tolerance. This strategy provides a systematic framework for balancing the tradeoff between two conventional methods for using the active redundancy and, thus, achieves operational flexibility. One of the existing methods improves SM reliability owing to less voltage stress on the SM components by employing all of the SMs to form the ac or dc voltages (voltage-sharing mode). The other avoids transients by keeping the average SM voltage constant at the cost of slightly increased stress on the SM components (fixed-level mode), which, however, can be controlled to provide the grid-adaptive operation by reserving the energy of the SMs not in service. We, thus, develop a new redundancy management scheme by integrating these two methods and exploiting their technical benefits to meet the PQ requirements and MMC control performance. This research provides a theoretical basis and a technical guide to determining the number of SMs, which can further increase the voltage steps as per the MMC and grid conditions. This paper also connects the remaining PQ capability of the MMC at a particular operating point with the SM redundancy concept by defining a potential redundancy, especially useful when the physical redundancy is exhausted. The theoretical findings and efficacy of the proposed strategy are validated through PSCAD/EMTDC time-domain simulations followed by experiments using a nine-level single-phase MMC system. [ABSTRACT FROM AUTHOR]

Enhancement of dc bus voltage utilization for a five-level inverter with single dc source and capacitor-fed H-bridge (CHB) units is investigated in this paper. A carrier-based modulation technique is used for boosting the dc bus utilization, which is established by providing detailed mathematical analysis. The five-level inverter used here is realized by cascading a CHB unit to each phase of a three-level neutral point clamped inverter. The increase in dc bus voltage utilization owes to the pole voltage redundancies offered by CHB units. The floating capacitors of H-bridge units are balanced within a quarter fundamental cycle using the switching state redundancies of pole voltage levels. The aforementioned modulation technique allows the inverter to enhance the dc bus utilization from 0.577 $\text{V}_{\text{dc}}$ to 0.63 $\text{V}_{\text{dc}}$ under unity power factor. This enhancement is obtained in the linear modulation range without increasing the dc bus voltage, and thus, the inverter can operate without the presence of low-order harmonics in its phase voltages. The strength of this paper lies in its detailed mathematical analysis for finding out the limiting modulation index and power factor condition in the light of floating capacitor voltage balancing issue. Simulation as well as experimental verification of the modulation scheme is carried out on an induction motor drive under various operating conditions. It is shown that this carrier-based modulation technique is suitable for any single source inverter topology with one CHB unit per phase. [ABSTRACT FROM AUTHOR]

This paper presents a new six-level flying capacitor based (FC-based) multilevel converter with one dc source and the capability of operating in all power factors and modulation indexes. Multilevel converters with one dc voltage source are attractive in many applications as they do not need rather expensive and bulky multiwinding input transformer connection at the dc side. On the other hand, not all classic multilevel converters with one dc source can produce any desirable number of output voltage levels at all power factors and/or modulation indexes. In this paper, a hybrid structure is proposed in which six voltage levels can be realized at the ac terminals. The modulation technique and the control strategy for the FC voltage balancing are presented. To show the advantages of the proposed converter, different performance criteria, such as switch count and rating, the size of capacitors, switching frequency, and power losses, are compared with other existing six-level topologies. The results indicate that the proposed structure is superior to other six-level converters from different standpoints. Simulation results are used to further evaluate the performance of the proposed converter. A laboratory-type experimental setup is used to validate the theoretical results. [ABSTRACT FROM AUTHOR]

In data center and telecommunication power supplies, the front-end dc–dc stage is required to operate with a wide input voltage range to provide hold-up time when ac input fails. Conventional LLC converter serving as the dc–dc stage is not suitable for this requirement, as the normal operation efficiency (at 400 V input) will be penalized once the converter is designed to achieve high peak gain (wide input voltage range). This paper examined the operation of the LCLC converter and revealed that the LCLC converter could be essentially equivalent to a set of LLC converters with different magnetizing inductors that are automatically adjusted for different input voltages. In nominal 400 V input operation, the LCLC converter behaves like an LLC converter with large magnetizing inductor, thus the resonant current is small. In the hold-up period, when the input voltage reduces, the equivalent magnetizing inductor will reduce together with switching frequency reducing, thus the converter achieves high peak gain. In this paper, a new design methodology is also proposed to achieve optimal utilization of the two resonant capacitors for high power application. To verify the effectiveness of the LCLC converter for hold-up operation, comprehensive analysis has been conducted; a detailed step by step design example based on capacitor voltage stress is introduced; an experimental LCLC prototype optimized at 400 V, with input voltage range of 250–400 V and 12 V/500 W as output has been presented. [ABSTRACT FROM AUTHOR]

A dc–ac converter for voltage-source converter (VSC)-HVdc technology has a significant influence on the performance of the entire power transmission system. This paper introduces a new dc–ac converter composed of submodules and series insulated-gate bipolar transistor (IGBT) switches. The basic idea of this hybrid solution is to shape the ac voltage by submodules but, per half cycle, reconnect them to different electrical points by IGBT switches. This concept can help to reduce the quantities of submodules, thereby reducing the energy storage requirement significantly. Another advantage is that the IGBT switches can be soft switched by utilizing the high controllability of the submodules. This brings extra benefit of power losses reduction. In this paper, the operating principle of this hybrid converter is explained. Its performances are also presented in detail and compared with those popular VSC dc–ac converters. The feasibility of the new concept is also verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

Nonregenerative pulsewidth-modulated (PWM) rectifiers are increasingly being considered for applications, where the power flow is unidirectional, such as power supplies for telecommunications, X-ray, the machine-side converter for wind energy conversion systems, etc. They use fewer active switches, which increase their power density and reduce cost. This paper proposes a novel reduced switch topology for a multilevel (five-level or higher) nonregenerative PWM rectifier. It uses only four controlled switches and eight diodes per phase for a five-level rectifier. Half of the diodes are naturally commutated (zero current switching) at the line frequency, which reduces switching losses. This topology has several other advantages compared to similar topologies reported in the literature, such as minimum voltage stress across the devices, elimination of transient voltage-balancing snubbers, no extra hardware for balancing the flying capacitors, the dc-link mid-point voltage, etc. In this paper, switching cycle average modeling and the carrier-based modulation strategy for this rectifier are also presented to maintain a balanced dc link and to regulate flying capacitor voltages, while achieving unity displacement factor at the rectifier input terminals. The overall performance of the rectifier is verified by experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a novel two-level single-stage direct ac–ac converter for realizing a 7.2-kV medium-voltage (MV) solid-state transformer (SST) based on 15-kV SiC mosfets. A new current-fed series resonant converter (CFSRC) topology is proposed to address major challenges in MV ac–ac converters such as achieving zero-voltage switching (ZVS) for the MV mosfets across wide voltage and load ranges and minimizing system capacitance. The topology is analyzed with both time-domain analysis and first harmonic approximation to provide useful equations for circuit design. Constant deadtime strategy is adopted, allowing partial ZVS to occur at low-voltage (LV) levels. ZVS behavior over wide voltage range is investigated, and calculation of the associated loss from partial ZVS is presented. System parameters are optimized based on the tradeoff between conduction loss and switching loss. The 15-kV mosfet has been tested continuously at a park voltage of 10 kV and 37 kHz, indicating stable device operation and an extremely high voltage × frequency figure of merit. Moreover, inherent cycle-by-cycle current limiting in the proposed CFSRC under output short-circuit circumstance is realized by paralleling diodes to the LV resonant capacitors. Without employing any additional current sensors, the input and circulating currents are limited to a safe range automatically when the short-circuit occurs. This paper presents detailed short-circuit protection operating principles and peak resonant current equation to aid the design of the resonant tank. A full-scale and compact SST that converts 7.2 kV ac to 240 V ac is developed to verify the theoretical analysis. This is the highest reported voltage rating for two-level-based power converters without device series connection. ZVS is verified and achieved over wide voltage and load ranges with a peak efficiency of 97.8%. A short-circuit experiment is conducted at 3-kV peak voltage to verify the analysis. Experimental results closely match the theoretical analysis. [ABSTRACT FROM AUTHOR]

Power management integrated circuits (PMICs) with on-chip compensation are widely used to power multiple loads in mobile devices with increased power density. However, there are two issues for on-chip compensated PMICs. First, on-chip compensation reconfigurability is required to obtain the appropriate response in various passive components. Second, a converter for a processor requires adaptive voltage positioning (AVP) to reduce the output capacitor size. In this paper, a novel reconfigurable on-chip compensated current-mode buck converter with AVP is proposed to solve the aforementioned issues without requiring high-speed and high-resolution analog-to-digital converter (ADC). A reconfigurable accurate load line control scheme and on-chip compensation are proposed to achieve an accurate load line and AVP in various load lines and passive components. The control scheme, small-signal model, and circuit implementation are illustrated in this paper. The proposed buck converter was implemented into an integrated circuit to verify the analysis. [ABSTRACT FROM AUTHOR]

In this paper, a new soft-switching bridgeless single-phase power factor correction (PFC) converter is presented and analyzed. Employing an auxiliary switch, the input current dead angle that is the main drawback of the existing buck-type PFCs is omitted, and thus, the power factor (PF) is improved, which is the main contribution of the paper. Proposed PFC converter operates under discontinuous conduction mode (DCM) and draws sinusoidal input current from power supply inherently. All switches and diodes are turnedonandoffunder soft switching, which leads to low switching losses and elimination of diode reverse recovery problems. Also, minimum numbers of semiconductor devices are in the power flow path that reduce the conduction losses. A 120-W laboratory prototype is implemented and experimental results verify the validity of theoretical analysis and show efficiency of 92.1%. In addition, total harmonic distortion (THD) of 3.3% is achieved and the input current harmonics complies with IEC61000-3-2 Class D requirements. [ABSTRACT FROM AUTHOR]