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A modular multilevel converter (MMC) is regarded as a promising topology in high-voltage direct current systems. However, the MMC consists of numerous submodules (SMs) and switching devices, which lead to a considerable switching loss, and increased cost and size of the heat sink. To mitigate these issues, this paper presents a novel modulation method composed of fundamental frequency modulation (FFM) and multicarrier-based sinusoidal pulsewidth modulation schemes. The main purpose of this modulation method is the reduction of switching loss while maintaining good harmonic performance. However, the FFM scheme leads to the unbalanced capacitor voltage of each SM in the MMC. Accordingly, this paper additionally proposes the rotation method and selective voltage balancing control for SMs to ensure effective performance of the method. Simulation and experimental results verify the effectiveness and performance of the proposed modulation scheme through switching loss and spectral analyses. [ABSTRACT FROM AUTHOR]

This paper presents a new feed-forward strategy for suppressing low-order harmonic circulating currents in pulsewidth-modulated (PWM) based modular multilevel converters (MMCs). The approach is based on the new average model approach established in this paper, which identifies cross-coupling interactions between the system-level and submodule elements using decomposed dependent sources. As well as improving the damping of the system, the major advantage of this approach is that it maintains the natural DC bus balance property of a PWM modulated MMC by considering the upper and lower arms together (unlike existing feed-forward schemes which treat each MMC arm independently). Moreover, unlike existing direct control resonant strategies, which require careful gain tuning and are highly dependent on the ac system frequency, the proposed approach achieves wideband circulating current ripple suppression without requiring knowledge of the circulating current harmonic frequencies and needs only a simple proportional–integral (PI) controller to regulate the circulating current dc component for power balance. This makes it particularly suitable for use in multifrequency or variable-frequency ac systems. Extensive simulation and matching experimental results, including steady-state and transient responses compared against existing circulating current suppression approaches, validate the effectiveness and benefits of this new feed-forward compensation technique. [ABSTRACT FROM PUBLISHER]

This paper presents a hybrid seven-level converter based on T-type converter and H-bridge cascaded suitable for low-voltage and high-power-density applications. The operation principles and conduction paths are analyzed comprehensively. Voltage balance control of the floating capacitors is the key point of this paper. Mathematical expressions of capacitor voltage balance conditions are deduced based on sinusoidal pulse width modulation (SPWM). The results show that floating capacitor voltages are only balanced when the modulation index is below 0.82 under SPWM. In order to enlarge the modulation index ensuring the capacitor voltage balance, space vector modulation (SVM) is also applied to regulate floating capacitor voltages taking advantage of redundant switching vectors. Meanwhile, in SVM, there are no additional control requirements for the capacitor voltage. Taken both SPWM and SVM into consideration, the limit to the range of operation for this seven-level converter is presented, which is a function of the modulation index and the power factor. The merit of dc voltage utilization improvement in this topology is also analyzed based on simulation results. Simulations and experimental results under different modulation index and RL load are presented to verify the modulation strategies illustrated in this paper. [ABSTRACT FROM PUBLISHER]

This paper introduces a novel five-level nested neutral point piloted (NNPP) converter and analyzes the operating principle of five-level NNPP converter. This paper presents a novel space vector pulse width modulation (SVPWM) algorithm based on gh coordinate for five-level NNPP converter. First, the common-mode voltage is reduced by choosing the appropriate redundant switching states. After that, the floating-capacitor voltage balance control strategy is presented. The appropriate switch combinations of each phase are determined by the control requirements of floating-capacitor voltages respectively and the hardware mapping method of the switching states is presented. Furthermore, the neutral-point voltage balance control strategy is presented. In order to balance the dc-link capacitor voltages, the seven-segment switching sequence is selected according to the control requirements of dc-link capacitor voltages and the neutral-point voltage regulatory factor is introduced to regulate the durations of the redundant switching states in a switching cycle. Finally, the validity of the novel SVPWM algorithm with decoupling control strategies of floating-capacitor voltages and dc-link capacitor voltages is verified by the experimental results of five-level NNPP converter under steady-state and dynamic conditions. [ABSTRACT FROM AUTHOR]

AC voltage regulation is required in both the domestic and industrial sectors to avoid undesired effects from random voltage variations of the power supply. The paper introduces an ac voltage stabilizer/converter (ACVS) that is based on a controllable autotransformer technology. The proposed ACVS offers a specified strategy of voltage regulation, less harmonics, and low cost. The paper explains the operating principle of the ACVS and derives its nonlinear mathematical model. To ensure the desired performance of the ACVS while it is subject to uncertain input voltage and load variations, an optimal control strategy is designed. It is achieved via transforming the ACVS model extending with fictive axis emulation into a rotating reference frame and the linearization of the model via specific orientation of the reference frame and introducing a linear control action. Operation of the ACVS is simulated under different disturbances due to load and grid voltage changes, and compared to voltage stabilization with application of I and PI controllers. Experimental results are presented to demonstrate the voltage regulation technology. [ABSTRACT FROM PUBLISHER]

This paper presents a novel closed-loop digital control scheme to maintain proper interleaving operation of a multi-channel boundary-conduction-mode boost converter used in power-factor-correction applications. The proposed control scheme is suitable for implementation on a low-cost microcontroller. This is made possible by executing the control scheme at a constant sampling rate that is much slower than the maximum switching frequency of the converter. The performance of the control scheme is further improved by using an adaptive gain that scales with the on-time of the converter, which provides optimal phase-shift control and stability under all operating conditions. The digital closed-loop control scheme is validated experimentally on a three-channel 1-kW prototype ac–dc converter. The converter has an output voltage of 400 V and a universal input voltage range of 85–265 V. The prototype converter uses a low-cost microcontroller while demonstrating correct interleaving operation. [ABSTRACT FROM AUTHOR]

This paper presents the active capacitor voltage-balancing (ACVB) methods based on the dynamic model for a five-level nested neutral-point piloted (NNPP) converter using hybrid carrier modulation. The traditional hybrid carrier modulation provides natural voltage balancing of floating capacitors and dc-link capacitors. First, the natural voltage-balancing ability under steady-state and ideal conditions is theoretically proved. However, there are accumulated errors and deviations of capacitor voltages in practical applications, especially under dynamic conditions. In order to address the accumulated errors and deviations of capacitor voltages, the dynamic models of floating-capacitor voltages and neutral-point voltage are established. Moreover, the ACVB method based on the dynamic model of the neutral-point voltage is proposed by injecting the zero-sequence voltage. And the ACVB method based on the dynamic model of floating-capacitor voltages is proposed by introducing the adjustment variables. The proposed ACVB methods have the advantages of simple formula, definite physical meaning, and high accuracy. Furthermore, the output voltage quality and current quality are evaluated in term of total harmonic distortion and the effect of model parameter mismatch on the proposed ACVB methods is presented. Finally, the comparative simulation and experimental results verify the correctness of the proposed ACVB methods based on the dynamic model under different conditions. [ABSTRACT FROM AUTHOR]

Dynamic voltage restorer (DVR) technology has become a mature power quality product. In high-power applications, DVR using a multilevel converter is commonly used. However, DVR using a multilevel direct pulse width modulation (PWM) ac–ac converter has not been well studied. This paper presents a new DVR topology using a cascaded multilevel direct PWM ac–ac converter. In the proposed scheme, the unit cell of the multilevel converter consists of a single-phase PWM ac-ac converter using switching cell structure with coupled inductors. Therefore, the multilevel converter can be short- and open-circuited without damaging the switching devices. Neither lossy RC snubber nor a dedicated soft commutation strategy is required in the proposed DVR. This improves the reliability of the DVR system. The output voltage levels of the multilevel converter increase with the number of cascaded unit cells, and a high ac output voltage is obtained by using low-voltage-rating switching devices. Furthermore, a phase-shifted PWM technique is applied to significantly reduce the size of the output filter inductor. A 1-kW prototype of single-phase DVR is developed, and its performance is experimentally verified. Finally, the simulation results are shown for a three-phase DVR system. [ABSTRACT FROM AUTHOR]

In order to improve the dynamic responses of multimode controlled primary-side regulation flyback converter, a novel digital control method is proposed in this paper. A new DAC sampling method, which can capture the output voltage during dynamic transition, is introduced. Based on it, a dynamic module which can monitor the variation of the output voltage to improve the dynamic performance is proposed. In a 5-V/1-A primary-side regulation flyback converter, the maximum undershoot voltage and overshoot voltage of the proposed control scheme in this study are 0.472 and 0.192 V, respectively. They are much lower compared to 1.296 and 0.584 V in the traditional control scheme. The maximum undershoot and overshoot recovery times are reduced from 10.86 to 1.29 ms and 126.3 to 53.68 ms, respectively. The proposed control scheme was then verified by a FPGA controlled prototype. [ABSTRACT FROM AUTHOR]

This paper presents a voltage regulator topology, implemented using low-voltage devices, for converting high input voltage (>4.5 V) to low output voltages with fine-grain control (0.3 to 1 V). The topology merges a Dickson's switched-capacitor stage with a current-mode inductive buck stage, and optimizes the frequency of operations to reduce the overall passive size. The proposed two-stage hybrid regulator, designed in 130-nm standard digital process, operates from 4.8 to 6 V at input and regulates output voltage as low as 0.3 V with a maximum output power of 90 mW and a peak efficiency of 69%. [ABSTRACT FROM PUBLISHER]

Efficiency in a light load dc–dc converter is improved by reducing the switching frequency with the load current. Further, a bifrequency operation (BFO) using pulse train (PT) control can achieve spread spectrum. Using discrete-time models, this paper shows that a stable periodic BFO is generally not achievable in existing PT control methods. Thereafter, a unified multimode digital control technique is proposed, in which a voltage-mode digital pulse-width-modulator (DPWM) is used to control a predefined periodic BFO. Beside the fixed-frequency DPWM, an extra multiplexer is considered for real-time configuration to: 1) bifrequency pulse frequency modulation; 2) PT control; or 3) pulse regulation control; or 4) pulse skipping control with smooth transition. Analysis and design methods are discussed to ensure periodic BFO and to customize the power spectrum with predictable ripple parameters. A buck converter prototype is made, and the proposed control is implemented using an FPGA device. [ABSTRACT FROM PUBLISHER]

This paper proposes and evaluates an active voltage-balancing method for stacked multicell converters (SMCs) using phase-shifted pulse width modulation. The method is easy to implement and can be applied to SMCs with any number of levels. The proposed method balances the voltages of the capacitors by modifying the duty cycle of each switch of the SMC using a proportional controller. The direction of the output current and the crossed effect among the duty cycles of the switches is considered and used to improve capacitor voltage balance. The performance of the proposed voltage-balancing method is verified experimentally for different loads, such as linear and nonlinear loads, and under transient conditions. [ABSTRACT FROM PUBLISHER]

The modular multilevel converter (MMC) has several submodules in cascade. To control the submodule capacitors voltage, a new generalized dynamic voltage balancing algorithm along with a simple pulse width modulator structure is proposed in this paper. With proposed pulse width modulator structure, the dynamic voltage balancing algorithm can be easily implemented with any type of carrier based pulse width modulation (including level-shifted and phase-shifted pulse width modulation) scheme without any modifications. This method does not require the sorting technique for selection of submodule capacitors voltage. The performance of the proposed voltage balancing algorithm is presented for MMC with three-level flying capacitor submodules (MMC-3L-FC). The proposed method is also applicable to the conventional two-level half bridge submodules as well. The effectiveness of the proposed voltage balancing algorithm is verified with the phase-shifted carrier-based pulse with modulation scheme. The results obtained from the MATLAB/SIMULINK simulations on 6-kV/ 2.5-MW system and the dSPACE DS1103-based laboratory prototype of 208-V/3-kVA MMC-3L-FC system are in close relationship, and thus, the proposed methodology is validated. [ABSTRACT FROM AUTHOR]

A family of “Two-Switch Boosting Switched-Capacitor Converters (TBSC)” is introduced, which distinguishes itself from the prior arts by symmetrically interleaved operation, reduced output ripple, low yet even voltage stress on components, and systematic expandability. Along with the topologies, a modeling method is formulated, which provokes the converter regulation method through duty cycle and frequency adjustment. In addition, the paper also provides guidance for circuit components and parameter selection. A 1-kW 3X TBSC was built to demonstrate the converter feasibility, regulation capability via duty cycle and frequency, which achieved a peak efficiency of 97.5% at the rated power. [ABSTRACT FROM AUTHOR]

Five-level active neutral-point clamped (5L-ANPC) converter is an attractive topology for high-power medium-voltage motor drives. This paper presents a capacitor voltage-balancing method for the 5L-ANPC converter, including the voltage balancing of dc-link capacitors and flying capacitors. In order to ensure that the series-connected or high-voltage switches of the 5L-ANPC converter are operated at fundamental frequency and the other switches are operated at a constant switching frequency, phase-shifted pulse width modulation is used to control this converter. The relationship between the average neutral-point current and zero-sequence voltage is investigated, and an optimum zero-sequence voltage is calculated to regulate the neutral-point potential. The voltage across the flying capacitor is also regulated by adjusting the switching duty cycles of two PWM signals, which varies the operation time of redundant switching states in each switching period. Simulation and experimental results are presented to verify the validity of this method. [ABSTRACT FROM AUTHOR]

This paper proposes a new modulated carrier control method for an interleaved continuous conduction mode (CCM) power factor correction (PFC) boost converter. The proposed method allows precise sinusoidal line current shaping for a PFC boost converter operating in CCM. This is accomplished by simply comparing modulated carrier signal with switch current, such that inner current loop compensation design and rectified line voltage sensing are not required. The proposed control method greatly simplifies current sensing and control circuitry of multiphase converters since average current control is available by just sensing the switch current for each module. This also enables simple current balancing between parallel converters by employing modulated carrier signals with same amplitude. The principle of the control method is presented. The performance of the proposed control method is experimentally verified on a 600-W PFC converter. The measured power factor remains above 94.9% down to 20% of a full load for 110-Vrms and 220-Vrms line voltages. The line current harmonics also meet the IEC61000-3-2 Class D standard. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) is attractive for medium- and high-power applications because of its high modularity, availability, and power quality. In this paper, the current ripple on the dc link of the three-phase MMC derived from the phase-shifted carrier-based pulse-width modulation scheme is analyzed. A control strategy is proposed for the current ripple elimination. Through the regulation of the phase-shifted angles of the carrier waves in the three phases of the MMC, the current ripple on the dc link of the three-phase MMC can be effectively eliminated. Simulations and experimental studies of the MMC were conducted, and the results confirm the effectiveness of the proposed current ripple elimination control. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) has been a subject of increasing importance for medium/high-power energy conversion systems. Over the past few years, significant research has been done to address the technical challenges associated with the operation and control of the MMC. In this paper, a general overview of the basics of operation of the MMC along with its control challenges are discussed, and a review of state-of-the-art control strategies and trends is presented. Finally, the applications of the MMC and their challenges are highlighted. [ABSTRACT FROM AUTHOR]

This paper evaluates two different concepts for the control of the modular multilevel converter (MMC). Generally aiming at medium voltage applications, the considered MMC topology has a low number of submodules, and a pulse-width modulation (PWM) scheme is applied. A model predictive control (MPC) algorithm is developed and experimentally compared to a cascaded control scheme based on conventional PI controllers, which has been proposed by Hagiwara and Akagi. Steady-state and dynamic system performance as well as computational power requirements are discussed. The basis for the comparison is a scaled converter test bench operating from 560-V dc voltage. [ABSTRACT FROM AUTHOR]

Modular multilevel converter (MMC) has become one of the most promising converter topologies for future high-power applications. A challenging issue of the MMC is the voltage balancing among arm capacitors. A good overall control system is also vital for the MMC, which should be based on sound mathematical model, readily adaptable for different applications, and capable of high performance. This paper presents a general control structure for MMC inverters, which is suitable for both voltage-based and energy-based control methods, and includes voltage balancing between the upper and lower arms. A new method for voltage balancing among arm capacitors, which is based on an improved pulse-width modulation, is also presented. The proposed method avoids some major disadvantages found in present voltage balancing methods, such as dependence on computation-intensive voltage sorting algorithms, extra switching actions, interference with output voltage, etc. Furthermore, all switching actions are evenly distributed among power devices. The proposed control system as a whole can serve as a promising solution for practical applications, especially when the number of submodules is fairly high. Simulation and experimental results verify the effectiveness of the proposed methods. [ABSTRACT FROM AUTHOR]

This paper presents a buck-boost dc-dc converter for LED drivers capable of delivering an output current ranging from 0.1 to 2 A and a variable output voltage ranging between 2 and 5 V, starting from an input voltage spanning from 2.7 to 5.5 V. The dc-dc converter, realized in a 0.18-μm CMOS technology with 5-V option, occupies an area of 4 mm2 including pads. The circuit features automatic mode switching and dynamic sizing of the power transistors to achieve a peak efficiency of 91%. With a switching frequency of 2.5 MHz, the achieved line regulation is lower than 0.1% V-1 and the output voltage ripple is less than 10 mV. The obtained turn-on and load transient settling time are lower than 40 μs, thus allowing pulsed operation of the LEDs, as well as switching among LEDs of different colors. [ABSTRACT FROM AUTHOR]

This paper proposes a novel wide-range soft-switching pulse-width modulation three-level (TL) combined dc-dc converter characterized with no added primary clamping devices and reduced output inductance value. It is well suited for high input voltage dc-dc industrial applications due to following desirable features: all the switches sustain half of the input voltage; off state voltage of the switches is directly clamped by the bulky input capacitors, and no added primary clamping devices such as clamping diodes, flying capacitors, are required; TL waveform before output filter can be achieved, which significantly reduces the value of the output inductance; the modified phase-shift control method can be utilized to achieve wide output range. The converter can obtain zero-voltage switching (ZVS) for all power switches in wide load range; furthermore, less conduction loss is added to achieve ZVS. The operation and theoretical analysis of the proposed converter are presented. Experiments are carried out to validate the proposed converter, and efficiency curves are tested and given. [ABSTRACT FROM AUTHOR]

In this paper, a generalized switching technique for cascaded H -bridge (CHB) converters is proposed. To take advantage of both low- and high-frequency modulation techniques, a hybrid modulation method is utilized. The proposed technique employs the low-frequency switching for voltage balancing of the dc-link capacitors, and the high-frequency sinusoidal pulse-width modulation switching for shaping the input ac current. Using the proposed technique, the stable operating region of CHB converters is extended. The proposed technique is capable of maintaining the dc voltages balanced even under critical operating conditions in which the load of one H-bridge cell is removed. The validity and effectiveness of the proposed method is confirmed by several simulation and experimental tests on a seven-level CHB rectifier. [ABSTRACT FROM AUTHOR]

In electric vehicle (EV) energy storage systems, a large number of battery cells are usually connected in series to enhance the output voltage for motor driving. The difference in electrochemical characters will cause state-of-charge (SOC) and terminal voltage imbalance between different cells. In this paper, a hybrid cascaded multilevel converter which involves both battery energy management and motor drives is proposed for EV. In the proposed topology, each battery cell can be controlled to be connected into the circuit or to be bypassed by a half-bridge converter. All half-bridges are cascaded to output a staircase shape dc voltage. Then, an H-bridge converter is used to change the direction of the dc bus voltages to make up ac voltages. The outputs of the converter are multilevel voltages with less harmonics and lower dv/dt, which is helpful to improve the performance of the motor drives. By separate control according to the SOC of each cell, the energy utilization ratio of the batteries can be improved. The imbalance of terminal voltage and SOC can also be avoided, fault-tolerant can be easily realized by modular cascaded circuit, so the life of the battery stack will be extended. Simulation and experiments are implemented to verify the performance of the proposed converter. [ABSTRACT FROM AUTHOR]