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This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

This paper describes a dc-link voltage control method of a single-phase back-to-back cascaded H-bridge inverter (SBCI) for a medium-voltage motor drive system. The main advantage of the SBCI topology over the conventional regenerative cascaded H-bridge topology with a three-phase active front-end (AFE) is a simple system structure, which is composed of an input transformer, a power cell, a current sensor, etc. However, the challenging points of the SBCI are larger voltage ripple in the dc-link capacitor and imbalance of dc-link voltages of each phase. The asymmetric dc-link voltage of each power cells could cause unstable operation such as over-modulation due to the lack of the dc-link voltage of a particular phase and result in over-voltage or under-voltage faults. In this paper, the control strategy of the dc-link voltage for the SBCI that uses the negative-sequence voltage of the converter is described. The proposed control method is verified with a computer simulation whose target is a 6.6-kV–1.25-MW medium-voltage drive system. Also, through the experimental setup with the prototype SBCI whose power rating is 16.2 kVA, the dc-link voltage of each AFE has been controlled within a 0.5% error of its reference value at the full load. [ABSTRACT FROM AUTHOR]

This paper proposes a split-capacitor four-wire current source inverter, which is the dual of the split-capacitor four-wire voltage source inverter. Since the midpoint of the dc link is tied to the neutral point of ac filter capacitors, the common-mode voltage (CMV) is reduced significantly. Consequently, the leakage current issue is effectively addressed. The proposed circuit is cost-effective as no extra switch is added. This paper, first, establishes the equivalent common-mode circuit of the proposed inverter. The impact of the neutral line inductance on CMV is also analyzed. Then, a specific modulation is introduced to balance the dc-link voltages/currents. To achieve good input/output performance, a nonlinear control method is developed based on time-domain models. Finally, all the proposed methods and related theoretical analysis are verified by simulations and experimental results. [ABSTRACT FROM AUTHOR]

In this paper, instantaneous pulse power compensator (IPPC) method is proposed to achieve power pulsation decoupling function for single-phase inverter applications. A smaller capacitor is placed in series with the traditional dc-link capacitor, and this smaller capacitor voltage is controlled using pulse currents to cancel out the dc-link voltage ripple. Unlike twice-line-frequency power decoupling method, the proposed IPPC method can compensate the pulsating power with all the orders harmonics on the dc-link line, not only the second-order component. Both modeling and simulation results show that IPPC method can achieve nearly zero voltage ripple for the dc-link capacitor since the pulse current is fully compensated. Whereas twice-line-frequency power decoupling method has limit in voltage ripple reduction, especially in small dc-link capacitance conditions. The experimental results based on a full-bridge topology decoupling circuit and a single-phase inverter application show consistent results with simulation results. A 16% reduction of the prototype size, i.e., 16% higher power density with only ∼1% efficiency penalty can be achieved by the proposed IPPC method when compared to the second-order power decoupling method. [ABSTRACT FROM AUTHOR]

This paper analyzes the possibility of controlling the output voltage of a standalone single-phase inverter by directly controlling the output filter capacitor current without using a dedicated output voltage sensor. The plant modeling and controller design are presented. The proposed method depends on having the value of the output filter capacitance. A method to estimate the output filter capacitance is also presented. Rigorous analysis is done to show that the proposed sensorless scheme is largely insensitive to parameter variations and ensure that the output voltage is within specified regulations at utility level. It is also demonstrated in this paper that compared to the conventional voltage control scheme the proposed control scheme ensures an improved total harmonic distortion of the output voltage waveform. Experimental results presented validate the proposed scheme. [ABSTRACT FROM AUTHOR]

Modular multilevel converters are increasingly being considered or used for various medium voltage applications. Multiple control methods have been proposed for the control of the direct to three-phase modular multilevel converter. They differ one from another in the way the capacitor voltage ripples are handled, i.e., either neglected, estimated, reconstructed by filtering or measured. This has implications on the performance level that can be obtained. This paper provides insights on the advantages and drawbacks of each control method, in inverter and rectifier mode, with a fair and thorough assessment supported by extensive simulations, with converter ratings that are realistic for medium voltage applications. Finally, this works highlights the impact of the higher dynamics for medium voltage direct current (dc) applications compared to high voltage dc ones on the choice of the control method. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

In this paper, a novel space-vector pulsewidth modulation technique for a five-level active neutral-point clamped (5L-ANPC) inverter is proposed to eliminate the common-mode voltage (CMV). For the 5L-ANPC inverter, which produces a good output voltage performance and lowdv/dt, the total 125 voltage vectors can be generated, among which the proposed scheme employs only 19 voltage vectors producing a zero CMV. Due to the limitation of voltage vectors selected, the dc-link capacitor voltages of the 5L-ANPC inverter cannot be balanced by themselves. Therefore, the capacitor voltages of the inverter should be controlled by choosing the redundant switching states appropriately. The validity of the proposed modulation scheme has been verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a control method for a five-level hybrid flying-capacitor (5L-HFC) inverter, of which structure stems from the conventional five-level active neutral-point-clamped (5L-ANPC) topology by dividing the dc-link stage into three series-connected capacitors. In this inverter, the voltage stress on the power switches connected to the dc link is reduced by a half compared with that of the 5L-ANPC topology, thus the lower number of equally voltage-rated power devices can be employed. Also, the power losses in the 5L-HFC inverter are more evenly distributed than in the 5L-ANPC. In order to balance the dc-link capacitor voltages, a third-order harmonic offset injection is applied. When a diode rectifier is used to supply the dc bus voltage, the balancing method is not effective if the modulation index is higher than 0.64. Thus, an auxiliary circuit is needed to support the balancing of the dc-link capacitor voltages. However, the unbalancing problem can be overcome in a full-range operation without the auxiliary circuit if the back-to-back configuration is utilized. Finally, simulation and experiment results have verified the performance of the 5L-HFC inverter with the proposed control method. [ABSTRACT FROM AUTHOR]

In this paper, a modular control approach has been proposed for a single- and three-phase differential-mode Ćuk inverter (DMCI) operating with a recently proposed discontinuous-modulation scheme that offers tangible performance benefits over conventional continuous modulation scheme. The modular control scheme uses a combination of a transformation and adaptive control law to meet tracking requirements in the presence of converter nonlinearity. Experimental results for the single- and three-phase DMCI are provided for startup, steady state, load transition, and total harmonic distortion using different types of loads, which validate the efficacy of the implemented modular tracking controller. Further, detailed stability of the closed-loop DMCI module is provided. [ABSTRACT FROM AUTHOR]

This paper proposes a new control technique, which only employs the primary-side controller and load identification approach to adjust charging voltage/current for series–series (SS) and series–parallel (SP) compensated wireless power transfer (WPT) systems. The advantages are that dual-side wireless communication for real-time charging current/voltage adjustment is avoided as well as it is suitable for different charging modes, e.g., constant voltage (CV) and constant current (CC) charging defined by the battery charging profile. The load identification approach, which utilizes reflected impedance theory and quadrature transformation algorithm for calculating the active power, is proposed to estimate the equivalent load resistance of battery. Then, the CV/CC charging for both SS and SP compensation are achieved by the PI-controlled phase-shift H-bridge inverter. The simulation and experimental results validate the feasibility of proposed control method. During the CC charging, 3.01 and 3.03 A for SS and SP compensation with the error of 1.2% and 1.4% are achieved. During the CV charging, 25.8 and 25.7 V for SS and SP compensation with the error of 1.1% and 1.3% are realized. The proposed method improves the performance of both SS- and SP-compensated WPT systems to be more suitable for the applications that require compact and lightweight receiver. [ABSTRACT FROM AUTHOR]

Cascaded converter is formed by connecting two subconverters together, sharing a common intermediate dc-link voltage. Regulation of this dc-link voltage is frequently realized with a proportional-integral (PI) controller, whose high gain at dc helps to force a zero steady-state tracking error. Such precise tracking is, however, at the expense of increasing the system type, caused by the extra pole at the origin introduced by the PI controller. The overall system may, hence, be tougher to control. To reduce the system type while preserving precise dc-link voltage tracking, this paper proposes a coordinated control scheme for the cascaded converter, which uses only a proportional dc-link voltage regulator. The resulting converter is thus dynamically faster, and when compared with the conventional PI-controlled converter, it is less affected by impedance interaction between its two subconverters. The proposed scheme can be used with either unidirectional or bidirectional power flow, and has been verified by simulation and experimental results presented in this paper. [ABSTRACT FROM PUBLISHER]

Two-stage single-phase inverters have been widely used as they can achieve voltage matching and galvanic isolation between the input and output. Due to the pulsating output power of the downstream inverter, an ac current at twice the output frequency, which is called second harmonic current (SHC), arises in the input side of the downstream inverter. This SHC will penetrate to the front-end dc-dc converter, leading to reduced conversion efficiency. This paper first analyzes the propagation mechanism of the SHC and load transient response of two-stage single-phase inverters from the viewpoint of output impedance. Then, based on the current mode control and load current feed forward, two control methods to achieve low SHC in the front-end dc-dc converter and fast dynamic performance during load transient are proposed in this paper. Finally, a 2-kW two-stage single-phase inverter prototype has been constructed and tested, and the experimental results are provided to verify the effectiveness of the proposed control methods. [ABSTRACT FROM AUTHOR]

In signal injection sensorless drives, the injection voltage cannot be reduced under a certain value. The lower limit of the injection voltage is mainly enforced by the inverter nonlinearity that causes distortion of the injection voltage and degradation of the position estimation performance. After analyzing the inverter nonlinearity during the voltage injection, it is revealed that parasitic capacitances of insulated-gate bipolar transistors have positive effects on inverter output linearity and sensorless control. Based on this analysis, this paper proposes a method to reduce the injection voltage by connecting additional capacitors to the output terminals of the inverter. Simulation and experimental results are provided to verify the effectiveness of the proposed idea. In the experiments, using the capacitor-integrated inverter, it is shown that the injection voltage can be reduced by more than half without degrading the position estimation performance. [ABSTRACT FROM AUTHOR]

Indirect matrix converter (IMC) is an alternative for ac/ac energy conversion, usually operated with a voltage stepped-down gain of only 0.866. For applications like distribution generation where voltage-boost functionality is required, the traditional style of operating the IMC is therefore not appropriate. Like most power converters, the operation of the IMC can surely be reversed to produce a boosted gain, but so far its relevant control principles have not been discussed. These challenges are now addressed in this paper with distributed generation suggested as a potential application. Simulation and experimental results for validating various performance aspects of the proposed control schemes can be found in a later section of this paper. [ABSTRACT FROM AUTHOR]

Multilevel inverters are receiving more attentions nowadays as one of preferred solutions for medium- and high-power applications. As one of the most popular hybrid multilevel inverter topologies, the five-level active-neutral-point-clamped inverter (5L-ANPC) combines the features of the conventional flying-capacitor type and neutral-point-clamped (NPC) type inverter and was commercially used for industrial applications. In order to further decrease the number of active switches, this paper proposes a seven-switch 5L-ANPC (7S-5L-ANPC) topology, which employs only seven active switches and two discrete diodes. The analysis has shown a lower current rating can be selected for the seventh switch under high power factor condition, which is verified by simulation results. The modulation strategy for 7S-5L-ANPC inverter is discussed. A 1 kVA single-phase experimental prototype is built to verify the validity and flexibility of the proposed topology and modulation method. [ABSTRACT FROM AUTHOR]

This paper proposes a novel hierarchical control strategy for improvement of load sharing and power quality in ac microgrids. This control framework is composed of a droop-based controller at the primary level, and a combination of distributed power sharing and voltage conditioning schemes at the secondary level. The controllers in the primary level use GPS timing technology to synchronize the local reference angles. The voltage reference of each distributed generation is adjusted according to a voltage–current (V–I) droop characteristic to enable proper current and power sharing with a fast dynamic response. The droop coefficient, which acts as a virtual resistance, is adaptively changed as a function of the peak current. This strategy not only simplifies the control design but also improves the current sharing accuracy at high loading conditions. The distributed power sharing scheme uses consensus protocol to ensure proportional sharing of average power. The voltage conditioning scheme produces compensation signals at fundamental and dominant harmonics to improve the voltage quality at a sensitive load bus. Experimental results are presented to validate the efficacy of the proposed method. [ABSTRACT FROM AUTHOR]

In this paper, a control method for motor drive system without electrolytic capacitor is proposed. Since dc-link capacitor of this motor drive is about 1% of the conventional one, it can satisfy the grid current regulation of IEC61000-3-2 without bulky filter circuits by directly controlling the electric output power of the inverter. However, dc-link voltage of this drive fluctuates as the rectified grid voltage. It causes higher motor current, especially at the low dc-link voltage area, and severely harms the drive efficiency. To solve this problem, proposed method keeps the dc-link voltage higher than certain limit while controlling the output power. It can improve the efficiency of the drive by lowering the d-axis current at low dc-link voltage area, with satisfying the regulation with small grid current harmonics. The proposed method includes the motor current reference generation for the limited dc-link voltage and selection of the limitation value. The improved performance of the proposed method was verified by the experimental results. [ABSTRACT FROM PUBLISHER]

Diode-assisted buck–boost voltage-source inverter achieves high voltage gain by introducing a switch-capacitor based high step-up dc–dc circuit between the dc source and inverter bridge. As for the unique structure, various pulse width modulation (PWM) strategies are developed with regard to the chopped intermediate dc-link voltage. In order to maximize voltage gain and increase efficiency, this paper proposes a novel PWM strategy. It regulates the average value of intermediate dc-link voltage in one switching time period ( Ts) the same as the instantaneous maximum value of three-phase line voltage by controlling the front boost circuit. Then, the equivalent switching frequency of power devices in the inverter bridge can be reduced to 1/3fs (fs = 1/Ts). The operating principle and closed-loop controller design are analyzed and verified by simulations and experiments. Compared with existing PWM strategies, the new control strategy demonstrates less power device requirement and higher efficiency in high voltage gain applications. It is a more competitive topology for wide range dc/ac voltage regulation in renewable energy applications. Furthermore, with new control strategy, the dc-side inductor current and capacitor voltage contains six-time line-frequency ripples. To overcome the undesired influence of low frequency ripples, it is also suitable for 400–800 Hz medium frequency aircraft and vessel power supply system. [ABSTRACT FROM PUBLISHER]

This paper investigates the problem of fluctuation of the neutral-point potential (NPP) in a three-level NPC inverter with a capacitor-voltage loop. The phase pulse width duty cycle disturbance pulse width modulation (PWM) method is proposed to suppress the NPP fluctuation efficiently. Based on the basic carrier-based phase-disposition PWM method, the average pulse neutral-point current model is established. Then, the frequency, amplitude, and equivalent initial phase of the NPP fluctuation are analyzed based on the current model. According to the alternating error of the dc-link capacitor voltages, a capacitor-voltage loop with a quasi-proportional resonant (PR) controller is presented. The control variable, which varies with the modulation index, phase current, load power factor, etc., can be obtained from the quasi-PR controller. Finally, an experimental three-level NPC inverter is described and the validity and feasibility of the proposed method are verified by experimental results. [ABSTRACT FROM AUTHOR]

Differential-mode buck-boost inverters have merits such as reduced switch number, ability to provide voltages higher or lower than the input voltage magnitude, improved efficiency, reduced cost and size, and increased power density, especially in low-power applications. There are five buck-boost inverters that can provide flexible output voltage without the need of a large electrolytic input side capacitor, which degrades the reliability of inverters. The continuous input current of these inverters is appropriate for maximum power point tracking operation in photovoltaic and fuel cells applications. Three of the five inverters can be isolated with high-frequency-link transformers where the common-mode leakage current can be mitigated. However, the performance and control of such converters have not been discussed in detail. In this paper, the five possible single-stage three-phase differential-mode buck-boost inverters with continuous input current are investigated and compared in terms of total losses, maximum ripple current, total harmonic distortion, and device and passive element ratings. In addition, the possible methods are presented for eliminating the input third-order harmonic current, resulting from the stored energy in the passive elements, as well as the output second-order harmonic currents. The ability for isolating the input and output sides of the inverters with a small–high frequency transformers is discussed. A changeable-terminal 2.5-kW bidirectional inverter is used to validate the design flexibility of the inverter topologies, when digital signal processor-controlled. [ABSTRACT FROM AUTHOR]

The purpose of neutral-point voltage balancing algorithms in the three-level neutral-point clamped (3L-NPC) topology is to eliminate the voltage unbalance of top- and bottom-side dc-link voltages (neutral-point voltage). These algorithms are divided into dc unbalance and ac unbalance compensation methods. The dc unbalance causes distortion of output currents; therefore, this problem has to be solved. The ac unbalance implies that there is an ac ripple in the top- and bottom-side dc-link voltages. In applications using 3L-NPC topology, a large dc-link capacitor value is required to mitigate this ac unbalance problem. As a result, the size and the cost of applications become large and expensive. In this paper, a compensation method for mitigating the ac unbalance of the neutral-point voltage is proposed, which causes the dc-link capacitor value to be small, when a carrier-based pulse width modulation method is applied. The proposed method compensates the ac unbalance of the neutral-point voltage by adding an optimal compensation value to the reference duty signals. This compensation value is calculated simply by currents and reference duty signals. The calculation process of the optimal compensation value is discussed, and the effectiveness of the proposed method is verified with simulations and experiments. [ABSTRACT FROM PUBLISHER]

A capacitor voltage-balancing method for a nested neutral point clamped (NNPC) inverter is proposed in this paper. The NNPC inverter is a newly developed four-level voltage-source inverter for medium-voltage applications with properties such as operating over a wide range of voltages (2.4–7.2 kV) without the need for connecting power semiconductor in series and high-quality output voltage. The NNPC topology has two flying capacitors in each leg. In order to ensure that the inverter can operate normally and all switching devices share identical voltage stress, the voltage across each capacitor should be controlled and maintained at one-third of dc bus voltage. The proposed capacitor voltage-balancing method takes advantage of redundancy in phase switching states to control and balance flying capacitor voltages. Simple and effective logic tables are developed for the balancing control. The proposed method is easy to implement and needs very few computations. Moreover, the method is suitable for and easy to integrate with different pulse width modulation schemes. The effectiveness and feasibility of the proposed method is verified by simulation and experiment. [ABSTRACT FROM PUBLISHER]

In single-phase photovoltaic (PV) system, there is double-frequency power mismatch existed between the dc input and ac output. The double-frequency ripple (DFR) energy needs to be buffered by passive network. Otherwise, the ripple energy will flow into the input side and adversely affect the PV energy harvest. In a conventional PV system, electrolytic capacitors are usually used for this purpose due to their high capacitance. However, electrolytic capacitors are considered to be one of the most failure prone components in a PV inverter. In this paper, a capacitance reduction control strategy is proposed to buffer the DFR energy in single-phase Z-source/quasi-Z-source inverter applications. Without using any extra hardware components, the proposed control strategy can significantly reduce the capacitance requirement and achieve low input voltage DFR. Consequently, highly reliable film capacitors can be used. The increased switching device voltage stress and power loss due to the proposed control strategy will also be discussed. A 1-kW quasi-Z-source PV inverter using gallium nitride (GaN) devices is built in the lab. Experimental results are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM PUBLISHER]

In many grid-connected applications, a dc/dc switching converter is usually connected between the PV modules and the inverter. This paper presents an improved procedure to design a sliding controller for the PV system, which drives the PV voltage to follow a reference provided by an external MPPT algorithm and mitigates the perturbations caused by the irradiance changes and oscillations in the bulk voltage. By considering that the switching surface is the linear combination of the input capacitor current and the PV voltage error, the proposed design exhibits advantages in comparison with existing solutions that rely in the linearization of inner current loop dynamics. The proposed integral procedure, by taking also into account the effects in the closed-loop system dynamics of a reference filter, ensures a stable sliding regime in all the desired operation range of the system, while the settling time and overshoot of the PV voltage required by an MPPT algorithm are provided. Differently from a previous similar but less rigorous approach, the switching function and reference filter parameters are obtained by numerically solving a set of nonlinear equations. Simulations and experiments were used to demonstrate the efficiency of the proposed solution in presence of environmental and load perturbations. [ABSTRACT FROM PUBLISHER]

Single-phase power conversion such as pulse width modulation rectifier, grid connected PV inverter system, static synchronous compensator all can be implemented by an H-bridge inverter and a large electrolytic dc capacitor to absorb the ripple power pulsating at twice the line frequency (2ω ripple power). This paper proposed a dc capacitor-less inverter for H-bridge with minimum voltage and current stress. By adding another phase leg to control an ac capacitor, the 2ω ripple power can be absorbed by the capacitor and theoretically 2ω ripples to the dc capacitor can be eliminated completely. The H-bridge and the addition phase leg can be analyzed together as an unbalanced three phase system. By adopting space-vector pulse width modulation control and choosing the optimum ac capacitance and the voltage reference, the voltage and current stress of the switches can be minimized to the same as the conventional H-bridge. The size of capacitor is reduced by ten times compared to the conventional H-bridge system. Simulation and experimental results are shown to prove the effectiveness of the proposed dc capacitor-less inverter and active power decoupling method. [ABSTRACT FROM AUTHOR]

Microinverters operating into the single-phase grid from solar photovoltaic (PV) panels or other low-voltage sources must buffer the twice-line-frequency variations between the energy sourced by the PV panel and that required for the grid. Moreover, in addition to operating over wide average power ranges, they inherently operate over a wide range of voltage conversion ratios as the line voltage traverses a cycle. These factors make the design of microinverters challenging. This paper presents a multilevel energy buffer and voltage modulator (MEB) that significantly reduces the range of voltage conversion ratios that the dc-ac converter portion of the microinverter must operate over by stepping its effective input voltage in pace with the line voltage. The MEB partially replaces the original bulk input capacitor, and functions as an active energy buffer to reduce the total size of the twice-line-frequency energy buffering capacitance. The small additional loss of the MEB can be compensated by the improved efficiency of the dc-ac converter stage, leading to a higher overall system efficiency. The MEB architecture can be implemented in a variety of manners, allowing different design tradeoffs to be made. A prototype microinverter incorporating an MEB, designed for 27 to 38 V dc input voltage, 230-V rms ac output voltage, and rated for a line cycle average power of 70 W, has been built and tested in a grid-connected mode. It is shown that the MEB can successfully enhance the performance of a single-phase grid-interfaced microinverter by increasing its efficiency and reducing the total size of the twice-line-frequency energy buffering capacitance. [ABSTRACT FROM AUTHOR]

In this paper, a new voltage source converter for medium voltage applications is presented which can operate over a wide range of voltages (2.4-7.2 kV) without the need for connecting the power semiconductor in series. The operation of the proposed converter is studied and analyzed. In order to control the proposed converter, a space-vector modulation (SVM) strategy with redundant switching states has been proposed. SVM usually has redundant switching state anyways. What is the main point we are trying to get to? These redundant switching states help to control the output voltage and balance voltages of the flying capacitors in the proposed converter. The performance of the converter under different operating conditions is investigated in MATLAB/Simulink environment. The feasibility of the proposed converter is evaluated experimentally on a 5-kVA prototype. [ABSTRACT FROM AUTHOR]

Nowadays, use of multilevel inverters in high-power applications clearly can be seen. High quality and lower distortion of the output voltage and low blocking voltage of semiconductor switches are being presented as the major privileges of the multilevel inverter compared to the traditional voltage source inverter. In this paper, a new topology of multilevel inverter is proposed as fundamental block. The proposed topology is generalized using series connection of the fundamental blocks. The proposed multilevel inverter has been analyzed in both symmetric and asymmetric operation modes. A great perfection in voltage levels number with minimum switching devices has been obtained in both symmetric and asymmetric modes. Thereafter, a detailed study of losses and peak inverse voltage (PIV) of the proposed multilevel inverter is given. Also, in continuation, a comparison between the proposed topology and the traditional one and a recently developed topology is carried out. Finally, a computer simulation using MATLAB/Simulink is presented and a laboratory prototype implementation verifies the results. [ABSTRACT FROM AUTHOR]

In this paper, a model-predictive control of medium voltage, grid-tied four-level diode-clamped inverter for use in high-power wind energy conversion systems is presented. The control objectives such as regulation of net dc-link voltage, reactive power generation to meet the grid operator request, dc-link capacitor voltages balancing, and switching frequency minimization are included in the cost function. The latter objective is an important requirement for high-power converters, and this has been achieved without any modifications to the software or hardware configuration. The future behavior of the grid currents and dc-link voltages is predicted for all the possible switching states using the discrete-time model of the inverter, dc-link, inductive filter, and grid. The switching state that minimizes the cost function has been chosen and applied to the inverter directly. During different operating conditions, the switching frequency is regulated between 750 and 850 Hz with the help of a lookup-table-based weighting factor, and thus, the proposed methodology appears as a promising tool to control the high-power grid-tied inverters. The results obtained through the MATLAB simulations on 4 MVA/4000 V system and dSPACE DS1103-based experiments on 5 kW/208 V prototype are in a close relationship and thus validate the proposed control strategy. [ABSTRACT FROM AUTHOR]

This paper proposed an improved phase disposition pulse width modulation (PDPWM) for a modular multilevel inverter which is used for Photovoltaic grid connection. This new modulation method is based on selective virtual loop mapping, to achieve dynamic capacitor voltage balance without the help of an extra compensation signal. The concept of virtual submodule (VSM) is first established, and by changing the loop mapping relationships between the VSMs and the real submodules, the voltages of the upper/lower arm's capacitors can be well balanced. This method does not requiring sorting voltages from highest to lowest, and just identifies the MIN and MAX capacitor voltage's index which makes it suitable for a modular multilevel converter with a large number of submodules in one arm. Compared to carrier phase-shifted PWM (CPSPWM), this method is more easily to be realized in field-programmable gate array and has much stronger dynamic regulation ability, and is conducive to the control of circulating current. Its feasibility and validity have been verified by simulations and experiments. [ABSTRACT FROM AUTHOR]

Ideally, the inner (the upper or lower arm) current of a modular multilevel converter (MMC) is ideally assumed to be the sum of a dc component and an ac component of the fundamental frequency. However, as ac current flows through the submodule (SM) capacitors, the capacitor voltages fluctuate with time. Consequently, the inner current is usually distorted and the peak/RMS value of it is increased compared with the theoretical value. The increased currents will increase power losses and may threaten the safe operation of the power devices and capacitors. This paper proposes a closed-loop method for suppression of the inner current in an MMC. This method is very simple and is implemented in a stationary frame, and no harmonic extraction algorithm is needed. Hence, it can be applied to single-phase or three-phase MMCs. Besides, this method does not influence the balancing of the SM capacitor voltages. Simulation and experimental results show that the proposed method can suppress the peak and RMS values of the inner currents dramatically. [ABSTRACT FROM AUTHOR]

It is important to improve the overall efficiency of a photovoltaic (PV) inverter when it is connected to the grid. Fundamentally, the conversion efficiency from dc to ac power of an inverter is important. However, in the presence of partial shading, maximum power point tracking (MPPT) on PV modules is more important than the conversion efficiency. In this paper, a new control method for a three-level inverter is proposed. With the proposed method, each dc-link voltage of the three-level inverter can be asymmetrically regulated. When PV modules are split into two and each split module is connected to the respective dc-link capacitors of the inverter, the asymmetric control can be helpful because separate MPPTs are possible. The effectiveness of the proposed method was examined through experiments with a T-type three-level inverter, where each dc-link capacitor was supplied by a PV simulator emulating two separate PV modules under different shading conditions. [ABSTRACT FROM AUTHOR]

Renewable power systems as distributed generation units often experience big changes in the inverter input voltage due to fluctuations of energy resources. Often, a front-end boost converter is added to step up the dc voltage when the energy resources are at a weak point. However, when a very high boost gain is demanded, the duty cycle may come to its extreme, and large duty cycles causes serious reverse-recovery problems. This paper proposes a novel single-stage boost-type inverter with coupled inductor. By introducing impedance network, including coupled inductor, into the three-phase bridge inverter, and adjusting the previously forbidden shoot-through zero state, the converter can realize a high boost gain and output a stable ac voltage. The single-stage operation of the converter may lead to improved reliability and higher efficiency. Theoretical analysis, simulation, and experimental results are presented to verify good performance. [ABSTRACT FROM AUTHOR]

The main drawback of line-interactive and passive standby uninterruptible power supplies (UPS) is the transfer time when changing from normal mode of operation to battery mode of operation. During this time, the critical loads protected by the UPS are under the influence of the grid disturbance that forced the mode change. On the other hand, equipment protected by a double-conversion UPS is never affected by disturbance in the mains. Unfortunately, the efficiency of this topology is lower and its size and cost are considerably higher. Hence, the elimination of the transfer process between modes in line-interactive and passive standby UPSs would make them more competitive than double-conversion UPSs in many situations. In this paper, a method for eliminating the transfer time is proposed. It is based on a half-bridge inverter with a hysteretic controller whose output voltage is only applied to the load during the transfer time. Considering the random nature of the grid failures and the short duration of the transfer time, the design and selection of the components are nothing but standard. This also leads to a nonstandard hysteretic controller that needs to be fully analyzed. Experimental results are provided for a 750-W line-interactive UPS whose transfer time of 4 ms was eliminated by the proposed system. [ABSTRACT FROM AUTHOR]

This paper proposes an indirect current control algorithm for seamless transfer of three-phase utility-interactive voltage source inverters. With the proposed method the inverter is able to provide critical loads with a stable and seamless voltage during the whole transition period including both clearing time and control mode change. The LCL filter design which is suitable for the indirect current control is also proposed to meet the harmonic limits. The proposed control method is validated through simulation and experiment. [ABSTRACT FROM AUTHOR]

This paper proposes a new high step-up dc–dc converter designed especially for regulating the dc interface between various microsources and a dc–ac inverter to electricity grid. The figuration of the proposed converter is a quadratic boost converter with the coupled inductor in the second boost converter. The converter achieves high step-up voltage gain with appropriate duty ratio and low voltage stress on the power switch. Additionally, the energy stored in the leakage inductor of the coupled inductor can be recycled to the output capacitor. The operating principles and steady-state analyses of continuous-conduction mode and boundary-conduction mode are discussed in detail. To verify the performance of the proposed converter, a 280-W prototype sample is implemented with an input voltage range of 20–40 V and an output voltage of up to 400 V. The upmost efficiency of 93.3% is reached with high-line input; on the other hand, the full-load efficiency remains at 89.3% during low-line input. [ABSTRACT FROM AUTHOR]

A novel H-bridge multilevel pulsewidth modulation converter topology based on a series connection of a high-voltage diode-clamped inverter and a low-voltage conventional inverter is proposed in this paper. A dc link voltage arrangement for the new hybrid and asymmetric solution is presented to have a maximum number of output voltage levels by preserving the adjacent switching vectors between voltage levels. Hence, a 15-level hybrid converter can be attained with a minimum number of power components. A comparative study has been carried out to present high performance of the proposed configuration to approach a very low total harmonic distortion of voltage and current, which leads to the possible elimination of the output filter. Regarding the proposed configuration, a new cascade inverter is verified by cascading an asymmetrical diode-clamped inverter, in which 19 levels can be synthesized in output voltage with the same number of components. To balance the dc link capacitor voltages for the maximum output voltage resolution as well as synthesize asymmetrical dc link combination, a new multi-output boost converter is utilized at the dc link voltage of a seven-level H-bridge diode-clamped inverter. Simulation and hardware results based on different modulations are presented to confirm the validity of the proposed approach to achieve a high-quality output voltage. [ABSTRACT FROM PUBLISHER]

The output voltage quality of some of the single-phase multilevel inverters can be improved when their dc-link voltages are regulated asymmetrically. Symmetrical and asymmetrical multilevel diode-clamped inverters have the problem of dc-link capacitor voltage balancing, especially when power factor of the load is close to unity. In this paper, a new single-inductor multi-output dc/dc converter is proposed that can control the dc-link voltages of a single-phase diode-clamped inverter asymmetrically to achieve voltage quality enhancement. The circuit of the presented converter is explained and the main equations are developed. A control strategy is proposed and explained in details. To validate the versatility of the proposed combination of the suggested dc–dc converter and the asymmetrical four-level diode-clamped inverter (ADCI), simulations and experiments have been directed. It is concluded that the proposed combination of introduced multioutput dc–dc converter and single-phase ADCI is a good candidate for power conversion in residential photovoltaic (PV) utilization. [ABSTRACT FROM PUBLISHER]