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This paper proposes a high-power-density and reliable inverter topology, which transfers the maximum power of a PV array to the load in one power conversion stage. The single-stage power conversion, along with the soft-switching capability of the proposed three-phase PV inverter promises high efficiency at all operating points. Instead of a capacitive dc link that decouples the dc–dc converter and the voltage source inverter in traditional two-stage PV inverters, a high-frequency capacitive ac link is employed in the proposed inverter, which enables exploiting a very small film capacitor, rather than a bulky electrolytic capacitor, for transferring power. Eliminating electrolytic capacitors prolongs the lifetime of this inverter. Considering the long lifetime of PV modules, this feature is of high importance in PV applications. The high-frequency ac link also allows using high-frequency transformers for providing galvanic isolation. Therefore, this inverter is expected to have a very high power density. This paper presents principles of the operation and control, design, and analysis of this inverter, and verifies the performance of the inverter through two prototypes: a 2-kW Si-based prototype and a 2-kW SiC-based prototype operating at different switching frequencies. [ABSTRACT FROM AUTHOR]

This paper introduces a new bidirectional single-phase inverter topology. The proposed topology has three ports: a dc port, an ac port, and a ripple port. The ac and dc ports are bidirectional to support rectifier or inverter operation. A small inductor, which is of alternating current, exchanges power between different ports of the single-phase system. The proposed topology is capable of accomplishing voltage step-up or step-down, suppressing the ripple power, and performing inversion or rectification operation in one stage of power conversion. The proposed configuration offers an active decoupling function, which not only eliminates the double-frequency ripple power at the dc port but also achieves minimum capacitance requirements to minimize the size of the decoupling capacitor. This facilitates the use of a very small thin-film capacitor, which offers a much longer life-cycle and higher reliability compared with a bulky electrolytic capacitor. A control approach is also developed to regulate the dc-port and ac-port currents and manage the ripple power through proper distribution of power between each port. Moreover, a very small capacitor can be placed in parallel with the inductor to reinforce the proposed configuration with soft-switching operation, which enhances the overall efficiency and minimizes the voltage stress over the semiconductor devices. This converter is capable of accommodating an arbitrary number of dc or single-phase ac sources and/or loads configuring a multiple-input multiple-output inverter without introducing any additional passive elements or sacrificing the performance of the inverter. The primary focus of this paper is dc-to-ac conversion mode of operation, in spite of the fact that it can easily be configured to serve as a rectifier. Experimental and simulation results are presented to validate the operation of the proposed topology and its control strategy. [ABSTRACT FROM AUTHOR]

This paper presents a unified framework for the modeling, analysis, and design of load-independent Class E and Class EF inverters and rectifiers. These circuits are able to maintain zero-voltage switching and, hence, high efficiency for a wide load range without requiring tuning or use of a feedback loop, and to simultaneously achieve a constant amplitude ac voltage or current in inversion and a constant dc output voltage or current in rectification. As switching frequencies are gradually stepping into the megahertz (MHz) region with the use of wide-bandgap (WBG) devices such as GaN and SiC, switching loss, implementing fast control loops, and current sensing become a challenge, which load-independent operation is able to address, thus allowing exploitation of the high-frequency capability of WBG devices. The traditional Class E and EF topologies are first presented, and the conditions for load-independent operation are derived mathematically; then, a thorough analytical characterization of the circuit performance is carried out in terms of voltage and current stresses and the power-output capability. From this, design contours and tables are presented to enable the rapid implementation of these converters given particular power and load requirements. Three different design examples are used to showcase the capability of these converters in typical MHz power conversion applications using the design equations and methods presented in this paper. The design examples are chosen toward enabling efficient and high-power-density MHz converters for wireless power transfer (WPT) applications and dc/dc conversion. Specifically, a 150-W 13.56-MHz Class EF inverter for WPT, a 150-W 10-MHz miniature Class E boost converter, and a lightweight wirelessly powered drone using a 20-W 13.56-MHz Class E synchronous rectifier have been designed and are presented here. [ABSTRACT FROM AUTHOR]

To support the development of high-frequency ac microgrids in terms of compact design, high-voltage gain and low total harmonic distortion (THD), a buck–boost dual-leg-integrated step-up inverter is proposed in this paper. The inverter is formed by integrating a buck–boost converter into a conventional single-phase full-bridge inverter by sharing the upper switch and the body diode of the lower switch in both bridge-legs. Consequently, the component count is significantly reduced over the step-up inverter counterparts. In addition, to address the drawbacks of hybrid modulation methods adopted by existing dual-leg-integrated inverters, such as double-variable control, and high THD of output voltage/current at high input voltage and heavy load conditions, unipolar frequency doubling sinusoidal pulse width modulation scheme is adopted in this inverter. As a result, the modulation ratio M becomes the only control variable to regulate the output voltage/current and the control is simplified. The THD of the proposed inverter output can remain low throughout the entire input voltage range and load power range. This paper presents the topology derivation procedure, operation principle, and steady-state characteristics of the proposed inverter. To validate the effectiveness of theory, experimental results of a 400 W hardware prototype, where the output voltage frequency is at 500 Hz, are reported. [ABSTRACT FROM PUBLISHER]

In order to provide high and extendable power levels for inductive power transfer (IPT) system, a parallel multi-inverter system based on modular inverter is presented. Various power requirements can be implemented by an adjustment of the number of paralleled inverters, which provides a high modularity. A master−slave scheme is employed for the switching-driver signals of parallel inverters, where one acts as a leader while others act as followers. Despite the master−slave scheme, the proposed circuit topology has natural robustness because of the equality in terms of the hardware configuration of each modular inverter. For proper parameters, the output phase (current lagging corresponding voltage) of an inverter is lower than the average of output phase of all inverters, when its output voltage lags behind others, and vice versa. Based on this approach, PI controllers are designed to implement phase synchronization for output voltages of all inverters. An IPT prototype supplied by the proposed parallel multi-inverter with three inverters was designed, built, and tested. Experiments show that the proposed parallel multi-inverter system has not only good circulating current suppression capacity but also excellent performance of phase synchronization. The maximum dc−dc efficiency was 94% at a 35.1 kW receiving power. This paper is accompanied by a Matlab/Simulink file demonstrating phase synchronization control. [ABSTRACT FROM AUTHOR]

This paper contains a comparison between three topologies of a three-phase two-level inverter: A quasi-Z-source inverter (qZSI), a voltage-source inverter with a boost converter and a voltage-source inverter with an interleaved boost converter. experimental results obtained from laboratory tests of equivalent 6-kW 100-kHz inverters based on SiC mosfets and Schottky diodes are provided. The following parameters are compared: Quality of input inductor current and output phase voltage as well as total power losses in the inverters. The results for these parameters are obtained for input voltage ranging from 325 V to almost 600 V (where feasible), for two sets of equivalent modulation methods (two regular methods and two reduced-loss methods), for a couple of characteristic values of deadtime and for the operation both at the maximum value of modulation index and at equal values of voltage across the inverter bridge. Results of the experiments show that the qZSI topology may, at certain conditions, surpass the traditional two-stage inverter topologies in the areas of input inductor current quality, output voltage quality and also power losses (at high values of input voltage). What is needed to obtain that is a careful examination of operating conditions, applied modulation method and deadtime value. [ABSTRACT FROM AUTHOR]

There have been several advanced topologies proposed by the community for micro-inverter applications. However, many such applications suffer from unwanted second-order harmonic current ripple at dc input. Moreover, in the absence of suitable passive filter or ripple compensator, the second-order harmonics ripple may propagate into the dc source. This results in several problems to the system, related to system efficiency, life, cost, size, reliability, and stability. This paper proposes an adaptive sliding-mode controller to shape the output impedance of the boost-circuit of quasi-switched boost inverter such that the propagation of the ripple from dc link to the dc-input source is resisted. The quasi-switched boost inverter is one of the advanced and suitable topologies for the micro-inverter applications. The adaptive nature of the proposed controller improves the transient performance of the system at the line–load transients unlike some existing solutions, which affects dynamics adversely to achieve ripple mitigation objective. The controller ensures voltage regulation within ${5\%}$ at dc link. The proposed control technique is verified using a lab-prototype of 500 W quasi-switched boost inverter. [ABSTRACT FROM AUTHOR]

In this paper, a technique of variable-turns-ratio high-frequency link inverter is proposed to provide a simple method to achieve multi-level outputs for the isolated single-stage high-frequency link inverters. By dynamically adjusting the turns ratio of transformer, five-level (±2, ±1, and 0) outputs can be achieved to improve the current quality. The single transformer, compared with the existing two-level high-frequency link inverter, is employed in the structure and only a few auxiliary devices are added, where the added circuit operates at low frequency and the power density is refined. Based on this technique, the single-stage active clamped forward grid-connected inverter with variable turns ratio is taken as an example to better illustrate the analysis process and a 1000-W prototype is designed and established to evaluate the output performance. The conducted simulation results and prototype tests verify the feasibility of the proposed single-stage variable-turns-ratio high-frequency link grid-connected inverter. [ABSTRACT FROM AUTHOR]

Impedance-source networks are an increasingly popular solution in power converter applications, especially in single-stage buck–boost power conversion to avoid additional front-end dc–dc power converters. In the survey papers published, no analytical comparisons of different topologies have been described, which makes it difficult to choose the best option. Thus, the aim of this paper is to present a comprehensive analytical comparison of the impedance-source-based buck–boost inverters in terms of passive component count and semiconductor stress. Based on the waveform of the input current, i.e., with or without a transformer, and with or without inductor coupling, the impedance-source converters are classified. The main criterion in our comprehensive comparison is the energy stored in the passive elements, which is considered both under constant and predefined high frequency current ripple in the inductors and the voltage ripple across the capacitors. Two-level and multilevel solutions are described. The conclusions provide a “one-stop” information source and a selection guide of impedance-source-based buck–boost inverters for different applications. [ABSTRACT FROM PUBLISHER]

In several electrical dc–ac power conversions, the ac output voltage is higher than the input voltage. If a voltage-source inverter (VSI) is used, then an additional dc–dc boosting stage is required to overcome the step-down VSI limitations. Recently, several impedance source converters are gaining higher attentions [1], [2], as they are able to provide buck-boost capability in a single conversion stage. This paper proposes the merging of the boost stage and the VSI stage in a single stage dc–ac power conversion, denoted as split-source inverter (SSI). The proposed topology requires the same number of active switches of the VSI, three additional diodes, and the same eight states of a conventional space-vector modulation. It also shows some merits compared to Z-source inverters, especially in terms of reduced switch voltage stress for voltage gains higher than 1.15. This paper presents the analysis of the SSI and compares different modulation schemes. Moreover, it presents a modified modulation scheme to eliminate the low frequency ripple in the input current and the voltage across the inverter bridge. The proposed analysis has been verified by simulation and experimental results on a 2.0-kW prototype. [ABSTRACT FROM PUBLISHER]

In this paper, a nonisolated buck-boost single-inductor multiple-output (SIMO) dc–ac inverter for driving multiple independent high-frequency ac outputs of medium power is proposed. Compared with traditional bridge-type inverters, the proposed buck-boost SIMO inverter achieves 1) a smaller component count, 2) fully independent power control of its outputs, 3) better scalability in increasing the number of ac output channels, and 4) higher power efficiency. Operating in pseudo-continuous conduction mode, the rated power of each output channel of this inverter can be high while attaining zero cross regulation. The scalability factor of the proposed inverter is formally investigated and the theoretical maximum number of ac outputs is analytically derived. The targeted application of this SIMO-based inverter is for driving multiple transmitter coils to realize versatile multidevice medium-power wireless power transfer. A hardware prototype of a single-inductor three-output buck-boost inverter delivering a medium power of 8.4 W per output channel has been constructed. It is experimentally verified that precise and independent current regulation of individual transmitter coil is achievable with the proposed inverter. [ABSTRACT FROM AUTHOR]

The paper presents a new transformerless single-phase single-stage buck–boost grid-connected voltage source inverter (VSI) topology. The topology can achieve efficient power conversion with a wide input voltage range, number of magnetic devices reduction and low leakage current. The proposed VSI topology consists of high frequency semiconductors for shaping inductor currents, and low frequency semiconductors to form grid CL filter structure for different conditions. This CL filter uses the same buck–boost inductor, thus no additional line frequency inductor is required. Besides, common mode voltage, a main problem of transformerless grid-connected VSI, is mitigated, since the capacitor in the CL filter clamps the voltage between the grid and the bus terminal. The performance of the proposed VSI is experimentally verified. The results show that the proposed VSI guarantees sinusoidal output current and wide input voltage range, and has a good agreement with the theoretical findings. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

Cascaded multilevel inverter (CMI) is one of the most popular multilevel inverter topologies. This topology is synthesized with some series-connected identical H-bridge cells. CMI requires several isolated dc sources which brings about some difficulties when dealing with this type of inverter. This paper addresses the problem by proposing a switched-capacitor (SC)-based CMI. The proposed topology, which is referred to as switched-capacitor single-source CMI (SCSS-CMI), makes use of some capacitors instead of the dc sources. Hence, it requires only one dc source to charge the employed capacitors. Usually, the capacitor charging process in a SC cell is companied by some current spikes which extremely harm the charging switch and the capacitor. The capacitors in SCSS-CMI are charged through a simple auxiliary circuit which eradicates the mentioned current spikes and provides zero-current switching condition for the charging switch. A computer-aid simulated model along with a laboratory-built prototype is adopted to assess the performances of SCSS-CMI, under different conditions. [ABSTRACT FROM AUTHOR]

The double-sided LCC topology provides a highly efficient compensation method for electric vehicle (EV) wireless charging systems. However, the two compensated coils occupy a large volume. In order to address the volume increase as well as to be compatible with unipolar coil structures, which are widely applied in EV wireless charging systems, an integration method is introduced in this paper. Aspect ratios of the compensated coils are studied to minimize the respective coupling effect. With the proposed integration method, the extra coupling coefficients are either eliminated or decreased to a negligible level. A wireless charging system with the proposed integration method is built and the experimental results show that the system resonates at 85 kHz and delivers 3.09 kW with a dc–dc efficiency of 95.49% at an air gap of 150 mm. Furthermore, a comparison with the integration method into bipolar coil structures is presented and the results demonstrate that the system with the proposed integration method is more immune to front-to-rear and vertical misalignments. [ABSTRACT FROM AUTHOR]

The current source converter (CSC) has been popular in high-power medium-voltage applications. To increase the system power capacity and reduce the output harmonics, parallel connection of CSCs with multilevel current output is a practical approach. There are mainly two types of parallel based configurations. The structure with an independent dc link for each paralleled CSC can be regarded as the first configuration, where the dc current flowing into each CSC can be controlled from the rectifier side independently. The second type is constructed with only one current source rectifier (CSR) on the grid side and paralleled current source inverters (CSIs) on the load side, which could potentially reduce the cost and size of the system. However, with a common dc source, the dc current for each CSC should be carefully controlled with proper modulation design. At the same time, the common-mode voltage (CMV), which increases the motor line-to-ground voltage and causes additional stress to the insulation system, should also be suppressed. In this paper, with a focus on the shared dc-link structure, we thoroughly analyze the dc-link current flow and common-mode loop circuit. We propose a multilevel modulation strategy of the parallel CSI system considering the requirement of dc current balancing and CMV reduction to improve the overall system performance. The effectiveness of the proposed method is verified by both simulation and experiment in a transformerless parallel CSC system. [ABSTRACT FROM AUTHOR]

A quasi-Z-source inverter (qZSI) could achieve buck/boost conversion as well as dc to ac inversion in a single-stage topology, which reduces the structure cost when compared to a traditional two-stage inverter. Specifically, the buck/boost conversion was accomplished via shoot-through state which took place across all phase legs of the inverter. In this paper, instead of using traditional dual-loop-based proportional integral (PI)-P controller, a type 2 based closed-loop voltage controller with novel dc-link voltage reference algorithm was proposed to fulfill the dc-link voltage tracking control of a single-phase qZSI regardless of any loading conditions, without the need of inner inductor current loop. A dc–ac boost inverter with similar circuit parameters as a qZSI was used to verify the flexibility of the proposed controller. The dynamic and transient performances of the proposed controller were investigated to evaluate its superiority against the aforementioned conventional controller. The integrated proposed controller and qZSI topology was then employed in static synchronous compensator application to perform reactive power compensation at the point of common coupling. The effectiveness of the proposed approach was verified through both simulation and experimental studies. [ABSTRACT FROM AUTHOR]

This paper introduces a high-gain single-stage boosting inverter (SSBI) for alternative energy generation. As compared to the traditional two-stage approach, the SSBI has a simpler topology and a lower component count. One cycle control was employed to generate ac voltage output. This paper presents theoretical analysis, simulation and experimental results obtained from a 200 W prototype. The experimental results reveal that the proposed SSBI can achieve high dc input voltage boosting, good dc–ac power decoupling, good quality of ac output waveform, and good conversion efficiency. [ABSTRACT FROM AUTHOR]

The four-switch three-phase (FSTP) inverter has been proposed as an innovative inverter design to reduce the cost, complexity, size, and switching losses of the dc–ac conversion system. Traditional FSTP inverter usually operates at half the dc input voltage; hence, the output line voltage cannot exceed this value. This paper proposes a novel design for the FSTP inverter based on the topology of the single-ended primary-inductance converter (SEPIC). The proposed topology provides pure sinusoidal output voltages with no need for output filter. Compared to traditional FSTP inverter, the proposed FSTP SEPIC inverter improves the voltage utilization factor of the input dc supply, where the proposed topology provides higher output line voltage which can be extended up to the full value of the dc input voltage. The integral sliding-mode control is used with the proposed topology to optimize its dynamics and to ensure robustness of the system during different operating conditions. Derivation of the equations describing the parameters design, components ratings, and the operation of the proposed SEPIC inverter is presented in this paper. Simulation model and experimental setup are used to validate the proposed concept. Simulations and experimental results show the effectiveness of the proposed inverter. [ABSTRACT FROM AUTHOR]

Leakage current minimization is one of the most important considerations in transformerless photovoltaic (PV) inverters. In the past, various transformerless PV inverter topologies have been introduced, with leakage current minimized by the means of galvanic isolation and common-mode voltage (CMV) clamping. The galvanic isolation can be achieved via dc-decoupling or ac-decoupling, for isolation on the dc- or ac-side of the inverter, respectively. It has been shown that the latter provides lower losses due to the reduced switch count in conduction path. Nevertheless, leakage current cannot be simply eliminated by galvanic isolation and modulation techniques, due to the presence of switches' junction capacitances and resonant circuit effects. Hence, CMV clamping is used in some topologies to completely eliminate the leakage current. In this paper, several recently proposed transformerless PV inverters with different galvanic isolation methods and CMV clamping technique are analyzed and compared. A simple modified H-bridge zero-voltage state rectifier is also proposed, to combine the benefits of the low-loss ac-decoupling method and the complete leakage current elimination of the CMV clamping method. The performances of different topologies, in terms of CMV, leakage current, total harmonic distortion, losses and efficiencies are compared. The analyses are done theoretically and via simulation studies, and further validated with experimental results. This paper is helpful for the researchers to choose the appropriate topology for transformerless PV applications and to provide the design principles in terms of common-mode behavior and efficiency. [ABSTRACT FROM AUTHOR]

Generally, single-stage buck–boost inverters consist of distinct circuits operating individually in buck/boost or positive/negative modes, the latter definitely leading to crossover distortion in the output current. This paper proposes a switching strategy that changes the bimodal operation of a single-stage buck–boost topology to a single-mode inverter. This is due to the consequent voltage gain that ensures that the output voltage polarity, apart from its magnitude, is an exclusive function of the duty ratio. Operational principle and salient hardware design are explained with the help of equivalent circuits. Details about the dynamic model are presented, based on which controller design is carried out for both stand-alone and grid-connected operation. Experimental results obtained from a 300-W, 110-V laboratory prototype are presented to validate the performance of the proposed switching strategy. [ABSTRACT FROM PUBLISHER]

In this paper, a nonisolated dc−ac inverter topology, which enables a true single-stage direct conversion from a single dc input supply to multiple ac output power sources by using only one inductor in the power stage, is proposed. Compared with the conventional multiple-output parallel half-bridge or full-bridge inverters, the proposed single-stage single-inductor multiple-output (SIMO) inverter topology achieves a smaller number of inductors and power switches, high power density, scalability to multiple ac outputs, and independent power controllability for each ac output. A useful application of the proposed SIMO inverter is to drive an array of transmitting coils simultaneously for wireless power transfer applications. An experimental prototype has been developed to demonstrate the effectiveness of a single-inductor three-output boost-derived inverter without cross regulation. Experimental results show that precise and independent peak voltage regulation of each individual sinusoidal ac output is attainable with the proposed SIMO inverter. [ABSTRACT FROM AUTHOR]

High-order filters (HO-filters) such as LCL-LC-filters have recently drawn attention to their small size and better attenuation to switching harmonics than LCL -filters for three-phase inverter grid interfaces. Hybrid damping that combines passive damping and active damping is an effective method to suppress HO-filter resonances. However, due to the high-order characteristic of the system, the tuning procedure for the parameters of hybrid damping is complicated. Hence, an equivalent circuit analysis method is proposed in this paper to accurately simplify the model of the HO-filter. Based on this, a systematic step-by-step design method for HO-filter-type grid-connected inverters with hybrid damping has been proposed. The passive losses, effects of equivalent series resistances (ESRs) and robustness against grid impedance variation have been studied. Compared with existing design procedures, the proposed method makes the hybrid damping more reliable by locating appropriate position for closed-loop resonant poles. Experimental results verify the proposed systematic design procedure. [ABSTRACT FROM AUTHOR]

A CLTCL resonant dc-dc converter is proposed in this paper. Through the dual-transformer architecture, the resonant characteristic of the converter alters and contributes to a wide input voltage range and a greatly broadened output voltage range from zero to the nominal. The transformer leakage inductors also participate in the resonating process, which eliminates their side effects on the conversion performance. Moreover, a simple and effective design method for converters with multiple resonant components is used to guide the resonant parameter design with the assistance of the MATLAB program. Soft switching for both turn-on and turn-off processes of all the inverter and rectifier switches is acquired, and the proposed converter, therefore, achieves lower switching losses among a wide load scope. In the end, a 1-kW prototype with a peak efficiency of 97.3% is fabricated in the laboratory to verify the working principle and design effect of the CLTCL converter. [ABSTRACT FROM PUBLISHER]

In this paper, a dc to ac converter with the ability of voltage increasing is presented. This inverter is designed in a way that just one dc source is used. Also, by using power storage technique and with combining charged capacitors and dc source in series form, output voltage levels can be increased. This inverter is in a modular structure and has the ability of capacitor's voltage self-balancing. H-bridge inverter was not used at the end of the proposed converter and all elements tolerate a voltage stress equal to the amount of input dc source. This leads to remarkable decrease of total standing voltage and peak inverse voltage. Other advantage of the proposed inverter is its potentiality of performance in high-frequency applications. The modular form of the proposed inverter provides the potentiality of extension to higher voltage levels and eases the maintenance. Moreover, considering to the fact that the stress of all components of the suggested inverter is equal to the input source, the performance in high voltage is added to the characteristics of the proposed inverter. The nine-level structure of the proposed inverter is simulated and laboratory test is carried out for the verification of its performance. [ABSTRACT FROM PUBLISHER]

This paper deals with a new family of high boost voltage inverters that improve upon the conventional trans-Z-source and trans-quasi-Z-source inverters. The improved trans-Z-source inverter provides continuous input current and a higher boost voltage inversion capability. In addition, the improved inverter can suppress resonant current at startup, which might destroy the device. In comparison to the conventional trans-Z-source/-trans-quasi-Z-source inverters, for the same transformer turn ratio and input and output voltages, the improved inverter has a higher modulation index with reduced voltage stress on the dc link, lower current stress flow on the transformer windings and diode, and lower input current ripple. In order to produce the same input and output voltage with the same modulation index, the improved inverter uses a lower transformer turn ratio compared to the conventional inverters. Thus, the size and weight of the transformer in the improved inverter can be reduced. This paper presents the operating principles, analysis and simulation results, and compares them with those of the conventional trans-Z-source/-quasi-Z-source inverters. To verify the performance of the improved converter, a laboratory prototype was constructed based on a TMS320F2812 digital signal processor with 100 V dc input and 115 Vrms output voltage. [ABSTRACT FROM AUTHOR]

Switched boost inverter (SBI) is a single-stage power converter derived from Inverse Watkins Johnson topology. Unlike the traditional buck-type voltage source inverter (VSI), the SBI can produce an ac output voltage that is either greater or less than the available dc input voltage. Also, the SBI exhibits better electromagnetic interference noise immunity when compared to the VSI, which enables compact design of the power converter. Another advantage of SBI is that it can supply both dc and ac loads simultaneously from a single dc input. These features make the SBI suitable for dc nanogrid applications. In this paper, the SBI is proposed as a power electronic interface in dc nanogrid. The structure and advantages of the proposed SBI-based nanogrid are discussed in detail. This paper also presents a dq synchronous-reference-frame-based controller for SBI, which regulates both dc and ac bus voltages of the nanogrid to their respective reference values under steady state as well as under dynamic load variation in the nanogrid. The control system of SBI has been experimentally validated using a 0.5-kW laboratory prototype of the SBI supplying both dc and ac loads simultaneously, and the relevant experimental results are given in this paper. The low cross regulation and the dynamic performance of the control system have also been verified experimentally for a 20% step change in either dc or ac load of SBI. These experimental results confirm the suitability of the SBI and its closed-loop control strategy for dc nanogrid applications. [ABSTRACT FROM AUTHOR]

This paper is concerned with the design and control of a three-phase voltage source grid-connected interleaved inverter. This topology enables the use of low-current devices capable of switching at high frequency, which together with the ripple cancelation feature reduces the size of the output filter and the inverter considerably compared to an equivalent classical two-level voltage source inverter with an LCL output filter using high-current devices with considerably lower switching frequency. Due to its higher switching frequency and low-filter component values, the interleaved inverter also has a much higher bandwidth than the classical inverter, which improves grid voltage harmonics disturbance rejection and increases the speed of response of the inverter and its capability to ride through grid disturbance (e.g., voltage sags and swells). The paper discusses the selection of the number of channels and the filter component values of the interleaved inverter. The design of the digital control system is then discussed in detail. Simulation and practical results are presented to validate the design and demonstrate its capabilities. [ABSTRACT FROM AUTHOR]

This paper presents a new single-phase switched-coupled-inductor dc–ac inverter featuring higher voltage gain than the existing single-phase qZ-source and semi-Z-source inverters. Similar to the single-phase qZ-source and semi-Z-source inverters, the proposed inverter also has common grounds between the dc input and ac output voltages, which is beneficial especially for photovoltaic inverter systems. The inverter volume and maximum current flowing can be reduced significantly through the coupling of all inductors. A theoretical analysis of the proposed inverter is described and a 280-W experimental prototype is built to verify the performance of the inverter. [ABSTRACT FROM AUTHOR]

This paper proposes a single-phase, single-stage buck–boost inverter for photovoltaic (PV) systems. The presented topology has one common terminal in input and output ports which eliminates common mode leakage current problem in the grid-connected PV applications. Although it uses four switches, its operation is bimodal and only two switches receive high-frequency pulse width modulation signals in each mode. Its principle of operation is described in detail with the help of equivalent circuits. Its dynamic model is presented, based on which a bimodal controller is designed. Experimental results, in stand-alone and grid-connected mode, obtained with a 300-W laboratory prototype are presented to validate its performance. [ABSTRACT FROM AUTHOR]

Electronic ballasts are implemented for obtaining a high power factor and a good operation of the lamp; these goals are reached traditionally by implementing multiple stages. On the first stage, a unity power factor is obtained and the second stage is designed in order to feed properly the lamp. Different topologies have been studied not only for decreasing the number of employed controllers and stages, but also reducing the number of components and active switches. Electronic ballasts, which are based on the “Z” and “qZ” source inverters, are considered in this paper, where the proposed systems have a single stage. Two topologies are illustrated: the first one for the fluorescent lamps and the second one for the high intensity discharge lamps, where electronic ballasts with a high power factor are obtained. The operation, analysis, and experimental results are shown. [ABSTRACT FROM PUBLISHER]

This paper deals with a new family of high boost voltage inverters called switched-inductor quasi-Z-source inverters (SL-qZSIs). The proposed SL-qZSI is based on the well-known qZSI topology and adds only one inductor and three diodes. In comparison to the SL-ZSI, for the same input and output voltages, the proposed SL-qZSI provides continuous input current, a common ground with the dc source, reduced the passive component count, reduced voltage stress on capacitors, lower shoot-through current, and lower current stress on inductors and diodes. In addition, the proposed SL-qZSI can suppress inrush current at startup, which might destroy the devices. This paper presents the operating principles, analysis, and simulation results, and compares them with those of the SL-ZSI. To verify the performance of the proposed converter, a laboratory prototype was constructed with 48 Vdc input and an ac output line-to-line voltage of 120 Vrms. The simulation and experimental results verified that the converter has high step-up inversion ability. [ABSTRACT FROM AUTHOR]

In many modern energy conversion systems, a dc voltage, which is provided from a sustainable energy source or energy storage device, must be boosted and converted to an ac voltage with a fixed amplitude and frequency. In this paper, a switching pattern based on the concept of the conventional space-vector pulsewidth-modulated (SVPWM) technique is developed for single-stage, three-phase boost-inverters using the topology of current-source inverters. The six main switching states, and two zeros, with three switches conducting at any given instant in conventional SVPWM techniques are modified herein into three-charging states and six discharging states with only two switches conducting at any given instant. The charging states are necessary in order to boost the dc input voltage. The developed switching pattern was experimentally verified through a laboratory-scaled three-phase 500-W boost inverter and the results are presented in this paper. [ABSTRACT FROM AUTHOR]

This paper presents the analysis and design of a 30 MHz resonant SEPIC converter. With the conventional design method, tuning the amplitude and phase of the fundamental input voltage and current of the rectifier stage affect each other so that the design procedure is coupled seriously. Based on the circuit duality theory, an improved design method is proposed by redividing the resonant SEPIC topology to realize the independent tuning of the amplitude and phase. The implementation and loss analysis of the SEPIC with the new design are provided in details. Moreover, a novel structure of the PCB embedded inductors is introduced and the comparison among the discrete inductor, the planar spiral inductor and the four-layered solenoid PCB inductor is given in terms of the loss. A 15 V input, 25 W/28 V output/30 MHz SEPIC converter was built to verify the proposed design method and the benefit of the new structure of the PCB embedded inductors. The power density of the power stage is realized over 200 W/in3 and the efficiency is 82.5% at the rated output. The temperature of the proposed PCB embedded inductor is reduced from 102.6 °C (the discrete inductor) to 64.8 °C (a reduction of 37%) and the efficiency is improved 2% over the discrete solution at the full load. [ABSTRACT FROM AUTHOR]

A novel interleaved dual buck full-bridge three-level inverter (IDBFTI) is proposed for the grid-connected system in this paper. It retains the advantages of interleaved parallel technology for inverter as follows: reducing the output ripple current and the total harmonic distortion of the output current, increasing the power density of system, and reducing the current stress and thermal stress of power devices. Besides, it can solve the problem of zero sequence circulation current (ZSCC) in interleaved inverter system by the circuit structure, and it also has the advantages of no shoot-through problem, no reverse recovery of the body diode, and three-level output. The interleaved inverter circuits share two power-frequency switches, which are resized for each specific application, and it is easier to extend the system by improving current capability of the two switches. The working principle of this system is introduced in detail, and a 2-kW experimental prototype has been established and tested. Test results verify the principle and the excellent performance of IDBFTI. [ABSTRACT FROM PUBLISHER]

This paper proposes a new topology named the active-switched-capacitor/switched-inductor quasi-Z -source inverter (ASC/SL-qZSI), which is based on a traditional qZSI topology. Compared to other qZSI-based topologies under the same operating conditions, the proposed ASC/SL-qZSI provides higher boost ability, requires fewer passive components such as inductors and capacitors, and achieves lower voltage stress across the switching devices of the main inverter. Another advantage of the topology is its expandability. If a higher boosting rate is required, additional cells can easily be cascaded at the impedance network by adding one inductor and three diodes. Both the simulation studies and the experimental results obtained from a prototype built in the laboratory validate proper operation and performance of the proposed ASC/SL-qZSI. [ABSTRACT FROM AUTHOR]

The harmonic filter for a three-level neutral-point-clamped (NPC) grid interface converter is designed in this paper with good filtering performance and small component size. LCL topology is selected because of the attenuation and size tradeoff. The design of the inverter-side inductor L1 is emphasized due to its cost. A detailed inductor current ripple analysis is given based on the space vector modulation. The analysis derives the inductor volt-second and the maximum current ripple equation in line cycle. It also reveals the switching cycle current ripple distribution over a line cycle, with the consideration of power factor. The total system loss is calculated with different ripple current. Inductor L1 is determined by the loss and size tradeoff. Also the capacitor- and grid-side inductor L2 is designed based on attenuation requirement. Different damping circuits for LCL filter are compared and investigated in detail. The filter design is verified by both simulation and 200-kVA three-level NPC converter hardware. [ABSTRACT FROM AUTHOR]

The differential-mode Ćuk inverter (DMCI) is a single-stage inverter with low device count. It offers advantages over other topologies because of compactness, higher power density, and reduced cost. It is a promising topological configuration for renewable-/alternative-energy applications with isolated as well as nonisolated structures. The continuous modulation scheme (CMS), which was introduced originally for this inverter, activates all the modules of the DMCI. The new discontinuous modulation scheme (DMS) deactivates one module in each half line-cycle leading to discontinuous operation of modules. This paper outlines the DMS and a mechanism to realize it. The experimental open-loop and closed-loop results of the DMCI using CMS and DMS are provided along with a comparison of their performances. It is shown that, the DMS reduces the circulating power and hence mitigates the losses. The voltage ratings of the devices also are reduced with the DMS. In contrast, the CMS has wider linearity in its normalized dc-voltage gain and yields reduced harmonic distortion of the output voltage. For DMS, to achieve comparable linearity in normalized dc-voltage gain and distortion, harmonic compensation under closed-loop control is a pathway that has been demonstrated. [ABSTRACT FROM AUTHOR]

On the basis of the classical Z-source inverter (ZSI), this paper presents a novel ZSI which only contains inductors and diodes in Z-source network. The inverter uses a unique inductor and diode network for boosting its output voltage, provides a common ground for the dc source and inverter, and avoids the disadvantage causing by capacitor in the classical ZSI and SL-ZSI, especially in prohibiting the inrush current at startup and the resonance of Z-source capacitors and inductors. The inverter can increase the boost factor through adjusting shoot-through duty ratio and increasing the number of inductor. The working principle of the proposed ZSI and comparison with the classical ZSI and SL-ZSI are analyzed in detail. Simulation and experimental results are given to demonstrate the operation features of the inverter. [ABSTRACT FROM AUTHOR]

This paper proposes a simple circuit to recover the energy that otherwise would be lost due to the partial shadings on photovoltaic (PV) modules. Since the circuit can be readily retrofitted to an existing PV system, no modification on the central inverter is required. The main idea of the scheme is that, during partial shading, parts of the current from the nonshaded modules are harvested by an energy recovery circuit using power electronic switches and storage components. In doing so, the current of the PV string is maintained at the level generated by the shaded module. There is no need for the shaded module to be short-circuited; as a result, it can still actively produce output power (despite being partially shaded). To investigate the idea, the proposed circuit is retrofitted to a prototype PV system using eight modules. The partial shading conditions are emulated using a solar simulator with a controllable irradiance capability. The results are validated by a good agreement between the experimental and simulation works. [ABSTRACT FROM AUTHOR]

Module integrated converters (MICs) in single phase have witnessed recent market success due to unique features such as improved energy harvest, improved system efficiency, lower installation costs, plug-and-play operation, and enhanced flexibility and modularity. The MIC sector has grown from a niche market to mainstream, especially in the United States. Assuming further expansion of the MIC market, this paper presents the microinverter concept incorporated in large size photovoltaic (PV) installations such as megawatts (MW)-class solar farms where a three-phase ac connection is employed. A high-efficiency three-phase MIC with two-stage zero voltage switching (ZVS) operation for the grid-tied PV system is proposed which will reduce cost per watt, improve reliability, and increase scalability of MW-class solar farms through the development of new solar farm system architectures. The first stage consists of a high-efficiency full-bridge LLC resonant dc-dc converter which interfaces to the PV panel and produces a dc-link voltage. A center points iteration algorithm developed specifically for LLC resonant topologies is used to track the maximum power point of the PV panel. The second stage is comprised of a three-phase dc-ac inverter circuit which employs a simple soft-switching scheme without adding auxiliary components. The modeling and control strategy of this three-phase dc-ac inverter is described. Because the dc-link capacitor plays such an important role for dual-stage MIC, the capacitance calculation is given under type D voltage dip conditions. A 400-W prototype was built and tested. The overall peak efficiency of the prototype was measured and found to be 96% with 98.2% in the first stage and 98.3% in the second stage. [ABSTRACT FROM AUTHOR]

In this paper, a single-phase, single-stage current source inverter-based photovoltaic system for grid connection is proposed. The system utilizes transformer-less single-stage conversion for tracking the maximum power point and interfacing the photovoltaic arrays to the grid. The maximum power point is maintained with a fuzzy logic controller. A proportional-resonant controller is used to control the current injected into the grid. To improve the power quality and system efficiency, a double-tuned parallel resonant circuit is proposed to attenuate the second- and fourth- order harmonics at the inverter dc side. A modified carrier-based modulation technique for the current source inverter is proposed to magnetize the dc-link inductor by shorting one of the bridge converter legs after every active switching cycle. Simulation and practical results validate and confirm the dynamic performance and power quality of the proposed system. [ABSTRACT FROM AUTHOR]

This paper presents a comprehensive review of step-up single-phase non-isolated inverters suitable for ac-module applications. In order to compare the most feasible solutions of the reviewed topologies, a benchmark is set. This benchmark is based on a typical ac-module application considering the requirements for the solar panels and the grid. The selected solutions are designed and simulated complying with the benchmark obtaining passive and semiconductor components ratings in order to perform a comparison in terms of size and cost. A discussion of the analyzed topologies regarding the obtained ratings as well as ground currents is presented. Recommendations for topological solutions complying with the application benchmark are provided [ABSTRACT FROM AUTHOR]

This paper introduces a design methodology for a resonant boost converter topology that is suitable for operation at very high frequencies. The topology we examine features a low parts count and fast transient response, but suffers from higher device stresses compared to other topologies that use a larger number of passive components. A numerical design procedure is developed for this topology that does not rely on time-domain simulation sweeps across parameters. This allows the optimal converter design to be found for a particular main semiconductor switch. If an integrated power process is used where the designer has control over layout of the semiconductor switch, the optimal combination of converter design and semiconductor layout can be found. To validate the proposed converter topology and design approach, a 75-MHz prototype converter is designed and experimentally demonstrated. The performance of the prototype closely matches that predicted by the design procedure, and the converter achieves good efficiency over a wide input voltage range. [ABSTRACT FROM AUTHOR]

Transformerless inverter topologies have attracted more attentions in photovoltaic (PV) generation system since they feature high efficiency and low cost. In order to meet the safety requirement for transformerless grid-tied PV inverters, the leakage current has to be tackled carefully. Neutral point clamped (NPC) topology is an effective way to eliminate the leakage current. In this paper, two types of basic switching cells, the positive neutral point clamped cell and the negative neutral point clamped cell, are proposed to build NPC topologies, with a systematic method of topology generation given. A family of single-phase transformerless full-bridge topologies with low-leakage current for PV grid-tied NPC inverters is derived including the existing oH5 and some new topologies. A novel positive–negative NPC (PN-NPC) topology is analyzed in detail with operational modes and modulation strategy given. The power losses are compared among the oH5, the full-bridge inverter with dc bypass (FB-DCBP) topology, and the proposed PN-NPC topologies. A universal prototype for these three NPC-type topologies mentioned is built to evaluate the topologies at conversion efficiency and the leakage current characteristic. The PN-NPC topology proposed exhibits similar leakage current with the FB-DCBP, which is lower than that of the oH5 topology, and features higher efficiency than both the oH5 and the FB-DCBP topologies. [ABSTRACT FROM AUTHOR]

In this paper, a novel single-phase five-level inverter is proposed using coupled inductors. This inverter can output five-level voltage with only one dc source. No split of the dc voltage capacitor is needed, totally avoiding the voltage balancing problem in conventional multilevel inverters. The level of the output voltage is only half of the dc-link voltage in all conditions, leading to much reduced dv/dt . This inverter is based on the widely used three-arm power module and the voltage stresses on all the power switches are the same, making it very easy to construct. Operation mechanism of this inverter is analyzed and the possible switching patterns are investigated. Based on these analyses, a novel optimized modulation scheme is presented. With this modulation method, no dc components exist in the inductor currents, which is very helpful for minimization of the inductors. Simulation and experimental results show the validity of the proposed inverter together with the optimized modulation scheme. [ABSTRACT FROM AUTHOR]

This paper proposes a bidirectional buck-boost cascade inverter and presents its modeling and control methods. The proposed inverter can be seen as the cascade of a buck converter and a boost converter, both with bipolar outputs. The buck stage maintains the main inductor current and the boost stage controls the output voltage to track a given reference. With detailed analysis, the switching function model is established, which reveals that the inverter has an extra control freedom for achieving high performance. Then, the averaged model for control is given and thereby the buck-boost capability is proven. Afterward, utilizing the feedforward compensation technique, a decoupled control scheme is designed. A new modulation strategy is also proposed to minimize the dead time effect. By simulations and experiments, it is verified that the proposed system possesses the following features: 1) bidirectional operation with bipolar buck-boost output voltage; 2) reduced output distortion due to advanced modulation minimizing the dead time effect; 3) reduced size and weight with only one main energy storage component; 4) decoupled linear controller design; and 5) good steady-state and dynamic performance including wide operation range, strong robustness to load and input voltage variations, fast dynamic response, and excellent overload protection. [ABSTRACT FROM AUTHOR]

To eliminate the common-mode leakage current in the transformerless photovoltaic grid-connected system, an improved single-phase inverter topology is presented. The improved transformerless inverter can sustain the same low input voltage as the full-bridge inverter and guarantee to completely meet the condition of eliminating common-mode leakage current. Both the unipolar sinusoidal pulsewidth modulation (SPWM) as well as the double-frequency SPWM control strategy can be applied to implement the three-level output in the presented inverter. The high efficiency and convenient thermal design are achieved thanks to the decoupling of two additional switches connected to the dc side. Moreover, the higher frequency and lower current ripples are obtained by adopting the double-frequency SPWM, and thus the total harmonic distortion of the grid-connected current are reduced greatly. Furthermore, the influence of the phase shift between the output voltage and current, and the influence of the junction capacitances of the power switches are analyzed in detail. Finally, a 1-kW prototype has been simulated and tested to verify the theoretical analysis of this paper. [ABSTRACT FROM AUTHOR]

This paper proposes an improved Z-source inverter topology. Compared to previous Z-source inverter topology, it can reduce the Z-source capacitor voltage stress greatly, and has an inherent limitation to inrush current. The control strategy is exactly the same as the previous one, so all existing control strategies can be used directly. Soft-start strategy is also proposed to avoid the inrush current and resonance between the Z-capacitors and the Z-inductors. Comparison between the proposed and previous topologies is also presented. Analysis, simulation, and experimental results are presented to demonstrate the new features of the improved topology. [ABSTRACT FROM AUTHOR]

The Z-source inverter has gained popularity as a single-stage buck–boost inverter topology among many researchers. However, its boosting capability could be limited, and therefore, it may not be suitable for some applications requiring very high boost demand of cascading other dc–dc boost converters. This could lose the efficiency and demand more sensing for controlling the added new stages. This paper is proposing a new family of extended-boost quasi Z-source inverter (ZSI) to fill the research gap left in the development of ZSI. These new topologies can be operated with same modulation methods that were developed for original ZSI. Also, they have the same number of active switches as original ZSI preserving the single-stage nature of ZSI. Proposed topologies are analyzed in the steady state and their performances are validated using simulated results obtained in MATLAB/Simulink. Furthermore, they are experimentally validated with results obtained from a prototype developed in the laboratory. [ABSTRACT FROM PUBLISHER]