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This paper presents a practical convex-optimization-based sensorless scheme for interior permanent magnet synchronous motor (IPMSM) drives. The proposed sensorless scheme simplifies the optimization process that employs only one variable as compared with two variables in the existing optimization-based methods. The reduction in variables substantially reduces the computational burden in the proposed scheme and, hence, is suitable for practical applications. Additionally, the proposed algorithm is able to estimate the rotor position regardless of the pattern of the high-frequency (HF) injected signal under low-speed conditions. This characteristic has been investigated in this paper where three typical HF injection patterns are compared. The performance of the proposed scheme is experimentally validated. [ABSTRACT FROM AUTHOR]

This paper proposes a resonant switching cell model to analyze and design the single-ended resonant dc–dc converters. The single-ended zero-voltage switching (ZVS) converters such as the Class E converter are efficient for megahertz switching because they feature low turn-on and turn-off switching losses. Also, they use only a ground-referenced switch, allowing a simple gate drive circuit. In this paper, we investigate the single-ended resonant converter with the small input inductance, whereas the conventional Class E converter has a large input inductance. The main contribution of this paper is to propose the resonant switching cell as an analytic model that simplifies the analysis and the design of the resonant dc–dc converters. Furthermore, this paper presents the design method of the resonant switching cell model for minimizing the resonant current magnitude and conduction loss while the converter maintains ZVS property. The experimental results from a 10-MHz GaN-based prototype demonstrate the feasibility and effectiveness of the analysis and design based on the proposed resonant switching cell model. [ABSTRACT FROM AUTHOR]

In finite control set predictive torque control (FCS-PTC), mismatched parameters will lead to the electromagnetic torque prediction error. To solve the aforementioned problem, this paper proposes feedback-correction-based dual reference frame predictive torque control for induction machines, abbreviated as DRF-PTC. First, a DRF flux observer is proposed, which abandons a traditional model reference adaptive observer with rotor speed as adaptive variable. The proposed flux observer decouples the flux observation and the speed estimation and improves the estimation accuracy of flux linkage and rotor speed. Second, a DRF-PTC is proposed to eliminate the effect of speed estimation error on torque prediction. For the influence of mismatched parameters, a correction term is incorporated in double reference frame torque prediction equations, in which the correction term is derived from the correction term of the proposed flux observer. Finally, the proposed DRF-PTC in this paper is verified on the experimental platform of an induction machine. Experimental results show that the proposed DRF-PTC has excellent performance in speed estimation and electromagnetic torque prediction, compared with the traditional FCS-PTC. [ABSTRACT FROM AUTHOR]

In an open-end winding permanent magnet synchronous machines drive with single dc voltage source, zero-sequence current (ZSC) can lead to a high current stress of power modules and loss of motor. Therefore, some modulation strategies have been employed to alleviate ZSC by suppressing zero-sequence voltage (ZSV). However, ZSC still exists in the system because ZSV can also be generated by other nonlinear factors of inverter such as the dead time of system. In addition, zero-sequence back electromotive force in the zero-sequence path can also enlarge torque ripple and ZSC. In order to deal with above problems, first, this paper proposes a full-order adaptive zero-sequence observer to estimate future ZSC and ZSV, which are able to compensate one-step control delay. Second, to achieve the maximum voltage dc bus utilization, this paper proposes a novel deadbeat predictive current control (DPCC) scheme with alternate sub-hexagonal center pulsewidth modulation strategy to suppress ZSC and torque ripple simultaneously. Finally, this paper presents a comparative study of two types of methods, namely traditional DPCC scheme and the proposed DPCC scheme. Simulation and experimental results are demonstrated to verify the effectiveness of the proposed DPCC scheme. [ABSTRACT FROM AUTHOR]

This paper introduces the fault current behavior of full-bridge modular multilevel converters (MMCs) and hybrid MMCs, with a consideration of a non-simultaneous blocking of the two half-bridges in each sub-module. In order to protect insulated gate bipolar transistor (IGBTs) in the full-bridge sub-module, both sides of a full-bridge sub-module are not blocked at the same time point. It is assumed that the first blocking of both sides is random in each sub-module, so there are many possible voltages in each arm after the first blocking. Because of this, there are also many possible fault current slopes after the first blocking. The influence of this sequential blocking on the maximum fault current is analyzed in the study. This paper also determines the threshold current, which has to be decreased due to this phenomenon. An optimization method of threshold current is also proposed. Other new MMC sub-modules can also use this new blocking method to reduce the stress of IGBTs, whose working principle is also introduced in this paper. [ABSTRACT FROM AUTHOR]

In this paper, a detailed lumped model of the shield is developed, and an optimization method is proposed to minimize the shield loss while suppressing the emission within the standard limit. The electromagnetic emission in a wireless charging system (WCS) is a serious concern for health and safety, especially for medium- and high-power applications, where strong magnetic field propagates through a large air gap. Usually, a flat aluminum plate is used as a shield to suppress the emission outside the charging area. This field emission increases proportionally with the coil ampere turn; therefore, a much higher shield current is required to suppress the additional emission under the limit set by the International Commission on Non-Ionizing Radiation Protection. In this paper, a novel hybrid shield structure is proposed to limit the electromagnetic field (EMF) emission, as well as to minimize the shield loss. The proposed shielding is evaluated on a laboratory prototype of 7-kW WCS designed for electric vehicle application. The experimental result shows that, while suppressing the EMF under the limit, the shield loss has been reduced by 21% compared to the commonly used aluminum shield. [ABSTRACT FROM AUTHOR]

With the increasing demand for flat displays, slim telecom/IT power supplies, and portable devices, the use of planar transformers (PTs) is becoming mandatory to achieve slim, compact converter designs. In particular, PTs present a significant opportunity to replace tall and bulky wire-wound transformers in industry standard LLC converters. However, the common-mode (CM) noise generated by PTs remains a significant obstacle to make LLCs effective. The CM noise issues are originated by large capacitances in overlapping primary and secondary layers of PTs, leading to serious electromagnetic interference issues. This paper develops a new winding method to overcome CM noise in LLC PTs. By minimizing noise, the proposed method prevents the use of bulky CM chokes, helping to keep a slim/flat form factor for LLC converters with high-power density. As well, the proposed winding method maintains low ac resistance and leakage inductance, two desirable features in high-efficiency transformers. The paper explains the root cause of CM noise in LLC PTs and develops a comprehensive method that targets all sources of CM noise in the transformer and is applicable to any type of PTs. The proposed winding method successfully shields problematic turns with high $dv/dt$ and overlaps the turns with the same $dv/dt$. As a result, circulating currents between primary and secondary (which are known as CM noise) are prevented, which leads to significant reduction of the converter's noise. Experimental results show that the proposed PT generates 11–20 dBμV less CM noise than a traditional PT with the same parasitic capacitance, which is the result of using the proposed winding method. [ABSTRACT FROM AUTHOR]

In this paper, we present a wireless power transfer (WPT) system with a two-dimensional (2-D) magnetoinductive wave (MIW) device composed by two orthogonal sets of 1-D MIW devices woven together. The device is made by 112 double-spiral coils, a geometry that we have optimized to render a low attenuation propagation. This approach enables a charging area of 22 × 22 cm2 from which a receiver device can be supplied with energy with optimum efficiency from 32 different locations with the use of a single excitation port. We present a detailed optimization of the design and fabrication of the device. To describe the behavior of the device, we use a modeling method based on the impedance matrix that allows us to include all coupling interactions among the increased number of cells. With this method, we are able to find the optimal operating conditions like the location of the excitation and the coupling conditions of the receiver device. With the proposed 2-D MIW device, we can provide up to 5 W to a load of 5  $\Omega$  located at the optimal axial separation. We corroborate our calculations with vector network analysis and dc output power measurements. Furthermore, we demonstrate the device supplying to distinct types of loads simultaneously. This paper is accompanied by a supplementary file showing the required MATLAB script and input files to calculate the mutual inductance between a receiver and the cells of the pad. [ABSTRACT FROM AUTHOR]

Analytical expressions that have been derived to calculate ac resistance and losses of magnetic devices at high frequencies have primarily used a one-dimensional approximation, and have used Cartesian coordinates or approximations that are equivalent to Cartesian coordinates. The result is Dowell's equation. This paper examines the effect of winding curvature on the losses relative to Dowell's equation by solving the problem completely in cylindrical coordinates. The error in Dowell's equation relative to a full cylindrical solution is found to be as great as 33% for some designs. A mathematical model is derived for the relative error between the two solutions, which can be used to assess the accuracy of Dowell's equation for a particular design, as well as a correction factor for Dowell's equation. The corrected Dowell's equation using the model is validated using finite-element analysis simulations as well as previously published experimental data. This paper is accompanied by Python codes to generate all data and figures used in the paper, a Python object that implements the derived mathematical model, and Lua scripts to run the finite-element simulations using FEMM. [ABSTRACT FROM AUTHOR]

This paper proposes a method for assessing the integrity of a series of insulated-gate bipolar transistor (IGBT) power stacks during factory-acceptance tests and service stops. The key challenge that is addressed in this paper is detecting common assembly issues that affect the power stack thermal path as well as distinguishing the acute aging effects of bond-wire lift-off and solder delamination. The method combines offline ${V_{\boldsymbol{ce}}}$ measurements with current in the extended Zero Temperature Coefficient (ZTC) operating region as well as with sensing current without modifications to the power stack. It also employs on-the-stack ${V_{\boldsymbol{ce}}}\ $ calibration for both the measurements. Additionally, only a fixed duty cycle pattern is needed to control the switches. The paper also presents a sensitivity analysis of the method to various parameters such as the current level in the extended ZTC operating region, the precision of the ${V_{\boldsymbol{ce}}}$ measurement, as well as the ambient, the cooling-water, and the junction temperatures. The experimental results are obtained from a high-current IGBT power stack used in a magnet power supply for particle accelerators and are compared favorably to results from finite element method and lumped parameter network simulations confirming the applicability of the method. [ABSTRACT FROM AUTHOR]

In this paper, a new dc–dc high voltage gain converter with low-voltage stresses on switches and diodes is proposed. Even though, in the topology of the proposed converter there are not any coupled inductors and transformer utilized, the voltage conversion ratio of the proposed converter is considerable in comparison to its conventional types. Also, two switches of the proposed converter provide longer charge time for two inductors which make the proposed converter capable of providing high voltage gain without preselecting extremely large duty cycles. In addition, the number of power circuit components of the proposed structure are few and the voltage stresses on semiconductor elements are low. In this paper, theoretical analysis of the proposed converter for each operating mode is presented and the voltage gain, voltage and average current stresses of elements, maximum input current ripple, efficiency and equations of critical inductances are calculated. Moreover, to verify the capability of the proposed converter, it is comprehensively compared with other similar recently presented high voltage gain boost converters. Finally, an approximately 12 V/380 V and 520-W prototype of the proposed converter is implemented in laboratory to demonstrate its practical performance, then, the experimental results reconfirm each other and theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper proposes a current control of dual three-phase permanent magnet synchronous machine (PMSM) based on five-leg inverter. The five-leg inverter can be utilized to drive dual three-phase PMSM with full torque at slow speed when the conventional dual three-phase voltage source inverter (VSI) has a faulty inverter leg. Usually, the common leg in the five-leg inverter may have severe current stress. By dedicated selection of which two phases as a pair to share the common leg, its current rating is approximately half of current rating of other legs. Meanwhile, the five-leg inverter can fully fulfill the vector space decomposition control for dual three-phase PMSM, which has the same dynamical performance as the conventional dual three-phase VSI. However, due to the asymmetry of five-leg inverter non-linearity, the currents of dual three-phase PMSM are unbalanced. To mitigate this issue, the five-leg inverter non-linearity compensation is also introduced and investigated in this paper, whose effectiveness is verified by comparative experiments on a prototype dual three-phase PMSM. [ABSTRACT FROM AUTHOR]

This paper proposes a two-degree-of-freedom (2DoF) interleaving scheme based on phase-disposition (PD) PWM for minimizing the high-frequency zero-sequence circulating current (ZSCC) in modular interleaved three-level converters. The method incorporates an internal interleaving by phase-shifting the carriers in each individual converter, and an external interleaving by phase-shifting the carriers of the different converters. A general harmonic distribution analysis which is valid for all types of voltage source converters is carried out to simplify the evaluation of the proposed method. A comprehensive evaluation of the proposed method shows that the PD-2DoF interleaving scheme produces the lowest ZSCC maximum value as compared to existing approaches. Moreover, it can achieve comparable performances as existing methods do in terms of output quality and common mode voltage magnitude, showing a great potential for practical implementation. Simulation and experimental results are obtained to demonstrate the performance of the proposed method. Generalization of the 2DoF interleaving scheme to high-level converter is also discussed in this paper. [ABSTRACT FROM AUTHOR]

This paper proposes an improved design methodology of the double-sided LC-compensated capacitive power transfer (CPT) system considering the inductance detuning. Compared to the perfect-resonant scenario, this paper shows that the inductance detuning has the benefit to achieve the soft-switching condition for the CPT system, and the output current and internal voltage stresses can also be maintained within the desired range. The contributions of this paper are summarized in three parts. First, it analyzes the impacts of the inductance variations on the system frequency property, including the input current, output current, and internal capacitor voltage stresses. Second, it proposes three principles to detune the inductances as the methodology to design a CPT system. Third, a prototype is implemented, which achieves 368.5 W power transfer across a 400 mm × 400 mm × 4 mm glass layer with 91.8% dc–dc efficiency. Experimental results validate that the proposed design principles are satisfied, showing that the output current is within the desired range, the input soft-switching condition is achieved, and the internal voltage stresses are within the safety limit. Moreover, the efficiency and frequency properties are also validated by the experimental results, showing a wide power range of the high-efficiency operation (higher than 90%) and a wide frequency bandwidth of the soft-switching operation (from 0.96 to 1.12 MHz). [ABSTRACT FROM AUTHOR]

In this paper, an overload and short-circuit protection method is proposed for voltage source inverter-based uninterruptible power supply (UPS) system. In order to achieve high reliability and availability of the UPS, short circuit and overload protection scheme are necessary. When overload or short circuit happens, using the proposed control method, the amplitude of the output current can be limited to a constant value, which can be set by the customer to avoid the destruction of the power converter, and to obtain a faster recovery performance as well. The detailed principle of the proposed protection method is discussed in this paper. It mainly contains three parts in the control diagram for current limit, first is the anti-windup in the voltage and current controllers, then the feedforward of the capacitor voltage to the current control loop, the last is the fast reset of the resonant part of the current controller when overcurrent happens. The procedure of developing the control method is also presented in the paper. Experimental results on a commercial UPS system are presented to verify the effectiveness of the control method. [ABSTRACT FROM AUTHOR]

This paper proposes a predictive speed and current control with multi-timescale optimization in a cascade architecture for a permanent-magnet synchronous motor. Considering the difference of timescale characteristics for speed loop and current loop, different sampling times are assigned to the respective subsystem. In the prediction step of the conventional two-timescale system, the coupling between slow and fast sampling models is ignored and the output of the slow-sampling model at asynchronous sampling period is missing, which both weaken the prediction performance of the system. In this paper, the predictions of both slow and fast models for all the prediction instants are analyzed in detail. Besides, a linear estimation method based on virtual instants is proposed to improve the performance of the slow-sampling model for fast prediction instants. The data stream of the proposed method is designed based on the cascaded structure. The strategies are implemented on a field-programmable gate arrays taking advantages of parallel and pipeline processing techniques. Experimental results show that the proposed strategies have a better dynamic performance compared to the conventional method. [ABSTRACT FROM AUTHOR]

Fault tolerance in wind turbines is considered crucial to increase their reliability and availability levels. This paper presents a fault-tolerant direct-drive permanent magnet synchronous generator (PMSG) using new direct control techniques, with the ability to handle power semiconductor open-circuit faults in the full-scale back-to-back converter. The fault-tolerant topology consists of a five-leg converter, with a shared leg connected to a generator phase and to its corresponding grid phase, through a triode for alternating current (TRIAC). The main contribution of this paper consists of the development of an alternative direct torque control and direct power control schemes for both machine-side converter and grid-side converter, respectively. Moreover, a reliable fault diagnostics algorithm without requiring additional sensors is also integrated, providing the information required to instantaneously trigger fault-tolerant remedial strategies. Simulation and experimental results are presented to validate the effectiveness of the proposed fault-tolerant PMSG drive. [ABSTRACT FROM AUTHOR]

In this paper, the reliability performance of 1.2-kV silicon carbide (SiC) power mosfet modules is investigated through the combination of both accelerated power-cycling tests and short-circuit tests. The short-circuit robustness of SiC mosfet is investigated after stressing the dies under power-cycling tests. In this way, the implications of different levels of degradation on the short-circuit capability can be better understood. During the power-cycling tests, some electrical parameters, either related to the package or the die, may experience variations as a consequence of the device ageing (e.g., increase in bond wire resistance and increase in gate leakage current). The effect of these parameter variations on the short-circuit withstanding capability of SiC mosfets is investigated for the first time in this paper. The proposed method helps to understand which degradation effects under normal operation have a major implication on the short-circuit robustness, which gives a more realistic information about the root cause of the failures observed in the field. [ABSTRACT FROM AUTHOR]

This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

This paper presents bidirectional grid-connected modular multilevel converters (MMC) with direct digital control and division-summation processes to achieve power-injection and rectification functions. A direct digital control is developed to track current references, regulate dc-bus voltage and cell voltage, and balance the upper and lower dc-bus voltages. It can accommodate wide filter-inductance variation and take care of source voltage harmonics to achieve tight current tracking and low distortion output current. Based on the power-balance principle, the commands of arm currents can be determined directly. In this paper, the MMC configuration is introduced first, and then the control laws for current tracking and voltage regulation are derived in detail. Experimental and simulated results obtained from two 50 kW MMCs operated in power-injection and rectification modes have verified the analysis and discussion. [ABSTRACT FROM AUTHOR]

This paper presents an adaptive multi-loop control scheme for inverters interlinking dc voltage sources to single-phase, low-voltage ac grids. Control self-adaptation is particularly useful in the case of weak grids that, due to frequent physical modifications (e.g., network reconfigurations and disconnection of generators/loads) and intrinsic lack of inertia, present strongly time-variant characteristics. The solution presented in this paper is based on a high-performance converter controller with auto-tuning capabilities. It is shown that the applied auto-tuning method can significantly widen the stability region of the interlinking converter, covering a broad range of grid impedance values. In addition, within the stable region, the controller maintains the nominal performance. Experimental results are reported validating the proposed approach in realistic operating conditions, including grid voltage distortion and variations of amplitude and frequency. [ABSTRACT FROM AUTHOR]

Clamp mode snubbers are very well suited for the series structure of the insulated-gate bipolar transistors (IGBTs) in pulsed power applications. They properly meet the necessities expected from them such as the fast operating of the series IGBTs since they have no effect on the gate side. In addition, they can provide safe voltage condition for the IGBTs in short circuit faults, which are very probable in pulsed applications. The clamp mode snubber can perform its voltage balancing task whenever the power capacity of the snubber can support the injected powers due to the voltage unbalancing factors. This paper initially introduces the main factors injecting power to the snubbers. Then, it will be illustrated that the exact injected power to each predetermined snubber cannot be determined due to the uncertainties about the effect of the voltage unbalancing factors. Although it is impossible to determine the exact value of the power injected to each snubber, the total injected powers to the snubbers can be calculated. Therefore, as an effective remedy, this paper proposes a concentrated snubber. Using the proposal, all the injected powers are conducted to a centralized circuit and can be easily managed. In addition, analytical expressions are provided for proper dimensioning of the proposed concentrated snubber elements. Furthermore, the performance of the proposed concentrated snubber is evaluated using simulations and experimental prototyping. [ABSTRACT FROM AUTHOR]

In this paper, state-of-the-art power electronics and energy management solutions utilized in low-power (less than 5 mW), low-voltage (less than 3 V) energy harvesting powered wireless sensors for Internet of things related applications are detailed. All aspects of an energy harvesting powered sensor system are examined, including the challenges of low-power energy harvesting sources, energy management circuits including power converters and energy storage elements, as well as the impact of wireless sensor pulsed power profiles. In particular, this paper focuses on existing voltage step-up energy management techniques, including the issues of cold-start and maximum power point tracking, as well as energy storage which is necessary for wireless sensor operation. Both academic and commercially available energy harvesting powered systems are examined to provide a comprehensive analysis of existing solutions. Issues that are limiting the current system performance are identified to help define future developments needed to enable efficient and effective energy harvesting powered wireless sensor operation. [ABSTRACT FROM AUTHOR]

A novel pulsewidth modulation (PWM) scheme for the decoupled and coordinated control of two parallel connected split-phase induction machines is discussed in this paper for the first time. Both the motors are operated from a single six-phase voltage source inverter which acts as a power source, and two switched capacitor-fed auxiliary inverters to limit the flow of nontorque producing currents in each motor. Both the motors can be operated at its full rated power with low switching frequency, and decoupled control for full power range can be achieved with the proposed topology. This is possible because the individual machines do not carry the load/harmonic currents of other machine (unlike the conventional series or parallel connected systems). The converters can be modulated using sine-triangle PWM or space vector pulsewidth modulation (SVPWM). Furthermore, two different schemes of SVPWM techniques are proposed and compared in this paper. Exhaustive experimental results for all the modulation schemes are provided for steady state and transient operating conditions including start-up to validate the proposed topology and modulation schemes. [ABSTRACT FROM AUTHOR]

This paper proposes a d–q cross-coupling current controller for permanent magnet synchronous motor (PMSM) drives. Slotting and cross-coupling effects in PMSMs cause the effective air-gap length to vary with the rotor angle and distort the distribution of the air-gap flux. Such distortions have a significant influence on the current control by changing the relationship between the stator currents and voltages. To investigate their effects, a d–q model is established in this paper, which is suitable for describing the voltage characteristics of the actual PMSMs. The model contains the angle-dependent parameters, the cross-coupling inductance between d–q axes, and the q-axis permanent magnet flux linkage, unlike the ideal d–q model. The transfer function matrix from the d–q currents to d–q voltages of PMSM is newly derived from the model. Based on that, the current controller with the feedback and feedforward terms of 2-by-2 matrix is proposed. It is designed so that the independent gains are in low-pass filter forms and the coupling control gains are zero with eliminating interference between d–q axes. The proposed controller contributes to providing the stable control performance by canceling the slotting and cross-coupling effects. The performance of the proposed current controller is verified by experimental results. [ABSTRACT FROM AUTHOR]

This paper investigates a Vienna rectifier as a charger for series-connected battery packs. Focusing on carrier-based pulsewidth modulation (CBPWM), the ripple current flowing through the neutral point (NP) results in the voltage oscillation if the loads are resistive. To reduce the ripple of average NP current with mitigated distortion under balanced and unbalanced dc-link voltages conditions, a novel CBPWM with segmented component injection scheme (SCIS) is proposed in this paper. After dc component injection, continuous intervals for optimized component injection and clamping intervals for compensation component injection are identified. Optimized components are calculated originally based on unbalanced factor to make the average NP current zero-size in one switching period. Moreover, unique compensation components generate suitable NP current to shape the sinusoidal input currents according to the circuit analysis. In consequence, the SCIS not only keeps the input current with low-harmonic distortion, but also minimizes the oscillation of dc-link voltage under balanced and unbalanced conditions. In addition, the value of the NP current during the clamping intervals is analyzed under various operating conditions. The effectiveness and the performance of the proposed SCIS are verified by simulation and experiments. [ABSTRACT FROM AUTHOR]

A single-stage TRIAC (TRIode for alternating current switch) dimmable LED (light emitting diode) driver using a buck converter fed through a capacitor input rectifier provides many advantages such as small-scale implementation, low output current ripple, and stable dimming operation. This circuit topology, however, has a serious issue: A large inrush current to the smoothing capacitor. To solve this issue, this paper focuses on a bleeder circuit in the TRIAC dimmable LED driver. This paper presents the mechanism of the large inrush current issue and its relationship to a conventional bleeder circuit. Moreover, this paper proposes a turn-off delay controlled bleeder circuit. The proposed bleeder circuit is analyzed by using its discrete-time state-space model in order to set proper circuit parameters for inrush current reduction. Experimental results demonstrate the inrush current reduction by the proposed method, which leads to a 37% reduction of maximum input current, as well as proper dimming operation and low output current ripple. The proposed method achieves further small-scale implementation, which enhances the advantages of the intended main circuit topology. [ABSTRACT FROM AUTHOR]

This paper introduces a novel modeling approach that allows to obtain fast simulations of pulsewidth-modulated dc–dc switched-mode power supplies (SMPS). The proposed methodology combines the use of precise switched models during transient evolutions and averaged models during steady-state or slowly varying conditions. In that way, the resulting mixed modeling approach enables to obtain the detailed switching behavior of SMPS in the context of long-term simulations. The commutation between models is automatically performed in runtime by an algorithm that detects the transient or slowly varying condition according to the evolution of some model variables. When the precise switched model is used, the mentioned algorithm also adjusts the averaged model parameters so that its results are accurate irrespective of the operating point. This paper also describes the implementation of the methodology in the Modelica language and reports simulation experiments showing that the results are as accurate as those obtained using precise switched models, but several times faster. [ABSTRACT FROM AUTHOR]

Owing to the high operation frequency and fast switching speed, gallium nitride (GaN) devices are prone to the false turn-on phenomenon, causing high switching loss, shoot through, and even sustained oscillation. However, most of research on false turn-on aims at the enhancement-mode GaN devices, whereas there is still little published research on GaN devices in cascode configuration due to the comparatively complicated structure and various parasitic components. This paper conducts a comprehensive and in-depth study for the problem of false turn-on in cascode GaN devices based half-bridge circuits, which has a great guiding significance in the device selection, printed circuit board (PCB) design, and debugging of cascode GaN converters. In this paper, a novel analytical model of the device suffering false turn-on is first developed, with all the parasitic parameters being fully considered. Based on the model, the quantitative and accurate expression of the induced gate-to-source voltage is derived, which can serve as a precise and significant reference for judging and evaluating the false turn-on problems. Then, the influences of device and circuit parameters on the peak value of induced voltage are first investigated in detail, providing a reliable guidance for the usage and PCB design of cascode GaN devices based half-bridge converters. What's more, guidelines to effectively suppress the false turn-on phenomenon are also given, which can be adopted both in the design and debugging process of cascode GaN applications. Finally, all the theoretical calculations and analysis are verified by experiments with satisfying results and performances. [ABSTRACT FROM AUTHOR]

This paper presents an interleaved boost converter with a bifold Dickson voltage multiplier suitable for interfacing low-voltage renewable energy sources to high-voltage distribution buses and other applications that require a high-voltage-gain conversion ratio. The proposed converter was constructed from two stages: an interleaved boost stage, which contains two inductors operated by two low-side active switches, and a voltage multiplier cell (VMC) stage, which mainly consists of diodes and capacitors to increase the overall voltage gain. The proposed converter offers a high-voltage-gain ratio with low voltage stress on the semiconductor switches as well as the passive components. This allows the selection of efficient and compact components. Moreover, the required inductance that ensures operation in the continuous conduction mode (CCM) is lower than the one in the conventional interleaved boost converter. The distinction of the proposed converter is that the inductors’ currents are equal, regardless of the number of VMCs. Equal sharing of interleaved boost-stage currents reduces the conduction loss in the active switches as well as the inductors and thus improves the overall efficiency, as the conduction power loss is a quadratic function. In this paper, the theory of operation and steady-state analysis of the proposed converter are illustrated and verified by simulation results. A $\text{200-W}$ hardware prototype was implemented to convert a $\text{20-V}$ input source to a $\text{400-V}$ dc load and validate both the theory and the simulation. [ABSTRACT FROM AUTHOR]

In a dual active bridge (DAB) dc–dc converter, modulating the phase-shift ratios can suppress reactive power and increase the efficiency under non-unity voltage gain conditions. Derivation of the optimal phase-shift ratios to achieve the minimum reactive power is challenging because a DAB can operate in four different scenarios (forward/backward, buck/boost) and each scenario has five operating modes. This paper first introduces a transformation in which different DAB operating scenarios (forward/backward, buck/boost) can be equivalent to one another; then optimization of only one scenario (forward/buck) is required. Next, for the five modes in forward/buck scenario, based on a graphical method, this paper proves that each operating point of Modes 1, 2, and 5 can be mapped into that of Mode 3 with lower conduction losses, and only two modes require detailed analysis. The optimization process of these two modes are derived step-by-step. Global optimal phase-shift signals that minimize the reactive power under four different DAB operating scenarios (forward/backward, buck/boost) are presented. A simple table and control block diagram are presented for practical implementation of global reactive-power minimization control. Experimental comparison with other modulation schemes verifies the efficiency improvement of the proposed control method. [ABSTRACT FROM AUTHOR]

This paper investigates the dependence of the supercapacitor Peukert constant on its terminal voltage, aging condition, and operating temperature. Recent studies show that the charge delivered by a supercapacitor during a constant current discharge process increases when the discharge current decreases if the discharge current is above a certain threshold, i.e., Peukert's law applies. By conducting extensive experiments using three supercapacitor samples with different rated capacitances from different manufacturers, this paper reveals that the Peukert constant increases when the initial voltage of the constant current discharge process is lower, the supercapacitor is more heavily aged, or the operating temperature is lower. The physical mechanisms accounting for the Peukert constant dependence are illustrated by analyzing an $RC$ ladder circuit model. When the supercapacitor terminal voltage is higher, the aging condition is lighter, or the operating temperature is higher, more charge is stored in the supercapacitor. Consequently, when the same discharge current is applied, the discharge time is longer and the branch capacitors are more deeply discharged. Therefore, the relaxation effects of the slow branches are reduced and the supercapacitor behaves more like a single capacitor rather than a distributed capacitor network, which ultimately leads to a lower Peukert constant. [ABSTRACT FROM AUTHOR]

Multilevel inverters (MLIs) are being used in wide range of power electronic applications. These converters have attracted a lot of attention during recent years and exist in different topologies with similar basic concepts. This paper presents five main submodules (SMs) to be used as the basic structures of MLIs. The paper reviews the common MLI topologies from the structural point of view. The topologies are divided into the different SMs to show conventional MLI configurations and future topologies that can be created from the main SMs. A comparative study between different topologies is performed in detail. The MLIs are categorized and investigated with from different perspectives such as the number of components, the ability to create inherent negative voltage, working in regeneration mode and using single dc source. [ABSTRACT FROM AUTHOR]

In medium-voltage drives, multistep model predictive control (MPC) can lower the total harmonic distortion of the stator currents and thereby reduce losses and improve efficiency. However, from the point of view of implementation, there is still uncertainty as to whether transients have a major adverse effect on achieving this improved steady-state performance. The time-varying nature of machine drives, initialization of the optimization process, and limited computational resources are identified as key factors. This paper analyzes the link between these key factors in detail, thus a suitable reformulation and selective initialization approach is designed to enable the deterministic use of multistep finite-control-set MPC irrespective of the drive system conditions. Guidelines to select the prediction horizon, weighting factor, and minimum switching frequency considering the control platform limitations are presented. The significant impacts of transients on the design and experimental validation, covering several drive conditions, are evaluated in a scaled-down three-level induction machine drive switching at 350 Hz. This paper is accompanied by a video demonstrating the real-time implementation of multistep MPC. [ABSTRACT FROM AUTHOR]

In this paper, to improve the robustness and realize the precision positioning as well as speed control of the servo drive system, an integrated sliding-mode control (ISMC) optimized by differential evolution (DE-ISMC) algorithm is proposed. ISMC guarantees that a motor can reach at given position with given speed, and given speed is set first. ISMC, which is combined with speed regulator and position regulator, is different from the conventional sliding-mode control (SMC) replacing speed regulator. ISMC can guarantee that motor speed is controlled under position control mode, which is a novelty and an advantage of ISMC in this paper. To achieve good control performance of ISMC, parameters of it should be chosen exactly, so DE algorithm is selected to optimize them. The most significant influence factor of DE algorithm is the optimization iteration. Once parameters of ISMC are optimized under convergent iteration, servo system performance reaches given indices in the shortest time. Experimental results indicate that robustness of the servo system is improved; correctness and effectiveness of DE-ISMC are verified. [ABSTRACT FROM AUTHOR]

This paper presents a balancing algorithm for the so-called Director Switch, a controlled, reverse conducting, self-powered, high-voltage switch, using series-connected insulated gate bipolar transistors (IGBTs). This is a key component on two new voltage-source, high-voltage direct current (HVDC) converter topologies. These, which promise efficiency, cost, and size reductions, are an alternate arm converter and a series bridge converter. One of the main design challenges of the director switch is how to supply the IGBT gate drivers, and other auxiliary electronics while overcoming the high-voltage insulation barrier to ground level. In this paper, this is achieved by using the energy stored in a capacitive clamp snubber circuit, which also helps with the overvoltage mitigation during rare hard-switching events. However, the clamp capacitor and by proxy the IGBT voltages become highly unbalanced during operation, compromising the integrity of the switch. This paper presents a balancing strategy that consists in applying a controlled delay in the switching of the IGBT levels, in a way that forces a voltage balance on all the switch levels. The paper explains the unbalance. Then, the balancing strategy is explained and validated on simulation and on a high-voltage experimental rig, on switches comprising two and three series-connected IGBTs, respectively. [ABSTRACT FROM AUTHOR]

This paper presents a unified physics-based insulated-gate bipolar transistor (IGBT) compact model for circuit simulation that predicts the performance of both Si and SiC, n- and p-channel devices. The model can predict the detailed switching waveforms of these technologies based on its charge-based formulation. Further, this compact IGBT model is presented alongside a unique datasheet-driven parameter extraction process. The parameter extraction process enables users to quickly extract model parameters from data typically published without the need of taking physical measurements. The model has been validated with both Si and SiC devices for static and dynamic characteristics. The SiC IGBTs used for validation are a 12.5-kV n-channel device and a 13-kV p-channel device, while the Si IGBT chosen was IXDH30N120 from IXYS Corp. (Milpitas, CA, USA). This is the only IGBT model that predicts the performance of both n- and p-channel, Si and SiC devices, providing more freedom for the development of complex power electronics circuit designs. The convergence of the model has been verified by implementing a complex circuit consisting of both a dc–dc converter and a dc–ac inverter. The results presented here show that the unified model can be used to describe the behavior of a wide range of Si and SiC IGBT circuits. This paper is accompanied by a Verilog-A source code and a power point file demonstrating the model parameter extraction sequence. [ABSTRACT FROM AUTHOR]

This paper proposes a new class of topologies of single-stage high-frequency ac-link power converters, which is capable of providing both voltage step up/down within a wide frequency and voltage ranges. The proposed family, which supports bidirectional power flow, can interface various single/multi-port dc and/or single/multi-phase ac systems to provide dc–dc, dc–ac, ac–dc, or ac–ac power conversion. In this family of converter, which offers a very modular structure, a small inductor that forms the link exchanges power entirely or partially between the source and load. The proposed family can function in buck, boost, and/or buck–boost modes of operation, and a combination of these modes of operation is also feasible. In comparison to the parallel inductive four-quadrant link converters, the proposed family features a significantly reduced link peak current, reduced switch ratings, and reduced total number of power switches. These features enhance the efficiency, reduce the total cost, and increase the power density of the system. In order to further improve the overall efficiency of the system, minimize the current/voltage stress over all utilized semiconductor devices, and lower electromagnetic interference (EMI), a small capacitor is placed in parallel with the link inductor to realize soft-switching operation for the proposed configurations. Moreover, the proposed converters have the potential to incorporate a lightweight single-phase high-frequency transformer for electrical isolation. The proposed circuit topologies prevent reverse recovery issues and eliminate losses corresponding to body diodes of power switching devices via utilizing power switches in conjunction with external fast recovery diodes. The proposed family offers a very high level of reliability owing to its immunity from short circuit of input and output terminals and open circuit of the link inductor, which may occur in other power converters due to commutation problem resulting from a short deadtime or an overlap time between switches, unwanted control command, delay in electronic circuits, or EMI noise's misgating on or off, in addition to the absence of electrolytic capacitors in the power circuit. A control approach is also developed to regulate input and output currents in one stage of power conversion. A detailed theoretical analysis, operation, design methodology, and control strategy of the proposed family are provided in this paper, and the effectiveness and performance of the proposed converter family are verified via simulation results and experimentally. [ABSTRACT FROM AUTHOR]

In this paper, a current controller for a parallel operation of inverters is described. When inverters operate in parallel, it is a well-known fact that the inverter current is composed of the average current (AVC) and the zero-sequence circulating current (henceforth ZSCC), which inevitably flows between inverters under the parallel operation. Considering this, previous studies concentrated on reducing ZSCC. However, in this paper, it is found that the inverter current has another component, a differential current, in addition to the two components of AVC and ZSCC. Based on these three decomposed current components, three equivalent circuits are derived from n-paralleled inverters. To minimize the differential current and improve the regulation performance of the total output phase current, a decomposed current control scheme is proposed from equivalent circuit models. The proposed algorithm is applied to a system consisting of three paralleled two-level inverters with small shared inductance whose dc links are connected in common. Additionally, synchronous pulsewidth modulation is employed as the PWM method for each inverter. The proposed current controller is compared with two conventional current controllers, one where each inverter controls its own currents and the other where only AVC is controlled. Through experiments, it is shown that these conventional controllers have limitations and the proposed current controller overcomes these limitations. The effectiveness and feasibility of the proposed control scheme are verified through experimental results. Especially, both theoretical analysis and experiment results verify that the proposed method is robust with regard to parameter errors. [ABSTRACT FROM AUTHOR]

Switching behavior analysis is an indispensable step for evaluating the steady-state performance of a bidirectional dc–dc converter and a prerequisite for soft-switching modulation design. For dual-bridge series resonant dc–dc converters (DBSRCs), the commonly used fundamental harmonic approximation (FHA) does not usually provide predictions accurate enough for reliable analysis and design. This paper discloses the exact closed-form solution for the zero-voltage switching (ZVS) operation conditions of DBSRCs for the most general case, in which all modulation quantities—i.e., phase shift, duty cycles, and switching frequency—are included. The proposed approach relies on a geometrical analysis of the converter state-plane trajectory, and allows us to analytically predict the ZVS or hard-switching state of any switch and for any given converter operating point. By inherently capturing the effects of all tank harmonics, the model disclosed in this paper shows higher accuracy than the conventional FHA-based approach, and translates into a practical tool for ZVS prediction and optimization at the converter design stage. Based on the derived analytical results, switching behavior of DBSRCs with minimum rms current trajectory (MCT) modulation is investigated, and an effective design choice of resonant-to-switching frequency ratio is presented, which contributes to reduced switching losses and enhanced efficiency. Furthermore, a variable frequency modulation scheme is formulated, achieving ZVS operation of all transistors over a wide input/output voltage range and efficiency improvement versus MCT technique. The analysis and conclusions are validated via extensive experimental tests on a 700 W DBSRC prototype. [ABSTRACT FROM AUTHOR]

The capacitance of sub-module capacitor has a great impact on the cost, size, and operation of the modular multi-level converter (MMC). However, the capacitance selected by the existing methods does not always meet the requirement in practice. To find out the reasons for this improper selection, the existing selection methods are analyzed in this paper. Based on the analysis, a new capacitance-selection method is proposed. In the new method, the problems of the existing methods are solved, and the calculation of capacitor voltage is based on a proposed capacitor-voltage model whose calculation error can be smaller than 0.1%. Furthermore, the Secant Method is used in the capacitance selection to quickly calculate the required capacitance. The new capacitance-selection method can be applicable to the MMC not having a circular operating region. In addition, this paper found that the capacitor voltage and the capacitor-voltage ripple reach their maximum values when the power-factor angles of the MMC are –π/2 and π/2, respectively, and the dc component in the capacitor voltage changes according to the operating condition of the MMC. Finally, the proposed selection method and theoretical analyses are verified by both simulation and experiment. [ABSTRACT FROM AUTHOR]

A very simple sequential model predictive control (SMPC) is recently proposed to achieve high performance control of induction motor drives. By evaluating two separate cost functions for the torque and amplitude of the stator flux linkage in a cascaded way, the weighting factor in the conventional MPC is eliminated. However, it is shown in this paper that the conventional SMPC cannot achieve stable operation over the full speed range, if the cost function for the stator flux linkage is first evaluated. To solve this problem, this paper proposes a generalized SMPC (GSMPC), which is effective when any one of the two cost functions is first evaluated. Compared to the conventional SMPC, GSMPC not only eliminates the limitation on the execution order of two cost functions, but also presents less stator flux ripples and lower current total harmonic distortion with even lower average switching frequency. Furthermore, a simple field-weakening strategy is proposed and combined with GSMPC to widen the speed range by adjusting the torque and stator flux linkage reference online. Both simulation and experimental results are presented to confirm the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

The voltage-balance mechanism is a required ability to simplify the control scheme for modular input-series and output-series ($\text{ISOS}$) connection, in spite of the fairly large number of studies, such mechanism has not been addressed clearly and satisfactory. This paper proposes a methodology, based on the converter output characteristics, to standardize the analysis of voltage-balance mechanism in steady state, which allows understanding the behavior of voltage sharing among the modules in steady state, in the presence of mismatched parameters for $\text{ISOS}$ connection of modular converters. In addition, the $\text{ISOS}$ connected modular two-switch flyback converter is presented. The intrinsic voltage-balance mechanism, even operating in continuous conduction mode, make this converter feasible, as an alternative to the predecessors modular converters. The operation and analysis of the proposed connection were corroborated, based on the experiment carried out on a laboratory prototype with three modules: ${\text{1}}, {\text{200 V}}_{\text{dc}}$ total input voltage, ${\text{1.5 kW}}$ rated power, and $\text{50 kHz}$ switching frequency. This paper is accompanied by a video demonstrating the operation, in steady state, of the laboratory prototype. [ABSTRACT FROM AUTHOR]

In low-power applications of photovoltaic (PV) systems, the transformerless grid-connected inverters have been preferred to increase the efficiency and reduce the cost, size, and power losses when they are compared to the ones with the transformer. A transformerless single-phase inverter topology with a single dc-link capacitor for the grid-connected PV systems is proposed in this paper. The proposed inverter has been simulated by using a cooperation process of the MATLAB and SPICE package programs and it has been implemented for experimental verification. The proposed inverter reduces the high-frequency common-mode leakage current caused by parasitic capacitances of PV panels, whereas it is controlled with the unipolar sinusoidal pulsewidth modulation. Also, the results show that the common-mode voltage remains constant. The efficiency of the proposed inverter has been compared to that of the most common topologies having the dc-link decoupling during the zero voltage states. This paper is accompanied by a video file demonstrating the power loss distribution in the inverter. [ABSTRACT FROM AUTHOR]

The continuous increasing share of power-converter-based renewable energies weakens the power system inertia. The lack of inertia becomes a main challenge to small-scale modern power systems in terms of control and stability. To alleviate adverse effects from inertia reductions, e.g., undesirable load shedding and cascading failures, three-phase grid-connected power converters should provide virtual inertia upon system demands. This can be achieved by directly linking the grid frequency and voltage references of dc-link capacitors/ultracapacitors. This paper reveals that the virtual inertia control may possibly induce instabilities to the power converters under weak grid conditions, which is caused by the coupling between the d- and q-axes as well as the inherent differential operator introduced by the virtual inertia control. To tackle this instability issue, this paper proposes a modified virtual inertia control to mitigate the differential effect, and thus, alleviating the coupling effect to a great extent. Experimental verifications are provided, which demonstrate the effectiveness of the proposed control in stabilizing three-phase grid-connected power converters for inertia emulation even when connected to the weak grid. [ABSTRACT FROM AUTHOR]

This paper proposes a new nested rectifier–inverter circuit topology for a four-level (4-L) open-end winding induction motor drive (OEWIMD). To realize the 4-L inversion, the nested rectifier–inverter topology operates with unequal dc-link voltages, which are in the ratio of 2:1. The proposed topology has the inherent ability of avoiding the overcharging of the lower dc-link voltage capacitor by its higher voltage counter-part unlike in the case of the power circuit configuration proposed in the earlier literature. This paper also proposes a new sample-averaged zero-sequence elimination pulsewidth modulation (PWM) scheme for the proposed circuit configuration to avoid the flow of zero-sequence current through the motor windings. It is shown that the proposed power circuit is also capable of displaying immunity to a particular type of fault, as it can produce the same output voltage despite the unbalancing of one of the dc-link capacitor voltages without changing the modulation strategy. The proposed 4-L OEWIMD along with the associated PWM schemes is simulated and is validated with experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a novel health-sensitive parameter, called the gate–emitter pre-threshold voltage VGE(pre-th), for detecting IGBT chip failures in multichip IGBT power modules. The proposed method has been applied in an IGBT gate driver and measures the VGE at a fixed time instant of the VGE transient before the threshold voltage occurs. To validate the proposed method, theoretical analysis and practical results for a 16-chip IGBT power module are presented in the paper. The results show a 500 mV average shift in the measured VGE(pre-th) for each IGBT chip failure. [ABSTRACT FROM AUTHOR]

An important issue in the photovoltaic (PV) power generation systems is the massive amount of heat wasted by PV modules/panels. For the first time, this paper provides a new solution to recover a portion of the mentioned waste heat by utilizing a proposed electrochemical heat engine. A thermally regenerative electrochemical cycle (TREC) system has been designed, constructed, and embedded in a PV power generation system including a 200-W PV module to harvest the waste heat of its PV module, so a PV-TREC hybrid system has been organized and built. The hot cell of the TREC system has been positioned in direct contact with the backside of the PV module, and the cold cell is in direct contact with a heat sink located in the shade of the PV module. Experimental verifications demonstrate that the proposed TREC system efficiently converts the waste heat into electric power ranging from 0.1 to 54.5 W. In this manner, up to 6% of the waste heat of the PV module is recovered. It also substantiated that the daily energy efficiency of the PV-TREC hybrid system is improved by 27.5% compared to a usual PV system, and this is the main contribution and novelty of this paper. [ABSTRACT FROM AUTHOR]

This paper presents a fast and robust dc-bus voltage control method for single-phase grid-connected dc/ac converters. The proposed technique precisely estimates the double-frequency (2-f) ripple of a dc-bus voltage and removes it from the voltage-control loop without adding any additional dynamics or oscillations. Conventionally, the 2-f ripple is managed by using large capacitors, which increase the cost and bulkiness of a converter. As a state-of-the-art approach, a notch filter (NF) or a dc-voltage estimator is used to effectively block the 2-f ripple from the voltage-control loop, which can significantly reduce the capacitor size. However, such an approach introduces new dynamics in the control loop, causes additional oscillations on the bus voltage, and increases the settling time of its response. This limits the degrees of freedom of the design to improve the overall system damping. The proposed method in this paper has no adverse impact on the original bus-voltage dynamic response. As a result, the bus-voltage control can be designed with higher speed and robustness and the whole system can operate with a reduced transient at both the bus voltage and the output ac current. The proposed approach is thoroughly analyzed and its effectiveness is validated through simulations and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a new methodology for automated design of power electronic systems realized through the use of artificial intelligence. Existing approaches do not consider the system's reliability as a performance metric or are limited to reliability evaluation for a certain fixed set of design parameters. The method proposed in this paper establishes a functional relationship between design parameters and reliability metrics, and uses them as the basis for optimal design. The first step in this new framework is to create a nonparametric surrogate model of the power converter that can quickly map the variables characterizing the operating conditions (e.g., ambient temperature and irradiation) and design parameters (e.g., switching frequency and dc link voltage) into variables characterizing the thermal stress of a converter (e.g., mean temperature and temperature variation of its devices). This step can be carried out by training a dedicated artificial neural network (ANN) either on experimental or simulation data. The resulting network is named as $\text{ANN}_{1}$ and can be deployed as an accurate surrogate converter model. This model can then be used to quickly map the yearly mission profile into a thermal stress profile of any selected device for a large set of design parameter values. The resulting data is then used to train $\text{ANN}_{2}$ , which becomes an overall system representation that explicitly maps the design parameters into a yearly lifetime consumption. To verify the proposed methodology, $\text{ANN}_{2}$ is deployed in conjunction with the standard converter design tools on an exemplary grid-connected PV converter case study. This study showed how to find the optimal balance between the reliability and output filter size in the system with respect to several design constraints. This paper is also accompanied by a comprehensive dataset that was used for training the ANNs. [ABSTRACT FROM AUTHOR]