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This paper proposed an improved phase disposition pulse width modulation (PDPWM) for a modular multilevel inverter which is used for Photovoltaic grid connection. This new modulation method is based on selective virtual loop mapping, to achieve dynamic capacitor voltage balance without the help of an extra compensation signal. The concept of virtual submodule (VSM) is first established, and by changing the loop mapping relationships between the VSMs and the real submodules, the voltages of the upper/lower arm's capacitors can be well balanced. This method does not requiring sorting voltages from highest to lowest, and just identifies the MIN and MAX capacitor voltage's index which makes it suitable for a modular multilevel converter with a large number of submodules in one arm. Compared to carrier phase-shifted PWM (CPSPWM), this method is more easily to be realized in field-programmable gate array and has much stronger dynamic regulation ability, and is conducive to the control of circulating current. Its feasibility and validity have been verified by simulations and experiments. [ABSTRACT FROM AUTHOR]

Ideally, the inner (the upper or lower arm) current of a modular multilevel converter (MMC) is ideally assumed to be the sum of a dc component and an ac component of the fundamental frequency. However, as ac current flows through the submodule (SM) capacitors, the capacitor voltages fluctuate with time. Consequently, the inner current is usually distorted and the peak/RMS value of it is increased compared with the theoretical value. The increased currents will increase power losses and may threaten the safe operation of the power devices and capacitors. This paper proposes a closed-loop method for suppression of the inner current in an MMC. This method is very simple and is implemented in a stationary frame, and no harmonic extraction algorithm is needed. Hence, it can be applied to single-phase or three-phase MMCs. Besides, this method does not influence the balancing of the SM capacitor voltages. Simulation and experimental results show that the proposed method can suppress the peak and RMS values of the inner currents dramatically. [ABSTRACT FROM AUTHOR]

In this paper, an improved pulse width modulation (PWM) method for chopper-cell (or half-bridge)based modular multilevel converters (MMCs) is proposed. This method can generate an output voltage with maximally 2N+1 (where N is the number of submodules in the upper or lower arm of MMC) levels, which is as great as that of the carrier-phase-shifted PWM (CPSPWM) method. However, no phase-shifted carrier is needed. Compared with the existing submodule unified pulse width modulated (SUPWM) method, the level number of the output voltage is almost doubled and the height of the step in the staircase voltage is reduced by 50%. Meanwhile, the equivalent switching frequency in the output voltage is twice that of the conventional SUPWM method. All these features lead to much reduced harmonic content in the output voltage. What is more, the voltages of the submodule capacitors can be well balanced without any close-loop voltage balancing controllers which are mandatory in the CPSPWM schemes. Simulation and experimental results on a MMC-based inverter show validity of the proposed method. [ABSTRACT FROM AUTHOR]