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This paper describes a flow control of the dye in the paper mill with the quasi-Z-source indirect matrix converter (QZSIMC) fed induction motor drive. More than a decade the voltage-source inverter (VSI) and current-source inverter (CSI) have been used to control the speed of the induction motor, which in turns controls the flow of dye. Recently, the matrix converter (MC) has been an excellent competitor for the VSI or CSI for its compactness. The voltage transfer ratio of the VSI, CSI, and MC has been limited to 0.866. Thus, the efficiency of these converters is less. To improve the voltage transfer ratio the quasi-Z-source network (QZSN) is to be used between voltage source and indirect MC (IMC). The modification in the shoot-through duty ratio of the QZSN varies the voltage transfer ratio greater than 0.866. Different voltage transfer ratios are needed for different voltage sag conditions. For a variation of the duty ratio of the QZSN, the fuzzy logic controller has been presented. To control the IMC vector control with space vector modulation has been presented. This paper proposes the implementation of QZSIMC adjustable speed drive for the flow control of dye in paper mill during different voltage sag conditions. A 4-kW prototype has been built and the effectiveness of the proposed system is verified with simulation results and experimental setup. Simulation is done in MATLAB, Simulink platform. Experimental setup is done with the aid of a TMS320F2812 (Texas Instrument) processor. The experimental results validate the maintenance of the speed of an induction motor at the set condition, thus controlling the perfect flow of dye in paper manufacturing technology. [ABSTRACT FROM AUTHOR]

In this paper, an overload and short-circuit protection method is proposed for voltage source inverter-based uninterruptible power supply (UPS) system. In order to achieve high reliability and availability of the UPS, short circuit and overload protection scheme are necessary. When overload or short circuit happens, using the proposed control method, the amplitude of the output current can be limited to a constant value, which can be set by the customer to avoid the destruction of the power converter, and to obtain a faster recovery performance as well. The detailed principle of the proposed protection method is discussed in this paper. It mainly contains three parts in the control diagram for current limit, first is the anti-windup in the voltage and current controllers, then the feedforward of the capacitor voltage to the current control loop, the last is the fast reset of the resonant part of the current controller when overcurrent happens. The procedure of developing the control method is also presented in the paper. Experimental results on a commercial UPS system are presented to verify the effectiveness of the control method. [ABSTRACT FROM AUTHOR]

This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

This paper describes a dc-link voltage control method of a single-phase back-to-back cascaded H-bridge inverter (SBCI) for a medium-voltage motor drive system. The main advantage of the SBCI topology over the conventional regenerative cascaded H-bridge topology with a three-phase active front-end (AFE) is a simple system structure, which is composed of an input transformer, a power cell, a current sensor, etc. However, the challenging points of the SBCI are larger voltage ripple in the dc-link capacitor and imbalance of dc-link voltages of each phase. The asymmetric dc-link voltage of each power cells could cause unstable operation such as over-modulation due to the lack of the dc-link voltage of a particular phase and result in over-voltage or under-voltage faults. In this paper, the control strategy of the dc-link voltage for the SBCI that uses the negative-sequence voltage of the converter is described. The proposed control method is verified with a computer simulation whose target is a 6.6-kV–1.25-MW medium-voltage drive system. Also, through the experimental setup with the prototype SBCI whose power rating is 16.2 kVA, the dc-link voltage of each AFE has been controlled within a 0.5% error of its reference value at the full load. [ABSTRACT FROM AUTHOR]

The instantaneous output power of the two-stage single-phase grid-connected photovoltaic (PV) inverter pulsates at twice the line frequency ($2f_{{\text{o}}}$), generating second harmonic current (SHC) in the front-end dc–dc converter and PV panel, which will affect the maximum power point tracking operation and deteriorate the overall conversion efficiency. The generating mechanism of the SHC is analyzed in this paper and it is pointed that in order to eliminate the SHC in the front-end dc–dc converter and PV panel, the voltage loop gain of the front-end dc–dc converter should be high enough at $2f_{{\text{o}}}$. Since there is a −180° phase abrupt at the resonant frequency of the input side filter capacitor and the inductor, the system may be unstable. To cope with this problem, the inductor current feedback active-damping scheme (ADS) is adopted. For further improving the loop gain at $2f_{{\text{o}}}$ , proportional–integral–resonant regulator with ADS (PIR + ADS) is proposed in this paper. Besides, a step-by-step closed-loop parameters design method is presented. Finally, a 3-kW two-stage single-phase grid-connected PV inverter has been fabricated and tested, and the experimental results verify the feasibility of the proposed control schemes. [ABSTRACT FROM AUTHOR]

This paper proposes a split-capacitor four-wire current source inverter, which is the dual of the split-capacitor four-wire voltage source inverter. Since the midpoint of the dc link is tied to the neutral point of ac filter capacitors, the common-mode voltage (CMV) is reduced significantly. Consequently, the leakage current issue is effectively addressed. The proposed circuit is cost-effective as no extra switch is added. This paper, first, establishes the equivalent common-mode circuit of the proposed inverter. The impact of the neutral line inductance on CMV is also analyzed. Then, a specific modulation is introduced to balance the dc-link voltages/currents. To achieve good input/output performance, a nonlinear control method is developed based on time-domain models. Finally, all the proposed methods and related theoretical analysis are verified by simulations and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes generation of a 15-level (14 concentric) dodecagonal voltage space vector structure (DVSVS) for a star connected induction motor drive. The proposed multilevel DVSVS is obtained by cascading two inverters, namely a primary and secondary inverter. The primary inverter is a five-level (5L) structure formed by stacking two three-level flying capacitors with individual reduced dc sources and the secondary inverter is also a 5L structure formed by cascading two capacitor-fed cascaded H-bridges (CHB). The active power is supplied by the primary inverter, while the secondary inverter acts as switched capacitor harmonics filter, and capacitors in the secondary inverter are balanced naturally irrespective of load power factor for entire modulation index. The high-voltage dc supply fed primary inverter is operated in quasi-square wave mode, while the high frequency switching is applied to low voltage CHBs, thus, reducing the overall switching loss. The proposed scheme gives the advantages of both DVSVS and multilevel structure, thus, making it one of the solutions for battery or stacked dc-fed applications. The paper also presents the experimental results as well as comparison study with the existing topologies to support the advantages of proposed scheme. [ABSTRACT FROM AUTHOR]

This paper presents a generalized power-decoupling control scheme using a multiport isolated bidirectional converter for a multilevel inverter, which has multiple dc links inside. In the proposed method, a single power-decoupling capacitor is needed for all the dc links in the multilevel inverter cell. First, a prototype of the power-decoupling concept of individual H-bridge cells in the multilevel inverter is proposed, using a separate power-decoupling circuit. Then, a more advanced one-step power-decoupling method is proposed. The lifetime and reliability of the multilevel inverter is improved as film capacitors replace the large capacitance electrolyte capacitors. A multi-input ports/single output voltage-fed dual half-bridge converter (MDHB) is used for the power-decoupling circuit. A steady-state analysis for the peak and root mean square of the MDHB current is carried out for the loss breakdown. The currents are functions of the switching frequency, phase shift, leakage inductance, turn ratio, and output voltage, which make the multiport transformer design complex. A design methodology is proposed, which takes into account the design of the copper and core losses as functions of the switching frequency and number of turns. Furthermore, a special winding method for the input port is illustrated to obtain identical leakage inductances for the uniform current distribution in the multiport transformer. The proposed MDHB employs a current-sensorless power-decoupling control that contributes to the spontaneous ripple rejection of all the dc links without individual link current information, as well as to the cost and size reduction. Hence, the ripple-rejection controller is independent of the control configuration of the multilevel inverter, and also available for universal applications of various inverter topologies. Since the primary-input ports of MDHB share a single magnetic core for interfacing the ripple power to the unified secondary ripple capacitor, the controller design becomes difficult in considering the dynamic interaction among the ports, along with the average-voltage control loop design. In this paper, the dynamic analysis and controller design procedure of the circuit is also presented. The power decoupling is achieved even when the ripple frequency is other than the double frequency of the inverter output, since the single-pole transfer function of the small-signal model of the MDHB allows sufficient phase margin, along with high bandwidth. The proposed power-decoupling method for the multilevel inverter is validated with the help of simulation and 1.2-kW hardware prototype experimental results. [ABSTRACT FROM AUTHOR]

This paper provides an experimental and theoretical discussion on dynamic braking for a medium-voltage induction motor fed by a modular multilevel double-star chopper-cell (DSCC) inverter. It is intended to apply the motor drive to large-capacity fans and compressors with a large moment of inertia. Each chopper cell consists of a bidirectional chopper and a braking chopper connecting a single small-rated braking resistor in series with a single IGBT. This configuration results in a “distributed” dynamic brake that provides a distinctive welcomed side effect of protecting all the bidirectional-chopper cells against sudden overvoltage. An experimental system rated at 400 V and 15 kW is designed, constructed, and tested to verify operating performance of the distributed dynamic brake. Experimental waveforms, along with simulated waveforms, confirm firmly that the distributed dynamic brake is feasible and effective in an induction motor fed by a medium-voltage high-power DSCC inverter for fans and compressors. Finally, this paper gives a design example of a distributed dynamic-braking resistor for the 11-kV, 12-MW induction motor driving a large-capacity fan equipped with a large moment of inertia. [ABSTRACT FROM AUTHOR]

In this paper, a single-phase shared leg converter is proposed along with two generalizations. The basic configuration has three two-level insulated gate bipolar transistor (IGBT) legs and is cascaded on the main power system by means of two injection transformers, such that one of these legs is shared between the transformers. The generalizations are expanded cases in which the converter has N\text{leg} legs. The first generalization is the cascaded shared leg (CSL), where the converter is cascaded by N\text{leg}-1 transformers, and one of the N\text{leg} legs is shared between all transformers. The second is the modular CSL, where Nmod modules, each one similar to the basic configuration, are cascaded by 2Nmod transformers. The conventional configurations considered for general comparisons are the cascaded h-bridge (CHB) and the cascaded half-bridge (CHfB). In this paper, we show that proposed configurations provide multilevel ac voltages with greater levels-per-switch ratio compared to the CHB. We also show that proposed CSL generalization has practically the same levels-per-switch than conventional CHfB and saves one transformer. Simulations and experimental results are shown to demonstrate proposed configurations performance and feasibility. [ABSTRACT FROM AUTHOR]

In this paper, direct torque control (DTC) of five-phase induction motor (FPIM) is implemented using three-level neutral point clamped (TL-NPC) inverter. One of the advantages of three-level inverter over two-level one for DTC operation is the low torque ripple. Also TL-NPC inverter through space vector modulation technique gives low $ dv/dt$ transition with better voltage waveform. By applying conventional lookup table for DTC, the TL-NPC inverter does not ensures lower $dv/dt$ transition. In this paper, a novel switching scheme for DTC of FPIM using TL-NPC inverter is proposed that ensures the low $ dv/dt$ transition and balancing of dc-link capacitor voltages of TL-NPC inverter. To form the lookup table for DTC operation, instead of using voltage vectors directly, virtual vectors (VVs) are utilized. Two switching states are used in one sample time to generate a VV in $\alpha \beta$ plane, which gives zero resultant voltage in $ xy$ plane. The switching strategy ensures low number of transitions to reduce the switching losses. The switching state redundancies are used in a novel way to balance the dc-link capacitor voltages without using any additional hardware. The proposed technique to balance the dc-link capacitor voltage gives lower switching frequency. The MATLAB/Simulink environment is used for the simulation and the results are validated through experiments. [ABSTRACT FROM AUTHOR]

A novel nine-level inverter topology for low-voltage applications is proposed in this paper. Each phase of the inverter is composed of a T-type three‐level cell and an active neutral point clamp three‐level cell. The operation principles and current conduction paths are analyzed in detail and phase-disposition sinusoidal pulsewidth modulation is used to balance voltages of flying capacitors and neutral point. The mathematical relationship between the capacitance and the desired ripple in the inverter output is established to select the intermediate capacitance value. Compared with other nine-level inverters suitable for low-voltage applications, the proposed inverter has advantages in a number of gate drivers, a number of dc sources, and efficiency. Simulation and experimental results under different settings of modulation index, power factor, output frequency, and load are presented to verify the effectiveness and performances of the proposed inverter. [ABSTRACT FROM AUTHOR]

During the lifespan of a polymer electrolyte membrane fuel cell (PEMFC) system, some heterogeneities between the cells constituting the stack can appear. The voltage of one particular cell in a stack may decrease because of specific aging or local malfunctioning such as drying. As a result, more heat is generated in this cell leading to an increase in its temperature and, thus, an additional voltage loss. This snowball effect can result in the failure of the cell. Therefore, the lifetime of a PEMFC stack can be increased by applying energy management to its cells. Note that the output voltage of a cell is lower than a stack. Hence, a high conversion ratio converter is necessary to implement such energy management. An efficient way to increase the output voltage is to connect the output capacitors of the converters such as the boosts in series. Ensuring the converters’ controllability is a key point to implement energy management. In this paper, an equalizer system is proposed to ensure the controllability of the boost converters. The balancing speed and the low number of switches are the main advantages of this system. The validity of the proposed system is verified through simulation and experiments. [ABSTRACT FROM AUTHOR]

In this paper, instantaneous pulse power compensator (IPPC) method is proposed to achieve power pulsation decoupling function for single-phase inverter applications. A smaller capacitor is placed in series with the traditional dc-link capacitor, and this smaller capacitor voltage is controlled using pulse currents to cancel out the dc-link voltage ripple. Unlike twice-line-frequency power decoupling method, the proposed IPPC method can compensate the pulsating power with all the orders harmonics on the dc-link line, not only the second-order component. Both modeling and simulation results show that IPPC method can achieve nearly zero voltage ripple for the dc-link capacitor since the pulse current is fully compensated. Whereas twice-line-frequency power decoupling method has limit in voltage ripple reduction, especially in small dc-link capacitance conditions. The experimental results based on a full-bridge topology decoupling circuit and a single-phase inverter application show consistent results with simulation results. A 16% reduction of the prototype size, i.e., 16% higher power density with only ∼1% efficiency penalty can be achieved by the proposed IPPC method when compared to the second-order power decoupling method. [ABSTRACT FROM AUTHOR]

The instantaneous input and output power of two-stage single-phase converter are imbalanced, resulting in the second harmonic current (SHC) in the dc–dc converter, dc source, or dc load. This paper revisits the SHC reduction control schemes from the dc-bus port-impedance perspective. The dc–dc converters in two-stage single-phase converters are categorized into two types, namely, bus-voltage-controlled converter (BVCC) and bus-current-controlled converter (BCCC). The dc-bus port impedance of the BVCC is revealed to be approximately inversely proportional to the voltage loop gain. Thus, for reducing the SHC in the BVCC, advanced control schemes are required for increasing the dc-bus port impedance. The dc-bus port impedance of the BCCC is proved to be a negative resistor within the control bandwidth. Hence, for reducing the SHC in the BCCC, the dc-bus voltage ripple should be limited. From the dc-bus port-impedance perspective, the SHC reduction control schemes are reclassified into closed-loop-design-based, virtual-impedance-based, and power-decoupling-based approaches, based on which, different SHC reduction control schemes are carefully reviewed and compared. Finally, potential challenges and issues are discussed. [ABSTRACT FROM AUTHOR]

This paper proposes a new 7-level inverter topology for induction motor drives. It is a hybrid topology formed by cascading a 5-level active neutral-point-clamped inverter with a 3-level T-type converter. It is obtained using low-voltage semiconductor devices with voltage blocking capability of Vdc/3 and Vdc/6. The topology uses three floating capacitors per phase, which are balanced within a pulsewidth modulation (PWM) switching duration using switching-state redundancies for each pole-voltage level. Topology forms two stacks at the front-end, which requires individual symmetrical dc source. The analysis of switching loss and conduction loss is performed and compared with some of the existing 7-level multi-level inverters reported in various literatures to show the advantages of the proposed topology. Furthermore, the single dc source operation with two stacked capacitors and closed-loop control of neutral-point voltage using symmetrical six-phase induction motor is proposed. The voltage-control algorithms for floating capacitors and dc-link stacked capacitors are proposed, which are independent of load power factor and modulation index. Open-loop V/f and closed-loop rotor field oriented control are performed, and various results at steady and transient states are presented to validate the aforementioned claims. [ABSTRACT FROM AUTHOR]

In order to produce more voltage levels and meet the requirement of the motor drive in electric vehicles (EVs), a hybrid cascaded multilevel converter based on three-level (TL) cells is proposed in this paper. In each unit, there is a battery and two series-connected capacitors, which hold a half of the battery voltage, respectively. Each TL cell is controlled to be connected or bypassed by a converter unit because of the modular structure. Three voltage levels can be produced when the TL cell is connected. All TL cells are cascaded to produce a staircase dc voltage, and an H-bridge is utilized to alternate the direction of it to form the ac output voltage. Compared to similar converter based on half-bridge arms, the proposed topology is able to produce more voltage levels with same number of battery modules. Voltage balances among TL cells and between two capacitors in each TL cell are both realized by a proposed overall control strategy. Experiments are provided to show the validity of the analysis. [ABSTRACT FROM AUTHOR]

There have been several advanced topologies proposed by the community for micro-inverter applications. However, many such applications suffer from unwanted second-order harmonic current ripple at dc input. Moreover, in the absence of suitable passive filter or ripple compensator, the second-order harmonics ripple may propagate into the dc source. This results in several problems to the system, related to system efficiency, life, cost, size, reliability, and stability. This paper proposes an adaptive sliding-mode controller to shape the output impedance of the boost-circuit of quasi-switched boost inverter such that the propagation of the ripple from dc link to the dc-input source is resisted. The quasi-switched boost inverter is one of the advanced and suitable topologies for the micro-inverter applications. The adaptive nature of the proposed controller improves the transient performance of the system at the line–load transients unlike some existing solutions, which affects dynamics adversely to achieve ripple mitigation objective. The controller ensures voltage regulation within ${5\%}$ at dc link. The proposed control technique is verified using a lab-prototype of 500 W quasi-switched boost inverter. [ABSTRACT FROM AUTHOR]

A multiphase-interleaved non-isolated high step-up dc/dc resonant converter for high-current applications with wide load range is proposed in this paper. The converter consists of an inverter stage with multiple resonant inverters in parallel interleaving operation that is cascaded to a common diode–capacitor rectifier stage. The topology of the inverter stage is a variation of class E inverter, which is designed for voltage boosting and of which the voltage gain is insensitive to load change. The rectifier stage comprises multiple pairs (correlated to the number of inverters in parallel) of diodes in parallel and a small output capacitor, which makes it simple to implement and of low cost. Together, the voltage gain variance of the converter can be confined within a small value and zero voltage switching operation can be maintained over a wide load range. A detailed mathematical analysis of the proposed converter is conducted for systematizing its design. A prototype of the proposed converter with an input voltage of 23.6 V, a rated output voltage of 190 V, and a rated output power of 80 W at 486 kHz is constructed for verification. A frequency controller is implemented to achieve fine regulation of the output voltage. [ABSTRACT FROM AUTHOR]

In this paper, a new space vector pulse width modulation method to extend the linear modulation range of a cascaded five level inverter topology with a single dc supply is presented. Using this method, the inverter can be controlled linearly and the peak phase fundamental output voltage of the inverter can be increased from 0.577 to 0.637 V\text{dc} without increasing the dc bus voltage and without exceeding the induction motor voltage rating. This new technique makes use of cascaded inverter pole voltage redundancy and property of the space vector structure for its operation. Using this, the induction motor drive can be operated till the full speed range (0–50 Hz) with the elimination of lower order harmonics in the phase voltage and phase current. The five-level topology presented in this paper is realized by cascading a two-level inverter and two full bridge modules with floating capacitors. The inverter topology and its operation for extending the modulation range is analyzed extensively. Simulation and experimental results for both steady-state and dynamic operating conditions are presented in this paper. [ABSTRACT FROM AUTHOR]

This paper analyzes the possibility of controlling the output voltage of a standalone single-phase inverter by directly controlling the output filter capacitor current without using a dedicated output voltage sensor. The plant modeling and controller design are presented. The proposed method depends on having the value of the output filter capacitance. A method to estimate the output filter capacitance is also presented. Rigorous analysis is done to show that the proposed sensorless scheme is largely insensitive to parameter variations and ensure that the output voltage is within specified regulations at utility level. It is also demonstrated in this paper that compared to the conventional voltage control scheme the proposed control scheme ensures an improved total harmonic distortion of the output voltage waveform. Experimental results presented validate the proposed scheme. [ABSTRACT FROM AUTHOR]

This paper presents a literature overview of all techniques proposed until the submission of this paper in terms of mitigating power oscillation in single-phase applications. This pulsating energy is the major factor for increasing the size of passive components and power losses in the converter and can be responsible for losses or malfunctioning of the dc sources. Reduction of power ripple at twice the fundamental frequency is one of the key elements to increase power converter density without lack of dc stiffness. Pulsation reduction is achieved by incorporating control techniques or auxiliary circuitries with energy storage capability in reactive elements to avoid this oscillating power to propagate through the converter, creating what is called as single-phase power decoupling. The topologies are divided as: rectifiers, inverters, and bidirectional. Among them, it is possible to classify as isolated and nonisolated converters. The energy storage method may be classify as: capacitive and inductive. For the power decoupling technique, it is convenient to divide as control and topology. The power decoupling technique may be implemented as series or parallel with respect to the ac, dc or link side. This paper represents the best reference on this topic. [ABSTRACT FROM AUTHOR]

In this paper, the application of an innovative transformer-less unified power flow controller (UPFC) for interconnecting two synchronous ac grids with large phase difference is presented. The proposed transformer-less UPFC is based on two cascaded multilevel inverters. As is well known, the real power flow between two generators is mainly determined by their phase difference. If two grids with large phase difference are initially separate from each other, once connected, there will be huge current flowing through the transmission line and will, thus, damage the generators or other supplementary equipments. Therefore, to connect two synchronous ac grids with each other without using an extra device is impossible. For decades, researchers have been investigating different approaches to this problem but still difficult to conquer, especially for real hardware implementation. An effective solution using the transformer-less UPFC is demonstrated in this paper. The transformer-less UPFC can realize grid interconnection, independent active and reactive power control, dc-link voltage balance control, etc. Furthermore, a 1-pu equipment can compensate system with phase difference as large as 30°. Experimental results based on the 13.8-kV/ 2-MVA transformer-less UPFC prototype are shown to validate the theoretical analysis. [ABSTRACT FROM AUTHOR]

A new boost-type multilevel inverter using switched capacitor structure is proposed. The main feature of the proposed inverter is boosting and multilevel output with small number of components. Due to the passive voltage balancing of each capacitor maintains a constant voltage without additional control. In this paper, the operation principle, the modulation method, the voltage/current stresses on switches and the determination of capacitances, the simulation results with MATLAB/Simulink R2015a, the experimental results, and the 2-kW simulation are shown. The simulation and the experiments were conducted under resistive load and inductive load conditions. In addition, the load variation was conducted in the experiment. Under both resistive load and inductive load conditions, the obtained waveforms by simulation and experiment agreed well with the theory. In the load variation experiment, the obtained waveforms were not distorted and the capacitor voltages maintained constant. [ABSTRACT FROM AUTHOR]

This paper introduces a new configuration of bidirectional multilevel converter in electric vehicle (EV) applications. It has multilevel dc–dc converter with a dc link capacitor voltage balance feature. The multilevel dc–dc converter operates in a bidirectional manner, which is a fundamental requirement in EVs. Compared to the conventional configurations, the proposed one only implements two extra power switches and a capacitor to balance the voltage of the T-type multilevel inverter (MLI) capacitor over a complete drive cycle or at fault conditions. Therefore, no extra isolated sensor, control loops, and/or special switching pattern are required. Moreover, the proposed configuration due to the high-frequency cycle-by-cycle voltage balance between ${C_N}$ and ${C_P}$ , the bulky electrolytic capacitors used in T-type MLI, are replaced with more reliable longer life film capacitors. This will result in a size and weight reduction of the converter by 20%. This allows more real estate for the EV battery in the chassis’ space envelope to increase its capacity. The proposed configuration is tested and validated using a matlab/Simulink simulation model. A laboratory prototype of 1 kW is built to provide the proof of concept results as well. [ABSTRACT FROM AUTHOR]

Modular multilevel converters are increasingly being considered or used for various medium voltage applications. Multiple control methods have been proposed for the control of the direct to three-phase modular multilevel converter. They differ one from another in the way the capacitor voltage ripples are handled, i.e., either neglected, estimated, reconstructed by filtering or measured. This has implications on the performance level that can be obtained. This paper provides insights on the advantages and drawbacks of each control method, in inverter and rectifier mode, with a fair and thorough assessment supported by extensive simulations, with converter ratings that are realistic for medium voltage applications. Finally, this works highlights the impact of the higher dynamics for medium voltage direct current (dc) applications compared to high voltage dc ones on the choice of the control method. [ABSTRACT FROM AUTHOR]

This paper presents new space vector pulsewidth modulation (PWM) strategies for a single-phase three-level buck-boost neutral point clamped inverter coupled with impedance-source (IS) network. These strategies can be implemented for systems with any IS network with neutral point. The case study system is based on the quasi-Z-source inverter with continuous input current. To demonstrate an improved performance, the strategies are compared with a traditional PWM strategy. The advantages lie in reduced switching number, without output voltage quality distortion. The simulation and experimental results confirm the theoretical predictions. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

In this paper, capacitor current sensorless control by using an observer is applied in a seamless transfer single-phase inverter. The proposed control system is a multiloop control system. The control loop is composed of a capacitor voltage outer control loop and capacitor current inner control loop for stand-alone mode. For on-grid mode, the grid current outer loop controller is combined with the stand-alone control structure to form a simple controller structure for mode switching. The capacitor current feedback signal is calculated using the observer in the discrete-time domain and thus sensors are not required. Use of the proposed observer for the inverter with capacitor current control has many advantages, such as sensorless capacitor current calculation, one-sample-ahead data prediction for sampling delay compensation, and an average capacitor current without ripple components. Verification of the theoretical analysis is presented through simulation and experiment. A 5-kW single-phase inverter prototype combined with a Li-ion battery is set up with a digital controller using a TI TMS320F28377D microcontroller unit to confirm the feasibility of the system. [ABSTRACT FROM AUTHOR]

In this paper, a simple controller configuration for the decentralized parallel operation of single-phase inverters in stand-alone ac supply systems is proposed. The configuration is designed considering the unavailability of the filter capacitor voltage and grid current information to the controller. Due to the unavailability of voltage information, internally estimated voltage references and the measured value of the converter-side inductor current are used for the calculation of the active and reactive power. Frequency and voltage droop characteristics are used, and hence, communication is not required. The operation of the inverter at the reference voltage magnitude and frequency is achieved by the direct control of the modulating wave. Therefore, inability to implement closed loops caused by the absence of certain voltage and current information is mitigated. The proposed controller has the provision for protection of switching devices during overcurrent situation. The accuracy and feasibility of the proposed controller are validated using the simulation and experimental results. [ABSTRACT FROM AUTHOR]

Transformerless photovoltaic (PV) grid-connected inverters have become more and more popular in distributed PV power generation systems due to the advantages on high efficiency, low cost, and small size. However, common-mode (CM) current in the transformerless PV inverters can result in serious electromagnetic interference and insecurity, which will further reduce the reliability of the PV inverter systems. In this paper, an improved H5 topology, namely H5-D topology, is proposed, in which a clamping diode is added on the basis of H5 topology to eliminate the CM voltage fluctuation in H5 topology. Further, the PSIM simulation results of the H5-D topology and H5 topology are given and compared, especially, the performance of H5-D topology for CM current suppression is presented and analyzed concretely. Finally, the experimental prototypes of the H5-D topology and H5 topology are built and tested, and the experimental results validate the advantages of the H5-D topology. The proposed H5-D topology provides a new practical topology for distributed PV grid-connected power generation systems. [ABSTRACT FROM AUTHOR]

In this paper, a novel space-vector pulsewidth modulation technique for a five-level active neutral-point clamped (5L-ANPC) inverter is proposed to eliminate the common-mode voltage (CMV). For the 5L-ANPC inverter, which produces a good output voltage performance and lowdv/dt, the total 125 voltage vectors can be generated, among which the proposed scheme employs only 19 voltage vectors producing a zero CMV. Due to the limitation of voltage vectors selected, the dc-link capacitor voltages of the 5L-ANPC inverter cannot be balanced by themselves. Therefore, the capacitor voltages of the inverter should be controlled by choosing the redundant switching states appropriately. The validity of the proposed modulation scheme has been verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

A grid-connected inverter with critical loads should be able to supply a stable voltage to critical loads at the instant of a mode change as well as during clearing time while quickly detecting unintentional islanding. The indirect current control has been proposed to provide not only a stable voltage to critical loads during clearing time but also a seamless transfer of inverters at the instant of a mode change. However, the conventional islanding detection methods cannot be applied to the indirect current control based inverter since the magnitude and frequency of voltage do not vary when an islanding occurs. This paper proposes a reactive power P&O anti-islanding method for the indirect current control. The proposed islanding detection method generates a small reactive power perturbation at the output of the inverter and detects the islanding by observing reactive power mismatch during the islanding. Using the proposed method, the inverter can supply high quality power to critical loads without distorting the output current during the clearing time. The proposed anti-islanding method is validated through simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a control method for a five-level hybrid flying-capacitor (5L-HFC) inverter, of which structure stems from the conventional five-level active neutral-point-clamped (5L-ANPC) topology by dividing the dc-link stage into three series-connected capacitors. In this inverter, the voltage stress on the power switches connected to the dc link is reduced by a half compared with that of the 5L-ANPC topology, thus the lower number of equally voltage-rated power devices can be employed. Also, the power losses in the 5L-HFC inverter are more evenly distributed than in the 5L-ANPC. In order to balance the dc-link capacitor voltages, a third-order harmonic offset injection is applied. When a diode rectifier is used to supply the dc bus voltage, the balancing method is not effective if the modulation index is higher than 0.64. Thus, an auxiliary circuit is needed to support the balancing of the dc-link capacitor voltages. However, the unbalancing problem can be overcome in a full-range operation without the auxiliary circuit if the back-to-back configuration is utilized. Finally, simulation and experiment results have verified the performance of the 5L-HFC inverter with the proposed control method. [ABSTRACT FROM AUTHOR]

In this paper, a modular control approach has been proposed for a single- and three-phase differential-mode Ćuk inverter (DMCI) operating with a recently proposed discontinuous-modulation scheme that offers tangible performance benefits over conventional continuous modulation scheme. The modular control scheme uses a combination of a transformation and adaptive control law to meet tracking requirements in the presence of converter nonlinearity. Experimental results for the single- and three-phase DMCI are provided for startup, steady state, load transition, and total harmonic distortion using different types of loads, which validate the efficacy of the implemented modular tracking controller. Further, detailed stability of the closed-loop DMCI module is provided. [ABSTRACT FROM AUTHOR]

This paper proposes a new control technique, which only employs the primary-side controller and load identification approach to adjust charging voltage/current for series–series (SS) and series–parallel (SP) compensated wireless power transfer (WPT) systems. The advantages are that dual-side wireless communication for real-time charging current/voltage adjustment is avoided as well as it is suitable for different charging modes, e.g., constant voltage (CV) and constant current (CC) charging defined by the battery charging profile. The load identification approach, which utilizes reflected impedance theory and quadrature transformation algorithm for calculating the active power, is proposed to estimate the equivalent load resistance of battery. Then, the CV/CC charging for both SS and SP compensation are achieved by the PI-controlled phase-shift H-bridge inverter. The simulation and experimental results validate the feasibility of proposed control method. During the CC charging, 3.01 and 3.03 A for SS and SP compensation with the error of 1.2% and 1.4% are achieved. During the CV charging, 25.8 and 25.7 V for SS and SP compensation with the error of 1.1% and 1.3% are realized. The proposed method improves the performance of both SS- and SP-compensated WPT systems to be more suitable for the applications that require compact and lightweight receiver. [ABSTRACT FROM AUTHOR]

The five-level active neutral-point-clamped (5L-ANPC) converter is becoming an attractive topology of multilevel converter family. A novel SVPWM algorithm based on line voltage coordinate was studied in this paper to overcome shortcomings of the traditional algorithm. Through coordinate transformation, steps of determining the basic vectors and the solution about the basic vector corresponding action time are simplified. Combining with the characteristics of 5L-ANPC converter and the new control algorithm, a method of controlling the voltage balancing of dc-link capacitors and floating-capacitors is proposed. According to the voltage of dc-link capacitors, the suitable switching sequence which can balance the voltage of dc-link capacitors is chosen. The high common-mode voltage will affect the service life of motor and reduce the reliability of the system especially in high-voltage converter. The common-mode voltage is also reduced by choosing the right switching state in this paper. The validity of the proposed method was proved by the experimental results. [ABSTRACT FROM AUTHOR]

Cascaded converter is formed by connecting two subconverters together, sharing a common intermediate dc-link voltage. Regulation of this dc-link voltage is frequently realized with a proportional-integral (PI) controller, whose high gain at dc helps to force a zero steady-state tracking error. Such precise tracking is, however, at the expense of increasing the system type, caused by the extra pole at the origin introduced by the PI controller. The overall system may, hence, be tougher to control. To reduce the system type while preserving precise dc-link voltage tracking, this paper proposes a coordinated control scheme for the cascaded converter, which uses only a proportional dc-link voltage regulator. The resulting converter is thus dynamically faster, and when compared with the conventional PI-controlled converter, it is less affected by impedance interaction between its two subconverters. The proposed scheme can be used with either unidirectional or bidirectional power flow, and has been verified by simulation and experimental results presented in this paper. [ABSTRACT FROM PUBLISHER]

With increasingly prominent role of rail transit in the entire urban transport system, an auxiliary inverter is used increasingly. The complicated and fluctuating load condition of the auxiliary inverter implies special designs about structure and control strategy are necessary. For this purpose, a comprehensive control strategy is proposed. First of all, this paper proposes a structure that is capable of suppressing unbalanced voltage. Second, the control strategy based on the resonant controller is proposed, which can balance split capacitors voltage, is capable of suppressing the effect of unbalanced load and nonlinear load. This paper introduces the design method of the control system in detail. Then, this paper simulates the proposed comprehensive control strategy in MATLAB. Finally, experimental results are presented, which fully demonstrate the excellent performance of the comprehensive control strategy. [ABSTRACT FROM PUBLISHER]

In this paper, a modulation and control method for the new transformerless unified power flow controller (UPFC) is presented. As is well known, the conventional UPFC that consists of two back-to-back inverters requires bulky and often complicated zigzag transformers for isolation and reaching high power rating with desired voltage waveforms. To overcome this problem, a completely transformerless UPFC based on an innovative configuration of two cascade multilevel inverters has been proposed. The new UPFC offers several advantages over the traditional technology, such as transformerless, light weight, high efficiency, low cost and fast dynamic response. This paper focuses on the modulation and control for this new transformerless UPFC, including optimized fundamental frequency modulation for low total harmonic distortion and high efficiency, independent active and reactive power control over the transmission line, dc-link voltage balance control, etc. The new UPFC with proposed control method is verified by experiments based on 4160-V test setup. Both the steady-state and dynamic-response results will be shown in this paper. [ABSTRACT FROM PUBLISHER]

In order to solve the neutral-point voltage unbalancing problem for three-level inverters, this paper proposes a method to balance the neutral-point voltage for three-level inverters with variable modulation wave offset sinusoidal pulse-width modulation (SPWM) control. Based on the mathematical expressions of neutral-point voltage unbalancing, the factors are studied, which affect the fluctuation of neutral-point voltage. Theoretically the mathematical expressions of the neutral-point voltage with the proposed method are derived, and the mathematical relationship between the fluctuation of neutral-point voltage and the adjusting offset of modulation wave is studied. This proposed method realizes controlling the neutral-point voltage balance by dynamically calculating the offset superimposed to the modulation wave based on SPWM (DCOSPWM). This DCOSPWM method is very simple, which has good steady-state performance and is easy for digital implementation. The simulation results verify the correctness of the theoretical analysis in this paper, and the feasibility and effectiveness of this method is verified by the experiments in the experimental platform of neutral point clamped three-level inverters based on digital signal processor (DSP)-complex programmable logic device (CPLD). [ABSTRACT FROM AUTHOR]

Two-stage single-phase inverters have been widely used as they can achieve voltage matching and galvanic isolation between the input and output. Due to the pulsating output power of the downstream inverter, an ac current at twice the output frequency, which is called second harmonic current (SHC), arises in the input side of the downstream inverter. This SHC will penetrate to the front-end dc-dc converter, leading to reduced conversion efficiency. This paper first analyzes the propagation mechanism of the SHC and load transient response of two-stage single-phase inverters from the viewpoint of output impedance. Then, based on the current mode control and load current feed forward, two control methods to achieve low SHC in the front-end dc-dc converter and fast dynamic performance during load transient are proposed in this paper. Finally, a 2-kW two-stage single-phase inverter prototype has been constructed and tested, and the experimental results are provided to verify the effectiveness of the proposed control methods. [ABSTRACT FROM AUTHOR]

This paper presents a dual modular multilevel converter (MMC) topology that utilizes energy exchange between adjacent-arm submodules (SMs), operating with out-of-phase modulation. The proposed configuration is applicable to medium-voltage high-power variable-speed drives incorporating open-end stator winding machines. A novel concept of power decoupling between adjacent-arm SMs in the dual MMC topology is realized through high-frequency transformer-based dc–dc converter modules. This concept offers a significant reduction in the sizing requirement of the SM capacitance and the stored energy in the MMC system, while avoiding the problem of wide voltage fluctuations of SM capacitors, especially at low operating frequencies. The proposed configuration can produce dc voltage; therefore, a machine speed range from zero speed to the rated speed is possible under the rated torque operating condition. The operating principles of the proposed dual MMC configuration are elaborated and necessary mathematical analysis is derived. Simulation and experimental results verify the concept of the proposed drive configuration. [ABSTRACT FROM AUTHOR]

The simple boost control (SBC) method is usually used to control the shoot-through state in a single-phase single-stage quasi-switched boost inverter (qSBI). This paper proposes a new pulse-width modulation (PWM) control scheme to improve the modulation index for the qSBI. The advantages of the proposed method for the qSBI over the conventional SBC method are as follows: 1) the modulation index is larger; 2) the voltage stress on the capacitor, diodes, and switches is reduced significantly; 3) the high-frequency peak-to-peak inductor current and capacitor voltage ripples are smaller; 4) the shoot-through current is lower; and 5) the efficiency is higher. The operating principles and circuit analysis for the proposed PWM control scheme are shown. To verify the performance of the proposed PWM control method, a 400W prototype was built with a 110 V/50 Hz output voltage. The experimental results matched those of the theoretical analysis. [ABSTRACT FROM PUBLISHER]

Vehicle to grid (V2G) reactive power compensation using electric vehicle (EV) onboard chargers helps to ensure grid power quality by achieving unity power factor operation. However, the use of EVs for V2G reactive power compensation increases the second-order harmonic ripple current component at the DC-side of the charger. For single-phase, single-stage EV chargers, the ripple current component has to be supplied by the EV battery, unless a ripple compensation method is employed. Additionally, continuous usage of EV chargers for reactive power compensation, when the EV battery is not charging from the grid, exposes the EV battery to these undesirable ripple current components for a longer period and discharges the battery due to power conversion losses. This paper presents a way to provide V2G reactive power compensation through a boost inverter-based single stage EV charger and a DC-side capacitor without adversely affecting the EV battery. The operation of the boost inverter-based EV charger with second-order harmonic and switching frequency ripple current reduction, the dynamic behavior of the system, the transition between different operating modes, the DC-side capacitor voltage control above a minimum allowed voltage, and the DC-side capacitor sizing are extensively analyzed. The performance of the proposed system is verified using an experimental prototype, and presented results demonstrate the ability of the system to provide V2G reactive power compensation both with and without the EV battery. [ABSTRACT FROM PUBLISHER]

Four-level nested neutral-point clamped (NNPC) inverters experience severe voltage balancing problems under low output-frequency conditions when the conventional four-level space vector modulation (4L-SVM) technique is applied, which limits their wider application. In order to get a complete control of the flying-capacitor voltages, and to alleviate the calculation burden of conventional 4L-SVM, a simplified but effective 4L-SVM technique along with the voltage balance control (VBC) function is proposed in this paper. For low modulation indexes, zero and small vectors are selectively utilized and distributed to force the average charging and discharging time of flying capacitors to be equal to each other during every switching period, so that voltage ripples are greatly reduced to be within an acceptable level under low output-frequency conditions. For high modulation indexes, the simplification of conventional 4L-SVM for NNPC inverters into two-level SVM is proposed to reduce the computation complexity. Principles of the proposed 4L-SVM and VBC are elaborated in detail. The steady-state, transient-state, and VBC performances are investigated and compared with the case where the conventional 4L-SVM is applied. Simulation results of a 5 MVA inverter system and experimental results of a scaled-down 5 kVA inverter system are presented to validate the proposed method. [ABSTRACT FROM PUBLISHER]

In this paper, the properties and operation of the virtual-space-vector pulse-width modulation (PWM) for a three-level neutral-point-clamped inverter with unbalanced dc-links are studied. By quantitatively analyzing the characteristics of the revised space-vector diagram (SVD) with unbalanced dc-links, the defined virtual SVD (VSVD) for the unbalanced case is theoretically proven identical to the VSVD of the conventional virtual-space-vector PWM (VSVPWM) strategy with balanced dc-links. The well-developed and fast-processing methods to calculate the durations of the nearest three virtual vectors for the conventional VSVPWM can be directly utilized. In addition, a control strategy to realize the asymmetric control of the dc-link voltages with VSVPWM is also studied, and this method can adjust the unbalancing degree with a high accuracy for any modulation indexes and load power factors. Simulated and experimental results are given to validate the effectiveness. [ABSTRACT FROM PUBLISHER]

The input power of the single-phase power factor correction ac–dc converter pulsates at twice the line frequency, while the output power of the single-phase dc–ac inverter pulsates at twice the output frequency. The pulsating power will result in second harmonic current (SHC) in the ac–dc converter and dc–ac inverter. In this paper, electrolytic capacitor-less second harmonic current compensator (SHCC) is presented to compensate the SHC. The SHCC has two operating modes, namely, charging mode and discharging mode. To achieve an excellent SHC compensation performance, a hybrid one-cycle control (OCC) is proposed to regulate the port current of the SHCC, and the SHCC can stably operate in both the charging mode and discharging mode. To avoid the mode detection required in the hybrid OCC and ensure seamless transition between the two modes, the OCC with dc bias is further proposed. Besides, a peak voltage control is proposed to regulate the storage capacitor voltage in the SHCC for reducing the power losses of the SHCC at light load. A 1-kW two-stage inverter with the SHCC is fabricated and tested, and the experimental results are provided to verify the effectiveness of the proposed control schemes. [ABSTRACT FROM AUTHOR]

DC-link electrolytic capacitor critically affects the lifetime of the motor drive system. This paper proposes an inverter power control strategy based on dc-link voltage regulation for the electrolytic capacitor-less interior permanent magnet synchronous motor drive system. The dc-link electrolytic capacitor is replaced by a small film capacitor and the power factor correction circuit is also eliminated. Hence, the inverter power should be regulated effectively to achieve high input power factor and low grid current harmonics. The inverter power control loop based on proportional resonant (PR) controller is established to regulate the inverter power into sinusoidal wave. The PR controller can be designed to achieve a high gain at the desired frequency and the parameters are easy to design due to the simple structure. In addition, a power compensation method based on the dc-link voltage regulation is used to diminish the error of inverter power control, which does not depend on the precise calculation and is easy to realize. The effectiveness of the proposed method is demonstrated by the experimental results on an air conditioner. The input power factor can reach 0.992 and the harmonics of grid current are considerably lower than the requirement of EN61000-3-2 standard. [ABSTRACT FROM PUBLISHER]

In this paper, a dc to ac converter with the ability of voltage increasing is presented. This inverter is designed in a way that just one dc source is used. Also, by using power storage technique and with combining charged capacitors and dc source in series form, output voltage levels can be increased. This inverter is in a modular structure and has the ability of capacitor's voltage self-balancing. H-bridge inverter was not used at the end of the proposed converter and all elements tolerate a voltage stress equal to the amount of input dc source. This leads to remarkable decrease of total standing voltage and peak inverse voltage. Other advantage of the proposed inverter is its potentiality of performance in high-frequency applications. The modular form of the proposed inverter provides the potentiality of extension to higher voltage levels and eases the maintenance. Moreover, considering to the fact that the stress of all components of the suggested inverter is equal to the input source, the performance in high voltage is added to the characteristics of the proposed inverter. The nine-level structure of the proposed inverter is simulated and laboratory test is carried out for the verification of its performance. [ABSTRACT FROM PUBLISHER]