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This paper describes a flow control of the dye in the paper mill with the quasi-Z-source indirect matrix converter (QZSIMC) fed induction motor drive. More than a decade the voltage-source inverter (VSI) and current-source inverter (CSI) have been used to control the speed of the induction motor, which in turns controls the flow of dye. Recently, the matrix converter (MC) has been an excellent competitor for the VSI or CSI for its compactness. The voltage transfer ratio of the VSI, CSI, and MC has been limited to 0.866. Thus, the efficiency of these converters is less. To improve the voltage transfer ratio the quasi-Z-source network (QZSN) is to be used between voltage source and indirect MC (IMC). The modification in the shoot-through duty ratio of the QZSN varies the voltage transfer ratio greater than 0.866. Different voltage transfer ratios are needed for different voltage sag conditions. For a variation of the duty ratio of the QZSN, the fuzzy logic controller has been presented. To control the IMC vector control with space vector modulation has been presented. This paper proposes the implementation of QZSIMC adjustable speed drive for the flow control of dye in paper mill during different voltage sag conditions. A 4-kW prototype has been built and the effectiveness of the proposed system is verified with simulation results and experimental setup. Simulation is done in MATLAB, Simulink platform. Experimental setup is done with the aid of a TMS320F2812 (Texas Instrument) processor. The experimental results validate the maintenance of the speed of an induction motor at the set condition, thus controlling the perfect flow of dye in paper manufacturing technology. [ABSTRACT FROM AUTHOR]

Modular multilevel converters (MMCs) can be configured to perform ac/ac conversion, which makes them suitable as railway power supplies. In this paper, a hierarchical control scheme for ac/ac MMCs for railway power supplies is devised and evaluated, considering the requirements and the operating conditions specific to this application. Furthermore, admittance models of the ac/ac MMC are developed, showing how the suggested hierarchical control scheme affects the three-phase and the single-phase side admittances of the converter. These models allow for analyzing the stability of the interconnected system using the impedance-based stability criterion and the passivity-based stability assessment. Finally, the findings presented in this paper are validated experimentally, using a down-scaled MMC. [ABSTRACT FROM AUTHOR]

The series bridge converter (SBC) is a modular multilevel converter (MMC) recently developed to enhance power density in high-voltage high-power applications. The MMC is a well-established solution, widely researched, and exploited in practical HVdc connections, thanks to its high power quality and high efficiency. However, the main limitation of the MMC is the relatively large energy storage, also due to the fact that power ripples in the submodule capacitors include a component at the fundamental ac frequency. As a result, volume becomes critical in applications such as offshore or city center in-feeds, where space is restricted and expensive. The SBC offers a more compact footprint by exploiting a series connection on the dc side and by operating the submodules with rectified waveforms, thus moving the minimum component of the instantaneous power to twice the ac fundamental and reducing capacitors size. The drawback of the converter is a more complex energy control compared to the MMC. This paper proposes the first experimental validation of the SBC, using a 2-kW laboratory-scale prototype. Since the basic converter design has been discussed in previous papers, the focus of this paper is on converter control design and experimental validation. [ABSTRACT FROM AUTHOR]

The main technical challenge of the medium-voltage motor drives with modular multilevel converter (MMC) is the serious low-frequency fluctuation on the capacitor voltages, and the existing suppression methods inevitably inject high-frequency circulating currents in MMC. However, the output currents are evidently distorted by the large injected components, while little research has been done to study and solve this problem. This paper analyzes and proves the essential interactions between the output current distortion and the injected components, and the specific dominant output harmonic groups are derived and summarized, revealing the nature of the problem, and it can be taken as a favorable reference for the controller designing. Based on the derivations, this paper proposes a novel suppression method for the greatly improved harmonic characteristics of the output currents during the low-frequency operation. The output harmonics can be accurately measured by the proposed control and effectively suppressed for much lower current total harmonic distortion, benefiting for the superior output control performances with improved efficiency. The simulation results on PSCAD/EMTDC and experimental verifications on a 2.2 kW MMC-based motor drive prototype prove the validity of the presented harmonic analysis and suppression method. [ABSTRACT FROM AUTHOR]

Various methods have been presented in the past to emulate the electrical behavior of modular multilevel converters (MMCs). To meet the demands for the reliability aspect study of MMCs, this paper proposes a viable setup to emulate the thermal behavior and to investigate its feasibility for reliability testing and thermal model validation of the power modules in the MMC. The proposed mission profile emulator has three distinctive features: 1) capable of emulating and measuring the thermal stresses of power modules; 2) capable of implementing practical switching profile as a full-scale MMC; and 3) having significantly reduced requirement for dc power supply compared to existing setups used for electrical studies. Theoretical discussions, and simulations as well as the experimental results are presented to demonstrate the capability of the mission profile emulator both electrically and thermally. Moreover, this paper is accompanied by a video demonstrating how to measure the junction temperature of the power devices using the optical fiber and the thermal camera. [ABSTRACT FROM AUTHOR]

In this paper, an overload and short-circuit protection method is proposed for voltage source inverter-based uninterruptible power supply (UPS) system. In order to achieve high reliability and availability of the UPS, short circuit and overload protection scheme are necessary. When overload or short circuit happens, using the proposed control method, the amplitude of the output current can be limited to a constant value, which can be set by the customer to avoid the destruction of the power converter, and to obtain a faster recovery performance as well. The detailed principle of the proposed protection method is discussed in this paper. It mainly contains three parts in the control diagram for current limit, first is the anti-windup in the voltage and current controllers, then the feedforward of the capacitor voltage to the current control loop, the last is the fast reset of the resonant part of the current controller when overcurrent happens. The procedure of developing the control method is also presented in the paper. Experimental results on a commercial UPS system are presented to verify the effectiveness of the control method. [ABSTRACT FROM AUTHOR]

This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

This paper presents bidirectional grid-connected modular multilevel converters (MMC) with direct digital control and division-summation processes to achieve power-injection and rectification functions. A direct digital control is developed to track current references, regulate dc-bus voltage and cell voltage, and balance the upper and lower dc-bus voltages. It can accommodate wide filter-inductance variation and take care of source voltage harmonics to achieve tight current tracking and low distortion output current. Based on the power-balance principle, the commands of arm currents can be determined directly. In this paper, the MMC configuration is introduced first, and then the control laws for current tracking and voltage regulation are derived in detail. Experimental and simulated results obtained from two 50 kW MMCs operated in power-injection and rectification modes have verified the analysis and discussion. [ABSTRACT FROM AUTHOR]

The continuous increasing share of power-converter-based renewable energies weakens the power system inertia. The lack of inertia becomes a main challenge to small-scale modern power systems in terms of control and stability. To alleviate adverse effects from inertia reductions, e.g., undesirable load shedding and cascading failures, three-phase grid-connected power converters should provide virtual inertia upon system demands. This can be achieved by directly linking the grid frequency and voltage references of dc-link capacitors/ultracapacitors. This paper reveals that the virtual inertia control may possibly induce instabilities to the power converters under weak grid conditions, which is caused by the coupling between the d- and q-axes as well as the inherent differential operator introduced by the virtual inertia control. To tackle this instability issue, this paper proposes a modified virtual inertia control to mitigate the differential effect, and thus, alleviating the coupling effect to a great extent. Experimental verifications are provided, which demonstrate the effectiveness of the proposed control in stabilizing three-phase grid-connected power converters for inertia emulation even when connected to the weak grid. [ABSTRACT FROM AUTHOR]

This paper presents a fast and robust dc-bus voltage control method for single-phase grid-connected dc/ac converters. The proposed technique precisely estimates the double-frequency (2-f) ripple of a dc-bus voltage and removes it from the voltage-control loop without adding any additional dynamics or oscillations. Conventionally, the 2-f ripple is managed by using large capacitors, which increase the cost and bulkiness of a converter. As a state-of-the-art approach, a notch filter (NF) or a dc-voltage estimator is used to effectively block the 2-f ripple from the voltage-control loop, which can significantly reduce the capacitor size. However, such an approach introduces new dynamics in the control loop, causes additional oscillations on the bus voltage, and increases the settling time of its response. This limits the degrees of freedom of the design to improve the overall system damping. The proposed method in this paper has no adverse impact on the original bus-voltage dynamic response. As a result, the bus-voltage control can be designed with higher speed and robustness and the whole system can operate with a reduced transient at both the bus voltage and the output ac current. The proposed approach is thoroughly analyzed and its effectiveness is validated through simulations and experimental results. [ABSTRACT FROM AUTHOR]

This paper describes a dc-link voltage control method of a single-phase back-to-back cascaded H-bridge inverter (SBCI) for a medium-voltage motor drive system. The main advantage of the SBCI topology over the conventional regenerative cascaded H-bridge topology with a three-phase active front-end (AFE) is a simple system structure, which is composed of an input transformer, a power cell, a current sensor, etc. However, the challenging points of the SBCI are larger voltage ripple in the dc-link capacitor and imbalance of dc-link voltages of each phase. The asymmetric dc-link voltage of each power cells could cause unstable operation such as over-modulation due to the lack of the dc-link voltage of a particular phase and result in over-voltage or under-voltage faults. In this paper, the control strategy of the dc-link voltage for the SBCI that uses the negative-sequence voltage of the converter is described. The proposed control method is verified with a computer simulation whose target is a 6.6-kV–1.25-MW medium-voltage drive system. Also, through the experimental setup with the prototype SBCI whose power rating is 16.2 kVA, the dc-link voltage of each AFE has been controlled within a 0.5% error of its reference value at the full load. [ABSTRACT FROM AUTHOR]

The instantaneous output power of the two-stage single-phase grid-connected photovoltaic (PV) inverter pulsates at twice the line frequency ($2f_{{\text{o}}}$), generating second harmonic current (SHC) in the front-end dc–dc converter and PV panel, which will affect the maximum power point tracking operation and deteriorate the overall conversion efficiency. The generating mechanism of the SHC is analyzed in this paper and it is pointed that in order to eliminate the SHC in the front-end dc–dc converter and PV panel, the voltage loop gain of the front-end dc–dc converter should be high enough at $2f_{{\text{o}}}$. Since there is a −180° phase abrupt at the resonant frequency of the input side filter capacitor and the inductor, the system may be unstable. To cope with this problem, the inductor current feedback active-damping scheme (ADS) is adopted. For further improving the loop gain at $2f_{{\text{o}}}$ , proportional–integral–resonant regulator with ADS (PIR + ADS) is proposed in this paper. Besides, a step-by-step closed-loop parameters design method is presented. Finally, a 3-kW two-stage single-phase grid-connected PV inverter has been fabricated and tested, and the experimental results verify the feasibility of the proposed control schemes. [ABSTRACT FROM AUTHOR]

This paper presents a method to enhance the dc-bus voltage-control loop of a single-phase grid-connected dc/ac converter, which improves its responses in terms of oscillation on its dc-bus voltage as well as its output ac current. Conventionally, the double-frequency (2-f) ripple is reduced by using a large electrolyte capacitor, which increases the cost and size of the system. A state-of-the-art approach is to use a notch filter (NF) to block the 2-f ripple in the voltage-control loop. This can significantly reduce the capacitor size. The existing presentations of this method, however, do not integrate the internal dynamics of the NF into consideration. This paper proposes a new way of implementing the NF, which allows integration of its internal variables into the control loop. The resulted system exhibits enhanced transient responses at both the dc-bus voltage and the output ac current. The proposed method is analyzed in detail and its effectiveness is verified through simulations and experimental results. [ABSTRACT FROM AUTHOR]

Light-emitting diodes (LEDs) are solid-state devices with specific $v$ – $i$ characteristics. In this paper, we study the basic requirement of the driving circuits and discuss the proper approach to drive LEDs in view of their characteristics. We compare voltage source driving and current source driving, and discuss their relative advantages and constraints. We specifically introduce the use of circuit duality principle for developing new current-source-mode (CSM) drivers that are less known but are theoretically more versatile compared to their conventional voltage-source-mode counterparts. The study highlights the effects of the choice of driving circuits in terms of the number and size of circuit components used, duty cycle variation, sensitivity of control, nonlinearity and control complexity of LED drivers. We propose a CSM single-inductor multiple-output (SIMO) converter, which demonstrates the advantage of having inductorless and easily controlled current-source drivers, and present a comparison of the CSM SIMO converter with the existing SIMO converters. We further illustrate that a high-voltage-step-down ratio can be naturally achieved by the CSM high-voltage-step-down converter without the use of transformers. This paper presents a systematic and comparative exposition of the circuit theory of driving LEDs, with experimental evidence supporting the major conclusions. [ABSTRACT FROM AUTHOR]

A modular multilevel converter (MMC) is regarded as a promising topology in high-voltage direct current systems. However, the MMC consists of numerous submodules (SMs) and switching devices, which lead to a considerable switching loss, and increased cost and size of the heat sink. To mitigate these issues, this paper presents a novel modulation method composed of fundamental frequency modulation (FFM) and multicarrier-based sinusoidal pulsewidth modulation schemes. The main purpose of this modulation method is the reduction of switching loss while maintaining good harmonic performance. However, the FFM scheme leads to the unbalanced capacitor voltage of each SM in the MMC. Accordingly, this paper additionally proposes the rotation method and selective voltage balancing control for SMs to ensure effective performance of the method. Simulation and experimental results verify the effectiveness and performance of the proposed modulation scheme through switching loss and spectral analyses. [ABSTRACT FROM AUTHOR]

This paper presents a practical strategy for utilizing the submodule (SM) redundancy of a modular multilevel converter (MMC) for its fault tolerance. This strategy provides a systematic framework for balancing the tradeoff between two conventional methods for using the active redundancy and, thus, achieves operational flexibility. One of the existing methods improves SM reliability owing to less voltage stress on the SM components by employing all of the SMs to form the ac or dc voltages (voltage-sharing mode). The other avoids transients by keeping the average SM voltage constant at the cost of slightly increased stress on the SM components (fixed-level mode), which, however, can be controlled to provide the grid-adaptive operation by reserving the energy of the SMs not in service. We, thus, develop a new redundancy management scheme by integrating these two methods and exploiting their technical benefits to meet the PQ requirements and MMC control performance. This research provides a theoretical basis and a technical guide to determining the number of SMs, which can further increase the voltage steps as per the MMC and grid conditions. This paper also connects the remaining PQ capability of the MMC at a particular operating point with the SM redundancy concept by defining a potential redundancy, especially useful when the physical redundancy is exhausted. The theoretical findings and efficacy of the proposed strategy are validated through PSCAD/EMTDC time-domain simulations followed by experiments using a nine-level single-phase MMC system. [ABSTRACT FROM AUTHOR]

Nonregenerative pulsewidth-modulated (PWM) rectifiers are increasingly being considered for applications, where the power flow is unidirectional, such as power supplies for telecommunications, X-ray, the machine-side converter for wind energy conversion systems, etc. They use fewer active switches, which increase their power density and reduce cost. This paper proposes a novel reduced switch topology for a multilevel (five-level or higher) nonregenerative PWM rectifier. It uses only four controlled switches and eight diodes per phase for a five-level rectifier. Half of the diodes are naturally commutated (zero current switching) at the line frequency, which reduces switching losses. This topology has several other advantages compared to similar topologies reported in the literature, such as minimum voltage stress across the devices, elimination of transient voltage-balancing snubbers, no extra hardware for balancing the flying capacitors, the dc-link mid-point voltage, etc. In this paper, switching cycle average modeling and the carrier-based modulation strategy for this rectifier are also presented to maintain a balanced dc link and to regulate flying capacitor voltages, while achieving unity displacement factor at the rectifier input terminals. The overall performance of the rectifier is verified by experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a novel two-level single-stage direct ac–ac converter for realizing a 7.2-kV medium-voltage (MV) solid-state transformer (SST) based on 15-kV SiC mosfets. A new current-fed series resonant converter (CFSRC) topology is proposed to address major challenges in MV ac–ac converters such as achieving zero-voltage switching (ZVS) for the MV mosfets across wide voltage and load ranges and minimizing system capacitance. The topology is analyzed with both time-domain analysis and first harmonic approximation to provide useful equations for circuit design. Constant deadtime strategy is adopted, allowing partial ZVS to occur at low-voltage (LV) levels. ZVS behavior over wide voltage range is investigated, and calculation of the associated loss from partial ZVS is presented. System parameters are optimized based on the tradeoff between conduction loss and switching loss. The 15-kV mosfet has been tested continuously at a park voltage of 10 kV and 37 kHz, indicating stable device operation and an extremely high voltage × frequency figure of merit. Moreover, inherent cycle-by-cycle current limiting in the proposed CFSRC under output short-circuit circumstance is realized by paralleling diodes to the LV resonant capacitors. Without employing any additional current sensors, the input and circulating currents are limited to a safe range automatically when the short-circuit occurs. This paper presents detailed short-circuit protection operating principles and peak resonant current equation to aid the design of the resonant tank. A full-scale and compact SST that converts 7.2 kV ac to 240 V ac is developed to verify the theoretical analysis. This is the highest reported voltage rating for two-level-based power converters without device series connection. ZVS is verified and achieved over wide voltage and load ranges with a peak efficiency of 97.8%. A short-circuit experiment is conducted at 3-kV peak voltage to verify the analysis. Experimental results closely match the theoretical analysis. [ABSTRACT FROM AUTHOR]

Power management integrated circuits (PMICs) with on-chip compensation are widely used to power multiple loads in mobile devices with increased power density. However, there are two issues for on-chip compensated PMICs. First, on-chip compensation reconfigurability is required to obtain the appropriate response in various passive components. Second, a converter for a processor requires adaptive voltage positioning (AVP) to reduce the output capacitor size. In this paper, a novel reconfigurable on-chip compensated current-mode buck converter with AVP is proposed to solve the aforementioned issues without requiring high-speed and high-resolution analog-to-digital converter (ADC). A reconfigurable accurate load line control scheme and on-chip compensation are proposed to achieve an accurate load line and AVP in various load lines and passive components. The control scheme, small-signal model, and circuit implementation are illustrated in this paper. The proposed buck converter was implemented into an integrated circuit to verify the analysis. [ABSTRACT FROM AUTHOR]

Power converters and electric motor drives when tightly regulated behave as constant power loads. These loads are different from resistive loads and have destabilizing negative impedance characteristics, which impact a system's stability. A boost converter is intrinsically nonlinear and is a nonminimum phase system at the output voltage with respect to the control input. The linear approximation of this boost converter loaded with a constant power load has a zero and poles in the right half of the $s$ -plane, making the system unstable and very difficult to control. Control techniques that employ some form of system inversion cannot be implemented for a nonminimum phase system. This paper describes a technique to modify the nonminimum phase boost converter to a minimum phase for a constant power load, further implementing the input–output linearization technique to stabilize the system. This paper also provides a methodological analysis of the problem followed by the proposed solution. Furthermore, it verifies the analysis of the proposed solution through simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a split-capacitor four-wire current source inverter, which is the dual of the split-capacitor four-wire voltage source inverter. Since the midpoint of the dc link is tied to the neutral point of ac filter capacitors, the common-mode voltage (CMV) is reduced significantly. Consequently, the leakage current issue is effectively addressed. The proposed circuit is cost-effective as no extra switch is added. This paper, first, establishes the equivalent common-mode circuit of the proposed inverter. The impact of the neutral line inductance on CMV is also analyzed. Then, a specific modulation is introduced to balance the dc-link voltages/currents. To achieve good input/output performance, a nonlinear control method is developed based on time-domain models. Finally, all the proposed methods and related theoretical analysis are verified by simulations and experimental results. [ABSTRACT FROM AUTHOR]

Voltage-controlled voltage-source converters (VSCs) are widely applied in islanded microgrids, dynamic voltage restorers, and uninterruptible power supplies, etc. Typically, an LC filter with a large filter capacitance is employed to improve the quality of output voltage and system robustness against external disturbances. Nevertheless, a large capacitance may lead to a low LC-resonant-frequency and cause unstable voltage control of VSCs when a single-loop proportional-resonant (PR) or resonant controller is used. This paper proposes a novel design of single-loop voltage control, where a negative proportional gain is adopted in the PR voltage controller, and it is revealed that the voltage control can be stable even with a low LC -resonant-frequency, e.g., lower than one-third of the system sampling frequency. To tackle the poor dynamic issue introduced by the negative proportional gain, this paper further proposes a closed-loop zeros configuration-based control method, which can flexibly tune the system dynamic response without affecting its stability. Finally, simulation and experimental results are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

This paper proposes a new power decoupling control method for a direct ac-to-ac converter. The ac-to-ac converter consists of two half-bridge converters, two input filter capacitors, and a series-resonant circuit, which enables it to convert the single-phase line-frequency ac input to the high-frequency ac output directly. The proposed power decoupling control method stores input power pulsation at double the line frequency in the input filter capacitors. Thus, the proposed control method realizes a unity power factor in the line-frequency ac input and a constant amplitude current in the high-frequency ac output without any additional switching device or energy storage element. This paper theoretically discusses the principle and operating performance of the proposed control method and confirms the effectiveness of the proposed control method in experiments using an isolated ac-to-dc converter based on the direct ac-to-ac converter. As a result, the proposed power decoupling control method effectively improved the displacement power factor of the line-frequency ac input current to more than 0.99 and reduced the voltage ripple in the dc load to 4%. [ABSTRACT FROM AUTHOR]

This paper proposes generation of a 15-level (14 concentric) dodecagonal voltage space vector structure (DVSVS) for a star connected induction motor drive. The proposed multilevel DVSVS is obtained by cascading two inverters, namely a primary and secondary inverter. The primary inverter is a five-level (5L) structure formed by stacking two three-level flying capacitors with individual reduced dc sources and the secondary inverter is also a 5L structure formed by cascading two capacitor-fed cascaded H-bridges (CHB). The active power is supplied by the primary inverter, while the secondary inverter acts as switched capacitor harmonics filter, and capacitors in the secondary inverter are balanced naturally irrespective of load power factor for entire modulation index. The high-voltage dc supply fed primary inverter is operated in quasi-square wave mode, while the high frequency switching is applied to low voltage CHBs, thus, reducing the overall switching loss. The proposed scheme gives the advantages of both DVSVS and multilevel structure, thus, making it one of the solutions for battery or stacked dc-fed applications. The paper also presents the experimental results as well as comparison study with the existing topologies to support the advantages of proposed scheme. [ABSTRACT FROM AUTHOR]

Constant on-time V^2 control for point-of-load buck converters has instability issues in the cases that the output capacitors' RC time constants are small. This paper intensively studies the proposed solution using capacitor current ramp compensation, which is a superior solution featuring fast response and universality. A frequency-domain small-signal model based on describing function method is proposed in this paper. The time-domain large-signal response to the load step change is analyzed. The analysis illustrates the unique transient response behaviors of the capacitor current ramp compensated V^2 control. The design optimization methodology based on frequency-domain and time-domain analysis is presented. The proposed model and the design guidelines are verified by the experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a generalized power-decoupling control scheme using a multiport isolated bidirectional converter for a multilevel inverter, which has multiple dc links inside. In the proposed method, a single power-decoupling capacitor is needed for all the dc links in the multilevel inverter cell. First, a prototype of the power-decoupling concept of individual H-bridge cells in the multilevel inverter is proposed, using a separate power-decoupling circuit. Then, a more advanced one-step power-decoupling method is proposed. The lifetime and reliability of the multilevel inverter is improved as film capacitors replace the large capacitance electrolyte capacitors. A multi-input ports/single output voltage-fed dual half-bridge converter (MDHB) is used for the power-decoupling circuit. A steady-state analysis for the peak and root mean square of the MDHB current is carried out for the loss breakdown. The currents are functions of the switching frequency, phase shift, leakage inductance, turn ratio, and output voltage, which make the multiport transformer design complex. A design methodology is proposed, which takes into account the design of the copper and core losses as functions of the switching frequency and number of turns. Furthermore, a special winding method for the input port is illustrated to obtain identical leakage inductances for the uniform current distribution in the multiport transformer. The proposed MDHB employs a current-sensorless power-decoupling control that contributes to the spontaneous ripple rejection of all the dc links without individual link current information, as well as to the cost and size reduction. Hence, the ripple-rejection controller is independent of the control configuration of the multilevel inverter, and also available for universal applications of various inverter topologies. Since the primary-input ports of MDHB share a single magnetic core for interfacing the ripple power to the unified secondary ripple capacitor, the controller design becomes difficult in considering the dynamic interaction among the ports, along with the average-voltage control loop design. In this paper, the dynamic analysis and controller design procedure of the circuit is also presented. The power decoupling is achieved even when the ripple frequency is other than the double frequency of the inverter output, since the single-pole transfer function of the small-signal model of the MDHB allows sufficient phase margin, along with high bandwidth. The proposed power-decoupling method for the multilevel inverter is validated with the help of simulation and 1.2-kW hardware prototype experimental results. [ABSTRACT FROM AUTHOR]

Cascaded H-bridge (CHB) converter technology is actually the most popular solution for grid-connected converters in both medium- and high-voltage applications. This paper introduces a new control of a single-phase CHB active rectifier. The control uses a direct grid current control based on adaptive resonant controllers. The resonant controllers are adapting to slow fluctuation of ac grid frequency. The challenging problem of CHB converters is dc-link capacitor voltage balancing especially under unbalanced load conditions. This paper presents a reliable voltage-balancing technique utilizing energy estimation of particular dc-link capacitor banks and simple prediction of the changes of their energies. A nonlinear behavior of the converter caused by power semiconductors voltage drops and dead-time effects is minimized by auxiliary adaptive resonant controllers. The resulting control has very good performance, including the operation under unbalanced load conditions, and achieves low total harmonic distortion of converter grid current. The theoretical results were verified by experiments made on the developed CHB active rectifier prototype with three power cells in cascade. [ABSTRACT FROM AUTHOR]

This paper provides an experimental and theoretical discussion on dynamic braking for a medium-voltage induction motor fed by a modular multilevel double-star chopper-cell (DSCC) inverter. It is intended to apply the motor drive to large-capacity fans and compressors with a large moment of inertia. Each chopper cell consists of a bidirectional chopper and a braking chopper connecting a single small-rated braking resistor in series with a single IGBT. This configuration results in a “distributed” dynamic brake that provides a distinctive welcomed side effect of protecting all the bidirectional-chopper cells against sudden overvoltage. An experimental system rated at 400 V and 15 kW is designed, constructed, and tested to verify operating performance of the distributed dynamic brake. Experimental waveforms, along with simulated waveforms, confirm firmly that the distributed dynamic brake is feasible and effective in an induction motor fed by a medium-voltage high-power DSCC inverter for fans and compressors. Finally, this paper gives a design example of a distributed dynamic-braking resistor for the 11-kV, 12-MW induction motor driving a large-capacity fan equipped with a large moment of inertia. [ABSTRACT FROM AUTHOR]

This paper proposes a single-phase power factor correction (PFC) rectifier to achieve high power factor, wide output voltage range, and ripple power decoupling without using electrolytic capacitors. It consists of two parts: PFC circuit and output voltage regulation circuit. The load side is involved in both parts, which is different from the regular two-stage conversion structure. The proposed rectifier can be directly applied to low voltage cases due to the wide output voltage range. And the decoupling capacitor voltage can be smaller than the peak grid voltage, which reduces the voltage stress. Besides, the low-frequency ripple power buffer is implemented without a dedicated power-buffering controller. This paper first introduces the circuit structure, operation principles, and control method. Then, the system design consideration is given. Finally, the effectiveness of the proposed topology is verified by the simulations and experimental results. [ABSTRACT FROM AUTHOR]

An analytical steady-state model of the modular multilevel converter (MMC) can be used for component sizing and assessment of the impact of different parameters on the MMC performance. Thus, this paper proposes an enhanced steady-state model for the MMC, which enables one to calculate the amplitudes of the harmonic components of MMC arm currents, submodule capacitor voltages, and arm voltages. In addition, the proposed model allows for the calculation of the amplitude and phase angle of the modulating signal, and it also presents a criterion for resonance of the arm currents. This is achieved by means of a polynomial function of the modulation index, and through checking the stability criteria established by the proposed model. The capability of formulating the modulating signal enables a more accurate calculation of the steady-state amplitudes of the variables, as compared to the previously published models. This paper also presents an accurate method of submodule capacitor sizing, based on the proposed steady-state model. The proposed method gives the exact value of the submodule capacitance (i.e., the capacitance that results in dc voltage fluctuations within a desired range) for a prespecified submodule capacitor voltage variation and a given circulating current amplitude. The stability criterion given by the proposed steady-state model, used for sizing the arm inductance, and the submodule capacitor voltage variation given by the proposed capacitor sizing method, used for sizing the submodule capacitor, allows for the determining of the operating limits of the MMC in terms of its parameters. Extensive simulation results are presented to demonstrate the efficacy of the proposed steady-state model and the capacitor sizing method. Further, the results obtained from the proposed capacitor sizing method are compared with experimental results from the literature. [ABSTRACT FROM AUTHOR]

In this paper, a single-phase shared leg converter is proposed along with two generalizations. The basic configuration has three two-level insulated gate bipolar transistor (IGBT) legs and is cascaded on the main power system by means of two injection transformers, such that one of these legs is shared between the transformers. The generalizations are expanded cases in which the converter has N\text{leg} legs. The first generalization is the cascaded shared leg (CSL), where the converter is cascaded by N\text{leg}-1 transformers, and one of the N\text{leg} legs is shared between all transformers. The second is the modular CSL, where Nmod modules, each one similar to the basic configuration, are cascaded by 2Nmod transformers. The conventional configurations considered for general comparisons are the cascaded h-bridge (CHB) and the cascaded half-bridge (CHfB). In this paper, we show that proposed configurations provide multilevel ac voltages with greater levels-per-switch ratio compared to the CHB. We also show that proposed CSL generalization has practically the same levels-per-switch than conventional CHfB and saves one transformer. Simulations and experimental results are shown to demonstrate proposed configurations performance and feasibility. [ABSTRACT FROM AUTHOR]

A switched-capacitor-based dual-switch dc–dc converter with a high-boost voltage gain is proposed in this paper. The proposed converter can obtain a high-voltage gain with a small duty cycle, which decreases the voltage stress and the conduction loss on the power switches. This paper presents the key waveforms, the operating principles at the continuous conduction mode and the discontinuous conduction mode, and the parameter design. Moreover, a comparison between the proposed converter and other nonisolated converters has been completed. To verify the operating principle, a 200 W prototype is constructed with an input voltage of 25–50 V and an output voltage of 200 V. The simulation and experimental results are shown. [ABSTRACT FROM PUBLISHER]

This paper discusses the impact of small dc capacitance in a motor drive using a floating capacitor H-bridge topology. The proposed topology is intended for applications where variable frequency control is not required. Special attention is paid on investigating the second-order dc capacitor voltage ripples, whose influence on the induction motor as well as on the motor drive itself is of importance. This issue is addressed in this paper through rigorous mathematical formulations. It is found that by inverting the second-order dc ripple voltage using the conventional SVPWM, no harmful harmonics will be generated in the motor line voltage. This demonstrates the possibility of drastically reducing the dc capacitance of the proposed system. Induction motor as well as H-bridge performance with respect to different dc capacitance values is demonstrated by experiments, which lays the foundation for cost reduction and reliability enhancement of the proposed system. [ABSTRACT FROM PUBLISHER]

Hysteretic control provides unique advantages in dc–dc converter applications but it is less popular than other types of control because the switching frequency depends on the operating point, the feedback ripple, and the component parasitics. Furthermore, it is difficult to predict the frequency due to the complex interaction of those factors. This paper proposes harmonic balance analysis to systematically determine the switching frequency of the buck and boost-like converters with hysteretic current control, and extends the method to buck converters with hysteretic voltage control. The analysis includes the most important second-order effects (feedback ripple, component parasitics, a second output capacitor, and switching delays). For the less complex cases the switching frequency is expressed in closed form, and for the more complex cases the paper proposes a graphical solution. The predictions are verified by simulations and, for the buck converter with hysteretic current control, by experiments. The derived results are useful for designing a converter with predictable switching frequency, and can also be employed during the design process of a converter with synchronized or stabilized frequency. Given an arbitrary control scheme or circuit variation, the switching frequency can be readily obtained by following the proposed approach. [ABSTRACT FROM PUBLISHER]

Sheppard–Taylor power factor correction (ST-PFC) rectifier could obtain a high power factor due to its capability of overcoming the control detuning issue. However, it needs a bulky electrolytic capacitor at the load side to buffer the double-frequency ripple power (DFRP), which reduces the reliability and power density significantly. This paper proposes a control method to divert the DFRP to the small energy transfer capacitor. Consequently, the bulky electrolytic capacitor is replaced with a small film capacitor. The proposed method is carried out by introducing the freewheel state (one switch is turned on and the other is turned off) into the control. So no extra hardware is added, which makes the proposed method cost-effective. A low electromagnetic interference emission is also achieved due to the continuous input–output currents. In addition, the proposed method can be extended to other topologies easily. This paper first gives the detailed analysis of the proposed control method, and then introduces the controller design. The selection of the passive components is also briefly discussed. Finally, the simulation and experimental results verify the effectiveness of the proposed control method. [ABSTRACT FROM AUTHOR]

These days, constant on-time current mode (COTCM) control scheme is widely used in the voltage regulator (VR) controllers because it has a higher light-load efficiency and a higher BW design capability while maintaining a simpler compensation requirement. One issue plaguing the COTCM control is its slow transient response which is caused by its fixed TON operation. During the heavy-load step-up transient, the duty cycle becomes saturated and the inductor current increment becomes limited by TON and the minimum off time (TOFF$\_$ MIN) ratio, which can create a large undershoot at load step up. On the other hand, in the load step-down case, if the load step down occurs at the beginning of TON, a large overshoot can be created at the output. To solve this issue, this paper presents a method designed to increase the TON at load step up and then very quickly, decrease at load step down in order to reduce the undershoot and overshoot at output or otherwise save the output capacitor. In this proposed method, the increase or decrease of T ON is proportional to the output change which eliminates the chance of any overcorrection or ring-back problem unlike the methods presented in prior forums. This feature enables the control to work seamlessly in a high-frequency load repetitive case in VR applications. Since this TON change occurs only in the transient period when duty cycle is saturated, it does not affect the small-signal property of the COT control. Moreover, the proposed methods are very much compatible with the state-of-the-art single and multiphase COT control structures. Simulation and test results in both single and multiphase operations are also presented in the paper to verify the proposed concept. [ABSTRACT FROM PUBLISHER]

A novel soft-switching interleaved coupled-inductor boost converter is proposed in this paper. Only a single active soft-switching module is needed to simultaneously achieve the soft-switching property of the two switches in the interleaved coupled-inductor boost converter. The better efficiency is achieved with the less components and cost. The two main switches can achieve the ZVT turn-on and smaller-current turn-off simultaneously when the single active soft-switching module is active. Due to the coupling characteristic of the inductors, the voltages across the two inductors are changed at the same time; therefore, the equivalent circuit is equal to the parasitic capacitors of the two main switches in parallel to resonate with the auxiliary inductor. By coupling two input inductors, the volume and cost of the circuit can be reduced. The interleaved coupled-inductor topology can also reduce the input and output current ripples and share the input and output currents. The operating modes, analysis, and design of the proposed circuit have been discussed in this paper. Simulation and experiments are finally conducted to verify the validity of the proposed circuit. [ABSTRACT FROM PUBLISHER]

The modular multilevel converter (MMC) has become a very attractive solution for interfacing high voltages in hybrid networks. The MMC enables scalability to different power levels, full controllability provided by insulated-gate bipolar transistors, and can achieve very high efficiencies by using a low-switching-frequency method as the nearest level modulation. However, the nearest level modulation requires a capacitor voltage-balancing algorithm, which can result in unbalanced loading for the power semiconductors in the different submodules. Particularly at low-power-factor operation, which could occur in the case of low-voltage ride through and of reactive power injection, the conventional algorithm is no more effective. This paper provides thermal stress analysis of the MMC in operation and proposes a thermal balancing approach, which is embedded in the capacitor voltage-balancing algorithm. The purpose of the thermal balancing is to achieve similar stress distribution among the different submodules to enhance the lifetime. The junction temperatures in the different submodules are studied for HVDC applications, and this paper proves experimentally that the thermal balance within the submodules is significantly improved. [ABSTRACT FROM PUBLISHER]

DC electric springs (DCES) are emerging technologies for the (i) regulation of mains voltage against the intermittent renewable generations and (ii) harmonic cancellation in dc microgrids. When conventional converter topologies (e.g., half-bridge or full-bridge converter) are adopted as DCES, the battery storage of the DCES has to process both the dc power and the ac harmonic power. The pulsating ac power can severely reduce the lifetime of the battery. To address this issue, a hybrid-DCES (H-DCES) is proposed in this paper to perform (i) and (ii) in a decoupled manner. With a modified topology and control method, the H-DCES can divert the ac current to the ground and retains the function of manipulating noncritical load for dc voltage regulation. The immediate benefits of this H-DCES are the reduction of storage capacity and a prolonged lifetime of the battery. Both the operating principle and the mathematical model of the proposed H-DCES are analyzed in this paper. A prototype of the H-DCES is practically tested in a 48-V dc grid. The experimental results show that the H-DCES can realize the decoupled operation of dc voltage regulation and harmonic cancellation. Simulation studies further demonstrate that the H-DCES requires less storage capacity than its counterparts. [ABSTRACT FROM AUTHOR]

Cascaded H-bridge (CHB) based active power filters (APF) can compensate high-order harmonics in medium and high-voltage systems with relatively low switching frequency. This paper reveals that a severe dc capacitor energy unbalance can be induced by harmonic energy exchange if the frequency of APF output current coincides with the switching harmonic frequency of CHB cells. The mechanism of harmonic energy exchange is analyzed, and it is found that the dc capacitor energy unbalance is essentially affected by the carrier frequency of CHB. A noninteger ratio carrier frequency can be adopted to avoid the divergence of dc voltage, but there is still a significant low-frequency ripple on the dc voltage. This paper proposes an adaptive carrier frequency optimization method. By predicting the dc voltage ripple amplitude under different carrier frequencies, this method can adaptively select the optimal carrier frequency to minimize the dc voltage ripple. The proposed method is also proved to be robust against system parameter variations, and it can be implemented by a practical and simple linear computation method. Results obtained from simulation, experimental prototype, and field test are finally presented to verify the proposed adaptive carrier frequency optimization method. [ABSTRACT FROM AUTHOR]

This paper documents a new three-switch, isolated boost dc–dc converter. The major features of the proposed converter are as follows: 1) continuous input current; 2) reduced one active switch, one additional diode, and one additional capacitor; 3) unchanged primary and secondary voltage waveforms of the transformer when the duty cycle is changed; and 4) removal of the snubber circuit. This paper presents the operating principles, analysis, parameter design guidelines, and simulation results for the proposed converter. To verify the performance of the proposed converter, a 400 W prototype was constructed with a 40–60 V dc input. A PID controller was used to maintain the dc output voltage at 400 V. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, direct torque control (DTC) of five-phase induction motor (FPIM) is implemented using three-level neutral point clamped (TL-NPC) inverter. One of the advantages of three-level inverter over two-level one for DTC operation is the low torque ripple. Also TL-NPC inverter through space vector modulation technique gives low $ dv/dt$ transition with better voltage waveform. By applying conventional lookup table for DTC, the TL-NPC inverter does not ensures lower $dv/dt$ transition. In this paper, a novel switching scheme for DTC of FPIM using TL-NPC inverter is proposed that ensures the low $ dv/dt$ transition and balancing of dc-link capacitor voltages of TL-NPC inverter. To form the lookup table for DTC operation, instead of using voltage vectors directly, virtual vectors (VVs) are utilized. Two switching states are used in one sample time to generate a VV in $\alpha \beta$ plane, which gives zero resultant voltage in $ xy$ plane. The switching strategy ensures low number of transitions to reduce the switching losses. The switching state redundancies are used in a novel way to balance the dc-link capacitor voltages without using any additional hardware. The proposed technique to balance the dc-link capacitor voltage gives lower switching frequency. The MATLAB/Simulink environment is used for the simulation and the results are validated through experiments. [ABSTRACT FROM AUTHOR]

In high-power applications, parallel operation is required to improve both efficiency and reliability. In an LLC converter, it is difficult to achieve parallel operation due to the gain sensitivity to component tolerance. This paper proposes a new structure of a common resonant capacitor for a multiphase LLC converter, which can achieve very good current-sharing performance with no additional components or control. To evaluate the current-sharing performance, a new first harmonic approximation (FHA) model is built in this paper to analyze the LLC converter with coupled resonant tanks. Both FHA analysis and powersim (PSIM) simulation results demonstrate the load-sharing improvement of the proposed common capacitor LLC resonant converter over the conventional two-phase LLC converter. The current-sharing performance from the FHA analysis and the PSIM simulation are compared, and the error of the FHA analysis is evaluated and explained. A 600 W two-phase LLC converter prototype based on the proposed method is also built to verify the feasibility. Excellent current-sharing performance (6% resonant current sharing error at a wide load range) has been achieved. [ABSTRACT FROM PUBLISHER]

This paper presents a hybrid seven-level converter based on T-type converter and H-bridge cascaded suitable for low-voltage and high-power-density applications. The operation principles and conduction paths are analyzed comprehensively. Voltage balance control of the floating capacitors is the key point of this paper. Mathematical expressions of capacitor voltage balance conditions are deduced based on sinusoidal pulse width modulation (SPWM). The results show that floating capacitor voltages are only balanced when the modulation index is below 0.82 under SPWM. In order to enlarge the modulation index ensuring the capacitor voltage balance, space vector modulation (SVM) is also applied to regulate floating capacitor voltages taking advantage of redundant switching vectors. Meanwhile, in SVM, there are no additional control requirements for the capacitor voltage. Taken both SPWM and SVM into consideration, the limit to the range of operation for this seven-level converter is presented, which is a function of the modulation index and the power factor. The merit of dc voltage utilization improvement in this topology is also analyzed based on simulation results. Simulations and experimental results under different modulation index and RL load are presented to verify the modulation strategies illustrated in this paper. [ABSTRACT FROM PUBLISHER]

This paper introduces a new tunable piezoelectric transformer (TPT) and demonstrates its operation in a dc–dc converter application. Piezoelectric transformers (PTs) have been conventionally used in high-voltage, low-power applications such as electronic ballasts. Recently, radial type PTs have been developed for higher power ac–dc and dc–dc step down applications. Based on the latter, a new TPT has been developed featuring an auxiliary secondary terminal to control the voltage gain of the transformer. This results in some exciting characteristics from a dc–dc converter standpoint, like an adjustable frequency response of the TPT, and fixed frequency control of the converter with no-cross talk between the primary and secondary in the control circuit. This paper introduces the design concept behind TPT-based dc–dc converters, and proposes a control scheme for their implementation. Experimental results with a 30 W, 220:55 V converter unit are shown to validate these concepts. [ABSTRACT FROM PUBLISHER]

An extended-duty-ratio (EDR) boost converter is studied extensively in this paper for high voltage gain applications with a wide input (and/or output) voltage range. The EDR is a unique combination of an interleaved, multiphase boost converter and switched capacitor configuration that achieves high voltage gain with significantly lower switch voltage stress and switching losses compared to conventional high-gain solutions. Most of the switches in the multiphase EDR experience only a fixed fraction of the output voltage ($1/M, 2/M$ , etc., where $M$ is the number of phases). Through extensive analysis over a wide operating range, it is shown here that the EDR boost converter has inherent current sharing among the phases only in a limited range of duty ratio— $(M-1)/M \leq D \leq 1$. As the duty ratio reduces beyond this range as required in wide input voltage applications, inherent current sharing property is lost. In this paper, techniques to ensure current sharing under all operating zones without requiring current sensors are presented. Instead of having equal duty ratio for each phase, it is adjusted for each phase according to the operating region of the converter. Extensive analysis is presented to derive the required duty ratio changes for the different phases. The proposed concept is validated with experimental results from a 250 W, 3-phase EDR boost, and GaN-based hardware prototype. [ABSTRACT FROM AUTHOR]

Conventional single-phase power-factor-correction (PFC) rectifiers with active power decoupling capability typically require more than three active switches in their circuits. By exploring the concept of power-buffer cell, a new single-stage PFC rectifier with two active switches, one inductor and one small power-buffering capacitor is reported in this paper. The proposed converter can achieve high-power factor, wide output voltage range, and power decoupling function without using electrolytic capacitor. Additionally, an automatic power decoupling control scheme that is simple and easy to implement is proposed in this paper. The operating principle, control method, and design considerations of the proposed rectifier are also provided. A 100-W prototype with ac input voltage of 110 Vrms and a regulated dc output voltage ranging from 30 to 100 V has been successfully designed and practically tested. The experimental results show that with only a 15 μF power-buffering film capacitor, the proposed converter can achieve an input power factor of over 0.98, peak efficiency of 93.9%, and output voltage ripple of less than 3%, at 100-W output power. [ABSTRACT FROM PUBLISHER]

DC/DC converters connected in series or parallel allow low power devices to be used in high power conversions. The input series output series (ISOS) connection is suitable for situations where both the input and output sides are high voltage fields. To ensure that each module shares voltage with the other, this paper proposes an active output voltage sharing (AOVS) control scheme. The scheme introduces sharing control in the output side so that the isolation is not needed between the input and output sides in the control loop. The AOVS control scheme, consisting of a common output voltage loop and individual output voltage sharing loop, has a master–slave structure. To improve the reliability and realize a hot-plug, this paper also provides an automatic master–slave form of the AVOS control scheme. A simulation of the frequency and time domains is used to verify the accuracy of the small signal model, and an ISOS-connected prototype consisting of three forward converters is made to test the steady and dynamic characteristics of the proposed scheme. [ABSTRACT FROM AUTHOR]

This paper introduces a novel five-level nested neutral point piloted (NNPP) converter and analyzes the operating principle of five-level NNPP converter. This paper presents a novel space vector pulse width modulation (SVPWM) algorithm based on gh coordinate for five-level NNPP converter. First, the common-mode voltage is reduced by choosing the appropriate redundant switching states. After that, the floating-capacitor voltage balance control strategy is presented. The appropriate switch combinations of each phase are determined by the control requirements of floating-capacitor voltages respectively and the hardware mapping method of the switching states is presented. Furthermore, the neutral-point voltage balance control strategy is presented. In order to balance the dc-link capacitor voltages, the seven-segment switching sequence is selected according to the control requirements of dc-link capacitor voltages and the neutral-point voltage regulatory factor is introduced to regulate the durations of the redundant switching states in a switching cycle. Finally, the validity of the novel SVPWM algorithm with decoupling control strategies of floating-capacitor voltages and dc-link capacitor voltages is verified by the experimental results of five-level NNPP converter under steady-state and dynamic conditions. [ABSTRACT FROM AUTHOR]

This paper presents an intensive discussion on a high-voltage direct-current (HVDC) long-distance transmission system combining two modular multilevel double-star chopper-cells (DSCC) converters with dc power cables. Hereinafter, each converter is referred to simply as a DSCC converter, or just as a DSCC for more simplicity. Such an HVDC transmission system is required to provide low-voltage-ride-through (LVRT) capability to enhance system availability. This paper proposes a practical LVRT control characterized by the use of power-line communications between the two DSCC converters. The validity and effectiveness of the LVRT control is verified not only by simulated waveforms obtained from the software package “PSCAD/EMTDC” but also by experimental waveforms from a three-phase 200-V, 400-Vdc, 10-kW, 50-Hz downscaled system with 300-m-long dc power cables. [ABSTRACT FROM AUTHOR]