Search

Various methods have been presented in the past to emulate the electrical behavior of modular multilevel converters (MMCs). To meet the demands for the reliability aspect study of MMCs, this paper proposes a viable setup to emulate the thermal behavior and to investigate its feasibility for reliability testing and thermal model validation of the power modules in the MMC. The proposed mission profile emulator has three distinctive features: 1) capable of emulating and measuring the thermal stresses of power modules; 2) capable of implementing practical switching profile as a full-scale MMC; and 3) having significantly reduced requirement for dc power supply compared to existing setups used for electrical studies. Theoretical discussions, and simulations as well as the experimental results are presented to demonstrate the capability of the mission profile emulator both electrically and thermally. Moreover, this paper is accompanied by a video demonstrating how to measure the junction temperature of the power devices using the optical fiber and the thermal camera. [ABSTRACT FROM AUTHOR]

This paper presents bidirectional grid-connected modular multilevel converters (MMC) with direct digital control and division-summation processes to achieve power-injection and rectification functions. A direct digital control is developed to track current references, regulate dc-bus voltage and cell voltage, and balance the upper and lower dc-bus voltages. It can accommodate wide filter-inductance variation and take care of source voltage harmonics to achieve tight current tracking and low distortion output current. Based on the power-balance principle, the commands of arm currents can be determined directly. In this paper, the MMC configuration is introduced first, and then the control laws for current tracking and voltage regulation are derived in detail. Experimental and simulated results obtained from two 50 kW MMCs operated in power-injection and rectification modes have verified the analysis and discussion. [ABSTRACT FROM AUTHOR]

This paper presents an adaptive multi-loop control scheme for inverters interlinking dc voltage sources to single-phase, low-voltage ac grids. Control self-adaptation is particularly useful in the case of weak grids that, due to frequent physical modifications (e.g., network reconfigurations and disconnection of generators/loads) and intrinsic lack of inertia, present strongly time-variant characteristics. The solution presented in this paper is based on a high-performance converter controller with auto-tuning capabilities. It is shown that the applied auto-tuning method can significantly widen the stability region of the interlinking converter, covering a broad range of grid impedance values. In addition, within the stable region, the controller maintains the nominal performance. Experimental results are reported validating the proposed approach in realistic operating conditions, including grid voltage distortion and variations of amplitude and frequency. [ABSTRACT FROM AUTHOR]

In a dual active bridge (DAB) dc–dc converter, modulating the phase-shift ratios can suppress reactive power and increase the efficiency under non-unity voltage gain conditions. Derivation of the optimal phase-shift ratios to achieve the minimum reactive power is challenging because a DAB can operate in four different scenarios (forward/backward, buck/boost) and each scenario has five operating modes. This paper first introduces a transformation in which different DAB operating scenarios (forward/backward, buck/boost) can be equivalent to one another; then optimization of only one scenario (forward/buck) is required. Next, for the five modes in forward/buck scenario, based on a graphical method, this paper proves that each operating point of Modes 1, 2, and 5 can be mapped into that of Mode 3 with lower conduction losses, and only two modes require detailed analysis. The optimization process of these two modes are derived step-by-step. Global optimal phase-shift signals that minimize the reactive power under four different DAB operating scenarios (forward/backward, buck/boost) are presented. A simple table and control block diagram are presented for practical implementation of global reactive-power minimization control. Experimental comparison with other modulation schemes verifies the efficiency improvement of the proposed control method. [ABSTRACT FROM AUTHOR]

In this paper, a current controller for a parallel operation of inverters is described. When inverters operate in parallel, it is a well-known fact that the inverter current is composed of the average current (AVC) and the zero-sequence circulating current (henceforth ZSCC), which inevitably flows between inverters under the parallel operation. Considering this, previous studies concentrated on reducing ZSCC. However, in this paper, it is found that the inverter current has another component, a differential current, in addition to the two components of AVC and ZSCC. Based on these three decomposed current components, three equivalent circuits are derived from n-paralleled inverters. To minimize the differential current and improve the regulation performance of the total output phase current, a decomposed current control scheme is proposed from equivalent circuit models. The proposed algorithm is applied to a system consisting of three paralleled two-level inverters with small shared inductance whose dc links are connected in common. Additionally, synchronous pulsewidth modulation is employed as the PWM method for each inverter. The proposed current controller is compared with two conventional current controllers, one where each inverter controls its own currents and the other where only AVC is controlled. Through experiments, it is shown that these conventional controllers have limitations and the proposed current controller overcomes these limitations. The effectiveness and feasibility of the proposed control scheme are verified through experimental results. Especially, both theoretical analysis and experiment results verify that the proposed method is robust with regard to parameter errors. [ABSTRACT FROM AUTHOR]

The instantaneous output power of the two-stage single-phase grid-connected photovoltaic (PV) inverter pulsates at twice the line frequency ($2f_{{\text{o}}}$), generating second harmonic current (SHC) in the front-end dc–dc converter and PV panel, which will affect the maximum power point tracking operation and deteriorate the overall conversion efficiency. The generating mechanism of the SHC is analyzed in this paper and it is pointed that in order to eliminate the SHC in the front-end dc–dc converter and PV panel, the voltage loop gain of the front-end dc–dc converter should be high enough at $2f_{{\text{o}}}$. Since there is a −180° phase abrupt at the resonant frequency of the input side filter capacitor and the inductor, the system may be unstable. To cope with this problem, the inductor current feedback active-damping scheme (ADS) is adopted. For further improving the loop gain at $2f_{{\text{o}}}$ , proportional–integral–resonant regulator with ADS (PIR + ADS) is proposed in this paper. Besides, a step-by-step closed-loop parameters design method is presented. Finally, a 3-kW two-stage single-phase grid-connected PV inverter has been fabricated and tested, and the experimental results verify the feasibility of the proposed control schemes. [ABSTRACT FROM AUTHOR]

Light-emitting diodes (LEDs) are solid-state devices with specific $v$ – $i$ characteristics. In this paper, we study the basic requirement of the driving circuits and discuss the proper approach to drive LEDs in view of their characteristics. We compare voltage source driving and current source driving, and discuss their relative advantages and constraints. We specifically introduce the use of circuit duality principle for developing new current-source-mode (CSM) drivers that are less known but are theoretically more versatile compared to their conventional voltage-source-mode counterparts. The study highlights the effects of the choice of driving circuits in terms of the number and size of circuit components used, duty cycle variation, sensitivity of control, nonlinearity and control complexity of LED drivers. We propose a CSM single-inductor multiple-output (SIMO) converter, which demonstrates the advantage of having inductorless and easily controlled current-source drivers, and present a comparison of the CSM SIMO converter with the existing SIMO converters. We further illustrate that a high-voltage-step-down ratio can be naturally achieved by the CSM high-voltage-step-down converter without the use of transformers. This paper presents a systematic and comparative exposition of the circuit theory of driving LEDs, with experimental evidence supporting the major conclusions. [ABSTRACT FROM AUTHOR]

This paper discusses an alternative to reduce harmonic current distortion in a 12-pulse rectifier. The circuit is based on a generalized autotransformer connection with low power-to-core that feeds two isolated SEPIC converters. Compared to other passive devices operating as conventional 12-pulse rectifiers, besides a tight dc bus, the use of static converters can, by means of an active current imposition, provide very low harmonic distortion of current. This paper presents a theoretical analysis which is corroborated by computational and experimental results. The results show that the performance of the proposed converter is similar to the performance provided by three-phase unity power factor PWM rectifiers, however, only two active switches are deployed. [ABSTRACT FROM AUTHOR]

Power converters and electric motor drives when tightly regulated behave as constant power loads. These loads are different from resistive loads and have destabilizing negative impedance characteristics, which impact a system's stability. A boost converter is intrinsically nonlinear and is a nonminimum phase system at the output voltage with respect to the control input. The linear approximation of this boost converter loaded with a constant power load has a zero and poles in the right half of the $s$ -plane, making the system unstable and very difficult to control. Control techniques that employ some form of system inversion cannot be implemented for a nonminimum phase system. This paper describes a technique to modify the nonminimum phase boost converter to a minimum phase for a constant power load, further implementing the input–output linearization technique to stabilize the system. This paper also provides a methodological analysis of the problem followed by the proposed solution. Furthermore, it verifies the analysis of the proposed solution through simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a new high-efficiency photovoltaic (PV) converter for grid connection through a high-leg delta transformer. The converter is composed of a symmetrically connected boost converter and three half-bridge inverters. One of the three half-bridge inverters is connected to the boost converter, and the others are directly connected to the PV terminals. As a result, this circuit configuration enables to reduce the power losses in both boost converter and inverters. This paper also proposes a new cooperative control method between the symmetrically connected boost converter and inverter. The control method can reduce the average switching frequency to 75% of that in a conventional one, resulting in a great reduction in the switching power loss. Experimental results confirm that the proposed circuit configuration makes it possible to improve its European efficiency from 91.6% to 94.5%. Moreover, system performance is evaluated on the assumption of maximum power point tracking operation. [ABSTRACT FROM AUTHOR]

This paper presents a unified framework for the modeling, analysis, and design of load-independent Class E and Class EF inverters and rectifiers. These circuits are able to maintain zero-voltage switching and, hence, high efficiency for a wide load range without requiring tuning or use of a feedback loop, and to simultaneously achieve a constant amplitude ac voltage or current in inversion and a constant dc output voltage or current in rectification. As switching frequencies are gradually stepping into the megahertz (MHz) region with the use of wide-bandgap (WBG) devices such as GaN and SiC, switching loss, implementing fast control loops, and current sensing become a challenge, which load-independent operation is able to address, thus allowing exploitation of the high-frequency capability of WBG devices. The traditional Class E and EF topologies are first presented, and the conditions for load-independent operation are derived mathematically; then, a thorough analytical characterization of the circuit performance is carried out in terms of voltage and current stresses and the power-output capability. From this, design contours and tables are presented to enable the rapid implementation of these converters given particular power and load requirements. Three different design examples are used to showcase the capability of these converters in typical MHz power conversion applications using the design equations and methods presented in this paper. The design examples are chosen toward enabling efficient and high-power-density MHz converters for wireless power transfer (WPT) applications and dc/dc conversion. Specifically, a 150-W 13.56-MHz Class EF inverter for WPT, a 150-W 10-MHz miniature Class E boost converter, and a lightweight wirelessly powered drone using a 20-W 13.56-MHz Class E synchronous rectifier have been designed and are presented here. [ABSTRACT FROM AUTHOR]

This paper discusses dynamic behavior of a dual-active-bridge (DAB) dc–dc converter. Conventional phase-shift control methods for the DAB converter may cause dc offsets in both inductor current and transformer magnetizing current in transient states. The dc offset in the inductor current would introduce an excessive peak current through the switching devices. The dc offset in the magnetizing current may induce magnetic-flux saturation. Conventional methods simultaneously turn on and off the diagonal switches in each H-bridge converter and produce a square-wave voltage with a 50% duty ratio. In contrast, the proposed method in this paper independently controls each switch to modify the duty ratio in transient states. This paper clearly derives the requirements of each switch to eliminate the dc offsets in both currents with a settling time shorter than half the switching period. Experimental results using a 5-kW 20-kHz system verify the validity of the proposed control method, which is effective not only in a single step change, but also in a continuous change in the phase-shift reference. [ABSTRACT FROM AUTHOR]

Constant on-time V^2 control for point-of-load buck converters has instability issues in the cases that the output capacitors' RC time constants are small. This paper intensively studies the proposed solution using capacitor current ramp compensation, which is a superior solution featuring fast response and universality. A frequency-domain small-signal model based on describing function method is proposed in this paper. The time-domain large-signal response to the load step change is analyzed. The analysis illustrates the unique transient response behaviors of the capacitor current ramp compensated V^2 control. The design optimization methodology based on frequency-domain and time-domain analysis is presented. The proposed model and the design guidelines are verified by the experimental results. [ABSTRACT FROM AUTHOR]

To support the development of high-frequency ac microgrids in terms of compact design, high-voltage gain and low total harmonic distortion (THD), a buck–boost dual-leg-integrated step-up inverter is proposed in this paper. The inverter is formed by integrating a buck–boost converter into a conventional single-phase full-bridge inverter by sharing the upper switch and the body diode of the lower switch in both bridge-legs. Consequently, the component count is significantly reduced over the step-up inverter counterparts. In addition, to address the drawbacks of hybrid modulation methods adopted by existing dual-leg-integrated inverters, such as double-variable control, and high THD of output voltage/current at high input voltage and heavy load conditions, unipolar frequency doubling sinusoidal pulse width modulation scheme is adopted in this inverter. As a result, the modulation ratio M becomes the only control variable to regulate the output voltage/current and the control is simplified. The THD of the proposed inverter output can remain low throughout the entire input voltage range and load power range. This paper presents the topology derivation procedure, operation principle, and steady-state characteristics of the proposed inverter. To validate the effectiveness of theory, experimental results of a 400 W hardware prototype, where the output voltage frequency is at 500 Hz, are reported. [ABSTRACT FROM PUBLISHER]

A new modulated carrier control (MCC) method is proposed in this paper for a power factor correction (PFC) boost converter, which provides high power factor (PF) and low total harmonic distortion (THD) in wide input voltage and load range. The proposed MCC method employs a zero current duration (ZCD) demodulator that detects ZCD in each switching cycle to estimate current conduction duration of the boost inductor. Using the estimated signal of the ZCD demodulator, the proposed controller generates a compensated duty signal with a PFC converter to properly operate in continuous conduction mode (CCM) or discontinuous conduction mode (DCM). Unlike the conventional MCC PFC converter where the line current is distorted in DCM resulting in poor PF and high THD, the proposed MCC method can provide higher PFC performance regardless of CCM and DCM while maintaining the simple control loop of conventional MCC control method that does not require inner current loop and using relatively small inductance. In this paper, the operational principle of the proposed method has been discussed. To verify the proposed method, it has been tested on a 400-W PFC boost converter. [ABSTRACT FROM AUTHOR]

This paper proposes a single-phase power factor correction (PFC) rectifier to achieve high power factor, wide output voltage range, and ripple power decoupling without using electrolytic capacitors. It consists of two parts: PFC circuit and output voltage regulation circuit. The load side is involved in both parts, which is different from the regular two-stage conversion structure. The proposed rectifier can be directly applied to low voltage cases due to the wide output voltage range. And the decoupling capacitor voltage can be smaller than the peak grid voltage, which reduces the voltage stress. Besides, the low-frequency ripple power buffer is implemented without a dedicated power-buffering controller. This paper first introduces the circuit structure, operation principles, and control method. Then, the system design consideration is given. Finally, the effectiveness of the proposed topology is verified by the simulations and experimental results. [ABSTRACT FROM AUTHOR]

An optimal dual-phase-shift control strategy of an isolated buck–boost converter is proposed in this paper. The theoretical analysis of dual-phase-shift control strategy is complemented, and the three-dimensional graphs of the output current versus two control variables are given. The optimal operating point is determined by the peak current of a clamped inductor and is shown as control trajectories in the three-dimensional graphs. Moreover, with the optimal dual-phase-shift control strategy, low current value, soft-switching operation, wide input voltage range regulation, whole load range regulation, and high-efficiency performance can be achieved. Furthermore, parameter design method deriving from the minimum peak current of the clamped inductor is given. At the end of this paper, a 1000 W-output prototype is fabricated to verify the effectiveness of the proposed control strategy. [ABSTRACT FROM AUTHOR]

A switched-capacitor-based dual-switch dc–dc converter with a high-boost voltage gain is proposed in this paper. The proposed converter can obtain a high-voltage gain with a small duty cycle, which decreases the voltage stress and the conduction loss on the power switches. This paper presents the key waveforms, the operating principles at the continuous conduction mode and the discontinuous conduction mode, and the parameter design. Moreover, a comparison between the proposed converter and other nonisolated converters has been completed. To verify the operating principle, a 200 W prototype is constructed with an input voltage of 25–50 V and an output voltage of 200 V. The simulation and experimental results are shown. [ABSTRACT FROM PUBLISHER]

This paper proposes a decentralized current-sharing control strategy to endow fast transient response to paralleled dc–dc converters systems, such as dc microgrids or distributed power systems. The proposed controller consist of two main control loops: an external voltage droop control for current-sharing proposes and an internal current loop. The external droop control loop is designed as a voltage loop with embedded virtual impedance, which avoids the use of a slow voltage loop and a separate extra virtual impedance loop that may limit the system bandwidth. The internal current loop, thanks to the external control loop simplification, plays a major role in the system bandwidth, so that an adaptive proportional-integral (PI) controller is proposed for this matter. In the paper, two different droop control methods have been modeling, designed, simulated, and tested: The conventional virtual-impedance-loop based V–I droop and the proposed embedded-virtual-impedance based I–V droop. In order to compare the dynamic response performances between two droop controllers, their state-space models have been developed and analyzed in this paper. The results show that the dynamic response of the I–V droop control is faster than that of the conventional V–I droop control. Furthermore, by analyzing the effects from I–V droop control parameters, the errors can be reduced faster by enlarging the proportional terms, but with no fluctuations, and then completely eliminated by restoring back to small proportional values. Meanwhile, there exists a tradeoff phenomenon between the fast dynamic response and good steady-state performance; thus, an adaptive PI controller is proposed to both improve dynamic response and guarantee good steady-state performance simultaneously. Experimental results are shown to verify the accuracy of the models and the effectiveness of the proposed control framework. [ABSTRACT FROM PUBLISHER]

Sheppard–Taylor power factor correction (ST-PFC) rectifier could obtain a high power factor due to its capability of overcoming the control detuning issue. However, it needs a bulky electrolytic capacitor at the load side to buffer the double-frequency ripple power (DFRP), which reduces the reliability and power density significantly. This paper proposes a control method to divert the DFRP to the small energy transfer capacitor. Consequently, the bulky electrolytic capacitor is replaced with a small film capacitor. The proposed method is carried out by introducing the freewheel state (one switch is turned on and the other is turned off) into the control. So no extra hardware is added, which makes the proposed method cost-effective. A low electromagnetic interference emission is also achieved due to the continuous input–output currents. In addition, the proposed method can be extended to other topologies easily. This paper first gives the detailed analysis of the proposed control method, and then introduces the controller design. The selection of the passive components is also briefly discussed. Finally, the simulation and experimental results verify the effectiveness of the proposed control method. [ABSTRACT FROM AUTHOR]

These days, constant on-time current mode (COTCM) control scheme is widely used in the voltage regulator (VR) controllers because it has a higher light-load efficiency and a higher BW design capability while maintaining a simpler compensation requirement. One issue plaguing the COTCM control is its slow transient response which is caused by its fixed TON operation. During the heavy-load step-up transient, the duty cycle becomes saturated and the inductor current increment becomes limited by TON and the minimum off time (TOFF$\_$ MIN) ratio, which can create a large undershoot at load step up. On the other hand, in the load step-down case, if the load step down occurs at the beginning of TON, a large overshoot can be created at the output. To solve this issue, this paper presents a method designed to increase the TON at load step up and then very quickly, decrease at load step down in order to reduce the undershoot and overshoot at output or otherwise save the output capacitor. In this proposed method, the increase or decrease of T ON is proportional to the output change which eliminates the chance of any overcorrection or ring-back problem unlike the methods presented in prior forums. This feature enables the control to work seamlessly in a high-frequency load repetitive case in VR applications. Since this TON change occurs only in the transient period when duty cycle is saturated, it does not affect the small-signal property of the COT control. Moreover, the proposed methods are very much compatible with the state-of-the-art single and multiphase COT control structures. Simulation and test results in both single and multiphase operations are also presented in the paper to verify the proposed concept. [ABSTRACT FROM PUBLISHER]

A novel soft-switching interleaved coupled-inductor boost converter is proposed in this paper. Only a single active soft-switching module is needed to simultaneously achieve the soft-switching property of the two switches in the interleaved coupled-inductor boost converter. The better efficiency is achieved with the less components and cost. The two main switches can achieve the ZVT turn-on and smaller-current turn-off simultaneously when the single active soft-switching module is active. Due to the coupling characteristic of the inductors, the voltages across the two inductors are changed at the same time; therefore, the equivalent circuit is equal to the parasitic capacitors of the two main switches in parallel to resonate with the auxiliary inductor. By coupling two input inductors, the volume and cost of the circuit can be reduced. The interleaved coupled-inductor topology can also reduce the input and output current ripples and share the input and output currents. The operating modes, analysis, and design of the proposed circuit have been discussed in this paper. Simulation and experiments are finally conducted to verify the validity of the proposed circuit. [ABSTRACT FROM PUBLISHER]

DC electric springs (DCES) are emerging technologies for the (i) regulation of mains voltage against the intermittent renewable generations and (ii) harmonic cancellation in dc microgrids. When conventional converter topologies (e.g., half-bridge or full-bridge converter) are adopted as DCES, the battery storage of the DCES has to process both the dc power and the ac harmonic power. The pulsating ac power can severely reduce the lifetime of the battery. To address this issue, a hybrid-DCES (H-DCES) is proposed in this paper to perform (i) and (ii) in a decoupled manner. With a modified topology and control method, the H-DCES can divert the ac current to the ground and retains the function of manipulating noncritical load for dc voltage regulation. The immediate benefits of this H-DCES are the reduction of storage capacity and a prolonged lifetime of the battery. Both the operating principle and the mathematical model of the proposed H-DCES are analyzed in this paper. A prototype of the H-DCES is practically tested in a 48-V dc grid. The experimental results show that the H-DCES can realize the decoupled operation of dc voltage regulation and harmonic cancellation. Simulation studies further demonstrate that the H-DCES requires less storage capacity than its counterparts. [ABSTRACT FROM AUTHOR]

This paper documents a new three-switch, isolated boost dc–dc converter. The major features of the proposed converter are as follows: 1) continuous input current; 2) reduced one active switch, one additional diode, and one additional capacitor; 3) unchanged primary and secondary voltage waveforms of the transformer when the duty cycle is changed; and 4) removal of the snubber circuit. This paper presents the operating principles, analysis, parameter design guidelines, and simulation results for the proposed converter. To verify the performance of the proposed converter, a 400 W prototype was constructed with a 40–60 V dc input. A PID controller was used to maintain the dc output voltage at 400 V. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

In high-power applications, parallel operation is required to improve both efficiency and reliability. In an LLC converter, it is difficult to achieve parallel operation due to the gain sensitivity to component tolerance. This paper proposes a new structure of a common resonant capacitor for a multiphase LLC converter, which can achieve very good current-sharing performance with no additional components or control. To evaluate the current-sharing performance, a new first harmonic approximation (FHA) model is built in this paper to analyze the LLC converter with coupled resonant tanks. Both FHA analysis and powersim (PSIM) simulation results demonstrate the load-sharing improvement of the proposed common capacitor LLC resonant converter over the conventional two-phase LLC converter. The current-sharing performance from the FHA analysis and the PSIM simulation are compared, and the error of the FHA analysis is evaluated and explained. A 600 W two-phase LLC converter prototype based on the proposed method is also built to verify the feasibility. Excellent current-sharing performance (6% resonant current sharing error at a wide load range) has been achieved. [ABSTRACT FROM PUBLISHER]

An extended-duty-ratio (EDR) boost converter is studied extensively in this paper for high voltage gain applications with a wide input (and/or output) voltage range. The EDR is a unique combination of an interleaved, multiphase boost converter and switched capacitor configuration that achieves high voltage gain with significantly lower switch voltage stress and switching losses compared to conventional high-gain solutions. Most of the switches in the multiphase EDR experience only a fixed fraction of the output voltage ($1/M, 2/M$ , etc., where $M$ is the number of phases). Through extensive analysis over a wide operating range, it is shown here that the EDR boost converter has inherent current sharing among the phases only in a limited range of duty ratio— $(M-1)/M \leq D \leq 1$. As the duty ratio reduces beyond this range as required in wide input voltage applications, inherent current sharing property is lost. In this paper, techniques to ensure current sharing under all operating zones without requiring current sensors are presented. Instead of having equal duty ratio for each phase, it is adjusted for each phase according to the operating region of the converter. Extensive analysis is presented to derive the required duty ratio changes for the different phases. The proposed concept is validated with experimental results from a 250 W, 3-phase EDR boost, and GaN-based hardware prototype. [ABSTRACT FROM AUTHOR]

Conventional single-phase power-factor-correction (PFC) rectifiers with active power decoupling capability typically require more than three active switches in their circuits. By exploring the concept of power-buffer cell, a new single-stage PFC rectifier with two active switches, one inductor and one small power-buffering capacitor is reported in this paper. The proposed converter can achieve high-power factor, wide output voltage range, and power decoupling function without using electrolytic capacitor. Additionally, an automatic power decoupling control scheme that is simple and easy to implement is proposed in this paper. The operating principle, control method, and design considerations of the proposed rectifier are also provided. A 100-W prototype with ac input voltage of 110 Vrms and a regulated dc output voltage ranging from 30 to 100 V has been successfully designed and practically tested. The experimental results show that with only a 15 μF power-buffering film capacitor, the proposed converter can achieve an input power factor of over 0.98, peak efficiency of 93.9%, and output voltage ripple of less than 3%, at 100-W output power. [ABSTRACT FROM PUBLISHER]

This paper proposes a new methodology to control a three-phase boost power factor correction (PFC) using a single dc output voltage sensor. Typically, a PFC control technique requires measurement from five independent sensors, i.e., two input voltages, one output dc voltage, and two input phase currents. Elimination of four sensors in the control system of a PFC converter is theoretically feasible and implementable without compromising stability and power quality of the converter, as analyzed and presented in this paper. The proposed control technique uses the ripple information of the measured dc-link voltage, converter dynamics, and switching states at a preceding sample in order to estimate the present state of four other unknown state variables and, thus, establishes the control method. A 2.2-kW experimental prototype of a three-phase boost PFC is developed and tested to verify the accuracy and applicability of the proposed control logic at different line and load conditions. According to the experimental measurements, conversion efficiency more than 98%, total harmonic distortion as low as 4.3%, and an output voltage ripple of ±2% are achieved at 2.2-kW output power. [ABSTRACT FROM AUTHOR]

This paper proposes a very simple analog control for quasi-square-wave zero voltage switching (QSW-ZVS) and triangular current mode bidirectional converters. The proposed circuit controls the inductance current, thanks to the use of a variable-width hysteretic current mode control. The upper and lower bounds of the hysteretic band are clamped to ensure QSW-ZVS operation with a single current command and independently from power flow direction. This enables the control to achieve a seamless transition between source and sink modes. The advantages and disadvantages of the proposed analog control are analyzed and two different power converters are built to demonstrate the validity of this solution: a 50 W, 48 to 24 V bidirectional buck converter and a 100 W, 24 to 48 V bidirectional boost converter. [ABSTRACT FROM AUTHOR]

In this paper, a family of new step-up series–parallel dual resonant switched-capacitor converters (SP-DRSCs) is proposed to extend the conversion ratio for high step-up applications. The converters feature a wide gain range, continuously adjustable, and enhanced light-load voltage regulation. All flying capacitors operate in resonance, eliminating high transient current spikes and charge sharing losses. Thus, zero-current-switching (ZCS) turn-on for all transistors and ZCS turn-off for all diodes are achieved. A comprehensive analysis of the operation principle, voltage-gain curves, stable regulation range, and voltage and current stress is given. An analytical method to quantify the passive component volume for the group of step-up dual resonance switched-capacitor converters is presented. Further design considerations to optimize the passive component volume of the proposed SP-DRSC and the effect of bulky bypass capacitors on the volume are discussed. [ABSTRACT FROM AUTHOR]

The power efficiency and weight of present point-of-load (POL) dc–dc converters for drone applications are often compromised because they suffer from large switching losses at continuous conduction mode for heavy loads and excessive hardware overheads at discontinuous conduction mode for light loads. This paper presents a boundary conduction mode (BCM) control scheme for POL converters embodying a single operation mode. This is achieved by means of a hysteresis voltage controller to turn on/off the output power stage when necessary. The proposed BCM control scheme achieves high power efficiency (≥91.2%) over a wide load range (5 mA–1 A) by means of fully soft switching. Specifically, a hysteretic current controller is proposed to realize ZCS, and an adaptive dead time controller is proposed to realize ZVS. Further, the proposed BCM control scheme requires a small output inductor (0.82 μH) by means of designing the customizable peak inductor current. To verify the proposed BCM control scheme, we realize a BCM-based POL converter that features an input voltage range of 5–16 V, output voltage range of 2.5–8 V, switching frequency of 1.5 MHz, peak power efficiency of 96.8%, and ≤35 mV output voltage undershoot/overshoot for 1-A load step. When being benchmarked against state-of-the-art counterparts, the proposed design features the lowest voltage undershoot/overshoot, the highest switching frequency, ∼5.7× smaller inductor, and ∼11% higher power efficiency at light loads. [ABSTRACT FROM AUTHOR]

This paper proposes a ripple injection method in a two-stage intermediate bus architecture to overcome the incremental negative-impedance effect in the intermediate bus converter (IBC) induced by the constant power load, which is essentially a tightly regulated point of load (PoL) converter. The proposed method uses the voltage ripple of the intermediate bus in the feedback path for the closed-loop PoL converter while operating the IBC in open loop. The small-signal model is derived and verified using SIMPLIS simulation. The voltage ripple is shown to carry the inductor current information of the PoL converter. Thus, the proposed scheme is expected to retain the superior line regulation of current mode control for the PoL converter even without sensing the inductor current. Load current feed forward can improve the transient response for the PoL converter. Moreover, the load current information is also used to generate the appropriate duty ratio for the IBC during transient recovery. A simple PI controller is used for the PoL converter, which reduces the design complexity using the proposed control scheme. A hardware prototype is made, and the superior performance using the proposed control scheme is experimentally verified. [ABSTRACT FROM AUTHOR]

This paper proposes a high-efficiency three-level (TL) dc–dc converter with reduced circulating current and rectifier voltage stress by using coupled inductor in the rectifier circuit. Because of decreased circulating current, the conduction loss in the primary circuit is reduced. In addition, since the rectifier diodes with low forward voltage drop can be employed due to the small voltage stress, the conduction loss of rectifier diodes can be reduced. Therefore, the efficiency can be increased due to the reduction of the conduction losses in the primary circuit and rectifier diodes. The characteristics of the proposed converter are analyzed and compared with other TL converters. The validity of the proposed converter is verified by the experimental results of the prototype with 540–600 VDC input and 750 W (48 V/15.625 A) output. [ABSTRACT FROM AUTHOR]

This paper introduces the high-frequency link concept into the modular multilevel converter (MMC) topology, which can totally reduce the individual dc-link capacitors at the high-voltage side. The proposed converter, called isolated MMC, has basic triple ports of medium-voltage ac, medium-voltage dc, and low-voltage dc. Thus, it is especially suitable for hybrid dc and ac applications in power generation and transmission, such as solid-state transformer. The fundamental principle and applied control scheme of phase-shift pulsewidth modulation are presented in detail. The design of the voltage clamping circuit and analysis of duty loss are carried out. The experimental results are given to illustrate the efficient operation characteristics. [ABSTRACT FROM AUTHOR]

This paper proposes the design of gray wolf optimizer (GWO) algorithm-based fractional order proportional integral (FOPI) controller for power factor correction (PFC) using interleaved dc–dc single ended primary inductance converter converter with improved performance characteristics such as speed, accuracy, and stability. The detailed analysis and modeling of the proposed converter are presented. The optimal parameters of FOPI controller are obtained using GWO algorithm to improve the speed of response of the system. FOPI controller provides better performance in terms of robustness and stability since it has one more adjustable parameter than the conventional proportional integral (PI) controller. The cascade control strategy is implemented for the proposed converter with GWO-based FOPI controller as inner current and outer voltage controllers for PFC and load voltage regulation. The performance characteristics of the proposed system are analyzed and compared with conventional and other optimization techniques using MATLAB/Simulink software. A prototype of the proposed converter controlled by TMS320C2000 microcontroller for an output power of 200 W is tested and validated with the simulation results. The proposed system is used for powering devices like robots in critical applications such as military, space craft, etc., where stability, speed, and accuracy are major concerns. [ABSTRACT FROM AUTHOR]

This paper proposes a constrained modulated model-predictive control (M $^{2}$ PC) scheme for an LC-filtered voltage-source converter (VSC). To tackle the coupling effects of the state variables in a second-order LC filter, a dual-objective cost function (CF) is used to explicitly track both capacitor voltage and inductor current references, which can achieve an improved voltage quality. To handle the state and control input constraints of VSCs, a constrained M $^{2}$ PC scheme is proposed with an “online post-correction” constraint-handling technique. First, the unconstrained optimal voltage vector (OVV) is derived. It is generated by seeking the minimum analytical solution of the CF offline, simplifying the online implementation. Then, an “online post-correction” strategy is employed by reconsidering the constraints to correct the precalculated OVV online, which guarantees the future states within the allowed range. Finally, the corrected OVV is synthesized by the space vector modulation, resulting in a fixed switching frequency and low harmonics. Compared with the typical constrained model-predictive control, the presented scheme has the advantages of improved steady-state performance, flexible constraint-handling ability, and lower computational cost. Additionally, design procedures for weighting factor selection in the CF are given. Comparative experiments are investigated to verify the presented control strategy. [ABSTRACT FROM AUTHOR]

When the interleaved boost power-factor correction (PFC) converter operates in a light load (<15% of nominal load), the phase-shedding control is commonly used to increase the converter's efficiency. If the inductors are coupled for high power density applications, because of the strong mutual effects of the coupled inductor, the switching of the operation phase may lead to a current flowing in the non-operation phase. In this paper, a two-phase interleaved boost PFC converter with a coupled inductor in the single-phase operation was analyzed. The operation modes of the converter in a switching cycle and a half line cycle were presented, and the modes’ variation with the load changes, as well as the power distribution, was provided. A 1-kW prototype was built to verify the analysis, and it was shown that the non-operation phase also delivers some power, which may worsen the converter's efficiency and distort the average input current waveform. [ABSTRACT FROM AUTHOR]

A typical finite-set model predictive control (FS-MPC) scheme for LC-filtered voltage source inverters (VSIs) requires measurements of capacitor voltage and inductor current as well as load current measurement or estimation, which increases the system complexity and cost. To reduce the number of sensors in typical FS-MPC, this paper proposes a new current-sensorless FS-MPC scheme for LC-filtered VSIs. First, based on the inner relationship of the predictive matrices, the predictive model is exactly simplified with the capacitor voltage and its current as the state variables, making it suitable for current-sensorless control. Then, to eliminate the current sensors for cost reduction and reliability enhancement, the dynamic model is reconstructed and an easily implemented capacitor current estimator is designed, which can achieve a comparable performance with typical FS-MPC scheme. Considering the inevitable control delay in digital implementation, the delay compensation is inherently obtained by using the proposed estimator. In addition, the proposed control scheme is flexible to various cost functions and can also reduce the computational cost. The feasibility of the presented control scheme under load variations and model mismatches are verified by the comparative simulation and experimental results with typical FS-MPC. [ABSTRACT FROM AUTHOR]

This paper presents a delta-sigma modulation (DSM) control scheme for noninverting buck–boost (NIBB) converter that features a duobinary encoding for four power switch controls. The proposed scheme converts the single-bit output of the modulator into a 1.5-b signal to enable a three-phase operation comprising the charging, bypassing, and discharging phases. This control method reduces both switching and conduction losses by changing only two switches in each period, thus, achieving high conversion efficiency. A smooth mode transition is provided by the DSM controller, which automatically and continuously determines the operating mode of the converter. Thus, the dead zone can be effectively released with improved transient responses. Furthermore, the spurious tones in the output are effectively eliminated by the robust noise shaping capability of the modulator. The proposed DSM-based NIBB converter was implemented on a 180-nm CMOS. It regulated the output in the range of 2.0–4.6 V with input voltage of 2.5–5.0 V, and the maximal load current was 500 mA. The converter showed a peak efficiency of 94.8% at 90-mA load and the output voltage ripples were maintained under 18 mV. A low noise floor with the first spurious peak located –92 dBc below the signal was achieved across all mode operations. In addition, the converter occupied a small chip area of 1.51 mm2. [ABSTRACT FROM AUTHOR]

The three-level full-bridge (TLFB) dc−dc converter has been widely used in high-voltage, high-power applications. In the experimental test, the neutral-point voltage deviation appears; moreover, it has also been found out that if the flying capacitors are introduced, the input capacitor voltages could realize self-balance even if no active balancing solutions are adopted. In the previous publications, the role of flying capacitors is generally considered to extend the range of soft switching; however, the self-balance ability has not been mentioned or investigated in any publications thus far. In order to fill this gap, this paper provides the detailed mode operation analysis of the TLFB converter and reveals the cause of the imbalance. In addition, the mechanism of the self-balance ability provided by the flying capacitors is explained in detail, which gives a deep insight into the converter. At last, the influence factor of the voltage error in steady state has been analyzed, and the specific expression of the voltage error is also derived. The feasibility of the theoretical analysis is verified by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a family of three-port three-level converters (TPTLC) composed of asymmetrical bidirectional half-bridge modules is proposed, which offers the benefits in terms of a simple control scheme, extended soft switching over a wide range of operating conditions, and reduced voltage stress across switches. The proposed converters take advantage of a pulsewidth modulation plus phase shift control technique to regulate the output voltage as well as to control the power flow between different ports independently. A stacked TPTLC is taken as an example to be introduced in detail to gain a thorough insight into the proposed family of converters. The stacked TPTLC can provide a high voltage gain along with a wide voltage gain range without using any transformer, resulting in the improvement in the power density. In order to minimize the conduction loss and reduce the current stress of switches, the root-mean-square current of the inductor and the boundary condition of the phase-shift controller in different operation scenarios are studied. Finally, the feasibility of the proposed concept and effectiveness of the design approach are validated based on the experimental results of a 1-kW, 100-kHz prototype of the stacked TPTLC using gallium nitride switches. [ABSTRACT FROM AUTHOR]

The pulse-width modulated (PWM) switching rectification that can achieve a high power factor (PF) for increasing the energy transfer efficiency between an LC resonator and a rectifier and voltage step-up and -down conversion is proposed for a wireless power transfer (WPT) receiver. The proposed method can emulate the switching rectifier as a resistive load by using an inductor and integrated phase synchronizers. Additionally, similar to a switched-inductor converter that controls the duty cycle ratio (D), the proposed PWM rectifier can control the output voltage VOUT when the input is a rectified, wirelessly coupled voltage instead of a constant voltage. Thus, unlike a conventional PWM switching rectifier for ac mains, an additional voltage conditioning circuit would not be needed after the proposed rectifier for WPT. The proposed PWM switching rectification is implemented in the AMS 0.18 μm 1.8 V/5 V CMOS process. PF = 1 is measured, indicating the most efficient energy transfer, compared to only 0.55–0.65 in a peak detection rectifier. Additionally, 88.2% of peak power conversion efficiency of the switching rectifier is achieved, and the maximum output power is 80.3 mW at 500 kHz of the WPT frequency. Moreover, the measured voltage conversion ratios ranging between 0.73× and 2× are demonstrated in this paper. [ABSTRACT FROM AUTHOR]

The right-half-plane (RHP) zero in a continuous conduction mode boost converter results in a significantly restricted closed-loop bandwidth (BW) for higher voltage gain and/or load current conditions. A compensating ramp is used for current-mode control (CMC), and a higher ramp slope degrades the BW. Variable-frequency digital CMC offers inherent current-loop stability and real-time tuning scope for higher closed-loop BW. However, the challenges are to select the sampling frequency and sampling instant of the output voltage with discontinuous ripple due to the effective series resistance of the output capacitor, and its impact on stability. This paper shows that an event-based current-mode constant off-time digital modulator achieves superior stability and performance in a boost converter along with the reduced RHP zero effect over other digital CMC techniques. Using a discrete-time framework, the fast-scale stability conditions and small-signal models are analytically derived for various digital CMC techniques, which are validated using SIMPLIS simulation. A boost converter prototype is tested, and the analytical predictions are verified experimentally. Further, the analysis is extended to a non-inverting buck–boost converter. [ABSTRACT FROM AUTHOR]

In this paper, a two-stage transformerless multiple-output converter is proposed for applications requiring a high voltage step-down ratio. The proposed circuit transfers power via a current interface and the use of current-source-mode (CSM) converters, resulting in low voltage stress and drastically simplified control. The first stage of this configuration is regulated to provide a constant current to the second stage. The second stage consists of series-connected CSM boost converters. The high step-down ratio of the proposed configuration reduces the voltage stress in the switches of the second stage. The series-connected CSM converters are inherently independent of each other, leading to a very simple control scheme without the need for decoupling of the input voltage of the interconnected converters. Input voltage variation to the system will not affect the input voltage of the second stage. Load variation in one output will not affect the other outputs. If one or more CSM converters are shorted, there is no impact on other converters. These advantages enable a high scalability. Besides, the first stage of the proposed configuration can operate both in continuous conduction mode (CCM) and discontinuous conduction mode (DCM) with the same control strategy. This feature leads to a low control complexity and elimination of inductors. The performance of the proposed converter is illustrated with a laboratory prototype driving light emitting diodes (LEDs). [ABSTRACT FROM AUTHOR]

There have been several advanced topologies proposed by the community for micro-inverter applications. However, many such applications suffer from unwanted second-order harmonic current ripple at dc input. Moreover, in the absence of suitable passive filter or ripple compensator, the second-order harmonics ripple may propagate into the dc source. This results in several problems to the system, related to system efficiency, life, cost, size, reliability, and stability. This paper proposes an adaptive sliding-mode controller to shape the output impedance of the boost-circuit of quasi-switched boost inverter such that the propagation of the ripple from dc link to the dc-input source is resisted. The quasi-switched boost inverter is one of the advanced and suitable topologies for the micro-inverter applications. The adaptive nature of the proposed controller improves the transient performance of the system at the line–load transients unlike some existing solutions, which affects dynamics adversely to achieve ripple mitigation objective. The controller ensures voltage regulation within ${5\%}$ at dc link. The proposed control technique is verified using a lab-prototype of 500 W quasi-switched boost inverter. [ABSTRACT FROM AUTHOR]

The Class E dc–dc converter, with a simple topology and zero-voltage-switching (ZVS) for the power switch, can operate at a switching frequency of up to megahertz. In this paper, an optimized ZVS operation condition for minimizing the switch voltage stress, switch rms current, and switch voltage harmonic components is derived for the on‐off controlled Class E dc–dc converter by optimizing the time instant at which the switch voltage resonates back to zero. Based on this result, a step-by-step parameter design approach is proposed for a Class E dc–dc converter with a large input inductor, which avoids time-consuming simulations or complex numerical calculations. Then, a capacitance compensation approach is further proposed to extend the design results to a Class E dc–dc converter with a resonant input inductor. Furthermore, an adaptive duty-cycle adjustment scheme is proposed for reducing the reverse conduction loss of the power switch, thereby improving the conversion efficiency over the entire input voltage range. Finally, a prototype of a 20-MHz 10-W Class E dc–dc converter is built and tested in the laboratory, and experimental results are presented to verify the effectiveness of the proposed optimized parameter design approach and the adaptive duty-cycle adjustment scheme. [ABSTRACT FROM AUTHOR]

Small-signal stability of ac power systems is able to be assessed by measuring their terminal impedance, and a transformerless series injector is very attractive for wideband measurement of load impedances. A typical implementation of the transformerless series injector is paralleled H-bridge (PHB) converters, where dc voltage imbalance will occur when system current magnitude is larger than a critical point, and thus the operation region of the series injector is seriously restricted. To address this issue, this paper presents a deep analysis on the mechanism behind dc voltage imbalance for PHB-based series injector, and it is revealed that a positive feedback exists in the dc voltage balancing loop under high system current magnitude. Then an enhanced control scheme is proposed to balance dc voltages in full system current range, where a reactive component is injected in the output voltage while reactive circuiting current is introduced among H-bridge converters for redistributing active power. Furthermore, the system behavior with the proposed scheme is comprehensively analyzed and the reference design for the injected reactive component magnitude in the output voltage is offered. Finally, the imbalance mechanism and the proposed scheme are validated by simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper analyzes the possibility of controlling the output voltage of a standalone single-phase inverter by directly controlling the output filter capacitor current without using a dedicated output voltage sensor. The plant modeling and controller design are presented. The proposed method depends on having the value of the output filter capacitance. A method to estimate the output filter capacitance is also presented. Rigorous analysis is done to show that the proposed sensorless scheme is largely insensitive to parameter variations and ensure that the output voltage is within specified regulations at utility level. It is also demonstrated in this paper that compared to the conventional voltage control scheme the proposed control scheme ensures an improved total harmonic distortion of the output voltage waveform. Experimental results presented validate the proposed scheme. [ABSTRACT FROM AUTHOR]

Filter-based battery–supercapacitor hybrid energy storage systems (HESSs) are popular as a way of extending battery lifetime by diverging the high-frequency power variations to the supercapacitor. However, when a traditional supercapacitor voltage controller (SCVC) is employed in the filter-based HESS, precise sizing of the supercapacitor as well as finding filter parameters for the power allocation are challenging due to nonlinearities. These problems can be circumvented by using a supercapacitor energy controller (SCEC) proposed in this paper. The paper presents a method for selection of the SCEC and filter parameters as well as precise sizing of the supercapacitor for a given application. The proposed method is experimentally verified on a single-phase grid-connected HESS used to smooth the power delivered to the grid at the point of common coupling. It is also shown that the size of the supercapacitor when using the SCEC is significantly lower than the one estimated for the traditional SCVC. [ABSTRACT FROM PUBLISHER]

The boost-inverter-based battery-supercapacitor hybrid energy storage systems (HESSs) are a popular choice for the battery lifetime extension and system power enhancement. Various sliding mode (SM) controllers have been used to control the boost inverter topology in the literature. However, the traditional SM controllers for the boost inverter topology operate with a high and variable switching frequency which increases the power losses and system components design complexity. This can be alleviated by a pulse width modulation (PWM)-based fixed-frequency SM controller proposed in this paper. The SM controller is implemented using variable amplitude PWM carrier signals generated using the output capacitor voltage and inductor current measurements, thus eliminating the requirement of the output capacitor currents measurement. The battery-connected inductor reference currents for the SM controller are generated by a supercapacitor energy controller which is responsible for the HESS power allocation. First, the theoretical aspects of the SM controller, the operation and parameter selection of the supercapacitor energy controller, and the supercapacitor sizing for the HESS are discussed in the paper. Then, the proposed control system is experimentally verified, and it is shown that the HESS is able to satisfy the HESS output power requirements, while allocating the ripple current and the fast power fluctuations to the supercapacitor while maintaining operation of the supercapacitor within predefined voltage limits. The main advantage of the proposed SM controller, as compared with the traditional double-loop control method, is in eliminating possible DC current injection into the grid when the equivalent series resistance values of the boost inductors become unequal due to the tolerances and temperature variations. [ABSTRACT FROM AUTHOR]